dts: arm: renesas: ra: Separate the OFS memory into individual regions

[jeremydick]

Create separate memory regions for each OFS register.
With a single region the linker will gap fill the load segment with zeros between each option setting section that gets placed in the region when generating the .elf file.

This fixes a regression introduced in #93137, which can result in writing zeros to any areas of the OFS that aren't explicitly set when flashing the elf file, potentially permanently lock the flash.

An example seen on the RA6M4

> readelf -l build/zephyr/zephyr.elf

Elf file type is EXEC (Executable file)
Entry point 0x70e1
There are 7 program headers, starting at offset 52

Program Headers:
  Type           Offset   VirtAddr   PhysAddr   FileSiz MemSiz  Flg Align
  EXIDX          0x013248 0x00013130 0x00013130 0x00008 0x00008 R   0x4
  LOAD           0x000118 0x00000000 0x00000000 0x1b7e4 0x1b7e4 RWE 0x8
  LOAD           0x01b900 0x20000000 0x0001b7e4 0x01208 0x01208 RWE 0x8
  LOAD           0x01cb08 0x0001c9ec 0x0001c9ec 0x00004 0x00004 RW  0x4
  LOAD           0x01cb0c 0x0100a100 0x0100a100 0x001cc 0x001cc R   0x4
  LOAD           0x000000 0x20001208 0x20001208 0x00000 0x04510 RW  0x8
  TLS            0x0143e8 0x000142d0 0x000142d0 0x00000 0x0002c R   0x4

 Section to Segment mapping:
  Segment Sections...
   00     .ARM.exidx
   01     rom_start text .ARM.exidx initlevel device_area sw_isr_table _static_thread_data_area adc_driver_api_area flash_driver_api_area gpio_driver_api_area i2c_driver_api_area led_driver_api_area pwm_driver_api_area rtc_driver_api_area sensor_driver_api_area spi_driver_api_area bbram_driver_api_area clock_control_driver_api_area regulator_driver_api_area uart_driver_api_area input_callback_area shell_area shell_root_cmds_area shell_subcmds_area shell_dynamic_subcmds_area cfb_font_area rodata
   02     .ramfunc datas device_states pm_device_slots_area k_heap_area k_msgq_area k_event_area
   03     .last_section
   04     .option_setting_ofs0 .option_setting_dualsel .option_setting_ofs1_sec .option_setting_banksel_sec .option_setting_bps_sec .option_setting_pbps_sec .option_setting_ofs1_sel .option_setting_banksel_sel .option_setting_bps_sel
   05     bss noinit
   06     tbss

load segment 4 will write 0x1cc byes to the OFS at 0x0100a100, the contents of which are:

> hexdump -s 0x01cb0c -n 0x1cc -C build/zephyr/zephyr.elf
0001cb0c  ff ff ff ff 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
0001cb2c  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
0001cc0c  ff fd ff ff 00 00 00 00  00 00 00 00 00 00 00 00  |................|
0001cc1c  ff ff ff ff 00 00 00 00  00 00 00 00 00 00 00 00  |................|
0001cc2c  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
0001cc4c  ff ff ff ff ff ff ff ff  ff ff ff ff 00 00 00 00  |................|
0001cc5c  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
0001cc6c  ff ff ff ff ff ff ff ff  ff ff ff ff 00 00 00 00  |................|
0001cc7c  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
0001cc8c  f8 f8 ff ff 00 00 00 00  00 00 00 00 00 00 00 00  |................|
0001cc9c  ff ff ff ff 00 00 00 00  00 00 00 00 00 00 00 00  |................|
0001ccac  00 00 00 00 00 00 00 00  00 00 00 00 00 00 00 00  |................|
*
0001cccc  ff ff ff ff ff ff ff ff  ff ff ff ff              |............|
0001ccd8

[sonarqubecloud]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarQube Cloud

[thenguyenyf]

Pending until complete discussion. @khoa-nguyen-18 . Please take a look.