This is a 10-day step-by-step guide to learning about the 6502 CPU and LCD controller using the Tang Nano FPGA.
🌐 Available languages: English | 日本語
In this course, you will learn step-by-step from the basics of FPGAs and SystemVerilog to a complete 6502 CPU implementation. Each day balances theory and practice, allowing you to create projects that actually run on the Tang Nano.
- FPGA Development: Master the basic operations of the GoWin EDA tool and Tang Nano.
- SystemVerilog: Acquire skills from basic to advanced hardware description language.
- 6502 Architecture: Understand a classic CPU architecture.
- System Design: Develop skills in integrated design of CPU, memory, and I/O.
- Practical Development: Gain experience with on-device testing and debugging.
- Tang Nano 9K or Tang Nano 20K FPGA development board
- 043026-N6(ML) 4.3" 480×272 LCD Module (used from Day 09 onwards)
- USB-C cable (for programming)
- GoWin EDA (FPGA synthesis and place & route tool)
- cc65 (6502 assembler, used on Day 10)
- srecord (binary conversion tool)
- Make (build system)
macOS:
brew install srecord cc65Linux (Ubuntu/Debian):
sudo apt install srecord cc65 golang gtkwave verilatorGoWin EDA: Download and install from the official website.
Topics:
- Understanding the basic specifications of Tang Nano 9K/20K
- Basic operations and project creation in GoWin EDA
- First HDL project: Blinking LED (Hello World)
- Basics of constraint files (.cst)
Deliverables:
- A simple project that blinks an LED
- Mastery of basic synthesis, place & route, and programming procedures in GoWin EDA
Practice Time: Approx. 2-3 hours
Topics:
- Basic syntax and module structure of SystemVerilog
- Designing combinational circuits (logic gates, decoders, multiplexers)
- Differentiating between
assignandalways_comb - Basics of testbenches
Deliverables:
- 7-segment decoder
- 4-bit ALU (addition, logical operations)
Practice Time: Approx. 3-4 hours
Topics:
- Concepts of clock and reset
- Flip-flops and latches
- Register design using
always_ff - Basics of Finite State Machines (FSM)
- Counters and timer circuits
Deliverables:
- 8-bit counter
- LED PWM dimming controller
- Simple state machine
Practice Time: Approx. 3-4 hours
Topics:
- History and features of the 6502 CPU
- Register set (A, X, Y, SP, PC, P)
- Memory map and addressing
- Instruction fetch, decode, and execute cycle
- Flag register and its operation
Deliverables:
- SystemVerilog model of the 6502 register set
- Simple instruction decoder (for a subset of instructions)
Practice Time: Approx. 2-3 hours
Topics:
- Detailed explanation of the 13 addressing modes of the 6502
- Classification and operation of major instruction groups
- Load/store instructions (LDA, STA, etc.)
- Arithmetic instructions (ADC, SBC, AND, etc.)
- Branch and jump instructions (BEQ, JMP, JSR, etc.)
Deliverables:
- Addressing mode calculator
- Decode table for major instructions
Practice Time: Approx. 3-4 hours
Topics:
- Detailed design of the instruction decoder
- Implementation of the Arithmetic Logic Unit (ALU)
- Flag calculation logic (N, Z, C, V)
- Concept of micro-instruction control
Deliverables:
- Complete instruction decoder module
- 6502-compatible ALU module
- Flag generation logic
Practice Time: Approx. 4-5 hours
Topics:
- Memory bus interface design
- Implementation of stack operations
- Optimization of zero-page access
- Basics of memory-mapped I/O
Deliverables:
- Memory controller module
- Stack pointer control logic
- Address generation unit
Practice Time: Approx. 4-5 hours
Topics:
- Integration of the CPU core
- Instruction cycle control
- Testing with basic 6502 programs
- Debugging techniques and simulation
Deliverables:
- A functional 6502 CPU core
- Verification of the basic instruction set
- A set of test programs
Practice Time: Approx. 5-6 hours
Topics:
- Principles of LCD timing control
- RGB signal generation and VGA/LCD output
- Design of a character display system
- Implementation of VRAM (Video RAM)
- How to use a font ROM
Deliverables:
- LCD controller module
- System with character display functionality
- Character output at 480×272 resolution
Practice Time: Approx. 4-5 hours
Topics:
- How to use the cc65 assembler
- Practical 6502 assembly programming
- Utilizing custom instructions (CVR, IFO, HLT, WVS)
- Full system testing and debugging
- Creating application programs
Deliverables:
- "Hello World" display program
- Scrolling text display
- Interactive demo program
Practice Time: Approx. 3-4 hours
├── README_ja.md # This file (main guide)
├── day99_completed/ # Final completed product (for reference)
│
├── day01/ # Learning directory
│ ├── README_ja.md # Detailed explanation for the day
│ └── (Basic templates)
├── day01_completed/ # Complete version
│ └── (The complete project for the day)
│
├── day02/
├── day02_completed/
│
... (Similarly for day03 to day10)
-
Daily Study:
- Learn the theory from
dayXX/README_ja.md. - Practice with the templates in
dayXX/. - If you get stuck, refer to
dayXX_completed/.
- Learn the theory from
-
On-Device Verification:
- Test each day's deliverables on the actual Tang Nano.
- Experience the differences between simulation and real hardware.
-
Step-by-Step Understanding:
- Make sure you understand the content of the previous day before moving on.
- Don't hesitate to refer to the completed version if you don't understand something.
Upon completing this course, you will have acquired the following skills:
- FPGA Development: Ability to create and debug basic FPGA projects.
- SystemVerilog: Ability to design at an intermediate level of HDL.
- CPU Design: Understanding and ability to design a simple CPU architecture.
- System Integration: Ability to design a system combining CPU, memory, and I/O.
- Practical Skills: Ability to not only understand theory but also test and debug on real hardware.
- 6502.org - Official 6502 CPU documentation
- GoWin EDA Documentation - FPGA development tool
- SystemVerilog LRM - Language specification
day99_completed/docs/- Detailed technical documents
Each day's directory contains detailed explanations and practice guides. If you get stuck:
- Re-read the
README_ja.mdfor that day. - Refer to the completed version in
dayXX_completed/. - Check the technical documents in
day99_completed/docs/.
When you are ready to start learning, begin with day01/README_ja.md!