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Pull requests: efabless/caravel_mgmt_soc_litex

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Pull requests list

Add newfill cell to cvc pdk
#140 opened Dec 18, 2024 by M0stafaRady Loading…
3
Bug fixes: verilog/dv/tests-standalone/uart
#138 opened Sep 8, 2024 by edowson Loading…
Fix bug at user APIs access type
#137 opened Apr 15, 2024 by M0stafaRady Loading…
@algofoogle
1
Remove in correct double declaration of reg_debug_2 and reg_debug_1 defs.h
#134 opened Dec 4, 2023 by M0stafaRady Loading…
1
1
Added an initialization loop to the SPI flash emulation module
#133 opened Nov 15, 2023 by RTimothyEdwards Loading…
@RTimothyEdwards
2
Update Litex mgmt soc
#122 opened Feb 3, 2023 by tmichalak Loading…
5
Remove verilog/rtl/RAM128.v
#118 opened Nov 25, 2022 by antonblanchard Loading…
2
2nd attempt to push the simulation of caravan I/O and the simulation Verilog testbenches and simulation
#104 opened Oct 20, 2022 by RTimothyEdwards Loading…
@RTimothyEdwards
2
fix issue_34 flow Changes to Makefile and process flow
#35 opened Apr 4, 2022 by suppamax Loading…
1
verilog/dv/make: fix typo in comments flow Changes to Makefile and process flow
#28 opened Mar 17, 2022 by proppy Loading…
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