Support for the NUCLEO H753ZI

connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/CMakeLists.txt

@@ -9,6 +9,8 @@ elseif("NUCLEO_H743ZI" IN_LIST MBED_TARGET_LABELS)
     add_subdirectory(TARGET_NUCLEO_H743ZI)
 elseif("NUCLEO_H743ZI2" IN_LIST MBED_TARGET_LABELS)
     add_subdirectory(TARGET_NUCLEO_H743ZI2)
+elseif("NUCLEO_H753ZI" IN_LIST MBED_TARGET_LABELS)
+    add_subdirectory(TARGET_NUCLEO_H753ZI)
 endif()
 
 target_include_directories(mbed-emac

connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/TARGET_NUCLEO_H753ZI/CMakeLists.txt

@@ -0,0 +1,7 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+target_sources(mbed-emac
+    INTERFACE
+        stm32h7_eth_init.c
+)

connectivity/drivers/emac/TARGET_STM/TARGET_STM32H7/TARGET_NUCLEO_H753ZI/stm32h7_eth_init.c

@@ -0,0 +1,163 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2018, STMicroelectronics
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *
+ * 1. Redistributions of source code must retain the above copyright notice,
+ *    this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright notice,
+ *    this list of conditions and the following disclaimer in the documentation
+ *    and/or other materials provided with the distribution.
+ * 3. Neither the name of STMicroelectronics nor the names of its contributors
+ *    may be used to endorse or promote products derived from this software
+ *    without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
+ * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
+ * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
+ * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+ * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef USE_USER_DEFINED_HAL_ETH_MSPINIT
+
+#include "stm32h7xx_hal.h"
+#include "platform/mbed_critical.h"
+
+#define MCO_Pin GPIO_PIN_0
+#define MCO_GPIO_Port GPIOH
+#define RMII_MDC_Pin GPIO_PIN_1
+#define RMII_MDC_GPIO_Port GPIOC
+#define RMII_REF_CLK_Pin GPIO_PIN_1
+#define RMII_REF_CLK_GPIO_Port GPIOA
+#define RMII_MDIO_Pin GPIO_PIN_2
+#define RMII_MDIO_GPIO_Port GPIOA
+#define RMII_CRS_DV_Pin GPIO_PIN_7
+#define RMII_CRS_DV_GPIO_Port GPIOA
+#define RMII_RXD0_Pin GPIO_PIN_4
+#define RMII_RXD0_GPIO_Port GPIOC
+#define RMII_RXD1_Pin GPIO_PIN_5
+#define RMII_RXD1_GPIO_Port GPIOC
+#define RMII_TXD1_Pin GPIO_PIN_13
+#define RMII_TXD1_GPIO_Port GPIOB
+#define TMS_Pin GPIO_PIN_13
+#define TMS_GPIO_Port GPIOA
+#define TCK_Pin GPIO_PIN_14
+#define TCK_GPIO_Port GPIOA
+#define RMII_TX_EN_Pin GPIO_PIN_11
+#define RMII_TX_EN_GPIO_Port GPIOG
+#define RMII_TXD0_Pin GPIO_PIN_13
+#define RMII_TXD0_GPIO_Port GPIOG
+
+/**
+ * Override HAL Eth Init function
+ */
+void HAL_ETH_MspInit(ETH_HandleTypeDef *heth)
+{
+    GPIO_InitTypeDef GPIO_InitStruct;
+    if (heth->Instance == ETH) {
+        /* Disable DCache for STM32H7 family */
+        core_util_critical_section_enter();
+        SCB_DisableDCache();
+        core_util_critical_section_exit();
+
+        /* GPIO Ports Clock Enable */
+        __HAL_RCC_GPIOH_CLK_ENABLE();
+        __HAL_RCC_GPIOC_CLK_ENABLE();
+        __HAL_RCC_GPIOA_CLK_ENABLE();
+        __HAL_RCC_GPIOB_CLK_ENABLE();
+        __HAL_RCC_GPIOG_CLK_ENABLE();
+
+        /* Enable Peripheral clock */
+        __HAL_RCC_ETH1MAC_CLK_ENABLE();
+        __HAL_RCC_ETH1TX_CLK_ENABLE();
+        __HAL_RCC_ETH1RX_CLK_ENABLE();
+
+        /**ETH GPIO Configuration
+            PC1     ------> ETH_MDC
+            PA1     ------> ETH_REF_CLK
+            PA2     ------> ETH_MDIO
+            PA7     ------> ETH_CRS_DV
+            PC4     ------> ETH_RXD0
+            PC5     ------> ETH_RXD1
+            PB13     ------> ETH_TXD1
+            PG11     ------> ETH_TX_EN
+            PG13     ------> ETH_TXD0
+        */
+        GPIO_InitStruct.Pin = RMII_MDC_Pin;
+        GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+        GPIO_InitStruct.Pull = GPIO_NOPULL;
+        GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
+        GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+        HAL_GPIO_Init(RMII_MDC_GPIO_Port, &GPIO_InitStruct);
+
+        GPIO_InitStruct.Pin = RMII_REF_CLK_Pin | RMII_MDIO_Pin | RMII_CRS_DV_Pin;
+        GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+        GPIO_InitStruct.Pull = GPIO_NOPULL;
+        GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+        GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+        HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
+
+        GPIO_InitStruct.Pin = RMII_RXD0_Pin | RMII_RXD1_Pin;
+        GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+        GPIO_InitStruct.Pull = GPIO_NOPULL;
+        GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+        GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+        HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
+
+        GPIO_InitStruct.Pin = RMII_TXD1_Pin;
+        GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+        GPIO_InitStruct.Pull = GPIO_NOPULL;
+        GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+        GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+        HAL_GPIO_Init(RMII_TXD1_GPIO_Port, &GPIO_InitStruct);
+
+        GPIO_InitStruct.Pin = RMII_TX_EN_Pin | RMII_TXD0_Pin;
+        GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
+        GPIO_InitStruct.Pull = GPIO_NOPULL;
+        GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
+        GPIO_InitStruct.Alternate = GPIO_AF11_ETH;
+        HAL_GPIO_Init(GPIOG, &GPIO_InitStruct);
+    }
+}
+
+/**
+ * Override HAL Eth DeInit function
+ */
+void HAL_ETH_MspDeInit(ETH_HandleTypeDef *heth)
+{
+    if (heth->Instance == ETH) {
+        /* Disable Peripheral clock */
+        __HAL_RCC_ETH1MAC_CLK_DISABLE();
+        __HAL_RCC_ETH1TX_CLK_DISABLE();
+        __HAL_RCC_ETH1RX_CLK_DISABLE();
+
+        /**ETH GPIO Configuration
+            PC1     ------> ETH_MDC
+            PA1     ------> ETH_REF_CLK
+            PA2     ------> ETH_MDIO
+            PA7     ------> ETH_CRS_DV
+            PC4     ------> ETH_RXD0
+            PC5     ------> ETH_RXD1
+            PB13     ------> ETH_TXD1
+            PG11     ------> ETH_TX_EN
+            PG13     ------> ETH_TXD0
+        */
+        HAL_GPIO_DeInit(GPIOC, RMII_MDC_Pin | RMII_RXD0_Pin | RMII_RXD1_Pin);
+
+        HAL_GPIO_DeInit(GPIOA, RMII_REF_CLK_Pin | RMII_MDIO_Pin | RMII_CRS_DV_Pin);
+
+        HAL_GPIO_DeInit(RMII_TXD1_GPIO_Port, RMII_TXD1_Pin);
+
+        HAL_GPIO_DeInit(GPIOG, RMII_TX_EN_Pin | RMII_TXD0_Pin);
+    }
+}
+
+#endif /* USE_USER_DEFINED_HAL_ETH_MSPINIT */

storage/kvstore/kv_config/global/mbed_lib.json

@@ -29,6 +29,9 @@
         "NUCLEO_H743ZI2": {
             "storage_type": "TDB_INTERNAL"
         },
+        "NUCLEO_H753ZI": {
+            "storage_type": "TDB_INTERNAL"
+        },
         "DISCO_H747I": {
             "storage_type": "TDB_INTERNAL"
         },

targets/TARGET_STM/TARGET_STM32H7/CMakeLists.txt

@@ -8,6 +8,7 @@ add_subdirectory(TARGET_STM32H743xI EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32H745xI EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32H747xI EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32H750xB EXCLUDE_FROM_ALL)
+add_subdirectory(TARGET_STM32H753xI EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32H7A3xIQ EXCLUDE_FROM_ALL)
 add_subdirectory(TARGET_STM32H7B3xIQ EXCLUDE_FROM_ALL)
 add_subdirectory(STM32Cube_FW EXCLUDE_FROM_ALL)

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/CMakeLists.txt

@@ -0,0 +1,28 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+add_subdirectory(TARGET_NUCLEO_H753ZI EXCLUDE_FROM_ALL)
+
+if(${MBED_TOOLCHAIN} STREQUAL "GCC_ARM")
+    set(STARTUP_FILE TOOLCHAIN_GCC_ARM/startup_stm32h753xx.S)
+    set(LINKER_FILE TOOLCHAIN_GCC_ARM/STM32H753xI.ld)
+elseif(${MBED_TOOLCHAIN} STREQUAL "ARM")
+    set(STARTUP_FILE TOOLCHAIN_ARM/startup_stm32h753xx.S)
+    set(LINKER_FILE TOOLCHAIN_ARM/stm32h753xI.sct)
+endif()
+
+add_library(mbed-stm32h753xi INTERFACE)
+
+target_sources(mbed-stm32h753xi
+    INTERFACE
+        ${STARTUP_FILE}
+)
+
+target_include_directories(mbed-stm32h753xi
+    INTERFACE
+        .
+)
+
+mbed_set_linker_script(mbed-stm32h753xi ${CMAKE_CURRENT_SOURCE_DIR}/${LINKER_FILE})
+
+target_link_libraries(mbed-stm32h753xi INTERFACE mbed-stm32h7)

targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H753xI/TARGET_NUCLEO_H753ZI/CMakeLists.txt

@@ -0,0 +1,17 @@
+# Copyright (c) 2020 ARM Limited. All rights reserved.
+# SPDX-License-Identifier: Apache-2.0
+
+add_library(mbed-nucleo-h753zi INTERFACE)
+
+target_sources(mbed-nucleo-h753zi
+    INTERFACE
+        PeripheralPins.c
+        system_clock.c
+)
+
+target_include_directories(mbed-nucleo-h753zi
+    INTERFACE
+        .
+)
+
+target_link_libraries(mbed-nucleo-h753zi INTERFACE mbed-stm32h753xi)