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STM32H7: code and feature alignment for both NUCLEO and DISCO targets #11789

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Merged
merged 4 commits into from
Nov 4, 2019
Merged

STM32H7: code and feature alignment for both NUCLEO and DISCO targets #11789

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d7d0d0b
STM32H7 FLASH and DEVICE_KEY
jeromecoutant Oct 31, 2019
0c740e7
STM32H7: update PeripheralPin generation script and pin files accordi…
jeromecoutant Oct 31, 2019
21ff11c
STM32H7 alignment within family
jeromecoutant Oct 31, 2019
c7ca6f7
STM32H7 linker script files alignment
jeromecoutant Oct 31, 2019
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9 changes: 9 additions & 0 deletions features/storage/kvstore/conf/global/mbed_lib.json
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Original file line number Diff line number Diff line change
Expand Up @@ -20,9 +20,18 @@
"NUCLEO_F429ZI": {
"storage_type": "TDB_INTERNAL"
},
"NUCLEO_H743ZI": {
"storage_type": "TDB_INTERNAL"
},
"NUCLEO_H743ZI2": {
"storage_type": "TDB_INTERNAL"
},
"DISCO_H747I": {
"storage_type": "TDB_INTERNAL"
},
"DISCO_H747I_CM4": {
"storage_type": "TDB_INTERNAL"
},
"UBLOX_EVK_ODIN_W2": {
"storage_type": "TDB_INTERNAL"
},
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4 changes: 2 additions & 2 deletions features/storage/kvstore/conf/tdb_internal/mbed_lib.json
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Expand Up @@ -16,10 +16,10 @@
"internal_base_address": "0x00028000"
},
"DISCO_H747I": {
"internal_size": "256*1024",
"internal_size": "2*FLASH_SECTOR_SIZE",
"internal_base_address": "0x080C0000"
},
"ARM_MUSCA_A1_S": {
"ARM_MUSCA_A1_S": {
"internal_size": "0x8000",
"internal_base_address": "0x00420000"
},
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16 changes: 9 additions & 7 deletions targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/PeripheralPins.c
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Expand Up @@ -26,6 +26,8 @@
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*
* Automatically generated from STM32H743ZITx.xml
*/

#include "PeripheralPins.h"
Expand Down Expand Up @@ -72,10 +74,10 @@ MBED_WEAK const PinMap PinMap_ADC[] = {
{PA_7_ALT0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC1_INP7 // Connected to RMII_CRS_DV
{PA_7_ALT1, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 3, 0)}, // ADC2_INN3 // Connected to RMII_CRS_DV
{PA_7_ALT2, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 7, 0)}, // ADC2_INP7 // Connected to RMII_CRS_DV
{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INN5 // Connected to LD1 [Green Led]
{PB_0_ALT0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9 // Connected to LD1 [Green Led]
{PB_0_ALT1, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INN5 // Connected to LD1 [Green Led]
{PB_0_ALT2, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9 // Connected to LD1 [Green Led]
{PB_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INN5
{PB_0_ALT0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC1_INP9
{PB_0_ALT1, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INN5
{PB_0_ALT2, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 9, 0)}, // ADC2_INP9
{PB_1, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC1_INP5
{PB_1_ALT0, ADC_2, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 5, 0)}, // ADC2_INP5
{PC_0, ADC_1, STM_PIN_DATA_EXT(STM_MODE_ANALOG, GPIO_NOPULL, 0, 10, 0)}, // ADC1_INP10
Expand Down Expand Up @@ -188,9 +190,9 @@ MBED_WEAK const PinMap PinMap_PWM[] = {
{PA_10, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 0)}, // TIM1_CH3 // Connected to USB_ID
{PA_11, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 4, 0)}, // TIM1_CH4 // Connected to USB_DM
{PA_15, PWM_2, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM2, 1, 0)}, // TIM2_CH1
{PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N // Connected to LD1 [Green Led]
{PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3 // Connected to LD1 [Green Led]
{PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N // Connected to LD1 [Green Led]
{PB_0, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 2, 1)}, // TIM1_CH2N
{PB_0_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 3, 0)}, // TIM3_CH3
{PB_0_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 2, 1)}, // TIM8_CH2N
{PB_1, PWM_1, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF1_TIM1, 3, 1)}, // TIM1_CH3N
{PB_1_ALT0, PWM_3, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF2_TIM3, 4, 0)}, // TIM3_CH4
{PB_1_ALT1, PWM_8, STM_PIN_DATA_EXT(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF3_TIM8, 3, 1)}, // TIM8_CH3N
Expand Down
31 changes: 15 additions & 16 deletions targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H743xI/TARGET_NUCLEO_H743ZI/system_clock.c
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Original file line number Diff line number Diff line change
@@ -1,17 +1,16 @@
/* mbed Microcontroller Library
* Copyright (c) 2006-2017 ARM Limited
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
/*
******************************************************************************
* @attention
*
* <h2><center>&copy; Copyright (c) 2018-2019 STMicroelectronics.
* All rights reserved.</center></h2>
*
* This software component is licensed by ST under BSD 3-Clause license,
* the "License"; You may not use this file except in compliance with the
* License. You may obtain a copy of the License at:
* opensource.org/licenses/BSD-3-Clause
*
******************************************************************************
*/

/**
Expand Down Expand Up @@ -101,7 +100,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
/* Configure the main internal regulator output voltage */
__HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);

while(!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}
while (!__HAL_PWR_GET_FLAG(PWR_FLAG_VOSRDY)) {}

/* Enable HSE Oscillator and activate PLL with HSE as source */
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE | RCC_OSCILLATORTYPE_HSI48;
Expand Down Expand Up @@ -136,7 +135,7 @@ uint8_t SetSysClock_PLL_HSE(uint8_t bypass)
RCC_ClkInitStruct.APB2CLKDivider = RCC_APB2_DIV2;
RCC_ClkInitStruct.APB3CLKDivider = RCC_APB3_DIV2;
RCC_ClkInitStruct.APB4CLKDivider = RCC_APB4_DIV2;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
return 0; // FAIL
}

Expand Down
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