@@ -753,7 +753,7 @@ fn dummy_output_type<'ll>(cx: &CodegenCx<'ll, '_>, reg: InlineAsmRegClass) -> &'
753753/// Helper function to get the LLVM type for a Scalar. Pointers are returned as
754754/// the equivalent integer type.
755755fn llvm_asm_scalar_type < ' ll > ( cx : & CodegenCx < ' ll , ' _ > , scalar : Scalar ) -> & ' ll Type {
756- match scalar. value {
756+ match scalar. primitive ( ) {
757757 Primitive :: Int ( Integer :: I8 , _) => cx. type_i8 ( ) ,
758758 Primitive :: Int ( Integer :: I16 , _) => cx. type_i16 ( ) ,
759759 Primitive :: Int ( Integer :: I32 , _) => cx. type_i32 ( ) ,
@@ -774,7 +774,7 @@ fn llvm_fixup_input<'ll, 'tcx>(
774774) -> & ' ll Value {
775775 match ( reg, layout. abi ) {
776776 ( InlineAsmRegClass :: AArch64 ( AArch64InlineAsmRegClass :: vreg) , Abi :: Scalar ( s) ) => {
777- if let Primitive :: Int ( Integer :: I8 , _) = s. value {
777+ if let Primitive :: Int ( Integer :: I8 , _) = s. primitive ( ) {
778778 let vec_ty = bx. cx . type_vector ( bx. cx . type_i8 ( ) , 8 ) ;
779779 bx. insert_element ( bx. const_undef ( vec_ty) , value, bx. const_i32 ( 0 ) )
780780 } else {
@@ -785,7 +785,7 @@ fn llvm_fixup_input<'ll, 'tcx>(
785785 let elem_ty = llvm_asm_scalar_type ( bx. cx , s) ;
786786 let count = 16 / layout. size . bytes ( ) ;
787787 let vec_ty = bx. cx . type_vector ( elem_ty, count) ;
788- if let Primitive :: Pointer = s. value {
788+ if let Primitive :: Pointer = s. primitive ( ) {
789789 value = bx. ptrtoint ( value, bx. cx . type_isize ( ) ) ;
790790 }
791791 bx. insert_element ( bx. const_undef ( vec_ty) , value, bx. const_i32 ( 0 ) )
@@ -800,7 +800,7 @@ fn llvm_fixup_input<'ll, 'tcx>(
800800 bx. shuffle_vector ( value, bx. const_undef ( vec_ty) , bx. const_vector ( & indices) )
801801 }
802802 ( InlineAsmRegClass :: X86 ( X86InlineAsmRegClass :: reg_abcd) , Abi :: Scalar ( s) )
803- if s. value == Primitive :: F64 =>
803+ if s. primitive ( ) == Primitive :: F64 =>
804804 {
805805 bx. bitcast ( value, bx. cx . type_i64 ( ) )
806806 }
@@ -812,7 +812,7 @@ fn llvm_fixup_input<'ll, 'tcx>(
812812 InlineAsmRegClass :: Arm ( ArmInlineAsmRegClass :: sreg | ArmInlineAsmRegClass :: sreg_low16) ,
813813 Abi :: Scalar ( s) ,
814814 ) => {
815- if let Primitive :: Int ( Integer :: I32 , _) = s. value {
815+ if let Primitive :: Int ( Integer :: I32 , _) = s. primitive ( ) {
816816 bx. bitcast ( value, bx. cx . type_f32 ( ) )
817817 } else {
818818 value
@@ -826,19 +826,21 @@ fn llvm_fixup_input<'ll, 'tcx>(
826826 ) ,
827827 Abi :: Scalar ( s) ,
828828 ) => {
829- if let Primitive :: Int ( Integer :: I64 , _) = s. value {
829+ if let Primitive :: Int ( Integer :: I64 , _) = s. primitive ( ) {
830830 bx. bitcast ( value, bx. cx . type_f64 ( ) )
831831 } else {
832832 value
833833 }
834834 }
835- ( InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) , Abi :: Scalar ( s) ) => match s. value {
836- // MIPS only supports register-length arithmetics.
837- Primitive :: Int ( Integer :: I8 | Integer :: I16 , _) => bx. zext ( value, bx. cx . type_i32 ( ) ) ,
838- Primitive :: F32 => bx. bitcast ( value, bx. cx . type_i32 ( ) ) ,
839- Primitive :: F64 => bx. bitcast ( value, bx. cx . type_i64 ( ) ) ,
840- _ => value,
841- } ,
835+ ( InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) , Abi :: Scalar ( s) ) => {
836+ match s. primitive ( ) {
837+ // MIPS only supports register-length arithmetics.
838+ Primitive :: Int ( Integer :: I8 | Integer :: I16 , _) => bx. zext ( value, bx. cx . type_i32 ( ) ) ,
839+ Primitive :: F32 => bx. bitcast ( value, bx. cx . type_i32 ( ) ) ,
840+ Primitive :: F64 => bx. bitcast ( value, bx. cx . type_i64 ( ) ) ,
841+ _ => value,
842+ }
843+ }
842844 _ => value,
843845 }
844846}
@@ -852,15 +854,15 @@ fn llvm_fixup_output<'ll, 'tcx>(
852854) -> & ' ll Value {
853855 match ( reg, layout. abi ) {
854856 ( InlineAsmRegClass :: AArch64 ( AArch64InlineAsmRegClass :: vreg) , Abi :: Scalar ( s) ) => {
855- if let Primitive :: Int ( Integer :: I8 , _) = s. value {
857+ if let Primitive :: Int ( Integer :: I8 , _) = s. primitive ( ) {
856858 bx. extract_element ( value, bx. const_i32 ( 0 ) )
857859 } else {
858860 value
859861 }
860862 }
861863 ( InlineAsmRegClass :: AArch64 ( AArch64InlineAsmRegClass :: vreg_low16) , Abi :: Scalar ( s) ) => {
862864 value = bx. extract_element ( value, bx. const_i32 ( 0 ) ) ;
863- if let Primitive :: Pointer = s. value {
865+ if let Primitive :: Pointer = s. primitive ( ) {
864866 value = bx. inttoptr ( value, layout. llvm_type ( bx. cx ) ) ;
865867 }
866868 value
@@ -875,7 +877,7 @@ fn llvm_fixup_output<'ll, 'tcx>(
875877 bx. shuffle_vector ( value, bx. const_undef ( vec_ty) , bx. const_vector ( & indices) )
876878 }
877879 ( InlineAsmRegClass :: X86 ( X86InlineAsmRegClass :: reg_abcd) , Abi :: Scalar ( s) )
878- if s. value == Primitive :: F64 =>
880+ if s. primitive ( ) == Primitive :: F64 =>
879881 {
880882 bx. bitcast ( value, bx. cx . type_f64 ( ) )
881883 }
@@ -887,7 +889,7 @@ fn llvm_fixup_output<'ll, 'tcx>(
887889 InlineAsmRegClass :: Arm ( ArmInlineAsmRegClass :: sreg | ArmInlineAsmRegClass :: sreg_low16) ,
888890 Abi :: Scalar ( s) ,
889891 ) => {
890- if let Primitive :: Int ( Integer :: I32 , _) = s. value {
892+ if let Primitive :: Int ( Integer :: I32 , _) = s. primitive ( ) {
891893 bx. bitcast ( value, bx. cx . type_i32 ( ) )
892894 } else {
893895 value
@@ -901,20 +903,22 @@ fn llvm_fixup_output<'ll, 'tcx>(
901903 ) ,
902904 Abi :: Scalar ( s) ,
903905 ) => {
904- if let Primitive :: Int ( Integer :: I64 , _) = s. value {
906+ if let Primitive :: Int ( Integer :: I64 , _) = s. primitive ( ) {
905907 bx. bitcast ( value, bx. cx . type_i64 ( ) )
906908 } else {
907909 value
908910 }
909911 }
910- ( InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) , Abi :: Scalar ( s) ) => match s. value {
911- // MIPS only supports register-length arithmetics.
912- Primitive :: Int ( Integer :: I8 , _) => bx. trunc ( value, bx. cx . type_i8 ( ) ) ,
913- Primitive :: Int ( Integer :: I16 , _) => bx. trunc ( value, bx. cx . type_i16 ( ) ) ,
914- Primitive :: F32 => bx. bitcast ( value, bx. cx . type_f32 ( ) ) ,
915- Primitive :: F64 => bx. bitcast ( value, bx. cx . type_f64 ( ) ) ,
916- _ => value,
917- } ,
912+ ( InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) , Abi :: Scalar ( s) ) => {
913+ match s. primitive ( ) {
914+ // MIPS only supports register-length arithmetics.
915+ Primitive :: Int ( Integer :: I8 , _) => bx. trunc ( value, bx. cx . type_i8 ( ) ) ,
916+ Primitive :: Int ( Integer :: I16 , _) => bx. trunc ( value, bx. cx . type_i16 ( ) ) ,
917+ Primitive :: F32 => bx. bitcast ( value, bx. cx . type_f32 ( ) ) ,
918+ Primitive :: F64 => bx. bitcast ( value, bx. cx . type_f64 ( ) ) ,
919+ _ => value,
920+ }
921+ }
918922 _ => value,
919923 }
920924}
@@ -927,7 +931,7 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
927931) -> & ' ll Type {
928932 match ( reg, layout. abi ) {
929933 ( InlineAsmRegClass :: AArch64 ( AArch64InlineAsmRegClass :: vreg) , Abi :: Scalar ( s) ) => {
930- if let Primitive :: Int ( Integer :: I8 , _) = s. value {
934+ if let Primitive :: Int ( Integer :: I8 , _) = s. primitive ( ) {
931935 cx. type_vector ( cx. type_i8 ( ) , 8 )
932936 } else {
933937 layout. llvm_type ( cx)
@@ -946,7 +950,7 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
946950 cx. type_vector ( elem_ty, count * 2 )
947951 }
948952 ( InlineAsmRegClass :: X86 ( X86InlineAsmRegClass :: reg_abcd) , Abi :: Scalar ( s) )
949- if s. value == Primitive :: F64 =>
953+ if s. primitive ( ) == Primitive :: F64 =>
950954 {
951955 cx. type_i64 ( )
952956 }
@@ -958,7 +962,7 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
958962 InlineAsmRegClass :: Arm ( ArmInlineAsmRegClass :: sreg | ArmInlineAsmRegClass :: sreg_low16) ,
959963 Abi :: Scalar ( s) ,
960964 ) => {
961- if let Primitive :: Int ( Integer :: I32 , _) = s. value {
965+ if let Primitive :: Int ( Integer :: I32 , _) = s. primitive ( ) {
962966 cx. type_f32 ( )
963967 } else {
964968 layout. llvm_type ( cx)
@@ -972,19 +976,21 @@ fn llvm_fixup_output_type<'ll, 'tcx>(
972976 ) ,
973977 Abi :: Scalar ( s) ,
974978 ) => {
975- if let Primitive :: Int ( Integer :: I64 , _) = s. value {
979+ if let Primitive :: Int ( Integer :: I64 , _) = s. primitive ( ) {
976980 cx. type_f64 ( )
977981 } else {
978982 layout. llvm_type ( cx)
979983 }
980984 }
981- ( InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) , Abi :: Scalar ( s) ) => match s. value {
982- // MIPS only supports register-length arithmetics.
983- Primitive :: Int ( Integer :: I8 | Integer :: I16 , _) => cx. type_i32 ( ) ,
984- Primitive :: F32 => cx. type_i32 ( ) ,
985- Primitive :: F64 => cx. type_i64 ( ) ,
986- _ => layout. llvm_type ( cx) ,
987- } ,
985+ ( InlineAsmRegClass :: Mips ( MipsInlineAsmRegClass :: reg) , Abi :: Scalar ( s) ) => {
986+ match s. primitive ( ) {
987+ // MIPS only supports register-length arithmetics.
988+ Primitive :: Int ( Integer :: I8 | Integer :: I16 , _) => cx. type_i32 ( ) ,
989+ Primitive :: F32 => cx. type_i32 ( ) ,
990+ Primitive :: F64 => cx. type_i64 ( ) ,
991+ _ => layout. llvm_type ( cx) ,
992+ }
993+ }
988994 _ => layout. llvm_type ( cx) ,
989995 }
990996}
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