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Collection of VFP intrinsics
Nothing really exciting here. LLVM on hard-float target use native instructions for all listed VFP intrinsics and so resulting implementation is really trivial. Implemented intrinsics: __gesf2vfp __gedf2vfp __gtsf2vfp __gtdf2vfp __ltsf2vfp __ltdf2vfp __nesf2vfp __nedf2vfp __eqsf2vfp __eqdf2vfp __extendsfdf2vfp
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5 files changed

+140
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lines changed

‎README.md‎

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -100,9 +100,9 @@ features = ["c"]
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- [ ] arm/divmodsi4.S (generic version is done)
101101
- [x] arm/divsf3vfp.S
102102
- [ ] arm/divsi3.S (generic version is done)
103-
- [ ] arm/eqdf2vfp.S
104-
- [ ] arm/eqsf2vfp.S
105-
- [ ] arm/extendsfdf2vfp.S
103+
- [x] arm/eqdf2vfp.S
104+
- [x] arm/eqsf2vfp.S
105+
- [x] arm/extendsfdf2vfp.S
106106
- [ ] arm/fixdfsivfp.S
107107
- [ ] arm/fixsfsivfp.S
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- [ ] arm/fixunsdfsivfp.S
@@ -111,22 +111,22 @@ features = ["c"]
111111
- [ ] arm/floatsisfvfp.S
112112
- [ ] arm/floatunssidfvfp.S
113113
- [ ] arm/floatunssisfvfp.S
114-
- [ ] arm/gedf2vfp.S
115-
- [ ] arm/gesf2vfp.S
116-
- [ ] arm/gtdf2vfp.S
117-
- [ ] arm/gtsf2vfp.S
114+
- [x] arm/gedf2vfp.S
115+
- [x] arm/gesf2vfp.S
116+
- [x] arm/gtdf2vfp.S
117+
- [x] arm/gtsf2vfp.S
118118
- [ ] arm/ledf2vfp.S
119119
- [ ] arm/lesf2vfp.S
120-
- [ ] arm/ltdf2vfp.S
121-
- [ ] arm/ltsf2vfp.S
120+
- [x] arm/ltdf2vfp.S
121+
- [x] arm/ltsf2vfp.S
122122
- [ ] arm/modsi3.S (generic version is done)
123123
- [x] arm/muldf3vfp.S
124124
- [x] arm/mulsf3vfp.S
125-
- [ ] arm/nedf2vfp.S
125+
- [x] arm/nedf2vfp.S
126126
- [ ] arm/negdf2vfp.S
127127
- [ ] arm/negsf2vfp.S
128-
- [ ] arm/nesf2vfp.S
129-
- [ ] arm/softfloat-alias.list
128+
- [x] arm/nesf2vfp.S
129+
- [x] arm/softfloat-alias.list
130130
- [x] arm/subdf3vfp.S
131131
- [x] arm/subsf3vfp.S
132132
- [ ] arm/truncdfsf2vfp.S

‎build.rs‎

Lines changed: 0 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -376,9 +376,6 @@ mod c {
376376
if !llvm_target[0].starts_with("thumbv7em") {
377377
sources.extend(
378378
&[
379-
"arm/eqdf2vfp.S",
380-
"arm/eqsf2vfp.S",
381-
"arm/extendsfdf2vfp.S",
382379
"arm/fixdfsivfp.S",
383380
"arm/fixsfsivfp.S",
384381
"arm/fixunsdfsivfp.S",
@@ -387,16 +384,8 @@ mod c {
387384
"arm/floatsisfvfp.S",
388385
"arm/floatunssidfvfp.S",
389386
"arm/floatunssisfvfp.S",
390-
"arm/gedf2vfp.S",
391-
"arm/gesf2vfp.S",
392-
"arm/gtdf2vfp.S",
393-
"arm/gtsf2vfp.S",
394387
"arm/ledf2vfp.S",
395388
"arm/lesf2vfp.S",
396-
"arm/ltdf2vfp.S",
397-
"arm/ltsf2vfp.S",
398-
"arm/nedf2vfp.S",
399-
"arm/nesf2vfp.S",
400389
"arm/restore_vfp_d8_d15_regs.S",
401390
"arm/save_vfp_d8_d15_regs.S",
402391
],

‎src/float/cmp.rs‎

Lines changed: 43 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -212,4 +212,47 @@ intrinsics! {
212212
pub extern "aapcs" fn __aeabi_dcmpgt(a: f64, b: f64) -> i32 {
213213
(__gtdf2(a, b) > 0) as i32
214214
}
215+
216+
// On hard-float targets LLVM will use native instructions
217+
// for all VFP intrinsics below
218+
219+
pub extern "C" fn __gesf2vfp(a: f32, b: f32) -> i32 {
220+
(a >= b) as i32
221+
}
222+
223+
pub extern "C" fn __gedf2vfp(a: f64, b: f64) -> i32 {
224+
(a >= b) as i32
225+
}
226+
227+
pub extern "C" fn __gtsf2vfp(a: f32, b: f32) -> i32 {
228+
(a > b) as i32
229+
}
230+
231+
pub extern "C" fn __gtdf2vfp(a: f64, b: f64) -> i32 {
232+
(a > b) as i32
233+
}
234+
235+
pub extern "C" fn __ltsf2vfp(a: f32, b: f32) -> i32 {
236+
(a < b) as i32
237+
}
238+
239+
pub extern "C" fn __ltdf2vfp(a: f64, b: f64) -> i32 {
240+
(a < b) as i32
241+
}
242+
243+
pub extern "C" fn __nesf2vfp(a: f32, b: f32) -> i32 {
244+
(a != b) as i32
245+
}
246+
247+
pub extern "C" fn __nedf2vfp(a: f64, b: f64) -> i32 {
248+
(a != b) as i32
249+
}
250+
251+
pub extern "C" fn __eqsf2vfp(a: f32, b: f32) -> i32 {
252+
(a == b) as i32
253+
}
254+
255+
pub extern "C" fn __eqdf2vfp(a: f64, b: f64) -> i32 {
256+
(a == b) as i32
257+
}
215258
}

‎src/float/extend.rs‎

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -74,4 +74,9 @@ intrinsics! {
7474
pub extern "C" fn __extendsfdf2(a: f32) -> f64 {
7575
extend(a)
7676
}
77+
78+
#[cfg(target_arch = "arm")]
79+
pub extern "C" fn __extendsfdf2vfp(a: f32) -> f64 {
80+
a as f64 // LLVM generate 'fcvtds'
81+
}
7782
}

‎testcrate/build.rs‎

Lines changed: 80 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -233,6 +233,77 @@ fn main() {
233233
Some(c)
234234
},
235235
"compiler_builtins::float::cmp::__aeabi_dcmpgt(a, b)");
236+
237+
gen(|(a, b): (LargeF32, LargeF32)| {
238+
if a.0.is_nan() || b.0.is_nan() {
239+
return None;
240+
}
241+
Some((a.0 >= b.0) as i32)
242+
},
243+
"compiler_builtins::float::cmp::__gesf2vfp(a, b)");
244+
gen(|(a, b): (MyF64, MyF64)| {
245+
if a.0.is_nan() || b.0.is_nan() {
246+
return None;
247+
}
248+
Some((a.0 >= b.0) as i32)
249+
},
250+
"compiler_builtins::float::cmp::__gedf2vfp(a, b)");
251+
gen(|(a, b): (LargeF32, LargeF32)| {
252+
if a.0.is_nan() || b.0.is_nan() {
253+
return None;
254+
}
255+
Some((a.0 > b.0) as i32)
256+
},
257+
"compiler_builtins::float::cmp::__gtsf2vfp(a, b)");
258+
gen(|(a, b): (MyF64, MyF64)| {
259+
if a.0.is_nan() || b.0.is_nan() {
260+
return None;
261+
}
262+
Some((a.0 > b.0) as i32)
263+
},
264+
"compiler_builtins::float::cmp::__gtdf2vfp(a, b)");
265+
gen(|(a, b): (LargeF32, LargeF32)| {
266+
if a.0.is_nan() || b.0.is_nan() {
267+
return None;
268+
}
269+
Some((a.0 < b.0) as i32)
270+
},
271+
"compiler_builtins::float::cmp::__ltsf2vfp(a, b)");
272+
gen(|(a, b): (MyF64, MyF64)| {
273+
if a.0.is_nan() || b.0.is_nan() {
274+
return None;
275+
}
276+
Some((a.0 < b.0) as i32)
277+
},
278+
"compiler_builtins::float::cmp::__ltdf2vfp(a, b)");
279+
gen(|(a, b): (LargeF32, LargeF32)| {
280+
if a.0.is_nan() || b.0.is_nan() {
281+
return None;
282+
}
283+
Some((a.0 != b.0) as i32)
284+
},
285+
"compiler_builtins::float::cmp::__nesf2vfp(a, b)");
286+
gen(|(a, b): (MyF64, MyF64)| {
287+
if a.0.is_nan() || b.0.is_nan() {
288+
return None;
289+
}
290+
Some((a.0 != b.0) as i32)
291+
},
292+
"compiler_builtins::float::cmp::__nedf2vfp(a, b)");
293+
gen(|(a, b): (LargeF32, LargeF32)| {
294+
if a.0.is_nan() || b.0.is_nan() {
295+
return None;
296+
}
297+
Some((a.0 == b.0) as i32)
298+
},
299+
"compiler_builtins::float::cmp::__eqsf2vfp(a, b)");
300+
gen(|(a, b): (MyF64, MyF64)| {
301+
if a.0.is_nan() || b.0.is_nan() {
302+
return None;
303+
}
304+
Some((a.0 == b.0) as i32)
305+
},
306+
"compiler_builtins::float::cmp::__eqdf2vfp(a, b)");
236307
}
237308

238309
// float/extend.rs
@@ -243,6 +314,15 @@ fn main() {
243314
Some(f64(a.0))
244315
},
245316
"compiler_builtins::float::extend::__extendsfdf2(a)");
317+
if target_arch_arm {
318+
gen(|a: LargeF32| {
319+
if a.0.is_nan() {
320+
return None;
321+
}
322+
Some(f64(a.0))
323+
},
324+
"compiler_builtins::float::extend::__extendsfdf2vfp(a)");
325+
}
246326

247327
// float/conv.rs
248328
gen(|a: MyF64| i64(a.0).ok(),

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