Implement most of the ISA feature flags

Author: tonybaloney

src/arm/windows/init.c

@@ -197,20 +197,21 @@ static void set_cpuinfo_isa_fields(void) {
 
 	cpuinfo_isa.sve = IsProcessorFeaturePresent(PF_ARM_SVE_INSTRUCTIONS_AVAILABLE) != 0;
 	cpuinfo_isa.sve2 = IsProcessorFeaturePresent(PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE) != 0;
-
-	// TODO:
-	// - i8mm
-	// - jscvt
-	// - fcma
-	// - sme
-	// - sme2
-	// - sme2p1
+	cpuinfo_isa.i8mm = IsProcessorFeaturePresent(PF_ARM_V82_I8MM_INSTRUCTIONS_AVAILABLE) != 0;
+	cpuinfo_isa.jscvt = IsProcessorFeaturePresent(PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE) != 0;
+	cpuinfo_isa.fcma = IsProcessorFeaturePresent(PF_ARM_FMAC_INSTRUCTIONS_AVAILABLE) != 0;
+	cpuinfo_isa.sme = IsProcessorFeaturePresent(PF_ARM_SME_INSTRUCTIONS_AVAILABLE) != 0;
+	cpuinfo_isa.sme2 = IsProcessorFeaturePresent(PF_ARM_SME2_INSTRUCTIONS_AVAILABLE) != 0;
+	cpuinfo_isa.sme2p1 = IsProcessorFeaturePresent(PF_ARM_SME2_1_INSTRUCTIONS_AVAILABLE) != 0;
+	// I don't see 
 	// - sme_i16i32
 	// - sme_bi32i32
-	// - sme_b16b16
-	// - sme_f16f16
-	// - bf16
+	// cpuinfo_isa.sme_bi32i32 = IsProcessorFeaturePresent(PF_ARM_SME_BI32I32_INSTRUCTIONS_AVAILABLE) != 0;
+	cpuinfo_isa.sme_b16b16 = IsProcessorFeaturePresent(PF_ARM_SME_B16B16_INSTRUCTIONS_AVAILABLE) != 0;
+	cpuinfo_isa.sme_f16f16 = IsProcessorFeaturePresent(PF_ARM_SME_F16F16_INSTRUCTIONS_AVAILABLE) != 0;
+	cpuinfo_isa.bf16 = IsProcessorFeaturePresent(PF_ARM_V86_BF16_INSTRUCTIONS_AVAILABLE) != 0;
 	// - fhm
+	// Not available in Windows API:
 	// - svelen
 	// - smelen
 

src/arm/windows/windows-arm-init.h

@@ -20,10 +20,62 @@ struct woa_chip_info {
 
 bool cpu_info_init_by_logical_sys_info(const struct woa_chip_info* chip_info, enum cpuinfo_vendor vendor);
 
+
+
+#ifndef PF_ARM_FMAC_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_FMAC_INSTRUCTIONS_AVAILABLE (27)
+#endif
+
+#ifndef PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_V81_ATOMIC_INSTRUCTIONS_AVAILABLE (34)
+#endif
+
+#ifndef PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_V83_JSCVT_INSTRUCTIONS_AVAILABLE (44)
+#endif
+
 #ifndef PF_ARM_SVE_INSTRUCTIONS_AVAILABLE
 #define PF_ARM_SVE_INSTRUCTIONS_AVAILABLE (46)
 #endif
 
 #ifndef PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE
 #define PF_ARM_SVE2_INSTRUCTIONS_AVAILABLE (47)
-#endif
+#endif
+
+#ifndef PF_ARM_SME_BI32I32_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_SME_BI32I32_INSTRUCTIONS_AVAILABLE (55)
+#endif
+
+#ifndef PF_ARM_V82_I8MM_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_V82_I8MM_INSTRUCTIONS_AVAILABLE (66)
+#endif
+
+#ifndef PF_ARM_V86_BF16_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_V86_BF16_INSTRUCTIONS_AVAILABLE (68)
+#endif
+
+#ifndef PF_ARM_SME_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_SME_INSTRUCTIONS_AVAILABLE (70)
+#endif
+
+#ifndef PF_ARM_SME2_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_SME2_INSTRUCTIONS_AVAILABLE (71)
+#endif
+
+#ifndef PF_ARM_SME2_1_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_SME2_1_INSTRUCTIONS_AVAILABLE (72)
+#endif
+
+#ifndef PF_ARM_SME2_2_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_SME2_2_INSTRUCTIONS_AVAILABLE (73)
+#endif
+
+#ifndef PF_ARM_SME_F16F16_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_SME_F16F16_INSTRUCTIONS_AVAILABLE (83)
+#endif
+
+#ifndef PF_ARM_SME_B16B16_INSTRUCTIONS_AVAILABLE
+#define PF_ARM_SME_B16B16_INSTRUCTIONS_AVAILABLE (84)
+#endif
+
+