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yetingkyetingk
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[RISCV] Prefer Zcmp push/pop instead of save-restore calls. (#66046)
Zcmp push/pop can reduce more code size then save-restore calls. There are two reasons, 1. Call for save-restore calls needs 4-8 bytes, but Zcmp push/pop only needs 2 bytes. 2. Zcmp push/pop can also handles small shift of sp.
1 parent 613a09d commit ab94fbb

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2 files changed

+59
-67
lines changed

2 files changed

+59
-67
lines changed

‎llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -110,7 +110,8 @@ class RISCVMachineFunctionInfo : public MachineFunctionInfo {
110110
bool useSaveRestoreLibCalls(const MachineFunction &MF) const {
111111
// We cannot use fixed locations for the callee saved spill slots if the
112112
// function uses a varargs save area, or is an interrupt handler.
113-
return MF.getSubtarget<RISCVSubtarget>().enableSaveRestore() &&
113+
return !isPushable(MF) &&
114+
MF.getSubtarget<RISCVSubtarget>().enableSaveRestore() &&
114115
VarArgsSaveSize == 0 && !MF.getFrameInfo().hasTailCall() &&
115116
!MF.getFunction().hasFnAttribute("interrupt");
116117
}
@@ -131,8 +132,7 @@ class RISCVMachineFunctionInfo : public MachineFunctionInfo {
131132
// We cannot use fixed locations for the callee saved spill slots if the
132133
// function uses a varargs save area.
133134
// TODO: Use a seperate placement for vararg registers to enable Zcmp.
134-
return !useSaveRestoreLibCalls(MF) &&
135-
MF.getSubtarget<RISCVSubtarget>().hasStdExtZcmp() &&
135+
return MF.getSubtarget<RISCVSubtarget>().hasStdExtZcmp() &&
136136
!MF.getTarget().Options.DisableFramePointerElim(MF) &&
137137
VarArgsSaveSize == 0;
138138
}

‎llvm/test/CodeGen/RISCV/push-pop-popret.ll‎

Lines changed: 56 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -41,27 +41,25 @@ define i32 @foo() {
4141
;
4242
; RV32IZCMP-SR-LABEL: foo:
4343
; RV32IZCMP-SR: # %bb.0:
44-
; RV32IZCMP-SR-NEXT: call t0, __riscv_save_0
45-
; RV32IZCMP-SR-NEXT: addi sp, sp, -512
44+
; RV32IZCMP-SR-NEXT: cm.push {ra}, -64
45+
; RV32IZCMP-SR-NEXT: addi sp, sp, -464
4646
; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 528
4747
; RV32IZCMP-SR-NEXT: .cfi_offset ra, -4
4848
; RV32IZCMP-SR-NEXT: mv a0, sp
4949
; RV32IZCMP-SR-NEXT: call test@plt
50-
; RV32IZCMP-SR-NEXT: li a0, 0
51-
; RV32IZCMP-SR-NEXT: addi sp, sp, 512
52-
; RV32IZCMP-SR-NEXT: tail __riscv_restore_0
50+
; RV32IZCMP-SR-NEXT: addi sp, sp, 464
51+
; RV32IZCMP-SR-NEXT: cm.popretz {ra}, 64
5352
;
5453
; RV64IZCMP-SR-LABEL: foo:
5554
; RV64IZCMP-SR: # %bb.0:
56-
; RV64IZCMP-SR-NEXT: call t0, __riscv_save_0
57-
; RV64IZCMP-SR-NEXT: addi sp, sp, -512
55+
; RV64IZCMP-SR-NEXT: cm.push {ra}, -64
56+
; RV64IZCMP-SR-NEXT: addi sp, sp, -464
5857
; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 528
5958
; RV64IZCMP-SR-NEXT: .cfi_offset ra, -8
6059
; RV64IZCMP-SR-NEXT: mv a0, sp
6160
; RV64IZCMP-SR-NEXT: call test@plt
62-
; RV64IZCMP-SR-NEXT: li a0, 0
63-
; RV64IZCMP-SR-NEXT: addi sp, sp, 512
64-
; RV64IZCMP-SR-NEXT: tail __riscv_restore_0
61+
; RV64IZCMP-SR-NEXT: addi sp, sp, 464
62+
; RV64IZCMP-SR-NEXT: cm.popretz {ra}, 64
6563
;
6664
; RV32I-LABEL: foo:
6765
; RV32I: # %bb.0:
@@ -131,27 +129,26 @@ define i32 @pushpopret0(i32 signext %size){
131129
;
132130
; RV32IZCMP-SR-LABEL: pushpopret0:
133131
; RV32IZCMP-SR: # %bb.0: # %entry
134-
; RV32IZCMP-SR-NEXT: call t0, __riscv_save_1
132+
; RV32IZCMP-SR-NEXT: cm.push {ra, s0}, -16
135133
; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 16
136-
; RV32IZCMP-SR-NEXT: .cfi_offset ra, -4
137-
; RV32IZCMP-SR-NEXT: .cfi_offset s0, -8
134+
; RV32IZCMP-SR-NEXT: .cfi_offset ra, -8
135+
; RV32IZCMP-SR-NEXT: .cfi_offset s0, -4
138136
; RV32IZCMP-SR-NEXT: addi s0, sp, 16
139137
; RV32IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
140138
; RV32IZCMP-SR-NEXT: addi a0, a0, 15
141139
; RV32IZCMP-SR-NEXT: andi a0, a0, -16
142140
; RV32IZCMP-SR-NEXT: sub a0, sp, a0
143141
; RV32IZCMP-SR-NEXT: mv sp, a0
144142
; RV32IZCMP-SR-NEXT: call callee_void@plt
145-
; RV32IZCMP-SR-NEXT: li a0, 0
146143
; RV32IZCMP-SR-NEXT: addi sp, s0, -16
147-
; RV32IZCMP-SR-NEXT: tail __riscv_restore_1
144+
; RV32IZCMP-SR-NEXT: cm.popretz {ra, s0}, 16
148145
;
149146
; RV64IZCMP-SR-LABEL: pushpopret0:
150147
; RV64IZCMP-SR: # %bb.0: # %entry
151-
; RV64IZCMP-SR-NEXT: call t0, __riscv_save_1
148+
; RV64IZCMP-SR-NEXT: cm.push {ra, s0}, -16
152149
; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 16
153-
; RV64IZCMP-SR-NEXT: .cfi_offset ra, -8
154-
; RV64IZCMP-SR-NEXT: .cfi_offset s0, -16
150+
; RV64IZCMP-SR-NEXT: .cfi_offset ra, -16
151+
; RV64IZCMP-SR-NEXT: .cfi_offset s0, -8
155152
; RV64IZCMP-SR-NEXT: addi s0, sp, 16
156153
; RV64IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
157154
; RV64IZCMP-SR-NEXT: slli a0, a0, 32
@@ -161,9 +158,8 @@ define i32 @pushpopret0(i32 signext %size){
161158
; RV64IZCMP-SR-NEXT: sub a0, sp, a0
162159
; RV64IZCMP-SR-NEXT: mv sp, a0
163160
; RV64IZCMP-SR-NEXT: call callee_void@plt
164-
; RV64IZCMP-SR-NEXT: li a0, 0
165161
; RV64IZCMP-SR-NEXT: addi sp, s0, -16
166-
; RV64IZCMP-SR-NEXT: tail __riscv_restore_1
162+
; RV64IZCMP-SR-NEXT: cm.popretz {ra, s0}, 16
167163
;
168164
; RV32I-LABEL: pushpopret0:
169165
; RV32I: # %bb.0: # %entry
@@ -255,10 +251,10 @@ define i32 @pushpopret1(i32 signext %size) {
255251
;
256252
; RV32IZCMP-SR-LABEL: pushpopret1:
257253
; RV32IZCMP-SR: # %bb.0: # %entry
258-
; RV32IZCMP-SR-NEXT: call t0, __riscv_save_1
254+
; RV32IZCMP-SR-NEXT: cm.push {ra, s0}, -16
259255
; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 16
260-
; RV32IZCMP-SR-NEXT: .cfi_offset ra, -4
261-
; RV32IZCMP-SR-NEXT: .cfi_offset s0, -8
256+
; RV32IZCMP-SR-NEXT: .cfi_offset ra, -8
257+
; RV32IZCMP-SR-NEXT: .cfi_offset s0, -4
262258
; RV32IZCMP-SR-NEXT: addi s0, sp, 16
263259
; RV32IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
264260
; RV32IZCMP-SR-NEXT: addi a0, a0, 15
@@ -268,14 +264,14 @@ define i32 @pushpopret1(i32 signext %size) {
268264
; RV32IZCMP-SR-NEXT: call callee_void@plt
269265
; RV32IZCMP-SR-NEXT: li a0, 1
270266
; RV32IZCMP-SR-NEXT: addi sp, s0, -16
271-
; RV32IZCMP-SR-NEXT: tail __riscv_restore_1
267+
; RV32IZCMP-SR-NEXT: cm.popret {ra, s0}, 16
272268
;
273269
; RV64IZCMP-SR-LABEL: pushpopret1:
274270
; RV64IZCMP-SR: # %bb.0: # %entry
275-
; RV64IZCMP-SR-NEXT: call t0, __riscv_save_1
271+
; RV64IZCMP-SR-NEXT: cm.push {ra, s0}, -16
276272
; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 16
277-
; RV64IZCMP-SR-NEXT: .cfi_offset ra, -8
278-
; RV64IZCMP-SR-NEXT: .cfi_offset s0, -16
273+
; RV64IZCMP-SR-NEXT: .cfi_offset ra, -16
274+
; RV64IZCMP-SR-NEXT: .cfi_offset s0, -8
279275
; RV64IZCMP-SR-NEXT: addi s0, sp, 16
280276
; RV64IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
281277
; RV64IZCMP-SR-NEXT: slli a0, a0, 32
@@ -287,7 +283,7 @@ define i32 @pushpopret1(i32 signext %size) {
287283
; RV64IZCMP-SR-NEXT: call callee_void@plt
288284
; RV64IZCMP-SR-NEXT: li a0, 1
289285
; RV64IZCMP-SR-NEXT: addi sp, s0, -16
290-
; RV64IZCMP-SR-NEXT: tail __riscv_restore_1
286+
; RV64IZCMP-SR-NEXT: cm.popret {ra, s0}, 16
291287
;
292288
; RV32I-LABEL: pushpopret1:
293289
; RV32I: # %bb.0: # %entry
@@ -379,10 +375,10 @@ define i32 @pushpopretneg1(i32 signext %size) {
379375
;
380376
; RV32IZCMP-SR-LABEL: pushpopretneg1:
381377
; RV32IZCMP-SR: # %bb.0: # %entry
382-
; RV32IZCMP-SR-NEXT: call t0, __riscv_save_1
378+
; RV32IZCMP-SR-NEXT: cm.push {ra, s0}, -16
383379
; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 16
384-
; RV32IZCMP-SR-NEXT: .cfi_offset ra, -4
385-
; RV32IZCMP-SR-NEXT: .cfi_offset s0, -8
380+
; RV32IZCMP-SR-NEXT: .cfi_offset ra, -8
381+
; RV32IZCMP-SR-NEXT: .cfi_offset s0, -4
386382
; RV32IZCMP-SR-NEXT: addi s0, sp, 16
387383
; RV32IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
388384
; RV32IZCMP-SR-NEXT: addi a0, a0, 15
@@ -392,14 +388,14 @@ define i32 @pushpopretneg1(i32 signext %size) {
392388
; RV32IZCMP-SR-NEXT: call callee_void@plt
393389
; RV32IZCMP-SR-NEXT: li a0, -1
394390
; RV32IZCMP-SR-NEXT: addi sp, s0, -16
395-
; RV32IZCMP-SR-NEXT: tail __riscv_restore_1
391+
; RV32IZCMP-SR-NEXT: cm.popret {ra, s0}, 16
396392
;
397393
; RV64IZCMP-SR-LABEL: pushpopretneg1:
398394
; RV64IZCMP-SR: # %bb.0: # %entry
399-
; RV64IZCMP-SR-NEXT: call t0, __riscv_save_1
395+
; RV64IZCMP-SR-NEXT: cm.push {ra, s0}, -16
400396
; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 16
401-
; RV64IZCMP-SR-NEXT: .cfi_offset ra, -8
402-
; RV64IZCMP-SR-NEXT: .cfi_offset s0, -16
397+
; RV64IZCMP-SR-NEXT: .cfi_offset ra, -16
398+
; RV64IZCMP-SR-NEXT: .cfi_offset s0, -8
403399
; RV64IZCMP-SR-NEXT: addi s0, sp, 16
404400
; RV64IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
405401
; RV64IZCMP-SR-NEXT: slli a0, a0, 32
@@ -411,7 +407,7 @@ define i32 @pushpopretneg1(i32 signext %size) {
411407
; RV64IZCMP-SR-NEXT: call callee_void@plt
412408
; RV64IZCMP-SR-NEXT: li a0, -1
413409
; RV64IZCMP-SR-NEXT: addi sp, s0, -16
414-
; RV64IZCMP-SR-NEXT: tail __riscv_restore_1
410+
; RV64IZCMP-SR-NEXT: cm.popret {ra, s0}, 16
415411
;
416412
; RV32I-LABEL: pushpopretneg1:
417413
; RV32I: # %bb.0: # %entry
@@ -503,10 +499,10 @@ define i32 @pushpopret2(i32 signext %size) {
503499
;
504500
; RV32IZCMP-SR-LABEL: pushpopret2:
505501
; RV32IZCMP-SR: # %bb.0: # %entry
506-
; RV32IZCMP-SR-NEXT: call t0, __riscv_save_1
502+
; RV32IZCMP-SR-NEXT: cm.push {ra, s0}, -16
507503
; RV32IZCMP-SR-NEXT: .cfi_def_cfa_offset 16
508-
; RV32IZCMP-SR-NEXT: .cfi_offset ra, -4
509-
; RV32IZCMP-SR-NEXT: .cfi_offset s0, -8
504+
; RV32IZCMP-SR-NEXT: .cfi_offset ra, -8
505+
; RV32IZCMP-SR-NEXT: .cfi_offset s0, -4
510506
; RV32IZCMP-SR-NEXT: addi s0, sp, 16
511507
; RV32IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
512508
; RV32IZCMP-SR-NEXT: addi a0, a0, 15
@@ -516,14 +512,14 @@ define i32 @pushpopret2(i32 signext %size) {
516512
; RV32IZCMP-SR-NEXT: call callee_void@plt
517513
; RV32IZCMP-SR-NEXT: li a0, 2
518514
; RV32IZCMP-SR-NEXT: addi sp, s0, -16
519-
; RV32IZCMP-SR-NEXT: tail __riscv_restore_1
515+
; RV32IZCMP-SR-NEXT: cm.popret {ra, s0}, 16
520516
;
521517
; RV64IZCMP-SR-LABEL: pushpopret2:
522518
; RV64IZCMP-SR: # %bb.0: # %entry
523-
; RV64IZCMP-SR-NEXT: call t0, __riscv_save_1
519+
; RV64IZCMP-SR-NEXT: cm.push {ra, s0}, -16
524520
; RV64IZCMP-SR-NEXT: .cfi_def_cfa_offset 16
525-
; RV64IZCMP-SR-NEXT: .cfi_offset ra, -8
526-
; RV64IZCMP-SR-NEXT: .cfi_offset s0, -16
521+
; RV64IZCMP-SR-NEXT: .cfi_offset ra, -16
522+
; RV64IZCMP-SR-NEXT: .cfi_offset s0, -8
527523
; RV64IZCMP-SR-NEXT: addi s0, sp, 16
528524
; RV64IZCMP-SR-NEXT: .cfi_def_cfa s0, 0
529525
; RV64IZCMP-SR-NEXT: slli a0, a0, 32
@@ -535,7 +531,7 @@ define i32 @pushpopret2(i32 signext %size) {
535531
; RV64IZCMP-SR-NEXT: call callee_void@plt
536532
; RV64IZCMP-SR-NEXT: li a0, 2
537533
; RV64IZCMP-SR-NEXT: addi sp, s0, -16
538-
; RV64IZCMP-SR-NEXT: tail __riscv_restore_1
534+
; RV64IZCMP-SR-NEXT: cm.popret {ra, s0}, 16
539535
;
540536
; RV32I-LABEL: pushpopret2:
541537
; RV32I: # %bb.0: # %entry
@@ -1220,7 +1216,7 @@ define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
12201216
;
12211217
; RV32IZCMP-SR-LABEL: many_args:
12221218
; RV32IZCMP-SR: # %bb.0: # %entry
1223-
; RV32IZCMP-SR-NEXT: call t0, __riscv_save_5
1219+
; RV32IZCMP-SR-NEXT: cm.push {ra, s0-s4}, -32
12241220
; RV32IZCMP-SR-NEXT: lui a0, %hi(var0)
12251221
; RV32IZCMP-SR-NEXT: lw a6, %lo(var0)(a0)
12261222
; RV32IZCMP-SR-NEXT: lw a7, %lo(var0+4)(a0)
@@ -1259,11 +1255,11 @@ define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
12591255
; RV32IZCMP-SR-NEXT: sw t0, %lo(var0+8)(a0)
12601256
; RV32IZCMP-SR-NEXT: sw a7, %lo(var0+4)(a0)
12611257
; RV32IZCMP-SR-NEXT: sw a6, %lo(var0)(a0)
1262-
; RV32IZCMP-SR-NEXT: tail __riscv_restore_5
1258+
; RV32IZCMP-SR-NEXT: cm.popret {ra, s0-s4}, 32
12631259
;
12641260
; RV64IZCMP-SR-LABEL: many_args:
12651261
; RV64IZCMP-SR: # %bb.0: # %entry
1266-
; RV64IZCMP-SR-NEXT: call t0, __riscv_save_5
1262+
; RV64IZCMP-SR-NEXT: cm.push {ra, s0-s4}, -48
12671263
; RV64IZCMP-SR-NEXT: lui a0, %hi(var0)
12681264
; RV64IZCMP-SR-NEXT: lw a6, %lo(var0)(a0)
12691265
; RV64IZCMP-SR-NEXT: lw a7, %lo(var0+4)(a0)
@@ -1302,7 +1298,7 @@ define void @many_args(i32, i32, i32, i32, i32, i32, i32, i32, i32) nounwind {
13021298
; RV64IZCMP-SR-NEXT: sw t0, %lo(var0+8)(a0)
13031299
; RV64IZCMP-SR-NEXT: sw a7, %lo(var0+4)(a0)
13041300
; RV64IZCMP-SR-NEXT: sw a6, %lo(var0)(a0)
1305-
; RV64IZCMP-SR-NEXT: tail __riscv_restore_5
1301+
; RV64IZCMP-SR-NEXT: cm.popret {ra, s0-s4}, 48
13061302
;
13071303
; RV32I-LABEL: many_args:
13081304
; RV32I: # %bb.0: # %entry
@@ -1456,7 +1452,7 @@ define void @alloca(i32 %n) nounwind {
14561452
;
14571453
; RV32IZCMP-SR-LABEL: alloca:
14581454
; RV32IZCMP-SR: # %bb.0:
1459-
; RV32IZCMP-SR-NEXT: call t0, __riscv_save_2
1455+
; RV32IZCMP-SR-NEXT: cm.push {ra, s0-s1}, -16
14601456
; RV32IZCMP-SR-NEXT: addi s0, sp, 16
14611457
; RV32IZCMP-SR-NEXT: mv s1, sp
14621458
; RV32IZCMP-SR-NEXT: addi a0, a0, 15
@@ -1466,11 +1462,11 @@ define void @alloca(i32 %n) nounwind {
14661462
; RV32IZCMP-SR-NEXT: call notdead@plt
14671463
; RV32IZCMP-SR-NEXT: mv sp, s1
14681464
; RV32IZCMP-SR-NEXT: addi sp, s0, -16
1469-
; RV32IZCMP-SR-NEXT: tail __riscv_restore_2
1465+
; RV32IZCMP-SR-NEXT: cm.popret {ra, s0-s1}, 16
14701466
;
14711467
; RV64IZCMP-SR-LABEL: alloca:
14721468
; RV64IZCMP-SR: # %bb.0:
1473-
; RV64IZCMP-SR-NEXT: call t0, __riscv_save_2
1469+
; RV64IZCMP-SR-NEXT: cm.push {ra, s0-s1}, -32
14741470
; RV64IZCMP-SR-NEXT: addi s0, sp, 32
14751471
; RV64IZCMP-SR-NEXT: mv s1, sp
14761472
; RV64IZCMP-SR-NEXT: slli a0, a0, 32
@@ -1482,7 +1478,7 @@ define void @alloca(i32 %n) nounwind {
14821478
; RV64IZCMP-SR-NEXT: call notdead@plt
14831479
; RV64IZCMP-SR-NEXT: mv sp, s1
14841480
; RV64IZCMP-SR-NEXT: addi sp, s0, -32
1485-
; RV64IZCMP-SR-NEXT: tail __riscv_restore_2
1481+
; RV64IZCMP-SR-NEXT: cm.popret {ra, s0-s1}, 32
14861482
;
14871483
; RV32I-LABEL: alloca:
14881484
; RV32I: # %bb.0:
@@ -1790,15 +1786,15 @@ define void @foo_no_irq() nounwind{
17901786
;
17911787
; RV32IZCMP-SR-LABEL: foo_no_irq:
17921788
; RV32IZCMP-SR: # %bb.0:
1793-
; RV32IZCMP-SR-NEXT: call t0, __riscv_save_0
1789+
; RV32IZCMP-SR-NEXT: cm.push {ra}, -16
17941790
; RV32IZCMP-SR-NEXT: call foo_test_irq@plt
1795-
; RV32IZCMP-SR-NEXT: tail __riscv_restore_0
1791+
; RV32IZCMP-SR-NEXT: cm.popret {ra}, 16
17961792
;
17971793
; RV64IZCMP-SR-LABEL: foo_no_irq:
17981794
; RV64IZCMP-SR: # %bb.0:
1799-
; RV64IZCMP-SR-NEXT: call t0, __riscv_save_0
1795+
; RV64IZCMP-SR-NEXT: cm.push {ra}, -16
18001796
; RV64IZCMP-SR-NEXT: call foo_test_irq@plt
1801-
; RV64IZCMP-SR-NEXT: tail __riscv_restore_0
1797+
; RV64IZCMP-SR-NEXT: cm.popret {ra}, 16
18021798
;
18031799
; RV32I-LABEL: foo_no_irq:
18041800
; RV32I: # %bb.0:
@@ -2739,8 +2735,7 @@ define void @callee_no_irq() nounwind{
27392735
;
27402736
; RV32IZCMP-SR-LABEL: callee_no_irq:
27412737
; RV32IZCMP-SR: # %bb.0:
2742-
; RV32IZCMP-SR-NEXT: call t0, __riscv_save_12
2743-
; RV32IZCMP-SR-NEXT: addi sp, sp, -32
2738+
; RV32IZCMP-SR-NEXT: cm.push {ra, s0-s11}, -96
27442739
; RV32IZCMP-SR-NEXT: lui a6, %hi(var_test_irq)
27452740
; RV32IZCMP-SR-NEXT: lw a0, %lo(var_test_irq)(a6)
27462741
; RV32IZCMP-SR-NEXT: sw a0, 28(sp) # 4-byte Folded Spill
@@ -2819,13 +2814,11 @@ define void @callee_no_irq() nounwind{
28192814
; RV32IZCMP-SR-NEXT: sw a0, %lo(var_test_irq+4)(a6)
28202815
; RV32IZCMP-SR-NEXT: lw a0, 28(sp) # 4-byte Folded Reload
28212816
; RV32IZCMP-SR-NEXT: sw a0, %lo(var_test_irq)(a6)
2822-
; RV32IZCMP-SR-NEXT: addi sp, sp, 32
2823-
; RV32IZCMP-SR-NEXT: tail __riscv_restore_12
2817+
; RV32IZCMP-SR-NEXT: cm.popret {ra, s0-s11}, 96
28242818
;
28252819
; RV64IZCMP-SR-LABEL: callee_no_irq:
28262820
; RV64IZCMP-SR: # %bb.0:
2827-
; RV64IZCMP-SR-NEXT: call t0, __riscv_save_12
2828-
; RV64IZCMP-SR-NEXT: addi sp, sp, -48
2821+
; RV64IZCMP-SR-NEXT: cm.push {ra, s0-s11}, -160
28292822
; RV64IZCMP-SR-NEXT: lui a6, %hi(var_test_irq)
28302823
; RV64IZCMP-SR-NEXT: lw a0, %lo(var_test_irq)(a6)
28312824
; RV64IZCMP-SR-NEXT: sd a0, 40(sp) # 8-byte Folded Spill
@@ -2904,8 +2897,7 @@ define void @callee_no_irq() nounwind{
29042897
; RV64IZCMP-SR-NEXT: sw a0, %lo(var_test_irq+4)(a6)
29052898
; RV64IZCMP-SR-NEXT: ld a0, 40(sp) # 8-byte Folded Reload
29062899
; RV64IZCMP-SR-NEXT: sw a0, %lo(var_test_irq)(a6)
2907-
; RV64IZCMP-SR-NEXT: addi sp, sp, 48
2908-
; RV64IZCMP-SR-NEXT: tail __riscv_restore_12
2900+
; RV64IZCMP-SR-NEXT: cm.popret {ra, s0-s11}, 160
29092901
;
29102902
; RV32I-LABEL: callee_no_irq:
29112903
; RV32I: # %bb.0:

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