@@ -96,6 +96,107 @@ typedef enum {
9696 UART_PARITY_ERROR
9797} hardwareSerial_error_t;
9898
99+
100+ #ifndef ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE
101+ #define ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE 2048
102+ #endif
103+
104+ #ifndef ARDUINO_SERIAL_EVENT_TASK_PRIORITY
105+ #define ARDUINO_SERIAL_EVENT_TASK_PRIORITY (configMAX_PRIORITIES-1 )
106+ #endif
107+
108+ #ifndef ARDUINO_SERIAL_EVENT_TASK_RUNNING_CORE
109+ #define ARDUINO_SERIAL_EVENT_TASK_RUNNING_CORE -1
110+ #endif
111+
112+ // UART0 pins are defined by default by the bootloader.
113+ // The definitions for SOC_* should not be changed unless the bootloader pins
114+ // have changed and you know what you are doing.
115+
116+ #ifndef SOC_RX0
117+ #if CONFIG_IDF_TARGET_ESP32
118+ #define SOC_RX0 (gpio_num_t )3
119+ #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
120+ #define SOC_RX0 (gpio_num_t )44
121+ #elif CONFIG_IDF_TARGET_ESP32C3
122+ #define SOC_RX0 (gpio_num_t )20
123+ #elif CONFIG_IDF_TARGET_ESP32C6
124+ #define SOC_RX0 (gpio_num_t )17
125+ #elif CONFIG_IDF_TARGET_ESP32H2
126+ #define SOC_RX0 (gpio_num_t )23
127+ #endif
128+ #endif
129+
130+ #ifndef SOC_TX0
131+ #if CONFIG_IDF_TARGET_ESP32
132+ #define SOC_TX0 (gpio_num_t )1
133+ #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
134+ #define SOC_TX0 (gpio_num_t )43
135+ #elif CONFIG_IDF_TARGET_ESP32C3
136+ #define SOC_TX0 (gpio_num_t )21
137+ #elif CONFIG_IDF_TARGET_ESP32C6
138+ #define SOC_TX0 (gpio_num_t )16
139+ #elif CONFIG_IDF_TARGET_ESP32H2
140+ #define SOC_TX0 (gpio_num_t )24
141+ #endif
142+ #endif
143+
144+ // Default pins for UART1 are arbitrary, and defined here for convenience.
145+
146+ #if SOC_UART_NUM > 1
147+ #ifndef RX1
148+ #if CONFIG_IDF_TARGET_ESP32
149+ #define RX1 (gpio_num_t )26
150+ #elif CONFIG_IDF_TARGET_ESP32S2
151+ #define RX1 (gpio_num_t )4
152+ #elif CONFIG_IDF_TARGET_ESP32C3
153+ #define RX1 (gpio_num_t )18
154+ #elif CONFIG_IDF_TARGET_ESP32S3
155+ #define RX1 (gpio_num_t )15
156+ #elif CONFIG_IDF_TARGET_ESP32C6
157+ #define RX1 (gpio_num_t )4
158+ #elif CONFIG_IDF_TARGET_ESP32H2
159+ #define RX1 (gpio_num_t )0
160+ #endif
161+ #endif
162+
163+ #ifndef TX1
164+ #if CONFIG_IDF_TARGET_ESP32
165+ #define TX1 (gpio_num_t )27
166+ #elif CONFIG_IDF_TARGET_ESP32S2
167+ #define TX1 (gpio_num_t )5
168+ #elif CONFIG_IDF_TARGET_ESP32C3
169+ #define TX1 (gpio_num_t )19
170+ #elif CONFIG_IDF_TARGET_ESP32S3
171+ #define TX1 (gpio_num_t )16
172+ #elif CONFIG_IDF_TARGET_ESP32C6
173+ #define TX1 (gpio_num_t )5
174+ #elif CONFIG_IDF_TARGET_ESP32H2
175+ #define TX1 (gpio_num_t )1
176+ #endif
177+ #endif
178+ #endif /* SOC_UART_NUM > 1 */
179+
180+ // Default pins for UART2 are arbitrary, and defined here for convenience.
181+
182+ #if SOC_UART_NUM > 2
183+ #ifndef RX2
184+ #if CONFIG_IDF_TARGET_ESP32
185+ #define RX2 (gpio_num_t )4
186+ #elif CONFIG_IDF_TARGET_ESP32S3
187+ #define RX2 (gpio_num_t )19
188+ #endif
189+ #endif
190+
191+ #ifndef TX2
192+ #if CONFIG_IDF_TARGET_ESP32
193+ #define TX2 (gpio_num_t )25
194+ #elif CONFIG_IDF_TARGET_ESP32S3
195+ #define TX2 (gpio_num_t )20
196+ #endif
197+ #endif
198+ #endif /* SOC_UART_NUM > 2 */
199+
99200typedef std::function<void (void )> OnReceiveCb;
100201typedef std::function<void (hardwareSerial_error_t)> OnReceiveErrorCb;
101202
@@ -208,7 +309,7 @@ class HardwareSerial: public Stream
208309 // Used to set RS485 modes such as UART_MODE_RS485_HALF_DUPLEX for Auto RTS function on ESP32
209310 // UART_MODE_UART = 0x00 mode: regular UART mode
210311 // UART_MODE_RS485_HALF_DUPLEX = 0x01 mode: half duplex RS485 UART mode control by RTS pin
211- // UART_MODE_IRDA = 0x02 mode: IRDA UART mode
312+ // UART_MODE_IRDA = 0x02 mode: IRDA UART mode
212313 // UART_MODE_RS485_COLLISION_DETECT = 0x03 mode: RS485 collision detection UART mode (used for test purposes)
213314 // UART_MODE_RS485_APP_CTRL = 0x04 mode: application control RS485 UART mode (used for test purposes)
214315 bool setMode (SerialMode mode);
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