@@ -281,7 +281,7 @@ void I2SClass::setInvertedPdm(bool clk){
281281}
282282#endif
283283
284- bool I2SClass::initSTD (uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch){
284+ bool I2SClass::initSTD (uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch, int8_t slot_mask ){
285285 // Peripheral manager deinit previous peripheral if pin was used
286286 if (_mclk >= 0 ) if (!perimanClearPinBus (_mclk)){ return false ; }
287287 if (_bclk >= 0 ) if (!perimanClearPinBus (_bclk)){ return false ; }
@@ -307,6 +307,9 @@ bool I2SClass::initSTD(uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mo
307307 }
308308
309309 i2s_std_config_t i2s_config = I2S_STD_CHAN_CFG (rate, bits_cfg, ch);
310+ if (slot_mask >= 0 && (i2s_std_slot_mask_t )slot_mask <= I2S_STD_SLOT_BOTH){
311+ i2s_config.slot_cfg .slot_mask = (i2s_std_slot_mask_t )slot_mask;
312+ }
310313 if (tx_chan != NULL ) {
311314 tx_sample_rate = rate;
312315 tx_data_bit_width = bits_cfg;
@@ -475,11 +478,7 @@ bool I2SClass::initPDMrx(uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_
475478}
476479#endif
477480
478- bool I2SClass::begin (i2s_mode_t mode, uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch
479- #if SOC_I2S_SUPPORTS_TDM
480- , int8_t slot_mask
481- #endif
482- ){
481+ bool I2SClass::begin (i2s_mode_t mode, uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch, int8_t slot_mask){
483482 /* Setup I2S peripheral */
484483 if (mode >= I2S_MODE_MAX){
485484 log_e (" Invalid I2S mode selected." );
@@ -490,7 +489,7 @@ bool I2SClass::begin(i2s_mode_t mode, uint32_t rate, i2s_data_bit_width_t bits_c
490489 bool init = false ;
491490 switch (_mode){
492491 case I2S_MODE_STD:
493- init = initSTD (rate, bits_cfg, ch);
492+ init = initSTD (rate, bits_cfg, ch, slot_mask );
494493 break ;
495494#if SOC_I2S_SUPPORTS_TDM
496495 case I2S_MODE_TDM:
@@ -569,13 +568,16 @@ bool I2SClass::end(){
569568 return true ;
570569}
571570
572- bool I2SClass::configureTX (uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch){
571+ bool I2SClass::configureTX (uint32_t rate, i2s_data_bit_width_t bits_cfg, i2s_slot_mode_t ch, int8_t slot_mask ){
573572 /* Setup I2S channels */
574573 if (tx_chan != NULL ) {
575574 if (tx_sample_rate == rate && tx_data_bit_width == bits_cfg && tx_slot_mode == ch){
576575 return true ;
577576 }
578577 i2s_std_config_t i2s_config = I2S_STD_CHAN_CFG (rate, bits_cfg, ch);
578+ if (slot_mask >= 0 && (i2s_std_slot_mask_t )slot_mask <= I2S_STD_SLOT_BOTH){
579+ i2s_config.slot_cfg .slot_mask = (i2s_std_slot_mask_t )slot_mask;
580+ }
579581 I2S_ERROR_CHECK_RETURN_FALSE (i2s_channel_disable (tx_chan));
580582 I2S_ERROR_CHECK_RETURN_FALSE (i2s_channel_reconfig_std_clock (tx_chan, &i2s_config.clk_cfg ));
581583 tx_sample_rate = rate;
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