@@ -95,6 +95,107 @@ typedef enum {
9595 UART_PARITY_ERROR
9696} hardwareSerial_error_t;
9797
98+
99+ #ifndef ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE
100+ #define ARDUINO_SERIAL_EVENT_TASK_STACK_SIZE 2048
101+ #endif
102+
103+ #ifndef ARDUINO_SERIAL_EVENT_TASK_PRIORITY
104+ #define ARDUINO_SERIAL_EVENT_TASK_PRIORITY (configMAX_PRIORITIES-1 )
105+ #endif
106+
107+ #ifndef ARDUINO_SERIAL_EVENT_TASK_RUNNING_CORE
108+ #define ARDUINO_SERIAL_EVENT_TASK_RUNNING_CORE -1
109+ #endif
110+
111+ // UART0 pins are defined by default by the bootloader.
112+ // The definitions for SOC_* should not be changed unless the bootloader pins
113+ // have changed and you know what you are doing.
114+
115+ #ifndef SOC_RX0
116+ #if CONFIG_IDF_TARGET_ESP32
117+ #define SOC_RX0 (gpio_num_t )3
118+ #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
119+ #define SOC_RX0 (gpio_num_t )44
120+ #elif CONFIG_IDF_TARGET_ESP32C3
121+ #define SOC_RX0 (gpio_num_t )20
122+ #elif CONFIG_IDF_TARGET_ESP32C6
123+ #define SOC_RX0 (gpio_num_t )17
124+ #elif CONFIG_IDF_TARGET_ESP32H2
125+ #define SOC_RX0 (gpio_num_t )23
126+ #endif
127+ #endif
128+
129+ #ifndef SOC_TX0
130+ #if CONFIG_IDF_TARGET_ESP32
131+ #define SOC_TX0 (gpio_num_t )1
132+ #elif CONFIG_IDF_TARGET_ESP32S2 || CONFIG_IDF_TARGET_ESP32S3
133+ #define SOC_TX0 (gpio_num_t )43
134+ #elif CONFIG_IDF_TARGET_ESP32C3
135+ #define SOC_TX0 (gpio_num_t )21
136+ #elif CONFIG_IDF_TARGET_ESP32C6
137+ #define SOC_TX0 (gpio_num_t )16
138+ #elif CONFIG_IDF_TARGET_ESP32H2
139+ #define SOC_TX0 (gpio_num_t )24
140+ #endif
141+ #endif
142+
143+ // Default pins for UART1 are arbitrary, and defined here for convenience.
144+
145+ #if SOC_UART_NUM > 1
146+ #ifndef RX1
147+ #if CONFIG_IDF_TARGET_ESP32
148+ #define RX1 (gpio_num_t )26
149+ #elif CONFIG_IDF_TARGET_ESP32S2
150+ #define RX1 (gpio_num_t )4
151+ #elif CONFIG_IDF_TARGET_ESP32C3
152+ #define RX1 (gpio_num_t )18
153+ #elif CONFIG_IDF_TARGET_ESP32S3
154+ #define RX1 (gpio_num_t )15
155+ #elif CONFIG_IDF_TARGET_ESP32C6
156+ #define RX1 (gpio_num_t )4
157+ #elif CONFIG_IDF_TARGET_ESP32H2
158+ #define RX1 (gpio_num_t )0
159+ #endif
160+ #endif
161+
162+ #ifndef TX1
163+ #if CONFIG_IDF_TARGET_ESP32
164+ #define TX1 (gpio_num_t )27
165+ #elif CONFIG_IDF_TARGET_ESP32S2
166+ #define TX1 (gpio_num_t )5
167+ #elif CONFIG_IDF_TARGET_ESP32C3
168+ #define TX1 (gpio_num_t )19
169+ #elif CONFIG_IDF_TARGET_ESP32S3
170+ #define TX1 (gpio_num_t )16
171+ #elif CONFIG_IDF_TARGET_ESP32C6
172+ #define TX1 (gpio_num_t )5
173+ #elif CONFIG_IDF_TARGET_ESP32H2
174+ #define TX1 (gpio_num_t )1
175+ #endif
176+ #endif
177+ #endif /* SOC_UART_NUM > 1 */
178+
179+ // Default pins for UART2 are arbitrary, and defined here for convenience.
180+
181+ #if SOC_UART_NUM > 2
182+ #ifndef RX2
183+ #if CONFIG_IDF_TARGET_ESP32
184+ #define RX2 (gpio_num_t )4
185+ #elif CONFIG_IDF_TARGET_ESP32S3
186+ #define RX2 (gpio_num_t )19
187+ #endif
188+ #endif
189+
190+ #ifndef TX2
191+ #if CONFIG_IDF_TARGET_ESP32
192+ #define TX2 (gpio_num_t )25
193+ #elif CONFIG_IDF_TARGET_ESP32S3
194+ #define TX2 (gpio_num_t )20
195+ #endif
196+ #endif
197+ #endif /* SOC_UART_NUM > 2 */
198+
98199typedef std::function<void (void )> OnReceiveCb;
99200typedef std::function<void (hardwareSerial_error_t)> OnReceiveErrorCb;
100201
@@ -207,7 +308,7 @@ class HardwareSerial: public Stream
207308 // Used to set RS485 modes such as UART_MODE_RS485_HALF_DUPLEX for Auto RTS function on ESP32
208309 // UART_MODE_UART = 0x00 mode: regular UART mode
209310 // UART_MODE_RS485_HALF_DUPLEX = 0x01 mode: half duplex RS485 UART mode control by RTS pin
210- // UART_MODE_IRDA = 0x02 mode: IRDA UART mode
311+ // UART_MODE_IRDA = 0x02 mode: IRDA UART mode
211312 // UART_MODE_RS485_COLLISION_DETECT = 0x03 mode: RS485 collision detection UART mode (used for test purposes)
212313 // UART_MODE_RS485_APP_CTRL = 0x04 mode: application control RS485 UART mode (used for test purposes)
213314 bool setMode (SerialMode mode);
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