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Merge pull request riscv-collab#1198 from JanMatCodasip/jm-codasip/semihosting-1-remove-dead-code
RISC-V Semihosting 1 of 3: Remove dead code
2 parents f82c5a7 + ecb2ad4 commit eb9ba21

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src/target/riscv/riscv_semihosting.c

Lines changed: 4 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -57,10 +57,7 @@ void riscv_semihosting_init(struct target *target)
5757
enum semihosting_result riscv_semihosting(struct target *target, int *retval)
5858
{
5959
struct semihosting *semihosting = target->semihosting;
60-
if (!semihosting) {
61-
LOG_TARGET_DEBUG(target, " -> NONE (!semihosting)");
62-
return SEMIHOSTING_NONE;
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}
60+
assert(semihosting);
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6562
if (!semihosting->is_active) {
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LOG_TARGET_DEBUG(target, " -> NONE (!semihosting->is_active)");
@@ -170,19 +167,16 @@ static int riscv_semihosting_setup(struct target *target, int enable)
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LOG_TARGET_DEBUG(target, "enable=%d", enable);
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172169
struct semihosting *semihosting = target->semihosting;
173-
if (semihosting)
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semihosting->setup_time = clock();
170+
assert(semihosting);
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172+
semihosting->setup_time = clock();
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return ERROR_OK;
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}
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static int riscv_semihosting_post_result(struct target *target)
180177
{
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struct semihosting *semihosting = target->semihosting;
182-
if (!semihosting) {
183-
/* If not enabled, silently ignored. */
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return 0;
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}
179+
assert(semihosting);
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187181
LOG_TARGET_DEBUG(target, "Result: 0x%" PRIx64, semihosting->result);
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riscv_reg_set(target, GDB_REGNO_A0, semihosting->result);

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