diff --git a/.gitignore b/.gitignore index f4b10b50c45..e89472c010a 100644 --- a/.gitignore +++ b/.gitignore @@ -97,6 +97,3 @@ test_suite.json # default delivery dir DELIVERY/ - -# Directory hosting PSA autogenerated source files -PSA_AUTOGEN/ diff --git a/.travis.yml b/.travis.yml index 985e28f1e39..56bcc62d509 100644 --- a/.travis.yml +++ b/.travis.yml @@ -226,8 +226,8 @@ matrix: ### Extended Tests ### - &extended-vm stage: "Extended" - name: "psa autogen" - env: NAME=psa-autogen + name: "events" + env: NAME=events EVENTS=events language: python python: 3.7 install: @@ -239,13 +239,6 @@ matrix: - python -m pip install --upgrade setuptools==40.4.3 - pip install -r requirements.txt - pip list --verbose - script: - - python tools/psa/generate_partition_code.py - - git diff --exit-code - - - <<: *extended-vm - name: "events" - env: NAME=events EVENTS=events script: # Check that example compiles - sed -n '/``` cpp/,/```/{/```$/Q;/```/d;p;}' ${EVENTS}/README.md > main.cpp diff --git a/TESTS/mbed_hal/spm/fault_functions.h b/TESTS/mbed_hal/spm/fault_functions.h deleted file mode 100644 index 79029b536ff..00000000000 --- a/TESTS/mbed_hal/spm/fault_functions.h +++ /dev/null @@ -1,49 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __MBED_HAL_SPM_FAULT_FUNCTIONS__ -#define __MBED_HAL_SPM_FAULT_FUNCTIONS__ - -#include "cmsis_compiler.h" - -#ifdef __cplusplus -extern "C" { -#endif - -// Retruns the value of the LR register -// Used to determine which stack the exception happend in -__STATIC_FORCEINLINE uint32_t __get_LR(void); - -// This function is required as we need a symbol/address -// to jump to from fault handler. -void do_nothing(void); - -// Test exception handler -static void hard_fault_handler_test(); - -// Using naked function as it will not be executed from beginning to the end. -// The execution flow expected to be interrupted by exception and we will -// return to other function. -// compiler will not produce prolog and epilog code for naked function -// and thus will preserve stack in un-corrupted state -__attribute__((naked)) void call_mem(uint32_t addr); - -#ifdef __cplusplus -} -#endif - -#endif // __MBED_HAL_SPM_FAULT_FUNCTIONS__ diff --git a/TESTS/mbed_hal/spm/main.cpp b/TESTS/mbed_hal/spm/main.cpp deleted file mode 100644 index 2e8e2359409..00000000000 --- a/TESTS/mbed_hal/spm/main.cpp +++ /dev/null @@ -1,162 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if !defined(COMPONENT_PSA_SRV_IPC) -#error [NOT_SUPPORTED] Test supported only on PSA targets -#else - -#if (defined(__ARMCC_VERSION) || defined( __ICCARM__ )) -#error [NOT_SUPPORTED] this test is supported on GCC only -#else - -#if DOMAIN_NS == 1 -#error [NOT_SUPPORTED] Cannot run on M23/M33 core as SecureFault is implemented in secure-side and cant be remapped -#else - -#include "utest/utest.h" -#include "unity/unity.h" -#include "greentea-client/test_env.h" -#include "cmsis.h" -#include "spm_api.h" -#include -#include "fault_functions.h" - -using namespace utest::v1; - - -#define HARDFAULT_IRQn ((IRQn_Type)-13) -#define EXC_RETURN_RETURN_STACK_MSK ((uint32_t)(0x00000004)) -#define PC_INDEX_IN_STACK_FRAME 6 - -volatile uint32_t fault_occurred; -uint32_t real_hard_fault_handler; - -__STATIC_FORCEINLINE uint32_t __get_LR(void) -{ - uint32_t result; - - __ASM volatile("MOV %0, lr" : "=r"(result)); - return (result); -} - -void do_nothing(void) -{ - __NOP(); -} - -static void hard_fault_handler_test() -{ - fault_occurred++; - // LR is set EXC_RETURN - // lowest bits identify PSP vs MSP stack used for stacking - uint32_t lr = __get_LR(); - uint32_t sp; - - if (lr & EXC_RETURN_RETURN_STACK_MSK) { - sp = __get_PSP(); - } else { - sp = __get_MSP(); - } - - // Overwrite return address. - // Fake return to a our special function since current - // instruction under test will always fail due to memory protection - ((uint32_t *)sp)[PC_INDEX_IN_STACK_FRAME] = (uint32_t)do_nothing; -} - -__attribute__((naked)) void call_mem(uint32_t addr) -{ - // Only first instruction will be executed in positive flow, - // since exception will be generated for invalid memory access. - // Other instructions are for calling do_nothing function according to AAPCS. - __ASM( - "LDR r3, [r0]\n" - "BX lr\n" - ); -} - -static void test_memory(uint32_t addr, uint32_t expected_fatal_count) -{ - call_mem(addr); - // Although call_mem is a "naked" function, it is called using AAPCS. - // Thus we can assume LR will point to next instruction, and caller save registers are backed up - TEST_ASSERT_EQUAL(expected_fatal_count, fault_occurred); -} - -static void secure_ram_fault_test(void) -{ - test_memory(PSA_SECURE_RAM_START, 1); -} - -static void secure_flash_fault_test(void) -{ - test_memory(PSA_SECURE_ROM_START, 1); -} - -static void non_secure_ram_fault_test(void) -{ - test_memory(PSA_NON_SECURE_RAM_START, 0); -} - -static void non_secure_flash_fault_test(void) -{ - test_memory(PSA_NON_SECURE_ROM_START, 0); -} - -utest::v1::status_t fault_override_setup(const Case *const source, const size_t index_of_case) -{ - // Save old hard fault handler and replace it with a new one - // NOTE: only works when VTOR is set to RAM - real_hard_fault_handler = NVIC_GetVector(HARDFAULT_IRQn); - NVIC_SetVector(HARDFAULT_IRQn, (uint32_t)&hard_fault_handler_test); - fault_occurred = 0; - - return greentea_case_setup_handler(source, index_of_case); -} - -utest::v1::status_t fault_override_teardown(const Case *const source, const size_t passed, const size_t failed, - const failure_t reason) -{ - // Restore real hard fault handler - NVIC_SetVector(HARDFAULT_IRQn, real_hard_fault_handler); - - return greentea_case_teardown_handler(source, passed, failed, reason); -} - -Case cases[] = { - Case("SPM - Access non-secure RAM", fault_override_setup, non_secure_ram_fault_test, fault_override_teardown), - Case("SPM - Access non-secure Flash", fault_override_setup, non_secure_flash_fault_test, fault_override_teardown), - Case("SPM - Access secure RAM", fault_override_setup, secure_ram_fault_test, fault_override_teardown), - Case("SPM - Access secure Flash", fault_override_setup, secure_flash_fault_test, fault_override_teardown) -}; - -utest::v1::status_t greentea_test_setup(const size_t number_of_cases) -{ - GREENTEA_SETUP(20, "default_auto"); - return greentea_test_setup_handler(number_of_cases); -} - -Specification specification(greentea_test_setup, cases, greentea_test_teardown_handler); - -int main() -{ - Harness::run(specification); -} - -#endif // DOMAIN_NS == 1 -#endif // (defined(__ARMCC_VERSION) || defined( __ICCARM__ )) -#endif // !defined(COMPONENT_PSA_SRV_IPC) diff --git a/TESTS/psa/crypto_access_control/COMPONENT_NSPE/main.cpp b/TESTS/psa/crypto_access_control/COMPONENT_NSPE/main.cpp deleted file mode 100644 index a0f8852368f..00000000000 --- a/TESTS/psa/crypto_access_control/COMPONENT_NSPE/main.cpp +++ /dev/null @@ -1,556 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited and affiliates - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "psa/crypto.h" - -#if ((!defined(TARGET_PSA)) || (!defined(MBEDTLS_PSA_CRYPTO_C)) || (!defined(COMPONENT_PSA_SRV_IPC))) -#error [NOT_SUPPORTED] These tests can run only on SPM-enabled targets and where Mbed Crypto is ON - skipping. -#else - -#include -#include "mbed.h" -#include "greentea-client/test_env.h" -#include "unity.h" -#include "utest.h" -#include "entropy.h" -#include "entropy_poll.h" -#include "test_partition_proxy.h" -#include "psa/lifecycle.h" - -using namespace utest::v1; - -#if defined(MBEDTLS_ENTROPY_NV_SEED) || defined(COMPONENT_PSA_SRV_IPC) - -#if !defined(MAX) -#define MAX(a,b) (((a)>(b))?(a):(b)) -#endif - -#define MBEDTLS_PSA_INJECT_ENTROPY_MIN_SIZE \ - MAX(MBEDTLS_ENTROPY_MIN_PLATFORM, MBEDTLS_ENTROPY_BLOCK_SIZE) - -void inject_entropy() -{ - uint8_t seed[MBEDTLS_PSA_INJECT_ENTROPY_MIN_SIZE] = { 0 }; - for (int i = 0; i < MBEDTLS_PSA_INJECT_ENTROPY_MIN_SIZE; ++i) { - seed[i] = i; - } - mbedtls_psa_inject_entropy(seed, MBEDTLS_PSA_INJECT_ENTROPY_MIN_SIZE); -} -#endif // defined(MBEDTLS_ENTROPY_NV_SEED) || defined(COMPONENT_PSA_SRV_IPC) - -static psa_status_t create_and_generate_key_via_test_partition( - const psa_key_attributes_t *attributes, - psa_key_handle_t *key_handle, - uint8_t close_key) -{ - TEST_ASSERT_EQUAL(PSA_SUCCESS, - test_partition_crypto_generate_key(attributes, - key_handle)); - TEST_ASSERT_NOT_EQUAL(0, *key_handle); - if (close_key) { - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_close_key(*key_handle)); - } - return (PSA_SUCCESS); -} - -void test_open_other_partition_key(void) -{ - static const psa_key_id_t key_id = 999; - static const psa_key_type_t key_type = PSA_KEY_TYPE_AES; - static const psa_key_usage_t key_usage = PSA_KEY_USAGE_ENCRYPT | PSA_KEY_USAGE_DECRYPT; - static const psa_algorithm_t key_alg = PSA_ALG_CBC_NO_PADDING; - static const size_t key_bits = 128; - psa_key_handle_t key_handle = 0; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - - /* via test partition - create a key, generate key material and close */ - psa_set_key_usage_flags(&attributes, key_usage); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, key_bits); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, - create_and_generate_key_via_test_partition(&attributes, &key_handle, 1)); - - /* via test partition - reopen the key created by the test partition */ - key_handle = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_open_key(key_id, &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* via test partition - close the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_close_key(key_handle)); - - /* try to open the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_ERROR_DOES_NOT_EXIST, psa_open_key(key_id, &key_handle)); - - /* via test partition - reopen the key created by the test partition and keep it open */ - key_handle = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_open_key(key_id, &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle)); -} - -void test_create_key_same_id_different_partitions(void) -{ - static const psa_key_id_t key_id = 999; - static const psa_key_type_t key_type = PSA_KEY_TYPE_AES; - static const psa_key_usage_t key_usage_remote = PSA_KEY_USAGE_ENCRYPT | PSA_KEY_USAGE_DECRYPT, - key_usage_local = PSA_KEY_USAGE_SIGN | PSA_KEY_USAGE_VERIFY; - static const psa_algorithm_t key_alg = PSA_ALG_CBC_NO_PADDING; - static const size_t key_bits_remote = 128, - key_bits_local = 256; - psa_key_handle_t key_handle_remote = 0, - key_handle_local = 0; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - - /* via test partition - create a key, generate key material and close */ - psa_set_key_usage_flags(&attributes, key_usage_remote); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, key_bits_remote); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, - create_and_generate_key_via_test_partition(&attributes, &key_handle_remote, 1)); - psa_reset_key_attributes(&attributes); - - /* create a key, generate key material and close from current partition (i.e. NSPE) */ - psa_set_key_usage_flags(&attributes, key_usage_local); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, key_bits_local); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, psa_generate_key(&attributes, &key_handle_local)); - TEST_ASSERT_NOT_EQUAL(0, key_handle_local); - TEST_ASSERT_EQUAL(PSA_SUCCESS, psa_close_key(key_handle_local)); - - /* via test partition - reopen the key created by the test partition */ - key_handle_remote = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_open_key(key_id, &key_handle_remote)); - TEST_ASSERT_NOT_EQUAL(0, key_handle_remote); - - /* reopen the key created from the current partition (NSPE) */ - key_handle_local = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, psa_open_key(key_id, &key_handle_local)); - TEST_ASSERT_NOT_EQUAL(0, key_handle_local); - - /* via test partition - get key info for the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, - test_partition_crypto_get_key_attributes(key_handle_remote, - &attributes)); - TEST_ASSERT_EQUAL(key_type, psa_get_key_type(&attributes)); - TEST_ASSERT_EQUAL(key_bits_remote, psa_get_key_bits(&attributes)); - TEST_ASSERT_EQUAL(key_usage_remote, psa_get_key_usage_flags(&attributes)); - TEST_ASSERT_EQUAL(key_alg, psa_get_key_algorithm(&attributes)); - - /* get key attributes for key created by the current partition (NSPE) */ - attributes = psa_key_attributes_init(); - TEST_ASSERT_EQUAL(PSA_SUCCESS, psa_get_key_attributes(key_handle_local, &attributes)); - TEST_ASSERT_EQUAL(key_type, psa_get_key_type(&attributes)); - TEST_ASSERT_EQUAL(key_bits_local, psa_get_key_bits(&attributes)); - TEST_ASSERT_EQUAL(key_usage_local, psa_get_key_usage_flags(&attributes)); - TEST_ASSERT_EQUAL(key_alg, psa_get_key_algorithm(&attributes)); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle_remote)); - - /* destroy the key created by the current partition (NSPE) */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, psa_destroy_key(key_handle_local)); -} - -void test_use_other_partition_key_manage_key(void) -{ - static const psa_key_id_t key_id = 999; - static const psa_key_type_t key_type = PSA_KEY_TYPE_AES; - static const psa_algorithm_t key_alg = PSA_ALG_CBC_NO_PADDING; - static const psa_key_usage_t key_usage = PSA_KEY_USAGE_EXPORT; - static const size_t key_bits = 128; - static const uint8_t key_data[] = { - 0x2b, 0x7e, 0x15, 0x16, 0x28, 0xae, 0xd2, 0xa6, - 0xab, 0xf7, 0x15, 0x88, 0x09, 0xcf, 0x4f, 0x3c - }; - psa_key_handle_t key_handle = 0; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - uint8_t output[sizeof(key_data)] = { 0 }; - size_t len; - - /* via test partition - generate a persistent key and close the key */ - psa_set_key_usage_flags(&attributes, key_usage); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, key_bits); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_generate_key(&attributes, &key_handle)); - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_close_key(key_handle)); - - /* via test partition - reopen the key created by the test partition and keep it open */ - key_handle = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_open_key(key_id, &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* try to work with the handle created for a key created by the test partition */ - attributes = psa_key_attributes_init(); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_get_key_attributes(key_handle, &attributes)); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_close_key(key_handle)); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_destroy_key(key_handle)); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_export_key(key_handle, output, sizeof(output), &len)); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_export_public_key(key_handle, output, sizeof(output), &len)); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle)); - - /* via test partition - import key data for the key created by the test partition */ - psa_set_key_usage_flags(&attributes, key_usage); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, key_bits); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, - test_partition_crypto_import_key( - &attributes, key_data, sizeof(key_data), &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle)); -} - -void test_use_other_partition_key_mac(void) -{ - static const psa_key_id_t key_id = 999; - static const psa_key_type_t key_type = PSA_KEY_TYPE_AES; - static const psa_algorithm_t key_alg = PSA_ALG_CBC_NO_PADDING; - static const psa_key_usage_t key_usage = PSA_KEY_USAGE_SIGN | PSA_KEY_USAGE_VERIFY; - static const size_t key_bits = 128; - psa_key_handle_t key_handle = 0; - psa_mac_operation_t operation; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - - /* via test partition - create a key, generate key material and close */ - psa_set_key_usage_flags(&attributes, key_usage); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, key_bits); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, - create_and_generate_key_via_test_partition(&attributes, &key_handle, 1)); - - /* via test partition - reopen the key created by the test partition */ - key_handle = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_open_key(key_id, &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* try to setup mac sign operation using the key that was created by the test partition */ - operation = psa_mac_operation_init(); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_mac_sign_setup(&operation, key_handle, key_alg)); - - /* try to setup mac verify operation using the key that was created by the test partition */ - operation = psa_mac_operation_init(); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_mac_verify_setup(&operation, key_handle, key_alg)); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle)); -} - -void test_use_other_partition_key_cipher(void) -{ - static const psa_key_id_t key_id = 999; - static const psa_key_type_t key_type = PSA_KEY_TYPE_AES; - static const psa_algorithm_t key_alg = PSA_ALG_CBC_NO_PADDING; - static const psa_key_usage_t key_usage = PSA_KEY_USAGE_SIGN | PSA_KEY_USAGE_VERIFY; - static const size_t key_bits = 128; - psa_key_handle_t key_handle = 0; - psa_cipher_operation_t operation; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - - /* via test partition - create a key, generate key material and close */ - psa_set_key_usage_flags(&attributes, key_usage); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, key_bits); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, - create_and_generate_key_via_test_partition(&attributes, &key_handle, 1)); - - /* via test partition - reopen the key created by the test partition */ - key_handle = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_open_key(key_id, &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* try to setup cipher encrypt operation using the key that was created by the test partition */ - operation = psa_cipher_operation_init(); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_cipher_encrypt_setup(&operation, key_handle, key_alg)); - - /* try to setup cipher decrypt operation using the key that was created by the test partition */ - operation = psa_cipher_operation_init(); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_cipher_decrypt_setup(&operation, key_handle, key_alg)); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle)); -} - -void test_use_other_partition_key_aead(void) -{ - static const psa_key_id_t key_id = 999; - static const psa_key_type_t key_type = PSA_KEY_TYPE_AES; - static const psa_algorithm_t key_alg = PSA_ALG_GCM; - static const psa_key_usage_t key_usage = PSA_KEY_USAGE_ENCRYPT | PSA_KEY_USAGE_DECRYPT; - static const size_t key_bits = 128; - static const uint8_t nonce[16] = { 0 }; - uint8_t plain_text[] = "encrypt me!"; - uint8_t cipher_text[PSA_AEAD_ENCRYPT_OUTPUT_SIZE(key_alg, sizeof(plain_text))] = { 0 }; - psa_key_handle_t key_handle = 0; - size_t len; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - - /* via test partition - create a key, generate key material and close */ - psa_set_key_usage_flags(&attributes, key_usage); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, key_bits); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, - create_and_generate_key_via_test_partition(&attributes, &key_handle, 1)); - - /* via test partition - reopen the key created by the test partition */ - key_handle = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_open_key(key_id, &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* try to aead encrypt using the key that was created by the test partition */ - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_aead_encrypt(key_handle, key_alg, nonce, sizeof(nonce), NULL, 0, - plain_text, sizeof(plain_text), - cipher_text, sizeof(cipher_text), &len)); - - /* try to aead decrypt using the key that was created by the test partition */ - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_aead_decrypt(key_handle, key_alg, nonce, sizeof(nonce), NULL, 0, - cipher_text, sizeof(cipher_text), - plain_text, sizeof(plain_text), &len)); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle)); -} - -void test_use_other_partition_key_asymmetric_sign_verify(void) -{ - static const psa_key_id_t key_id = 999; - static const psa_key_type_t key_type = PSA_KEY_TYPE_ECC_KEY_PAIR(PSA_ECC_CURVE_SECP256R1); - static const psa_algorithm_t key_alg = PSA_ALG_ECDSA(PSA_ALG_SHA_256); - static const psa_key_usage_t key_usage = PSA_KEY_USAGE_SIGN | PSA_KEY_USAGE_VERIFY; - static const size_t key_bits = 256; - static const uint8_t input[] = "hello world!"; - uint8_t signature[PSA_ECDSA_SIGNATURE_SIZE(key_bits)] = { 0 }; - psa_key_handle_t key_handle = 0; - size_t len; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - - /* via test partition - create a key, generate key material and close */ - psa_set_key_usage_flags(&attributes, key_usage); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, key_bits); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, - create_and_generate_key_via_test_partition(&attributes, &key_handle, 1)); - - /* via test partition - reopen the key created by the test partition */ - key_handle = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_open_key(key_id, &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* try to asymmetric sign using the key that was created by the test partition */ - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_sign_hash(key_handle, key_alg, input, sizeof(input), - signature, sizeof(signature), &len)); - - /* try to asymmetric verify using the key that was created by the test partition */ - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_verify_hash(key_handle, key_alg, input, sizeof(input), - signature, sizeof(signature))); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle)); -} - -void test_use_other_partition_key_asymmetric_encrypt_decrypt(void) -{ - static const psa_key_id_t key_id = 999; - static const psa_key_type_t key_type = PSA_KEY_TYPE_RSA_KEY_PAIR; - static const psa_algorithm_t key_alg = PSA_ALG_RSA_PKCS1V15_CRYPT; - static const psa_key_usage_t key_usage = PSA_KEY_USAGE_ENCRYPT | PSA_KEY_USAGE_DECRYPT; - static const uint8_t input[] = "encrypt me!"; - static const uint8_t key_data[] = { - 0x30, 0x82, 0x01, 0x3b, 0x02, 0x01, 0x00, 0x02, 0x41, 0x00, 0xee, 0x2b, - 0x13, 0x1d, 0x6b, 0x18, 0x18, 0xa9, 0x4c, 0xa8, 0xe9, 0x1c, 0x42, 0x38, - 0x7e, 0xb1, 0x5a, 0x7c, 0x27, 0x1f, 0x57, 0xb8, 0x9e, 0x73, 0x36, 0xb1, - 0x44, 0xd4, 0x53, 0x5b, 0x16, 0xc8, 0x30, 0x97, 0xec, 0xde, 0xfb, 0xbb, - 0x92, 0xd1, 0xb5, 0x31, 0x3b, 0x5a, 0x37, 0x21, 0x4d, 0x0e, 0x8f, 0x25, - 0x92, 0x2d, 0xca, 0x77, 0x8b, 0x42, 0x4b, 0x25, 0x29, 0x5f, 0xc8, 0xa1, - 0xa7, 0x07, 0x02, 0x03, 0x01, 0x00, 0x01, 0x02, 0x41, 0x00, 0x97, 0x8a, - 0xc8, 0xea, 0xdb, 0x0d, 0xc6, 0x03, 0x53, 0x47, 0xd6, 0xab, 0xa8, 0x67, - 0x12, 0x15, 0xff, 0x21, 0x28, 0x33, 0x85, 0x39, 0x6f, 0x78, 0x97, 0xc0, - 0x4b, 0xaf, 0x5e, 0x2a, 0x83, 0x5f, 0x3b, 0x53, 0xef, 0x80, 0xa8, 0x2e, - 0xd3, 0x6a, 0xe6, 0x87, 0xa9, 0x25, 0x38, 0x0b, 0x55, 0xa0, 0xc7, 0x3e, - 0xb8, 0x56, 0x56, 0xe9, 0x89, 0xdc, 0xf0, 0xed, 0x7f, 0xb4, 0x88, 0x70, - 0x24, 0xe1, 0x02, 0x21, 0x00, 0xfd, 0xad, 0x8e, 0x1c, 0x68, 0x53, 0x56, - 0x3f, 0x8b, 0x92, 0x1d, 0x2d, 0x11, 0x24, 0x62, 0xae, 0x7d, 0x6b, 0x17, - 0x60, 0x82, 0xd2, 0xba, 0x43, 0xe8, 0x7e, 0x1a, 0x37, 0xfc, 0x1a, 0x8b, - 0x33, 0x02, 0x21, 0x00, 0xf0, 0x59, 0x2c, 0xf4, 0xc5, 0x5b, 0xa4, 0x43, - 0x07, 0xb1, 0x89, 0x81, 0xbc, 0xdb, 0xda, 0x37, 0x6c, 0x51, 0xe5, 0x90, - 0xff, 0xa5, 0x34, 0x5b, 0xa8, 0x66, 0xf6, 0x96, 0x2d, 0xca, 0x94, 0xdd, - 0x02, 0x20, 0x19, 0x95, 0xf1, 0xa9, 0x67, 0xd4, 0x4f, 0xf4, 0xa4, 0xcd, - 0x1d, 0xe8, 0x37, 0xbc, 0x65, 0xbf, 0x97, 0xa2, 0xbf, 0x7e, 0xda, 0x73, - 0x0a, 0x9a, 0x62, 0xce, 0xa5, 0x32, 0x54, 0x59, 0x11, 0x05, 0x02, 0x20, - 0x27, 0xf9, 0x6c, 0xf4, 0xb8, 0xee, 0x68, 0xff, 0x8d, 0x04, 0x06, 0x2e, - 0xc1, 0xce, 0x7f, 0x18, 0xc0, 0xb7, 0x4e, 0x4b, 0x33, 0x79, 0xb2, 0x9f, - 0x9b, 0xfe, 0xa3, 0xfc, 0x8e, 0x59, 0x27, 0x31, 0x02, 0x21, 0x00, 0xce, - 0xfa, 0x6d, 0x22, 0x04, 0x96, 0xb4, 0x3f, 0xeb, 0x83, 0x19, 0x42, 0x55, - 0xd8, 0xfb, 0x93, 0x0a, 0xfc, 0xf4, 0x6f, 0x36, 0x60, 0x6e, 0x3a, 0xa0, - 0xeb, 0x7a, 0x93, 0xad, 0x88, 0xc1, 0x0c - }; - uint8_t encrypted[64] = { 0 }; - uint8_t decrypted[sizeof(input)] = { 0 }; - psa_key_handle_t key_handle = 0; - size_t len; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - - /* via test partition - import key data for the key created by the test partition */ - psa_set_key_usage_flags(&attributes, key_usage); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, 512); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, - test_partition_crypto_import_key( - &attributes, key_data, sizeof(key_data), &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* via test partition - close the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_close_key(key_handle)); - - /* via test partition - reopen the key created by the test partition and keep it open */ - key_handle = 0; - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_open_key(key_id, &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* try to asymmetric encrypt using the key that was created by the test partition */ - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_asymmetric_encrypt(key_handle, key_alg, input, sizeof(input), - NULL, 0, encrypted, sizeof(encrypted), &len)); - - /* try to asymmetric decrypt using the key that was created by the test partition */ - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, psa_asymmetric_decrypt(key_handle, key_alg, - encrypted, sizeof(encrypted), NULL, 0, - decrypted, sizeof(decrypted), &len)); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle)); -} - -void test_use_other_partition_key_derivation_setup(void) -{ - static const psa_key_id_t key_id = 999; - static const psa_algorithm_t key_alg = PSA_ALG_HKDF(PSA_ALG_SHA_256); - static const psa_key_usage_t key_usage = PSA_KEY_USAGE_DERIVE; - static const psa_key_type_t key_type = PSA_KEY_TYPE_DERIVE; - static const uint8_t key_data[] = { - 0x30, 0x82, 0x01, 0x3b, 0x02, 0x01, 0x00, 0x02, 0x41, 0x00, 0xee, 0x2b, - 0x13, 0x1d, 0x6b, 0x18, 0x18, 0xa9, 0x4c, 0xa8, 0xe9, 0x1c, 0x42, 0x38 - }; - - psa_key_handle_t key_handle = 0; - psa_key_derivation_operation_t operation = PSA_KEY_DERIVATION_OPERATION_INIT; - size_t bits = 192; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - - /* via test partition - import key data for the key created by the test partition */ - psa_set_key_usage_flags(&attributes, key_usage); - psa_set_key_algorithm(&attributes, key_alg); - psa_set_key_bits(&attributes, bits); - psa_set_key_type(&attributes, key_type); - psa_set_key_id(&attributes, key_id); - TEST_ASSERT_EQUAL(PSA_SUCCESS, - test_partition_crypto_import_key( - &attributes, key_data, sizeof(key_data), &key_handle)); - TEST_ASSERT_NOT_EQUAL(0, key_handle); - - /* try to setup key derivation using the key that was created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, psa_key_derivation_setup(&operation, key_alg)); - TEST_ASSERT_EQUAL(PSA_ERROR_INVALID_HANDLE, - psa_key_derivation_input_key( - &operation, PSA_KEY_DERIVATION_INPUT_SECRET, key_handle)); - - /* via test partition - destroy the key created by the test partition */ - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_partition_crypto_destroy_key(key_handle)); -} - -utest::v1::status_t case_setup_handler(const Case *const source, const size_t index_of_case) -{ - psa_status_t status = mbed_psa_reboot_and_request_new_security_state(PSA_LIFECYCLE_ASSEMBLY_AND_TEST); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - status = psa_crypto_init(); -#if defined(MBEDTLS_ENTROPY_NV_SEED) || defined(COMPONENT_PSA_SRV_IPC) - if (status == PSA_ERROR_INSUFFICIENT_ENTROPY) { - inject_entropy(); - status = psa_crypto_init(); - } -#endif - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - return greentea_case_setup_handler(source, index_of_case); -} - -utest::v1::status_t case_teardown_handler(const Case *const source, const size_t passed, - const size_t failed, const failure_t failure) -{ - psa_status_t status = mbed_psa_reboot_and_request_new_security_state(PSA_LIFECYCLE_ASSEMBLY_AND_TEST); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - mbedtls_psa_crypto_free(); - return greentea_case_teardown_handler(source, passed, failed, failure); -} - -utest::v1::status_t test_setup(const size_t number_of_cases) -{ - GREENTEA_SETUP(120, "default_auto"); - return verbose_test_setup_handler(number_of_cases); -} - -Case cases[] = { - Case("open other partition's key", - case_setup_handler, test_open_other_partition_key, case_teardown_handler), - Case("create key with same id different partitions", - case_setup_handler, test_create_key_same_id_different_partitions, case_teardown_handler), - Case("use other partition's key - key manage", - case_setup_handler, test_use_other_partition_key_manage_key, case_teardown_handler), - Case("use other partition's key - mac", - case_setup_handler, test_use_other_partition_key_mac, case_teardown_handler), - Case("use other partition's key - cipher", - case_setup_handler, test_use_other_partition_key_cipher, case_teardown_handler), - Case("use other partition's key - aead", - case_setup_handler, test_use_other_partition_key_aead, case_teardown_handler), - Case("use other partition's key - asymmetric sign verify", - case_setup_handler, test_use_other_partition_key_asymmetric_sign_verify, case_teardown_handler), - Case("use other partition's key - asymmetric encrypt decrypt", - case_setup_handler, test_use_other_partition_key_asymmetric_encrypt_decrypt, case_teardown_handler), - Case("use other partition's key - key derivation setup", - case_setup_handler, test_use_other_partition_key_derivation_setup, case_teardown_handler), -}; - -Specification specification(test_setup, cases); - -int main(void) -{ - return !Harness::run(specification); -} - -#endif // ((!defined(TARGET_PSA)) || (!defined(MBEDTLS_PSA_CRYPTO_C)) || (!defined(COMPONENT_PSA_SRV_IPC))) diff --git a/TESTS/psa/crypto_access_control/COMPONENT_PSA_SRV_IPC/test_partition_proxy.c b/TESTS/psa/crypto_access_control/COMPONENT_PSA_SRV_IPC/test_partition_proxy.c deleted file mode 100644 index 88b10d178f7..00000000000 --- a/TESTS/psa/crypto_access_control/COMPONENT_PSA_SRV_IPC/test_partition_proxy.c +++ /dev/null @@ -1,101 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited and affiliates - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "psa/client.h" -#include "psa_manifest/sid.h" -#include "test_partition_proxy.h" - -#define MINOR_VER 1 - -static psa_status_t invoke_ipc_call(uint32_t sid, psa_invec *in_vec, size_t in_vec_size, - psa_outvec *out_vec, size_t out_vec_size) -{ - psa_status_t status; - - psa_handle_t handle = psa_connect(sid, MINOR_VER); - if (handle <= 0) { - return (PSA_ERROR_COMMUNICATION_FAILURE); - } - - status = psa_call(handle, in_vec, in_vec_size, out_vec, out_vec_size); - psa_close(handle); - - return (status); -} - -psa_status_t test_partition_crypto_get_key_attributes( - psa_key_handle_t key_handle, psa_key_attributes_t *attributes) -{ - psa_invec in_vec = { &key_handle, sizeof(key_handle) }; - psa_outvec out_vec[1] = { - { attributes, sizeof(*attributes) } - }; - psa_status_t status = invoke_ipc_call(CRYPTO_GET_KEY_ATTRIBUTES, &in_vec, 1, out_vec, 1); - return (status); -} - -psa_status_t test_partition_crypto_generate_key( - const psa_key_attributes_t *attributes, psa_key_handle_t *key_handle) -{ - psa_invec in_vec[] = { - { attributes, sizeof(*attributes) }, - }; - psa_outvec out_vec[] = { - { key_handle, sizeof(*key_handle) }, - }; - psa_status_t status = invoke_ipc_call(CRYPTO_GENERATE_KEY, in_vec, 1, out_vec, 1); - return (status); -} - -psa_status_t test_partition_crypto_open_key(psa_key_id_t key_id, psa_key_handle_t *key_handle) -{ - psa_invec in_vec = { &key_id, sizeof(key_id) }; - psa_outvec out_vec = { key_handle, sizeof(*key_handle) }; - psa_status_t status = invoke_ipc_call(CRYPTO_OPEN_KEY, &in_vec, 1, &out_vec, 1); - return (status); -} - -psa_status_t test_partition_crypto_close_key(psa_key_handle_t key_handle) -{ - psa_invec in_vec = { &key_handle, sizeof(key_handle) }; - psa_status_t status = invoke_ipc_call(CRYPTO_CLOSE_KEY, &in_vec, 1, NULL, 0); - return (status); -} - -psa_status_t test_partition_crypto_destroy_key(psa_key_handle_t key_handle) -{ - psa_invec in_vec = { &key_handle, sizeof(key_handle) }; - psa_status_t status = invoke_ipc_call(CRYPTO_DESTROY_KEY, &in_vec, 1, NULL, 0); - return (status); -} - -psa_status_t test_partition_crypto_import_key( - const psa_key_attributes_t *attributes, - const uint8_t *key_data, - size_t key_data_size, - psa_key_handle_t *key_handle) -{ - psa_invec in_vec[] = { - { attributes, sizeof(*attributes) }, - { key_data, key_data_size }, - }; - psa_outvec out_vec[] = { - { key_handle, sizeof(*key_handle) }, - }; - psa_status_t status = invoke_ipc_call(CRYPTO_IMPORT_KEY, in_vec, 2, out_vec, 1); - return (status); -} diff --git a/TESTS/psa/crypto_access_control/COMPONENT_PSA_SRV_IPC/test_partition_proxy.h b/TESTS/psa/crypto_access_control/COMPONENT_PSA_SRV_IPC/test_partition_proxy.h deleted file mode 100644 index eaf7fb38cc4..00000000000 --- a/TESTS/psa/crypto_access_control/COMPONENT_PSA_SRV_IPC/test_partition_proxy.h +++ /dev/null @@ -1,50 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited and affiliates - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef TEST_PARTITION_PROXY_H -#define TEST_PARTITION_PROXY_H - -#include "psa/crypto.h" - -#ifdef __cplusplus -extern "C" { -#endif - -psa_status_t test_partition_crypto_get_key_attributes( - psa_key_handle_t key_handle, psa_key_attributes_t *attributes); - -psa_status_t test_partition_crypto_generate_key( - const psa_key_attributes_t *attributes, psa_key_handle_t *key_handle); - -psa_status_t test_partition_crypto_open_key( - psa_key_id_t key_id, psa_key_handle_t *key_handle); - -psa_status_t test_partition_crypto_close_key(psa_key_handle_t key_handle); - -psa_status_t test_partition_crypto_destroy_key(psa_key_handle_t key_handle); - -psa_status_t test_partition_crypto_import_key( - const psa_key_attributes_t *attributes, - const uint8_t *key_data, - size_t key_data_size, - psa_key_handle_t *key_handle); - -#ifdef __cplusplus -} -#endif - -#endif /* TEST_PARTITION_PROXY_H */ diff --git a/TESTS/psa/crypto_access_control/COMPONENT_SPE/test_partition.c b/TESTS/psa/crypto_access_control/COMPONENT_SPE/test_partition.c deleted file mode 100644 index f845c82daec..00000000000 --- a/TESTS/psa/crypto_access_control/COMPONENT_SPE/test_partition.c +++ /dev/null @@ -1,193 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited and affiliates - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include "mbed_spm_partitions.h" -#include "psa/client.h" -#include "psa/service.h" -#include "psa/crypto.h" - -typedef psa_status_t (*SignalHandler)(psa_msg_t *); - -static void read_input_param_from_message(psa_msg_t *msg, uint8_t param_index, void *param_ptr) -{ - size_t bytes_read = psa_read(msg->handle, param_index, param_ptr, msg->in_size[param_index]); - if (bytes_read != msg->in_size[param_index]) { - SPM_PANIC("SPM read length mismatch"); - } -} - -static psa_status_t crypto_generate_key(psa_msg_t *msg) -{ - psa_status_t status; - psa_key_handle_t key_handle = 0; - psa_key_type_t key_type = 0; - size_t key_bits = 0; - psa_key_attributes_t attributes; - - read_input_param_from_message(msg, 0, &attributes); - - status = psa_generate_key(&attributes, &key_handle); - if (status == PSA_SUCCESS) { - psa_write(msg->handle, 0, &key_handle, sizeof(key_handle)); - } - return (status); -} - -static psa_status_t crypto_open_key(psa_msg_t *msg) -{ - psa_status_t status; - psa_key_id_t key_id; - psa_key_handle_t key_handle; - - read_input_param_from_message(msg, 0, &key_id); - - status = psa_open_key(key_id, &key_handle); - if (status == PSA_SUCCESS) { - psa_write(msg->handle, 0, &key_handle, sizeof(key_handle)); - } - return (status); -} - -static psa_status_t crypto_close_key(psa_msg_t *msg) -{ - psa_status_t status; - psa_key_handle_t key_handle; - - read_input_param_from_message(msg, 0, &key_handle); - - status = psa_close_key(key_handle); - return (status); -} - -static psa_status_t crypto_destroy_key(psa_msg_t *msg) -{ - psa_status_t status; - psa_key_handle_t key_handle; - - read_input_param_from_message(msg, 0, &key_handle); - - status = psa_destroy_key(key_handle); - return (status); -} - -static psa_status_t crypto_get_key_attributes(psa_msg_t *msg) -{ - psa_status_t status; - psa_key_handle_t key_handle; - psa_key_attributes_t attributes; - - read_input_param_from_message(msg, 0, &key_handle); - - status = psa_get_key_attributes(key_handle, &attributes); - if (status == PSA_SUCCESS) { - psa_write(msg->handle, 0, &attributes, sizeof(attributes)); - } - return (status); -} - -static psa_status_t crypto_import_key(psa_msg_t *msg) -{ - psa_status_t status; - psa_key_handle_t key_handle; - psa_key_attributes_t attributes; - uint8_t *key_data; - size_t key_data_size = msg->in_size[1]; - - read_input_param_from_message(msg, 0, &attributes); - - key_data = calloc(1, key_data_size); - if (key_data == NULL) { - return (PSA_ERROR_INSUFFICIENT_MEMORY); - } - read_input_param_from_message(msg, 1, key_data); - - status = psa_import_key(&attributes, key_data, key_data_size, &key_handle); - if (status == PSA_SUCCESS) { - psa_write(msg->handle, 0, &key_handle, sizeof(key_handle)); - } - free(key_data); - - return (status); -} - -static void message_handler(psa_msg_t *msg, SignalHandler handler) -{ - psa_status_t status = 0; - - switch (msg->type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - break; - } - case PSA_IPC_CALL: { - status = handler(msg); - break; - } - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg->type)); - break; - } - } - - psa_reply(msg->handle, status); -} - -void test_partition_main(void) -{ - psa_signal_t signal; - psa_msg_t msg = {0}; - while (1) { - signal = psa_wait(CRYPTO_ACL_TEST_WAIT_ANY_SID_MSK, PSA_BLOCK); - if (signal & CRYPTO_GENERATE_KEY_MSK) { - if (PSA_SUCCESS != psa_get(CRYPTO_GENERATE_KEY_MSK, &msg)) { - continue; - } - message_handler(&msg, crypto_generate_key); - } - if (signal & CRYPTO_OPEN_KEY_MSK) { - if (PSA_SUCCESS != psa_get(CRYPTO_OPEN_KEY_MSK, &msg)) { - continue; - } - message_handler(&msg, crypto_open_key); - } - if (signal & CRYPTO_CLOSE_KEY_MSK) { - if (PSA_SUCCESS != psa_get(CRYPTO_CLOSE_KEY_MSK, &msg)) { - continue; - } - message_handler(&msg, crypto_close_key); - } - if (signal & CRYPTO_DESTROY_KEY_MSK) { - if (PSA_SUCCESS != psa_get(CRYPTO_DESTROY_KEY_MSK, &msg)) { - continue; - } - message_handler(&msg, crypto_destroy_key); - } - if (signal & CRYPTO_GET_KEY_ATTRIBUTES_MSK) { - if (PSA_SUCCESS != psa_get(CRYPTO_GET_KEY_ATTRIBUTES_MSK, &msg)) { - continue; - } - message_handler(&msg, crypto_get_key_attributes); - } - if (signal & CRYPTO_IMPORT_KEY_MSK) { - if (PSA_SUCCESS != psa_get(CRYPTO_IMPORT_KEY_MSK, &msg)) { - continue; - } - message_handler(&msg, crypto_import_key); - } - } -} diff --git a/TESTS/psa/crypto_access_control/crypto_acl_tests_partition_psa.json b/TESTS/psa/crypto_access_control/crypto_acl_tests_partition_psa.json deleted file mode 100644 index 103d38c0317..00000000000 --- a/TESTS/psa/crypto_access_control/crypto_acl_tests_partition_psa.json +++ /dev/null @@ -1,65 +0,0 @@ -{ - "name": "CRYPTO_ACL_TEST", - "type": "APPLICATION-ROT", - "priority": "NORMAL", - "id": "0x00000080", - "entry_point": "test_partition_main", - "stack_size": "0x200", - "heap_size": "0x400", - "services": [ - { - "name": "CRYPTO_GENERATE_KEY", - "identifier": "0x00000201", - "signal": "CRYPTO_GENERATE_KEY_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "CRYPTO_OPEN_KEY", - "identifier": "0x00000202", - "signal": "CRYPTO_OPEN_KEY_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "CRYPTO_CLOSE_KEY", - "identifier": "0x00000203", - "signal": "CRYPTO_CLOSE_KEY_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "CRYPTO_DESTROY_KEY", - "identifier": "0x00000205", - "signal": "CRYPTO_DESTROY_KEY_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "CRYPTO_GET_KEY_ATTRIBUTES", - "identifier": "0x00000206", - "signal": "CRYPTO_GET_KEY_ATTRIBUTES_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "CRYPTO_IMPORT_KEY", - "identifier": "0x00000208", - "signal": "CRYPTO_IMPORT_KEY_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - } - ], - "extern_sids": [ - "PSA_KEY_MNG_ID" - ], - "source_files": [ - "COMPONENT_SPE/test_partition.c" - ] -} diff --git a/TESTS/psa/spm_client/COMPONENT_NSPE/main.cpp b/TESTS/psa/spm_client/COMPONENT_NSPE/main.cpp deleted file mode 100644 index 871377940bf..00000000000 --- a/TESTS/psa/spm_client/COMPONENT_NSPE/main.cpp +++ /dev/null @@ -1,487 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef COMPONENT_PSA_SRV_IPC -#error [NOT_SUPPORTED] SPM tests can run only on SPM-enabled targets -#else - -#include "mbed.h" -#include "greentea-client/test_env.h" -#include "unity.h" -#include "utest.h" -#include "psa/client.h" -#include "psa_manifest/sid.h" - -#if defined(TARGET_TFM) -#define MBED_CONF_SPM_IPC_MAX_NUM_OF_CHANNELS TFM_CONN_HANDLE_MAX_NUM -#define PSA_MAX_IOVEC 4 -#endif - -using namespace utest::v1; - -#define MINOR_VER 0 -#define DROP_CONN_MINOR_VER 5 -#define CLIENT_RSP_BUF_SIZE 128 -#define OFFSET_POS 1 -#define INVALID_SID 0x00001A020 - - -typedef struct th_struct { - psa_handle_t handle; - psa_invec *iovec_temp; - uint8_t *expected; - uint8_t expected_size; -} th_struct_t; - -/* ------------------------------------- Functions ----------------------------------- */ - -static psa_handle_t client_ipc_tests_connect(uint32_t sid, uint32_t minor_version) -{ - psa_handle_t handle = psa_connect(sid, minor_version); - - TEST_ASSERT_TRUE(handle > 0); - - return handle; -} - -static void client_ipc_tests_call( - psa_handle_t handle, - psa_invec *iovec_temp, - size_t tx_len, - size_t rx_len, - uint8_t *expected, - uint8_t expected_size -) -{ - psa_status_t status = PSA_SUCCESS; - uint8_t *response_buf = (uint8_t *)malloc(CLIENT_RSP_BUF_SIZE * sizeof(uint8_t)); - memset(response_buf, 0, CLIENT_RSP_BUF_SIZE); - psa_outvec resp = {NULL, rx_len}; - - if (rx_len > 0) { - resp.base = response_buf; - } - - status = psa_call(handle, - (tx_len ? iovec_temp : NULL), - tx_len, - (rx_len ? &resp : NULL), - (rx_len ? 1 : 0) - ); - - if (expected) { - TEST_ASSERT_EQUAL_UINT8_ARRAY(expected, response_buf, expected_size); - } - free(response_buf); - TEST_ASSERT_EQUAL_INT(PSA_SUCCESS, status); -} - -static void client_ipc_tests_close(psa_handle_t handle) -{ - psa_close(handle); -} - -//Testing iovec 0 sent as NULL -void iovec_0_NULL() -{ - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - uint8_t expect_size = 5; - uint8_t off = 2; - - uint8_t meta_iovec[2] = {expect_size, off}; - uint8_t buff1[] = {1, 2, 3, 4, 5}; - uint8_t expected_buff[] = {1, 2, 3, 4, 5}; - - psa_invec iovec_temp[PSA_MAX_IOVEC - 1] = { - {NULL, 0}, - {meta_iovec, sizeof(meta_iovec)}, - {buff1, sizeof(buff1)} - }; - - client_ipc_tests_call(handle, iovec_temp, PSA_MAX_IOVEC - 1, CLIENT_RSP_BUF_SIZE, expected_buff, sizeof(expected_buff)); - - client_ipc_tests_close(handle); -} - -//Testing iovec 1 sent as NULL -void iovec_1_NULL() -{ - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - uint8_t expect_size = 2; - uint8_t off = 3; - - uint8_t meta_iovec[2] = {expect_size, off}; - uint8_t buff1[] = {1, 2, 3, 4, 5}; - uint8_t expected_buff[] = {2, 3}; - - psa_invec iovec_temp[PSA_MAX_IOVEC - 1] = {{meta_iovec, sizeof(meta_iovec)}, - {NULL, 0}, - {buff1, sizeof(buff1)} - }; - - client_ipc_tests_call(handle, iovec_temp, PSA_MAX_IOVEC - 1, CLIENT_RSP_BUF_SIZE, expected_buff, sizeof(expected_buff)); - - client_ipc_tests_close(handle); -} - -//Testing iovec 2 sent as NULL -void iovec_2_NULL() -{ - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - uint8_t expect_size = 2; - uint8_t off = 3; - - uint8_t meta_iovec[2] = {expect_size, off}; - uint8_t buff1[] = {1, 2, 3, 4, 5}; - uint8_t expected_buff[] = {2, 3}; - - psa_invec iovec_temp[PSA_MAX_IOVEC - 1] = {{meta_iovec, sizeof(meta_iovec)}, - {buff1, sizeof(buff1)}, - {NULL, 0} - }; - - client_ipc_tests_call(handle, iovec_temp, PSA_MAX_IOVEC - 1, CLIENT_RSP_BUF_SIZE, expected_buff, sizeof(expected_buff)); - - client_ipc_tests_close(handle); -} - -// Testing in_vec[i] sent with size 0 and base not NULL -void in_vec_base_not_NULL_size_0() -{ - uint8_t dummy_buff[] = {1, 2, 3, 4, 5}; - psa_invec iovec_temp[1] = { {dummy_buff, 0} }; - - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - client_ipc_tests_call(handle, iovec_temp, 1, 0, NULL, 0); - - client_ipc_tests_close(handle); -} - -// Testing in_len is 0 but in_vec is not NULL -void in_len_0_in_vec_not_NULL() -{ - uint8_t dummy_buff[] = {1, 2, 3, 4, 5}; - psa_invec iovec_temp[1] = { {dummy_buff, sizeof(dummy_buff)} }; - - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - client_ipc_tests_call(handle, iovec_temp, 0, 0, NULL, 0); - - client_ipc_tests_close(handle); -} - -// Testing out_len is 0 but out_vec is not NULL -void out_len_0_outvec_not_NULL() -{ - psa_status_t status = PSA_SUCCESS; - - uint8_t dummy_res[10] = {0}; - psa_outvec outvec_temp[1] = {{dummy_res, sizeof(dummy_res)}}; - - uint8_t dummy_buff[] = {1, 2, 3, 4, 5}; - - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - psa_invec in_vec_temp[2] = { {dummy_buff, sizeof(dummy_buff)}, - {dummy_buff, sizeof(dummy_buff)} - }; - - status = psa_call(handle, in_vec_temp, 2, outvec_temp, 0); - - TEST_ASSERT_EQUAL_INT32(PSA_SUCCESS, status); - - client_ipc_tests_close(handle); -} - -//Testing rx_buff sent as NULL and rx_len as 0 -void rx_buff_null() -{ - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - uint8_t expect_size = 0, off = 2; - - uint8_t meta_iovec[2] = {expect_size, off}; - uint8_t buff1[] = {1, 2, 3, 4, 5}, buff2[] = {6}; - - psa_invec iovec_temp[PSA_MAX_IOVEC - 1] = {{meta_iovec, sizeof(meta_iovec)}, - {buff1, sizeof(buff1)}, - {buff2, sizeof(buff2)} - }; - - client_ipc_tests_call(handle, iovec_temp, PSA_MAX_IOVEC - 1, 0, NULL, 0); - - client_ipc_tests_close(handle); -} - -//Testing tx_buff sent as NULL and tx_len as 0 -void tx_buff_null() -{ - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - client_ipc_tests_call(handle, NULL, 0, CLIENT_RSP_BUF_SIZE, NULL, 0); - - client_ipc_tests_close(handle); -} - -//Testing rx_buff and tx_null sent as NULL and rx_len and tx_len as 0 -void rx_tx_null() -{ - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - client_ipc_tests_call(handle, NULL, 0, 0, NULL, 0); - - client_ipc_tests_close(handle); -} - -//Testing multiple subsequent calls to the same SID -void multiple_call() -{ - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - uint8_t expect_size = 2, off = 2; - - uint8_t meta_iovec[2] = {expect_size, off}; - uint8_t buff1[] = {1, 2, 3}; - uint8_t buff2[] = {4, 5, 6}; - uint8_t expected_buff[] = {1, 2}; - - psa_invec iovec_temp[PSA_MAX_IOVEC - 1] = {{meta_iovec, sizeof(meta_iovec)}, - {buff1, sizeof(buff1)}, - {buff2, sizeof(buff2)} - }; - - client_ipc_tests_call(handle, iovec_temp, PSA_MAX_IOVEC - 1, CLIENT_RSP_BUF_SIZE, expected_buff, sizeof(expected_buff)); - - meta_iovec[1] = 3; //off - iovec_temp[0].base = meta_iovec; - expected_buff[0] = 2; - expected_buff[1] = 3; - - client_ipc_tests_call(handle, iovec_temp, PSA_MAX_IOVEC - 1, CLIENT_RSP_BUF_SIZE, expected_buff, sizeof(expected_buff)); - - meta_iovec[1] = 4; //off - iovec_temp[0].base = meta_iovec; - expected_buff[0] = 3; - expected_buff[1] = 4; - - client_ipc_tests_call(handle, iovec_temp, PSA_MAX_IOVEC - 1, CLIENT_RSP_BUF_SIZE, expected_buff, sizeof(expected_buff)); - - client_ipc_tests_close(handle); -} - -static void set_struct(th_struct_t *thr_attr, psa_handle_t handle, psa_invec *iovec_temp, uint8_t *expect, uint8_t expected_size) -{ - thr_attr->handle = handle; - thr_attr->iovec_temp = iovec_temp; - thr_attr->expected = expect; - thr_attr->expected_size = expected_size; -} - -static void call_diff_handle(th_struct_t *thr_attr) -{ - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - - client_ipc_tests_call(handle, - thr_attr->iovec_temp, - PSA_MAX_IOVEC - 1, - CLIENT_RSP_BUF_SIZE, - thr_attr->expected, - thr_attr->expected_size); - - osDelay(10); - - client_ipc_tests_close(handle); -} - -//Testing multiple parallel calls to the same SID with different handles -void multi_thread_diff_handles() -{ - Thread T1(osPriorityNormal, 512); - Thread T2(osPriorityNormal, 512); - Thread T3(osPriorityNormal, 512); - - th_struct_t thr_attr[] = {{0}, {0}, {0}}; - - uint8_t meta_iovec_1[] = { 2, //expect_size - 2 //off - }; - uint8_t buff1[] = {1, 2, 3}; - uint8_t buff2[] = {4, 5, 6}; - uint8_t expected_buff_1[] = {1, 2}; - - psa_invec iovec_temp_1[PSA_MAX_IOVEC - 1] = {{meta_iovec_1, sizeof(meta_iovec_1)}, - {buff1, sizeof(buff1)}, - {buff2, sizeof(buff2)} - }; - - set_struct(&thr_attr[0], 0, iovec_temp_1, expected_buff_1, sizeof(expected_buff_1)); - osStatus err = T1.start(callback(call_diff_handle, (th_struct_t *)&thr_attr[0])); - if (err) { - TEST_FAIL_MESSAGE("creating thread failed!"); - } - - uint8_t meta_iovec_2[] = { 2, //expect_size - 3 //off - }; - uint8_t expected_buff_2[] = {2, 3}; - - psa_invec iovec_temp_2[PSA_MAX_IOVEC - 1] = {{meta_iovec_2, sizeof(meta_iovec_2)}, - {buff1, sizeof(buff1)}, - {buff2, sizeof(buff2)} - }; - set_struct(&thr_attr[1], 0, iovec_temp_2, expected_buff_2, sizeof(expected_buff_2)); - err = T2.start(callback(call_diff_handle, (th_struct_t *)&thr_attr[1])); - if (err) { - TEST_FAIL_MESSAGE("creating thread failed!"); - } - - uint8_t meta_iovec_3[] = { 2, //expect_size - 4 //off - }; - uint8_t expected_buff_3[] = {3, 4}; - - psa_invec iovec_temp_3[PSA_MAX_IOVEC - 1] = {{meta_iovec_3, sizeof(meta_iovec_3)}, - {buff1, sizeof(buff1)}, - {buff2, sizeof(buff2)} - }; - - set_struct(&thr_attr[2], 0, iovec_temp_3, expected_buff_3, sizeof(expected_buff_3)); - err = T3.start(callback(call_diff_handle, (th_struct_t *)&thr_attr[2])); - if (err) { - TEST_FAIL_MESSAGE("creating thread failed!"); - } - - err = T1.join(); - if (err) { - TEST_FAIL_MESSAGE("joining thread failed!"); - } - err = T2.join(); - if (err) { - TEST_FAIL_MESSAGE("joining thread failed!"); - } - err = T3.join(); - if (err) { - TEST_FAIL_MESSAGE("joining thread failed!"); - } - -} - - -//Testing exceeding num of max channels allowed by psa_connect -void exceed_num_of_max_channels() -{ - int i = 0; - psa_handle_t handle[MBED_CONF_SPM_IPC_MAX_NUM_OF_CHANNELS + 1] = {0}; - - for (i = 0; i < MBED_CONF_SPM_IPC_MAX_NUM_OF_CHANNELS + 1; i++) { - if (i != MBED_CONF_SPM_IPC_MAX_NUM_OF_CHANNELS) { - handle[i] = client_ipc_tests_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - } else { - handle[i] = psa_connect(CLIENT_TESTS_PART1_ROT_SRV1, MINOR_VER); - TEST_ASSERT_EQUAL_INT32(PSA_CONNECTION_REFUSED, handle[i]); - } - } - - for (i = 0; i < MBED_CONF_SPM_IPC_MAX_NUM_OF_CHANNELS; i++) { - client_ipc_tests_close(handle[i]); - } -} - -void client_close_null_handle() -{ - client_ipc_tests_close(PSA_NULL_HANDLE); -} - -void drop_connection() -{ - psa_handle_t handle = client_ipc_tests_connect(CLIENT_TESTS_PART1_DROP_CONN, DROP_CONN_MINOR_VER); - psa_status_t status = psa_call(handle, NULL, 0, NULL, 0); - TEST_ASSERT_EQUAL_INT(PSA_DROP_CONNECTION, status); - - status = PSA_SUCCESS; - status = psa_call(handle, NULL, 0, NULL, 0); - TEST_ASSERT_EQUAL_INT(PSA_DROP_CONNECTION, status); - - client_ipc_tests_close(handle); -} - -void verify_psa_framework_version() -{ - uint32_t ff_version = psa_framework_version(); - TEST_ASSERT_EQUAL_INT(PSA_FRAMEWORK_VERSION, ff_version); -} - -void psa_version_existing() -{ - uint32_t rot_version = psa_version(CLIENT_TESTS_PART1_DROP_CONN); - TEST_ASSERT_EQUAL_INT(DROP_CONN_MINOR_VER, rot_version); -} - -void psa_version_non_existing() -{ - uint32_t rot_version = psa_version(INVALID_SID); - TEST_ASSERT_EQUAL_INT(PSA_VERSION_NONE, rot_version); -} - -void psa_version_secure_access_only() -{ - uint32_t rot_version = psa_version(CLIENT_TESTS_PART1_SECURE_CLIENTS_ONLY); - TEST_ASSERT_EQUAL_INT(PSA_VERSION_NONE, rot_version); -} - - -// Test cases -Case cases[] = { - Case("Testing client iovec_0_NULL", iovec_0_NULL), - Case("Testing client iovec_1_NULL", iovec_1_NULL), - Case("Testing client iovec_2_NULL", iovec_2_NULL), - Case("Testing client in_vec 0 base not NULL size 0", in_vec_base_not_NULL_size_0), - Case("Testing client in_len 0 in_vec not NULL", in_len_0_in_vec_not_NULL), - Case("Testing client out_len is 0 but out_vec is not NULL", out_len_0_outvec_not_NULL), - Case("Testing client rx_buff_null", rx_buff_null), - Case("Testing client tx_buff_null", tx_buff_null), - Case("Testing client rx_tx_null", rx_tx_null), - Case("Testing client multiple_call from a single thread", multiple_call), - Case("Testing client close on NULL handle", client_close_null_handle), - Case("Testing DROP_CONNECTION State", drop_connection), - Case("Testing client psa_framework_version() API", verify_psa_framework_version), - Case("Testing client psa_version() API on existing SID", psa_version_existing), - Case("Testing client psa_version() API on non-existing SID", psa_version_non_existing), - Case("Testing client psa_version() API to a service that is not NSPE callable", psa_version_secure_access_only), - Case("Testing client multiple calls on different channels to the same SID", multi_thread_diff_handles), -}; - -utest::v1::status_t test_setup(const size_t number_of_cases) -{ - // Setup Greentea using a reasonable timeout in seconds - GREENTEA_SETUP(60, "default_auto"); - return verbose_test_setup_handler(number_of_cases); -} - -Specification specification(test_setup, cases); - -int main() -{ - Harness::run(specification); - return 0; -} - -#endif // COMPONENT_PSA_SRV_IPC diff --git a/TESTS/psa/spm_client/COMPONENT_SPE/client_tests_partition.c b/TESTS/psa/spm_client/COMPONENT_SPE/client_tests_partition.c deleted file mode 100644 index afe5767613e..00000000000 --- a/TESTS/psa/spm_client/COMPONENT_SPE/client_tests_partition.c +++ /dev/null @@ -1,97 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include -#include "psa/client.h" -#include "psa/service.h" -#include "mbed_spm_partitions.h" - -#define MSG_BUF_SIZE 128 -uint8_t data[MSG_BUF_SIZE] = {0}; - -void client_part_main(void *ptr) -{ - psa_signal_t signals = 0; - psa_msg_t msg = {0}; - while (1) { - signals = psa_wait(CLIENT_TESTS_PART1_WAIT_ANY_SID_MSK, PSA_BLOCK); - if (signals & PART1_ROT_SRV1_MSK) { - if (PSA_SUCCESS != psa_get(PART1_ROT_SRV1_MSK, &msg)) { - continue; - } - - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: - break; - case PSA_IPC_CALL: { - memset(data, 0, sizeof(data)); - if (msg.in_size[0] + msg.in_size[1] + msg.in_size[2] > 1) { - size_t offset = psa_read(msg.handle, 0, (void *)data, msg.in_size[0]); - offset += psa_read(msg.handle, 1, (void *)(data + offset), msg.in_size[1]); - psa_read(msg.handle, 2, (void *)(data + offset), msg.in_size[2]); - } - - if (msg.out_size[0] > 0) { - uint8_t resp_size = data[0]; - uint8_t resp_offset = data[1]; - psa_write(msg.handle, 0, (const void *)(data + resp_offset), resp_size); - } - break; - } - - default: { - SPM_PANIC("Invalid msg type"); - } - } - - psa_reply(msg.handle, PSA_SUCCESS); - } else if (signals & DROP_CONN_MSK) { - if (PSA_SUCCESS != psa_get(DROP_CONN_MSK, &msg)) { - continue; - } - - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: - psa_reply(msg.handle, PSA_SUCCESS); - break; - case PSA_IPC_CALL: - psa_reply(msg.handle, PSA_DROP_CONNECTION); - break; - default: - SPM_PANIC("Invalid msg type"); - } - } else if (signals & SECURE_CLIENTS_ONLY_MSK) { - if (PSA_SUCCESS != psa_get(SECURE_CLIENTS_ONLY_MSK, &msg)) { - continue; - } - - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: - case PSA_IPC_CALL: - psa_reply(msg.handle, PSA_SUCCESS); - break; - default: - SPM_PANIC("Invalid msg type"); - } - } else { - SPM_PANIC("Received invalid signal %lu", signals); - } - } -} - diff --git a/TESTS/psa/spm_client/client_tests_part1_psa.json b/TESTS/psa/spm_client/client_tests_part1_psa.json deleted file mode 100644 index 42e3f39af4f..00000000000 --- a/TESTS/psa/spm_client/client_tests_part1_psa.json +++ /dev/null @@ -1,37 +0,0 @@ -{ - "name": "CLIENT_TESTS_PART1", - "type": "APPLICATION-ROT", - "priority": "NORMAL", - "id": "0x00000001", - "entry_point": "client_part_main", - "stack_size": "0x400", - "heap_size": "0x400", - "services": [{ - "name": "CLIENT_TESTS_PART1_ROT_SRV1", - "identifier": "0x00001A05", - "signal": "PART1_ROT_SRV1_MSK", - "non_secure_clients": true, - "minor_version": 5, - "minor_policy": "RELAXED" - }, - { - "name": "CLIENT_TESTS_PART1_DROP_CONN", - "identifier": "0x00001A06", - "signal": "DROP_CONN_MSK", - "non_secure_clients": true, - "minor_version": 5, - "minor_policy": "RELAXED" - }, - { - "name": "CLIENT_TESTS_PART1_SECURE_CLIENTS_ONLY", - "identifier": "0x00001A07", - "signal": "SECURE_CLIENTS_ONLY_MSK", - "non_secure_clients": false, - "minor_version": 5, - "minor_policy": "RELAXED" - } - ], - "source_files": [ - "COMPONENT_SPE/client_tests_partition.c" - ] -} diff --git a/TESTS/psa/spm_server/COMPONENT_NSPE/main.cpp b/TESTS/psa/spm_server/COMPONENT_NSPE/main.cpp deleted file mode 100644 index 9ad69d4c658..00000000000 --- a/TESTS/psa/spm_server/COMPONENT_NSPE/main.cpp +++ /dev/null @@ -1,276 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef COMPONENT_PSA_SRV_IPC -#error [NOT_SUPPORTED] SPM tests can run only on SPM-enabled targets -#else - -#include "mbed.h" -#include "greentea-client/test_env.h" -#include "unity.h" -#include "utest.h" -#include "psa/client.h" -#include "server_tests.h" -#include "psa_manifest/sid.h" - -#if defined(TARGET_TFM) -#define PSA_MAX_IOVEC 4 -#endif - -using namespace utest::v1; - -#define TEST_ROT_SRV_MINOR 12 -#define OUT_BUFFER_SIZE 60 - -psa_handle_t control_handle = 0; -char test_str[] = "abcdefghijklmnopqrstuvwxyz"; -char cross_part_buf[] = "Hello and welcome SPM"; - - -PSA_TEST_CLIENT(identity_during_connect) -{ - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT(test_handle > 0); - - psa_close(test_handle); -} - - -PSA_TEST_CLIENT(identity_during_call) -{ - psa_status_t status = PSA_SUCCESS; - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT(test_handle > 0); - - status = psa_call(test_handle, NULL, 0, NULL, 0); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - - psa_close(test_handle); -} - -PSA_TEST_CLIENT(msg_size_assertion) -{ - psa_status_t status = PSA_SUCCESS; - psa_invec data[PSA_MAX_IOVEC] = { - {test_str, 4}, - {test_str + 5, 6}, - {test_str + 13, 1}, - {NULL, 0} - }; - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT(test_handle > 0); - - status = psa_call(test_handle, data, PSA_MAX_IOVEC, NULL, 0); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - - psa_close(test_handle); -} - -PSA_TEST_CLIENT(reject_connection) -{ - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT_EQUAL(PSA_CONNECTION_REFUSED, test_handle); -} - -PSA_TEST_CLIENT(read_at_outofboud_offset) -{ - psa_status_t status = PSA_SUCCESS; - psa_invec data = { test_str, sizeof(test_str) }; - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT(test_handle > 0); - - status = psa_call(test_handle, &data, 1, NULL, 0); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - - psa_close(test_handle); -} - -PSA_TEST_CLIENT(msg_read_truncation) -{ - psa_status_t status = PSA_SUCCESS; - psa_invec data[3] = { - {test_str, 4}, - {test_str + 5, 6}, - {test_str + 13, 1} - }; - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT(test_handle > 0); - - status = psa_call(test_handle, data, 3, NULL, 0); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - - psa_close(test_handle); -} - -PSA_TEST_CLIENT(skip_zero) -{ - psa_status_t status = PSA_SUCCESS; - psa_invec data = { test_str, sizeof(test_str) }; - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT(test_handle > 0); - - status = psa_call(test_handle, &data, 1, NULL, 0); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - - psa_close(test_handle); -} - -PSA_TEST_CLIENT(skip_some) -{ - psa_status_t status = PSA_SUCCESS; - psa_invec data = { test_str, sizeof(test_str) }; - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT(test_handle > 0); - - status = psa_call(test_handle, &data, 1, NULL, 0); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - - psa_close(test_handle); -} - -PSA_TEST_CLIENT(skip_more_than_left) -{ - psa_status_t status = PSA_SUCCESS; - psa_invec data = { test_str, 8 }; - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT(test_handle > 0); - - status = psa_call(test_handle, &data, 1, NULL, 0); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - - psa_close(test_handle); -} - -PSA_TEST_CLIENT(rhandle_factorial) -{ - uint32_t secure_value = 0; - uint32_t value = 1; - psa_status_t status = PSA_SUCCESS; - psa_outvec resp = { &secure_value, sizeof(secure_value) }; - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT(test_handle > 0); - - for (uint32_t i = 1; i <= 5; i++) { - value *= i; - status = psa_call(test_handle, NULL, 0, &resp, 1); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - TEST_ASSERT_EQUAL(value, secure_value); - } - - psa_close(test_handle); -} - -PSA_TEST_CLIENT(cross_partition_call) -{ - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - size_t in_len = strlen(cross_part_buf); - TEST_ASSERT_MESSAGE(test_handle > 0, "psa_connect() failed"); - - psa_invec iovec = { cross_part_buf, in_len }; - uint8_t *response_buf = (uint8_t *)malloc(sizeof(uint8_t) * OUT_BUFFER_SIZE); - memset(response_buf, 0, OUT_BUFFER_SIZE); - psa_outvec resp = { response_buf, OUT_BUFFER_SIZE }; - - psa_status_t status = psa_call(test_handle, &iovec, 1, &resp, 1); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - TEST_ASSERT_EQUAL_STRING_LEN("MPS emoclew dna olleHMPS emoclew dna olleH", response_buf, in_len * 2); - free(response_buf); - - psa_close(test_handle); -} - -// Test a common DOORBELL scenario -PSA_TEST_CLIENT(doorbell_test) -{ - psa_handle_t test_handle = psa_connect(SERVER_TESTS_PART1_TEST, TEST_ROT_SRV_MINOR); - TEST_ASSERT_MESSAGE(test_handle > 0, "psa_connect() failed"); - - psa_status_t status = psa_call(test_handle, NULL, 0, NULL, 0); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - - psa_close(test_handle); -} - - -utest::v1::status_t spm_setup(const size_t number_of_cases) -{ - control_handle = psa_connect(SERVER_TESTS_PART1_CONTROL, 0); - if (control_handle < 0) { - error("Could not open a connection with SERVER_TESTS_PART1_CONTROL ROT_SRV"); - } - - GREENTEA_SETUP(60, "default_auto"); - return greentea_test_setup_handler(number_of_cases); -} - -void spm_teardown(const size_t passed, const size_t failed, const failure_t failure) -{ - psa_close(control_handle); - greentea_test_teardown_handler(passed, failed, failure); -} - -utest::v1::status_t spm_case_setup(const Case *const source, const size_t index_of_case) -{ - psa_status_t status = PSA_SUCCESS; - test_action_t action = START_TEST; - psa_invec data = {&action, sizeof(action)}; - - status = psa_call(control_handle, &data, 1, NULL, 0); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - return greentea_case_setup_handler(source, index_of_case); -} - -utest::v1::status_t spm_case_teardown(const Case *const source, const size_t passed, const size_t failed, const failure_t reason) -{ - psa_status_t status = PSA_SUCCESS; - psa_status_t test_status = PSA_SUCCESS; - test_action_t action = GET_TEST_RESULT; - psa_invec data = {&action, sizeof(action)}; - psa_outvec resp = {&test_status, sizeof(test_status)}; - - status = psa_call(control_handle, &data, 1, &resp, 1); - TEST_ASSERT_EQUAL(PSA_SUCCESS, status); - TEST_ASSERT_EQUAL(PSA_SUCCESS, test_status); - return greentea_case_teardown_handler(source, passed, failed, reason); -} - -#define SPM_UTEST_CASE(desc, test) Case(desc, spm_case_setup, PSA_TEST_CLIENT_NAME(test), spm_case_teardown) - -Case cases[] = { - SPM_UTEST_CASE("Get identity during connect", identity_during_connect), - SPM_UTEST_CASE("Get identity during call", identity_during_call), - SPM_UTEST_CASE("Assert msg size", msg_size_assertion), - SPM_UTEST_CASE("Reject on connect", reject_connection), - SPM_UTEST_CASE("Read at an out of bound offset", read_at_outofboud_offset), - SPM_UTEST_CASE("Read msg with size bigger than message", msg_read_truncation), - SPM_UTEST_CASE("Make sure skip with 0 byte number skips nothing", skip_zero), - SPM_UTEST_CASE("Skip a few bytes while reading a message", skip_some), - SPM_UTEST_CASE("Try to skip more bytes than left while reading", skip_more_than_left), - SPM_UTEST_CASE("Test rhandle implementation by calculating the factorial function", rhandle_factorial), - SPM_UTEST_CASE("Test a call flow between 2 secure partitions", cross_partition_call), -}; - -//Declare your test specification with a custom setup handler -Specification specification(spm_setup, cases, spm_teardown); - -int main(int, char **) -{ - Harness::run(specification); - return 0; -} - -#endif // COMPONENT_PSA_SRV_IPC diff --git a/TESTS/psa/spm_server/COMPONENT_SPE/server_tests.h b/TESTS/psa/spm_server/COMPONENT_SPE/server_tests.h deleted file mode 100644 index 919dda5e796..00000000000 --- a/TESTS/psa/spm_server/COMPONENT_SPE/server_tests.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __SERVER_TESTS_H__ -#define __SERVER_TESTS_H__ - -typedef enum { - START_TEST = 1, - GET_TEST_RESULT = 2 -} test_action_t; - -typedef struct factorial_data { - uint32_t count; - uint32_t val; -} factorial_data_t; - -typedef psa_status_t (*psa_test_server_side_func)(psa_status_t *); -#define PSA_TEST_ERROR (-1L) -#define PSA_TEST_CLIENT_NAME(name) psa_test_client_side_ ## name -#define PSA_TEST_SERVER_NAME(name) psa_test_server_side_ ## name - -#define PSA_TEST_CLIENT(name) void PSA_TEST_CLIENT_NAME(name) (void) -#define PSA_TEST_SERVER(name) psa_status_t PSA_TEST_SERVER_NAME(name) (psa_status_t *status_ptr) - -#define PSA_TEST(name) \ - PSA_TEST_CLIENT(name); \ - PSA_TEST_SERVER(name); \ - - -PSA_TEST(identity_during_connect) -PSA_TEST(identity_during_call) -PSA_TEST(get_msg_twice) -PSA_TEST(msg_size_assertion) -PSA_TEST(reject_connection) -PSA_TEST(read_at_outofboud_offset) -PSA_TEST(msg_read_truncation) -PSA_TEST(skip_zero) -PSA_TEST(skip_some) -PSA_TEST(skip_more_than_left) -PSA_TEST(rhandle_factorial) -PSA_TEST(cross_partition_call) -PSA_TEST(doorbell_test) -#endif /* __SERVER_TESTS_H__ */ diff --git a/TESTS/psa/spm_server/COMPONENT_SPE/server_tests_partition1.c b/TESTS/psa/spm_server/COMPONENT_SPE/server_tests_partition1.c deleted file mode 100644 index 4fca965879b..00000000000 --- a/TESTS/psa/spm_server/COMPONENT_SPE/server_tests_partition1.c +++ /dev/null @@ -1,93 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "string.h" -#include "psa/client.h" -#include "psa/service.h" -#include "mbed_spm_partitions.h" -#include "server_tests.h" - -extern psa_test_server_side_func test_list[]; -static size_t num_of_tests = 0; -static void init_num_of_tests() -{ - size_t i = 0; - while (test_list[i] != NULL) { - i++; - } - - num_of_tests = i; -} - -void server_part1_main(void *ptr) -{ - psa_signal_t signals = 0; - psa_msg_t msg = {0}; - psa_status_t test_status = PSA_SUCCESS; // status of the api calls during the test - psa_status_t test_result = PSA_SUCCESS; // result of the critical section of the test - test_action_t action; - uint32_t test_idx = 0; - - - init_num_of_tests(); - while (1) { - signals = psa_wait(CONTROL_MSK, PSA_BLOCK); - if (0 == (signals & CONTROL_MSK)) { - SPM_PANIC("returned from psa_wait without CONTROL_ROT_SRV bit on signals=(0x%08x)\n", signals); - } - - if (PSA_SUCCESS != psa_get(CONTROL_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - switch (msg.type) { - case PSA_IPC_CALL: - if (msg.in_size[0] == 0) { - SPM_PANIC("got a zero message size to SERVER_TESTS_PART1_CONTROL ROT_SRV\n"); - } - - if (psa_read(msg.handle, 0, &action, sizeof(action)) != sizeof(action)) { - SPM_PANIC("could not read the entire test payload structure\n"); - } - - switch (action) { - case START_TEST: - if ((test_idx >= num_of_tests) || (test_list[test_idx] == NULL)) { - SPM_PANIC("Invalid test ID was sent!\n"); - } - - psa_reply(msg.handle, PSA_SUCCESS); - test_status = test_list[test_idx](&test_result); - break; - case GET_TEST_RESULT: - test_idx++; - psa_write(msg.handle, 0, &test_result, sizeof(test_result)); - psa_reply(msg.handle, test_status); - break; - default: - SPM_PANIC("Got illegal Value in test action"); - } - - break; - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: - psa_reply(msg.handle, PSA_SUCCESS); - break; - default: - SPM_PANIC("Unexpected message type %lu!", msg.type); - } - } -} diff --git a/TESTS/psa/spm_server/COMPONENT_SPE/server_tests_partition2.c b/TESTS/psa/spm_server/COMPONENT_SPE/server_tests_partition2.c deleted file mode 100644 index a20a62d7a97..00000000000 --- a/TESTS/psa/spm_server/COMPONENT_SPE/server_tests_partition2.c +++ /dev/null @@ -1,101 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include -#include "psa/client.h" -#include "psa/service.h" -#include "mbed_spm_partitions.h" - -void server_part2_main(void *ptr) -{ - psa_signal_t signals = 0; - size_t len = 0; - char *str = NULL; - psa_msg_t msg = {0}; - - while (1) { - signals = psa_wait(SERVER_TESTS_PART2_WAIT_ANY_SID_MSK, PSA_BLOCK); - if (0 == (signals & SERVER_TESTS_PART2_WAIT_ANY_SID_MSK)) { - SPM_PANIC("returned from psa_wait without ROT_SRV_REVERSE_MSK or ROT_SRV_DB_TST_MSK bit on\n"); - } - - if (signals & ROT_SRV_REVERSE_MSK) { - if (PSA_SUCCESS != psa_get(ROT_SRV_REVERSE_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - switch (msg.type) { - case PSA_IPC_CALL: { - if ((msg.in_size[0] + msg.in_size[1] + msg.in_size[2]) == 0) { - SPM_PANIC("got a zero message size to REVERSE ROT_SRV\n"); - } - - len = msg.in_size[0]; - str = (char *)malloc(sizeof(char) * len); - if (NULL == str) { - SPM_PANIC("memory allocation failure\n"); - } - psa_read(msg.handle, 0, str, len); - for (size_t i = 0; i < len / 2; i ++) { - char a = str[i]; - str[i] = str[len - i - 1]; - str[len - i - 1] = a; - } - - psa_write(msg.handle, 0, str, len); - free(str); - str = NULL; - break; - } - - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: - break; - default: - SPM_PANIC("Unexpected message type %lu!", msg.type); - break; - } - - psa_reply(msg.handle, PSA_SUCCESS); - } else { // -- Doorbell test - if (PSA_SUCCESS != psa_get(ROT_SRV_DB_TST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - switch (msg.type) { - case PSA_IPC_CALL: { - int32_t caller_part_id = msg.client_id; - // Doorbell contract is valid only between secure partitions - if (caller_part_id < 0) { - SPM_PANIC("Caller partition is non secure\n"); - } - // In doorbell scenario the server first calls psa_reply() - psa_reply(msg.handle, PSA_SUCCESS); - // After work is done, ring the doorbell - psa_notify(caller_part_id); - break; - } - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: - psa_reply(msg.handle, PSA_SUCCESS); - break; - default: - SPM_PANIC("Unexpected message type %lu!", msg.type); - break; - } - } - } -} diff --git a/TESTS/psa/spm_server/COMPONENT_SPE/tests.c b/TESTS/psa/spm_server/COMPONENT_SPE/tests.c deleted file mode 100644 index 15aef138458..00000000000 --- a/TESTS/psa/spm_server/COMPONENT_SPE/tests.c +++ /dev/null @@ -1,702 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "string.h" -#include "psa/client.h" -#include "psa/service.h" -#include "mbed_spm_partitions.h" -#include "server_tests.h" -#include "psa_manifest/sid.h" - -/** - * Process a generic connect message to SERVER_TESTS_PART1_TEST ROT_SRV. - * @return PSA_SUCCESS or negative error code if failed. - */ -static psa_status_t process_connect_request(void) -{ - psa_status_t res = PSA_SUCCESS; - psa_msg_t msg = {0}; - psa_signal_t signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - res = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CONNECT) { - res = ((res != PSA_SUCCESS) ? res : PSA_TEST_ERROR); - } - - psa_reply(msg.handle, res); - - return res; -} - -/** - * Process a generic disconnect message to SERVER_TESTS_PART1_TEST ROT_SRV. - * @return PSA_SUCCESS or negative error code if failed. - */ -static psa_status_t process_disconnect_request(void) -{ - psa_status_t res = PSA_SUCCESS; - psa_msg_t msg = {0}; - psa_signal_t signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - res = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_DISCONNECT) { - res = ((res != PSA_SUCCESS) ? res : PSA_TEST_ERROR); - } - - psa_reply(msg.handle, PSA_SUCCESS); - - return res; -} - -PSA_TEST_SERVER(identity_during_connect) -{ - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - psa_msg_t msg = {0}; - int32_t identity = 0; - - psa_signal_t signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CONNECT) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - identity = msg.client_id; - *status_ptr = (identity == -1) ? PSA_SUCCESS : PSA_TEST_ERROR; - - psa_reply(msg.handle, PSA_SUCCESS); - - disconnect_status = process_disconnect_request(); - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - - return test_status; -} - -PSA_TEST_SERVER(identity_during_call) -{ - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - psa_msg_t msg = {0}; - int32_t identity = 0; - psa_signal_t signals = 0; - - test_status = process_connect_request(); - if (test_status != PSA_SUCCESS) { - return test_status; - } - - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CALL) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - identity = msg.client_id; - *status_ptr = (identity == -1) ? PSA_SUCCESS : PSA_TEST_ERROR; - - psa_reply(msg.handle, PSA_SUCCESS); - - disconnect_status = process_disconnect_request(); - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - - return test_status; -} - -PSA_TEST_SERVER(msg_size_assertion) -{ - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - psa_msg_t msg = {0}; - psa_signal_t signals = 0; - size_t read_size = 0; - - char *buff = malloc(sizeof(char) * 11); - if (NULL == buff) { - SPM_PANIC("memory allocation failure\n"); - } - memset(buff, 0, 11); - - test_status = process_connect_request(); - if (test_status != PSA_SUCCESS) { - free(buff); - return test_status; - } - - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CALL) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - for (size_t i = 0; i < PSA_MAX_IOVEC; i++) { - read_size += psa_read(msg.handle, i, buff + read_size, msg.in_size[i]); - } - - if (((msg.in_size[0] + msg.in_size[1] + msg.in_size[2] + msg.in_size[3]) != 11) || - (read_size != 11) || - (strncmp(buff, "abcdfghijkn", 11) != 0)) { - *status_ptr = PSA_TEST_ERROR; - } else { - *status_ptr = PSA_SUCCESS; - } - - psa_reply(msg.handle, test_status); - free(buff); - disconnect_status = process_disconnect_request(); - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - return test_status; -} - -PSA_TEST_SERVER(reject_connection) -{ - psa_status_t res = PSA_SUCCESS; - psa_msg_t msg = {0}; - psa_signal_t signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - res = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CONNECT) { - res = ((res != PSA_SUCCESS) ? res : PSA_TEST_ERROR); - } - - psa_reply(msg.handle, PSA_CONNECTION_REFUSED); - *status_ptr = res; - return res; -} - -PSA_TEST_SERVER(read_at_outofboud_offset) -{ - psa_signal_t signals = 0; - psa_msg_t msg = {0}; - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - uint32_t buff = 52; - - test_status = process_connect_request(); - if (test_status != PSA_SUCCESS) { - return test_status; - } - - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CALL) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - size_t read_size = psa_read(msg.handle, 1, &buff, sizeof(buff)); - if ((0 != read_size) || (52 != buff)) { - *status_ptr = PSA_TEST_ERROR; - } else { - *status_ptr = PSA_SUCCESS; - } - - psa_reply(msg.handle, test_status); - disconnect_status = process_disconnect_request(); - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - return test_status; -} - - -PSA_TEST_SERVER(msg_read_truncation) -{ - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - psa_msg_t msg = {0}; - psa_signal_t signals = 0; - size_t read_size = 0; - char *buff = malloc(sizeof(char) * 11); - if (NULL == buff) { - SPM_PANIC("memory allocation failure\n"); - } - memset(buff, 0, 11); - - test_status = process_connect_request(); - if (test_status != PSA_SUCCESS) { - free(buff); - return test_status; - } - - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CALL) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - read_size = psa_read(msg.handle, 1, buff, 11); - if ((msg.in_size[1] != read_size) || - ((msg.in_size[0] + msg.in_size[1] + msg.in_size[2]) != 11) || - (buff[6] != 0) || - (strncmp(buff, "fghijk", 6) != 0)) { - *status_ptr = PSA_TEST_ERROR; - } else { - *status_ptr = PSA_SUCCESS; - } - - psa_reply(msg.handle, test_status); - disconnect_status = process_disconnect_request(); - free(buff); - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - return test_status; -} - -PSA_TEST_SERVER(skip_zero) -{ - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - psa_msg_t msg = {0}; - psa_signal_t signals = 0; - size_t read_size = 0; - size_t skip_size = 0; - char *buff = malloc(sizeof(char) * 11); - if (NULL == buff) { - SPM_PANIC("memory allocation failure\n"); - } - - test_status = process_connect_request(); - if (test_status != PSA_SUCCESS) { - free(buff); - return test_status; - } - - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CALL) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - skip_size = psa_skip(msg.handle, 0, 0); - read_size = psa_read(msg.handle, 0, buff, 11); - if ((skip_size != 0) || - (read_size != 11) || - (strncmp(buff, "abcdefghijk", 11)) != 0) { - *status_ptr = PSA_TEST_ERROR; - } else { - *status_ptr = PSA_SUCCESS; - } - - psa_reply(msg.handle, test_status); - disconnect_status = process_disconnect_request(); - free(buff); - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - return test_status; -} - -PSA_TEST_SERVER(skip_some) -{ - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - psa_msg_t msg = {0}; - psa_signal_t signals = 0; - size_t read_size1 = 0; - size_t read_size2 = 0; - size_t skip_size = 0; - char *buff = malloc(sizeof(char) * 11); - if (NULL == buff) { - SPM_PANIC("memory allocation failure\n"); - } - - test_status = process_connect_request(); - if (test_status != PSA_SUCCESS) { - free(buff); - return test_status; - } - - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CALL) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - read_size1 = psa_read(msg.handle, 0, buff, 3); - skip_size = psa_skip(msg.handle, 0, 5); - read_size2 = psa_read(msg.handle, 0, buff + 3, 8); - if ((read_size1 != 3) || - (skip_size != 5) || - (read_size2 != 8) || - (strncmp(buff, "abcijklmnop", 11) != 0)) { - *status_ptr = PSA_TEST_ERROR; - } else { - *status_ptr = PSA_SUCCESS; - } - - psa_reply(msg.handle, test_status); - disconnect_status = process_disconnect_request(); - free(buff); - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - return test_status; -} - -PSA_TEST_SERVER(skip_more_than_left) -{ - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - psa_msg_t msg = {0}; - psa_signal_t signals = 0; - size_t read_size1 = 0; - size_t read_size2 = 0; - size_t skip_size = 0; - char *buff = malloc(sizeof(char) * 8); - if (NULL == buff) { - SPM_PANIC("memory allocation failure\n"); - } - - test_status = process_connect_request(); - if (test_status != PSA_SUCCESS) { - free(buff); - return test_status; - } - - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (msg.type != PSA_IPC_CALL) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - read_size1 = psa_read(msg.handle, 0, buff, 5); - skip_size = psa_skip(msg.handle, 0, 4); - read_size2 = psa_read(msg.handle, 0, buff + 5, 2); - if ((read_size1 != 5) || - (skip_size != 3) || - (read_size2 != 0) || - (strncmp(buff, "abcde", 5) != 0)) { - *status_ptr = PSA_TEST_ERROR; - } else { - *status_ptr = PSA_SUCCESS; - } - - psa_reply(msg.handle, test_status); - disconnect_status = process_disconnect_request(); - free(buff); - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - return test_status; -} - -PSA_TEST_SERVER(rhandle_factorial) -{ - psa_signal_t signals = 0; - psa_msg_t msg = {0}; - factorial_data_t *num = NULL; - factorial_data_t *asserted_ptr = NULL; - uint32_t connect_count = 0; - uint32_t call_count = 0; - uint32_t disconnect_count = 0; - - while (1) { - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if (0 == (signals & TEST_MSK)) { - SPM_PANIC("returned from psa_wait without TEST_MSK bit on\n"); - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - switch (msg.type) { - case PSA_IPC_CONNECT: - if (NULL != msg.rhandle) { - SPM_PANIC("got rhandle on connect message\n"); - } - - num = (factorial_data_t *)malloc(sizeof(factorial_data_t)); - if (NULL == num) { - SPM_PANIC("memory allocation failure\n"); - } - num->count = 0; - num->val = 1; - psa_set_rhandle(msg.handle, num); - asserted_ptr = num; - connect_count++; - break; - case PSA_IPC_CALL: - if (msg.in_size[0] + msg.in_size[1] + msg.in_size[2] > 0) { - SPM_PANIC("ROT_SRV_FACTORIAL ROT_SRV should not get any params\n"); - } - - if (NULL == msg.rhandle) { - SPM_PANIC("got NULL rhandle on call message\n"); - } - - if (asserted_ptr != msg.rhandle) { - SPM_PANIC("rhandle value changed between calls\n"); - } - - num = (factorial_data_t *)msg.rhandle; - num->count++; - num->val *= num->count; - psa_write(msg.handle, 0, &(num->val), sizeof(num->val)); - call_count++; - break; - case PSA_IPC_DISCONNECT: - if (NULL == msg.rhandle) { - SPM_PANIC("got NULL rhandle on disconnect message\n"); - } - - if (asserted_ptr != msg.rhandle) { - SPM_PANIC("rhandle value changed between calls\n"); - } - - // Setting rhandle during disconnection should have no effect - uint8_t my_rhandle = 10; - psa_set_rhandle(msg.handle, &my_rhandle); - - free(msg.rhandle); - disconnect_count++; - break; - default: - SPM_PANIC("Unexpected message type %lu!", msg.type); - } - - num = NULL; - psa_reply(msg.handle, PSA_SUCCESS); - if (disconnect_count > 0) { - break; - } - } - - if ((connect_count != 1) || - (call_count != 5) || - (disconnect_count != 1)) { - *status_ptr = PSA_TEST_ERROR; - } else { - *status_ptr = PSA_SUCCESS; - } - - return *status_ptr; -} - -PSA_TEST_SERVER(cross_partition_call) -{ - psa_signal_t signals = 0; - psa_msg_t msg = {0}; - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - psa_status_t partition_call_status = PSA_SUCCESS; - uint32_t data_read = 0; - uint32_t str_len = 0; - char *buff = malloc(sizeof(char) * 60); - - if (NULL == buff) { - SPM_PANIC("memory allocation failure\n"); - } - - memset(buff, 0, 60); - - test_status = process_connect_request(); - if (test_status != PSA_SUCCESS) { - free(buff); - return test_status; - } - - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if ((msg.in_size[0] + msg.in_size[1] + msg.in_size[2]) == 0) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - str_len = msg.in_size[0]; - data_read = psa_read(msg.handle, 0, buff, str_len); - if (data_read != 21) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - memcpy(buff + str_len, buff, str_len); - data_read *= 2; - - psa_invec data = { buff, data_read }; - - psa_outvec resp = { buff, data_read }; - psa_handle_t conn_handle = psa_connect(SERVER_TESTS_PART2_ROT_SRV_REVERSE, 5); - if (conn_handle <= 0) { - partition_call_status = PSA_TEST_ERROR; - } - - if (partition_call_status == PSA_SUCCESS) { - partition_call_status = psa_call(conn_handle, &data, 1, &resp, 1); - } - - *status_ptr = partition_call_status; - if (partition_call_status == PSA_SUCCESS) { - psa_close(conn_handle); - } - - if (PSA_SUCCESS == partition_call_status) { - psa_write(msg.handle, 0, buff, data_read); - } - - psa_reply(msg.handle, partition_call_status); - free(buff); - disconnect_status = process_disconnect_request(); - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - return test_status; -} - -// Test a common DOORBELL scenario -PSA_TEST_SERVER(doorbell_test) -{ - psa_signal_t signals = 0; - psa_msg_t msg = {0}; - psa_status_t test_status = PSA_SUCCESS; - psa_status_t disconnect_status = PSA_SUCCESS; - psa_status_t partition_call_status = PSA_SUCCESS; - - - test_status = process_connect_request(); - if (test_status != PSA_SUCCESS) { - return test_status; - } - - signals = psa_wait(TEST_MSK, PSA_BLOCK); - if ((signals & TEST_MSK) == 0) { - test_status = PSA_TEST_ERROR; - } - - if (PSA_SUCCESS != psa_get(TEST_MSK, &msg)) { - SPM_PANIC("psa_get() failed\n"); - } - - if (((msg.in_size[0] + msg.in_size[1] + msg.in_size[2]) != 0) || (msg.out_size[0] != 0)) { - test_status = ((test_status != PSA_SUCCESS) ? test_status : PSA_TEST_ERROR); - } - - // -- Connection with partition2 - START - psa_handle_t conn_handle = psa_connect(SERVER_TESTS_PART2_ROT_SRV_DB_TST, 5); - if (conn_handle <= 0) { - partition_call_status = PSA_TEST_ERROR; - } - - if (partition_call_status == PSA_SUCCESS) { - partition_call_status = psa_call(conn_handle, NULL, 0, NULL, 0); - } - - if (partition_call_status == PSA_SUCCESS) { - // Wait for doorball notification - Only after that call psa_reply() for the client called you - signals = psa_wait(PSA_DOORBELL, PSA_BLOCK); - if ((signals & PSA_DOORBELL) == 0) { - partition_call_status = PSA_TEST_ERROR; - } - } - - if (partition_call_status == PSA_SUCCESS) { - psa_clear(); - psa_close(conn_handle); - } - // -- Connection with partition2 - END - - *status_ptr = partition_call_status; - - psa_reply(msg.handle, partition_call_status); - disconnect_status = process_disconnect_request(); - - test_status = (test_status != PSA_SUCCESS) ? test_status : disconnect_status; - - return test_status; -} - - -psa_test_server_side_func test_list[] = { - PSA_TEST_SERVER_NAME(identity_during_connect), - PSA_TEST_SERVER_NAME(identity_during_call), - PSA_TEST_SERVER_NAME(msg_size_assertion), - PSA_TEST_SERVER_NAME(reject_connection), - PSA_TEST_SERVER_NAME(read_at_outofboud_offset), - PSA_TEST_SERVER_NAME(msg_read_truncation), - PSA_TEST_SERVER_NAME(skip_zero), - PSA_TEST_SERVER_NAME(skip_some), - PSA_TEST_SERVER_NAME(skip_more_than_left), - PSA_TEST_SERVER_NAME(rhandle_factorial), - PSA_TEST_SERVER_NAME(cross_partition_call), - NULL -}; diff --git a/TESTS/psa/spm_server/server_tests.h b/TESTS/psa/spm_server/server_tests.h deleted file mode 100644 index 89cb2f5d4c6..00000000000 --- a/TESTS/psa/spm_server/server_tests.h +++ /dev/null @@ -1,57 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __UVISOR_MBED_SPM_SERVER_TESTS_H__ -#define __UVISOR_MBED_SPM_SERVER_TESTS_H__ - -typedef enum { - START_TEST = 1, - GET_TEST_RESULT = 2 -} test_action_t; - -typedef struct factorial_data { - uint32_t count; - uint32_t val; -} factorial_data_t; - -typedef psa_status_t (*psa_test_server_side_func)(psa_status_t *); -#define PSA_TEST_ERROR (-1L) -#define PSA_TEST_CLIENT_NAME(name) psa_test_client_side_ ## name -#define PSA_TEST_SERVER_NAME(name) psa_test_server_side_ ## name - -#define PSA_TEST_CLIENT(name) void PSA_TEST_CLIENT_NAME(name) (void) -#define PSA_TEST_SERVER(name) psa_status_t PSA_TEST_SERVER_NAME(name) (psa_status_t *status_ptr) - -#define PSA_TEST(name) \ - PSA_TEST_CLIENT(name); \ - PSA_TEST_SERVER(name); \ - - -PSA_TEST(identity_during_connect) -PSA_TEST(identity_during_call) -PSA_TEST(get_msg_twice) -PSA_TEST(msg_size_assertion) -PSA_TEST(reject_connection) -PSA_TEST(read_at_outofboud_offset) -PSA_TEST(msg_read_truncation) -PSA_TEST(skip_zero) -PSA_TEST(skip_some) -PSA_TEST(skip_more_than_left) -PSA_TEST(rhandle_factorial) -PSA_TEST(cross_partition_call) -PSA_TEST(doorbell_test) -#endif /* __UVISOR_MBED_SPM_SERVER_TESTS_H__ */ diff --git a/TESTS/psa/spm_server/server_tests_part1_psa.json b/TESTS/psa/spm_server/server_tests_part1_psa.json deleted file mode 100644 index 04077963deb..00000000000 --- a/TESTS/psa/spm_server/server_tests_part1_psa.json +++ /dev/null @@ -1,34 +0,0 @@ -{ - "name": "SERVER_TESTS_PART1", - "type": "APPLICATION-ROT", - "priority": "NORMAL", - "id": "0x00000002", - "entry_point": "server_part1_main", - "stack_size": "0x400", - "heap_size": "0x400", - "services": [{ - "name": "SERVER_TESTS_PART1_CONTROL", - "identifier": "0x00001A01", - "signal": "CONTROL_MSK", - "non_secure_clients": true, - "minor_version": 5, - "minor_policy": "RELAXED" - }, - { - "name": "SERVER_TESTS_PART1_TEST", - "identifier": "0x00001A02", - "signal": "TEST_MSK", - "non_secure_clients": true, - "minor_version": 12, - "minor_policy": "STRICT" - } - ], - "extern_sids": [ - "SERVER_TESTS_PART2_ROT_SRV_REVERSE", - "SERVER_TESTS_PART2_ROT_SRV_DB_TST" - ], - "source_files": [ - "COMPONENT_SPE/server_tests_partition1.c", - "COMPONENT_SPE/tests.c" - ] -} diff --git a/TESTS/psa/spm_server/server_tests_part2_psa.json b/TESTS/psa/spm_server/server_tests_part2_psa.json deleted file mode 100644 index caee24410f8..00000000000 --- a/TESTS/psa/spm_server/server_tests_part2_psa.json +++ /dev/null @@ -1,30 +0,0 @@ -{ - "name": "SERVER_TESTS_PART2", - "type": "APPLICATION-ROT", - "priority": "NORMAL", - "id": "0x00000003", - "entry_point": "server_part2_main", - "stack_size": "0x400", - "heap_size": "0x400", - "services": [{ - "name": "SERVER_TESTS_PART2_ROT_SRV_REVERSE", - "identifier": "0x00001A03", - "signal": "ROT_SRV_REVERSE_MSK", - "non_secure_clients": false, - "minor_version": 5, - "minor_policy": "STRICT" - }, - { - "name": "SERVER_TESTS_PART2_ROT_SRV_DB_TST", - "identifier": "0x00001A04", - "signal": "ROT_SRV_DB_TST_MSK", - "non_secure_clients": false, - "minor_version": 5, - "minor_policy": "STRICT" - } - ], - "source_files": [ - "COMPONENT_SPE/server_tests_partition2.c", - "COMPONENT_SPE/tests.c" - ] -} diff --git a/TESTS/psa/spm_smoke/COMPONENT_NSPE/main.cpp b/TESTS/psa/spm_smoke/COMPONENT_NSPE/main.cpp deleted file mode 100644 index 775ec2c997e..00000000000 --- a/TESTS/psa/spm_smoke/COMPONENT_NSPE/main.cpp +++ /dev/null @@ -1,96 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - - -#ifndef COMPONENT_PSA_SRV_IPC -#error [NOT_SUPPORTED] SPM tests can run only on SPM-enabled targets -#else - -/* -------------------------------------- Includes ----------------------------------- */ - -#include "greentea-client/test_env.h" -#include "unity.h" -#include "utest.h" -#include "psa/client.h" -#include "psa_manifest/sid.h" -#include - -#if defined(TARGET_TFM) -#define PSA_MAX_IOVEC 4 -#endif - -using namespace utest::v1; - -/* ------------------------------------ Definitions ---------------------------------- */ - -#define CLIENT_MINOR_VERSION 0 -#define CLIENT_RSP_BUF_SIZE 20 - -#define CLIENT_TX_MSG "Hello and welcome SPM" -#define CLIENT_EXPECTED_RESPONSE "Response1" - -/* ------------------------------------ Client Code ---------------------------------- */ - -char msg_buf[] = CLIENT_TX_MSG; - -void example_main(void) -{ - psa_handle_t conn_handle = psa_connect(SMOKE_TESTS_PART1_ROT_SRV1, CLIENT_MINOR_VERSION); - TEST_ASSERT_MESSAGE(conn_handle > 0, "psa_connect() failed"); - - - psa_invec iovec[PSA_MAX_IOVEC - 1] = { - { msg_buf, 6 }, - { msg_buf + 6, 12 }, - { msg_buf + 18, 4 } - }; - - uint8_t *response_buf = (uint8_t *)malloc(sizeof(uint8_t) * CLIENT_RSP_BUF_SIZE); - memset(response_buf, 0, CLIENT_RSP_BUF_SIZE); - psa_outvec outvec = {response_buf, CLIENT_RSP_BUF_SIZE}; - - psa_status_t status = psa_call(conn_handle, iovec, PSA_MAX_IOVEC - 1, &outvec, 1); - TEST_ASSERT_MESSAGE(PSA_SUCCESS == status, "psa_call() failed"); - TEST_ASSERT_EQUAL_STRING(CLIENT_EXPECTED_RESPONSE, response_buf); - - free(response_buf); - psa_close(conn_handle); -} - -// --------------------------------- Test Framework ---------------------------------- */ - -utest::v1::status_t greentea_setup(const size_t number_of_cases) -{ - GREENTEA_SETUP(20, "default_auto"); - return greentea_test_setup_handler(number_of_cases); -} - -Case cases[] = { - Case("example", example_main) -}; - -// Declare your test specification with a custom setup handler -Specification specification(greentea_setup, cases); - -int main(int, char **) -{ - // Run the test specification - Harness::run(specification); - return 0; -} - -#endif // COMPONENT_PSA_SRV_IPC diff --git a/TESTS/psa/spm_smoke/COMPONENT_SPE/smoke_tests_partition.c b/TESTS/psa/spm_smoke/COMPONENT_SPE/smoke_tests_partition.c deleted file mode 100644 index f79459805c8..00000000000 --- a/TESTS/psa/spm_smoke/COMPONENT_SPE/smoke_tests_partition.c +++ /dev/null @@ -1,122 +0,0 @@ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -// -------------------------------------- Includes ----------------------------------- - -#include -#include -#include "psa/client.h" -#include "psa/service.h" -#include "mbed_spm_partitions.h" - -// ------------------------------------ Definitions ---------------------------------- - -#define SERVER_READ_MSG_BUF_SIZE 30 -#define SERVER_RSP_BUF_SIZE 20 -#define ACTUAL_MSG_SIZE 22 - -// ---------------------------------- Global Variables ------------------------------- - -const char SERVER_EXPECTED_READ_MSG[] = "Hello and welcome SPM"; -const char WRITE_MSG_BUF[] = "Response1"; - -// ------------------------------ Partition's Main Thread ---------------------------- - -void smoke_part_main(void *ptr) -{ - uint32_t signals = 0; - int32_t client_id = 0; - psa_msg_t msg = {0}; - - while (1) { - - signals = psa_wait(ROT_SRV1_MSK, PSA_BLOCK); - if ((signals & ROT_SRV1_MSK) != ROT_SRV1_MSK) { - SPM_PANIC("Received unknown signal (0x%08lx)\n", signals); - } - - if (PSA_SUCCESS != psa_get(ROT_SRV1_MSK, &msg)) { - continue; - } - - if (msg.handle != PSA_NULL_HANDLE) { - client_id = msg.client_id; - if (client_id != -1) { - SPM_PANIC("Received message from unexpected source (0x%08lx)\n", client_id); - } - } - - switch (msg.type) { - case PSA_IPC_CALL: { - if ( - ((msg.in_size[0] + msg.in_size[1] + msg.in_size[2] + msg.in_size[3]) != ACTUAL_MSG_SIZE) || - (msg.out_size[0] != SERVER_RSP_BUF_SIZE) - ) { - SPM_PANIC("Received message does not comply with message convention"); - } - - - char *read_msg_buf = malloc(sizeof(char) * SERVER_READ_MSG_BUF_SIZE); - if (NULL == read_msg_buf) { - SPM_PANIC("Failed to allocate Memory"); - } - memset(read_msg_buf, 0, SERVER_READ_MSG_BUF_SIZE); - char *read_ptr = read_msg_buf; - - for (size_t i = 0; i < PSA_MAX_IOVEC - 1; i++) { - uint32_t bytes_read = psa_read(msg.handle, i, read_ptr, msg.in_size[i]); - if (bytes_read != msg.in_size[i]) { - SPM_PANIC("Expected to read %zu, got %lu", msg.in_size[i], bytes_read); - } - - read_ptr += bytes_read; - } - - int cmp_res = strcmp(SERVER_EXPECTED_READ_MSG, read_msg_buf); - if (cmp_res != 0) { - SPM_PANIC("psa_read() - Bad reading!!"); - } - - psa_write(msg.handle, 0, WRITE_MSG_BUF, strlen(WRITE_MSG_BUF) + 1); - free(read_msg_buf); - read_msg_buf = NULL; - read_ptr = NULL; - break; - } - case PSA_IPC_DISCONNECT: - // Fallthrough - case PSA_IPC_CONNECT: { - if ( - (msg.out_size[0] != 0) || (msg.out_size[1] != 0) || - (msg.out_size[2] != 0) || (msg.out_size[3] != 0) || - (msg.in_size[0] != 0) || (msg.in_size[1] != 0) || - (msg.in_size[2] != 0) || (msg.in_size[3] != 0) - ) { - SPM_PANIC("Should not receive iovecs in PSA_IPC_CONNECT or PSA_IPC_DISCONNECT"); - } - - break; - } - default: - SPM_PANIC("Unexpected message type %lu!", msg.type); - break; - } - - psa_reply(msg.handle, PSA_SUCCESS); - } -} - diff --git a/TESTS/psa/spm_smoke/smoke_tests_part1_psa.json b/TESTS/psa/spm_smoke/smoke_tests_part1_psa.json deleted file mode 100644 index 20d216e2bb7..00000000000 --- a/TESTS/psa/spm_smoke/smoke_tests_part1_psa.json +++ /dev/null @@ -1,21 +0,0 @@ -{ - "name": "SMOKE_TESTS_PART1", - "type": "APPLICATION-ROT", - "priority": "NORMAL", - "id": "0x00000004", - "entry_point": "smoke_part_main", - "stack_size": "0x200", - "heap_size": "0x400", - "services": [{ - "name": "SMOKE_TESTS_PART1_ROT_SRV1", - "identifier": "0x00001A00", - "signal": "ROT_SRV1_MSK", - "non_secure_clients": true, - "minor_version": 5, - "minor_policy": "RELAXED" - } - ], - "source_files": [ - "COMPONENT_SPE/smoke_tests_partition.c" - ] -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/bl2/include/tfm_boot_status.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/bl2/include/tfm_boot_status.h deleted file mode 100644 index f31743bebdc..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/bl2/include/tfm_boot_status.h +++ /dev/null @@ -1,217 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_BOOT_STATUS_H__ -#define __TFM_BOOT_STATUS_H__ - -#include -#include - - -#ifdef __cplusplus -extern "C" { -#endif - -/* Major numbers (4 bit) to identify - * the consumer of shared data in runtime SW - */ -#define TLV_MAJOR_CORE 0x0 -#define TLV_MAJOR_IAS 0x1 - -/** - * The shared data between boot loader and runtime SW is TLV encoded. The - * shared data is stored in a well known location in secure memory and this is - * a contract between boot loader and runtime SW. - * - * The structure of shared data must be the following: - * - At the beginning there must be a header: struct shared_data_tlv_header - * This contains a magic number and a size field which covers the entire - * size of the shared data area including this header. - * - After the header there come the entries which are composed from an entry - * header structure: struct shared_data_tlv_entry and the data. In the entry - * header is a type field (tly_type) which identify the consumer of the - * entry in the runtime SW and specify the subtype of that data item. There - * is a size field (tlv_len) which covers the size of the entry header and - * the data. After this structure comes the actual data. - * - Arbitrary number and size of data entry can be in the shared memory area. - * - * This table gives of overview about the tlv_type field in the entry header. - * The tlv_type always composed from a major and minor number. Major number - * identifies the addressee in runtime SW, who should process the data entry. - * Minor number used to encode more info about the data entry. The actual - * definition of minor number could change per major number. In case of boot - * status data, which is going to be processed by initial attestation service - * the minor number is split further to two part: sw_module and claim. The - * sw_module identifies the SW component in the system which the data item - * belongs to and the claim part identifies the exact type of the data. - * - * |---------------------------------------| - * | tlv_type (16) | - * |---------------------------------------| - * | tlv_major(4)| tlv_minor(12) | - * |---------------------------------------| - * | MAJOR_IAS | sw_module(6) | claim(6) | - * |---------------------------------------| - * | MAJOR_CORE | TBD | - * |---------------------------------------| - */ - -/* Initial attestation: SW components / SW modules - * This list is intended to be adjusted per device. It contains more SW - * components than currently available in TF-M project. It serves as an example, - * what kind of SW components might be available. - */ -#define SW_GENERAL 0x00 -#define SW_BL2 0x01 -#define SW_PROT 0x02 -#define SW_AROT 0x03 -#define SW_SPE 0x04 -#define SW_NSPE 0x05 -#define SW_S_NS 0x06 -#define SW_MAX 0x07 - -/* Initial attestation: Claim per SW components / SW modules */ -/* Bits: 0-2 */ -#define SW_VERSION 0x00 -#define SW_SIGNER_ID 0x01 -#define SW_EPOCH 0x02 -#define SW_TYPE 0x03 -/* Bits: 3-5 */ -#define SW_MEASURE_VALUE 0x08 -#define SW_MEASURE_TYPE 0x09 - -/* Initial attestation: General claim does not belong any particular SW - * component. But they might be part of the boot status. - */ -#define BOOT_SEED 0x00 -#define HW_VERSION 0x01 -#define SECURITY_LIFECYCLE 0x02 - -/* Minor numbers (12 bit) to identify attestation service related data */ -#define TLV_MINOR_IAS_BOOT_SEED ((SW_GENERAL << 6) | BOOT_SEED) -#define TLV_MINOR_IAS_HW_VERSION ((SW_GENERAL << 6) | HW_VERSION) -#define TLV_MINOR_IAS_SLC ((SW_GENERAL << 6) | SECURITY_LIFECYCLE) - -/* Bootloader - It can be more stage */ -#define TLV_MINOR_IAS_BL2_MEASURE_VALUE ((SW_BL2 << 6) | SW_MEASURE_VALUE) -#define TLV_MINOR_IAS_BL2_MEASURE_TYPE ((SW_BL2 << 6) | SW_MEASURE_TYPE) -#define TLV_MINOR_IAS_BL2_VERSION ((SW_BL2 << 6) | SW_VERSION) -#define TLV_MINOR_IAS_BL2_SIGNER_ID ((SW_BL2 << 6) | SW_SIGNER_ID) -#define TLV_MINOR_IAS_BL2_EPOCH ((SW_BL2 << 6) | SW_EPOCH) -#define TLV_MINOR_IAS_BL2_TYPE ((SW_BL2 << 6) | SW_TYPE) - -/* PROT: PSA Root of Trust */ -#define TLV_MINOR_IAS_PROT_MEASURE_VALUE ((SW_PROT << 6) | SW_MEASURE_VALUE) -#define TLV_MINOR_IAS_PROT_MEASURE_TYPE ((SW_PROT << 6) | SW_MEASURE_TYPE) -#define TLV_MINOR_IAS_PROT_VERSION ((SW_PROT << 6) | SW_VERSION) -#define TLV_MINOR_IAS_PROT_SIGNER_ID ((SW_PROT << 6) | SW_SIGNER_ID) -#define TLV_MINOR_IAS_PROT_EPOCH ((SW_PROT << 6) | SW_EPOCH) -#define TLV_MINOR_IAS_PROT_TYPE ((SW_PROT << 6) | SW_TYPE) - -/* AROT: Application Root of Trust */ -#define TLV_MINOR_IAS_AROT_MEASURE_VALUE ((SW_AROT << 6) | SW_MEASURE_VALUE) -#define TLV_MINOR_IAS_AROT_MEASURE_TYPE ((SW_AROT << 6) | SW_MEASURE_TYPE) -#define TLV_MINOR_IAS_AROT_VERSION ((SW_AROT << 6) | SW_VERSION) -#define TLV_MINOR_IAS_AROT_SIGNER_ID ((SW_AROT << 6) | SW_SIGNER_ID) -#define TLV_MINOR_IAS_AROT_EPOCH ((SW_AROT << 6) | SW_EPOCH) -#define TLV_MINOR_IAS_AROT_TYPE ((SW_AROT << 6) | SW_TYPE) - -/* Non-secure processing environment - single non-secure image */ -#define TLV_MINOR_IAS_NSPE_MEASURE_VALUE ((SW_NSPE << 6) | SW_MEASURE_VALUE) -#define TLV_MINOR_IAS_NSPE_MEASURE_TYPE ((SW_NSPE << 6) | SW_MEASURE_TYPE) -#define TLV_MINOR_IAS_NSPE_VERSION ((SW_NSPE << 6) | SW_VERSION) -#define TLV_MINOR_IAS_NSPE_SIGNER_ID ((SW_NSPE << 6) | SW_SIGNER_ID) -#define TLV_MINOR_IAS_NSPE_EPOCH ((SW_NSPE << 6) | SW_EPOCH) -#define TLV_MINOR_IAS_NSPE_TYPE ((SW_NSPE << 6) | SW_TYPE) - -/* Secure processing environment (ARoT + PRoT) - single secure image */ -#define TLV_MINOR_IAS_SPE_MEASURE_VALUE ((SW_SPE << 6) | SW_MEASURE_VALUE) -#define TLV_MINOR_IAS_SPE_MEASURE_TYPE ((SW_SPE << 6) | SW_MEASURE_TYPE) -#define TLV_MINOR_IAS_SPE_VERSION ((SW_SPE << 6) | SW_VERSION) -#define TLV_MINOR_IAS_SPE_SIGNER_ID ((SW_SPE << 6) | SW_SIGNER_ID) -#define TLV_MINOR_IAS_SPE_EPOCH ((SW_SPE << 6) | SW_EPOCH) -#define TLV_MINOR_IAS_SPE_TYPE ((SW_SPE << 6) | SW_TYPE) - -/* SPE + NSPE - combined secure and non-secure image */ -#define TLV_MINOR_IAS_S_NS_MEASURE_VALUE ((SW_S_NS << 6) | SW_MEASURE_VALUE) -#define TLV_MINOR_IAS_S_NS_MEASURE_TYPE ((SW_S_NS << 6) | SW_MEASURE_TYPE) -#define TLV_MINOR_IAS_S_NS_VERSION ((SW_S_NS << 6) | SW_VERSION) -#define TLV_MINOR_IAS_S_NS_SIGNER_ID ((SW_S_NS << 6) | SW_SIGNER_ID) -#define TLV_MINOR_IAS_S_NS_EPOCH ((SW_S_NS << 6) | SW_EPOCH) -#define TLV_MINOR_IAS_S_NS_TYPE ((SW_S_NS << 6) | SW_TYPE) - -/* General macros to handle TLV type */ -#define MAJOR_MASK 0xF /* 4 bit */ -#define MAJOR_POS 12 /* 12 bit */ -#define MINOR_MASK 0xFFF /* 12 bit */ - -#define SET_TLV_TYPE(major, minor) \ - ((((major) & MAJOR_MASK) << MAJOR_POS) | ((minor) & MINOR_MASK)) -#define GET_MAJOR(tlv_type) ((tlv_type) >> MAJOR_POS) -#define GET_MINOR(tlv_type) ((tlv_type) & MINOR_MASK) - -/* Initial attestation specific macros */ -#define MODULE_POS 6 /* 6 bit */ -#define CLAIM_MASK 0x3F /* 6 bit */ -#define MEASUREMENT_CLAIM_POS 3 /* 3 bit */ - -#define GET_IAS_MODULE(tlv_type) (GET_MINOR(tlv_type) >> MODULE_POS) -#define GET_IAS_CLAIM(tlv_type) (GET_MINOR(tlv_type) & CLAIM_MASK) -#define SET_IAS_MINOR(sw_module, claim) (((sw_module) << 6) | (claim)) - -#define GET_IAS_MEASUREMENT_CLAIM(ias_claim) ((ias_claim) >> \ - MEASUREMENT_CLAIM_POS) - -/* Magic value which marks the beginning of shared data area in memory */ -#define SHARED_DATA_TLV_INFO_MAGIC 0x2016 - -/** - * Shared data TLV header. All fields in little endian. - * - * ----------------------------------- - * | tlv_magic(16) | tlv_tot_len(16) | - * ----------------------------------- - */ -struct shared_data_tlv_header { - uint16_t tlv_magic; - uint16_t tlv_tot_len; /* size of whole TLV area (including this header) */ -}; - -#define SHARED_DATA_HEADER_SIZE sizeof(struct shared_data_tlv_header) - -/** - * Shared data TLV entry header format. All fields in little endian. - * - * ------------------------------- - * | tlv_type(16) | tlv_len(16) | - * ------------------------------- - * | Raw data | - * ------------------------------- - */ -struct shared_data_tlv_entry { - uint16_t tlv_type; - uint16_t tlv_len; /* size of single TLV entry (including this header). */ -}; - -/** - * \struct tfm_boot_data - * - * \brief Store the data for the runtime SW - */ -struct tfm_boot_data { - struct shared_data_tlv_header header; - uint8_t data[]; -}; - -#define SHARED_DATA_ENTRY_HEADER_SIZE sizeof(struct shared_data_tlv_entry) -#define SHARED_DATA_ENTRY_SIZE(size) (size + SHARED_DATA_ENTRY_HEADER_SIZE) - -#ifdef __cplusplus -} -#endif - -#endif /* __TFM_BOOT_STATUS_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_partition_defs.inc b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_partition_defs.inc deleted file mode 100644 index 042c2a97f80..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_partition_defs.inc +++ /dev/null @@ -1,68 +0,0 @@ -/* Copyright (c) 2017-2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version 1.1 - ******************************************************************************/ - -#ifndef __TFM_PARTITION_DEFS_INC__ -#define __TFM_PARTITION_DEFS_INC__ - -/*************************** Service Partitions *******************************/ - -#define ATTEST_SRV_ID (TFM_SP_BASE + 0) -#define CRYPTO_SRV_ID (TFM_SP_BASE + 1) -#define PLATFORM_ID (TFM_SP_BASE + 2) -#define ITS_ID (TFM_SP_BASE + 3) - -/*************************** Test Partitions **********************************/ - -#ifdef USE_PSA_TEST_PARTITIONS - -#ifdef USE_CRYPTO_ACL_TEST -#define CRYPTO_ACL_TEST_ID (TFM_SP_BASE + 4 + 0) -#endif - -#ifdef USE_CLIENT_TESTS_PART1 -#define CLIENT_TESTS_PART1_ID (TFM_SP_BASE + 4 + 1) -#endif - -#ifdef USE_SERVER_TESTS_PART1 -#define SERVER_TESTS_PART1_ID (TFM_SP_BASE + 4 + 2) -#endif - -#ifdef USE_SERVER_TESTS_PART2 -#define SERVER_TESTS_PART2_ID (TFM_SP_BASE + 4 + 3) -#endif - -#ifdef USE_SMOKE_TESTS_PART1 -#define SMOKE_TESTS_PART1_ID (TFM_SP_BASE + 4 + 4) -#endif - -#endif // USE_PSA_TEST_PARTITIONS - -#ifdef USE_PSA_TEST_PARTITIONS -#define TFM_MAX_USER_PARTITIONS (4 + 5) -#else -#define TFM_MAX_USER_PARTITIONS (4) -#endif - -#endif // __TFM_PARTITION_DEFS_INC__ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_partition_list.inc b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_partition_list.inc deleted file mode 100644 index 2a66f265ab5..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_partition_list.inc +++ /dev/null @@ -1,107 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version 1.1 - ******************************************************************************/ - -#ifndef __TFM_PARTITION_LIST_INC__ -#define __TFM_PARTITION_LIST_INC__ - -/*************************** Service Partitions *******************************/ -/* ----------------------------------------------------------------------------- - * ATTEST_SRV - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE(ATTEST_SRV, 0 - | SPM_PART_FLAG_IPC - , "APPLICATION-ROT", 37, NORMAL, 8192); -PARTITION_ADD_INIT_FUNC(ATTEST_SRV, attest_main); - -/* ----------------------------------------------------------------------------- - * CRYPTO_SRV - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE(CRYPTO_SRV, 0 - | SPM_PART_FLAG_IPC - , "APPLICATION-ROT", 35, NORMAL, 16384); -PARTITION_ADD_INIT_FUNC(CRYPTO_SRV, crypto_main); - -/* ----------------------------------------------------------------------------- - * PLATFORM - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE(PLATFORM, 0 - | SPM_PART_FLAG_IPC - , "APPLICATION-ROT", 8, NORMAL, 1024); -PARTITION_ADD_INIT_FUNC(PLATFORM, platform_partition_entry); - -/* ----------------------------------------------------------------------------- - * ITS - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE(ITS, 0 - | SPM_PART_FLAG_IPC - , "APPLICATION-ROT", 10, NORMAL, 2048); -PARTITION_ADD_INIT_FUNC(ITS, its_entry); - -/*************************** Test Partitions **********************************/ -#ifdef USE_PSA_TEST_PARTITIONS - -#ifdef USE_CRYPTO_ACL_TEST -/* ----------------------------------------------------------------------------- - * CRYPTO_ACL_TEST - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE(CRYPTO_ACL_TEST, 0 - | SPM_PART_FLAG_IPC - , "APPLICATION-ROT", 128, NORMAL, 512); -PARTITION_ADD_INIT_FUNC(CRYPTO_ACL_TEST, test_partition_main); -#endif // USE_CRYPTO_ACL_TEST - -#ifdef USE_CLIENT_TESTS_PART1 -/* ----------------------------------------------------------------------------- - * CLIENT_TESTS_PART1 - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE(CLIENT_TESTS_PART1, 0 - | SPM_PART_FLAG_IPC - , "APPLICATION-ROT", 1, NORMAL, 1024); -PARTITION_ADD_INIT_FUNC(CLIENT_TESTS_PART1, client_part_main); -#endif // USE_CLIENT_TESTS_PART1 - -#ifdef USE_SERVER_TESTS_PART1 -/* ----------------------------------------------------------------------------- - * SERVER_TESTS_PART1 - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE(SERVER_TESTS_PART1, 0 - | SPM_PART_FLAG_IPC - , "APPLICATION-ROT", 2, NORMAL, 1024); -PARTITION_ADD_INIT_FUNC(SERVER_TESTS_PART1, server_part1_main); -#endif // USE_SERVER_TESTS_PART1 - -#ifdef USE_SERVER_TESTS_PART2 -/* ----------------------------------------------------------------------------- - * SERVER_TESTS_PART2 - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE(SERVER_TESTS_PART2, 0 - | SPM_PART_FLAG_IPC - , "APPLICATION-ROT", 3, NORMAL, 1024); -PARTITION_ADD_INIT_FUNC(SERVER_TESTS_PART2, server_part2_main); -#endif // USE_SERVER_TESTS_PART2 - -#ifdef USE_SMOKE_TESTS_PART1 -/* ----------------------------------------------------------------------------- - * SMOKE_TESTS_PART1 - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE(SMOKE_TESTS_PART1, 0 - | SPM_PART_FLAG_IPC - , "APPLICATION-ROT", 4, NORMAL, 512); -PARTITION_ADD_INIT_FUNC(SMOKE_TESTS_PART1, smoke_part_main); -#endif // USE_SMOKE_TESTS_PART1 - -#endif // USE_PSA_TEST_PARTITIONS - -#endif // __TFM_PARTITION_LIST_INC__ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_service_list.inc b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_service_list.inc deleted file mode 100644 index 1248107af72..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_service_list.inc +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version 1.1 - ******************************************************************************/ - -#ifndef __TFM_SERVICE_LIST_INC__ -#define __TFM_SERVICE_LIST_INC__ - -/*************************** Service Partitions *******************************/ -/* ----------------------------------------------------------------------------- - * ATTEST_SRV Services - * -------------------------------------------------------------------------- */ -{"PSA_ATTEST_GET_TOKEN_ID", ATTEST_SRV_ID, PSA_ATTEST_GET_TOKEN, 0x00000F10, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_ATTEST_GET_TOKEN_SIZE_ID", ATTEST_SRV_ID, PSA_ATTEST_GET_TOKEN_SIZE, 0x00000F11, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_ATTEST_INJECT_KEY_ID", ATTEST_SRV_ID, PSA_ATTEST_INJECT_KEY, 0x00000F12, true, 1, TFM_VERSION_POLICY_STRICT}, - -/* ----------------------------------------------------------------------------- - * CRYPTO_SRV Services - * -------------------------------------------------------------------------- */ -{"PSA_CRYPTO_INIT_ID", CRYPTO_SRV_ID, PSA_CRYPTO_INIT, 0x00000F00, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_MAC_ID", CRYPTO_SRV_ID, PSA_MAC, 0x00000F01, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_HASH_ID", CRYPTO_SRV_ID, PSA_HASH, 0x00000F02, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_ASYMMETRIC_ID", CRYPTO_SRV_ID, PSA_ASYMMETRIC, 0x00000F03, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_SYMMETRIC_ID", CRYPTO_SRV_ID, PSA_SYMMETRIC, 0x00000F04, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_AEAD_ID", CRYPTO_SRV_ID, PSA_AEAD, 0x00000F05, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_KEY_MNG_ID", CRYPTO_SRV_ID, PSA_KEY_MNG, 0x00000F06, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_RNG_ID", CRYPTO_SRV_ID, PSA_RNG, 0x00000F07, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_CRYPTO_FREE_ID", CRYPTO_SRV_ID, PSA_CRYPTO_FREE, 0x00000F08, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_KEY_DERIVATION_ID", CRYPTO_SRV_ID, PSA_KEY_DERIVATION, 0x00000F09, true, 1, TFM_VERSION_POLICY_STRICT}, -{"PSA_ENTROPY_ID", CRYPTO_SRV_ID, PSA_ENTROPY_INJECT, 0x00000F0A, true, 1, TFM_VERSION_POLICY_STRICT}, - -/* ----------------------------------------------------------------------------- - * PLATFORM Services - * -------------------------------------------------------------------------- */ -{"PSA_PLATFORM_LC_GET", PLATFORM_ID, PSA_PLATFORM_LC_GET_MSK, 0x00011000, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"PSA_PLATFORM_LC_SET", PLATFORM_ID, PSA_PLATFORM_LC_SET_MSK, 0x00011001, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"PSA_PLATFORM_SYSTEM_RESET", PLATFORM_ID, PSA_PLATFORM_SYSTEM_RESET_MSK, 0x00011002, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"PSA_PLATFORM_IOCTL", PLATFORM_ID, PSA_PLATFORM_IOCTL_MSK, 0x00011003, true, 1, TFM_VERSION_POLICY_RELAXED}, - -/* ----------------------------------------------------------------------------- - * ITS Services - * -------------------------------------------------------------------------- */ -{"PSA_ITS_GET", ITS_ID, PSA_ITS_GET_MSK, 0x00011A00, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"PSA_ITS_SET", ITS_ID, PSA_ITS_SET_MSK, 0x00011A01, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"PSA_ITS_INFO", ITS_ID, PSA_ITS_INFO_MSK, 0x00011A02, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"PSA_ITS_REMOVE", ITS_ID, PSA_ITS_REMOVE_MSK, 0x00011A03, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"PSA_ITS_RESET", ITS_ID, PSA_ITS_RESET_MSK, 0x00011A04, false, 1, TFM_VERSION_POLICY_RELAXED}, - -/*************************** Test Partitions **********************************/ -#ifdef USE_PSA_TEST_PARTITIONS - -#ifdef USE_CRYPTO_ACL_TEST -/* ----------------------------------------------------------------------------- - * CRYPTO_ACL_TEST Services - * -------------------------------------------------------------------------- */ -{"CRYPTO_GENERATE_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_GENERATE_KEY_MSK, 0x00000201, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"CRYPTO_OPEN_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_OPEN_KEY_MSK, 0x00000202, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"CRYPTO_CLOSE_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_CLOSE_KEY_MSK, 0x00000203, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"CRYPTO_DESTROY_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_DESTROY_KEY_MSK, 0x00000205, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"CRYPTO_GET_KEY_ATTRIBUTES", CRYPTO_ACL_TEST_ID, CRYPTO_GET_KEY_ATTRIBUTES_MSK, 0x00000206, true, 1, TFM_VERSION_POLICY_RELAXED}, -{"CRYPTO_IMPORT_KEY", CRYPTO_ACL_TEST_ID, CRYPTO_IMPORT_KEY_MSK, 0x00000208, true, 1, TFM_VERSION_POLICY_RELAXED}, -#endif // USE_CRYPTO_ACL_TEST - -#ifdef USE_CLIENT_TESTS_PART1 -/* ----------------------------------------------------------------------------- - * CLIENT_TESTS_PART1 Services - * -------------------------------------------------------------------------- */ -{"CLIENT_TESTS_PART1_ROT_SRV1", CLIENT_TESTS_PART1_ID, PART1_ROT_SRV1_MSK, 0x00001A05, true, 5, TFM_VERSION_POLICY_RELAXED}, -{"CLIENT_TESTS_PART1_DROP_CONN", CLIENT_TESTS_PART1_ID, DROP_CONN_MSK, 0x00001A06, true, 5, TFM_VERSION_POLICY_RELAXED}, -{"CLIENT_TESTS_PART1_SECURE_CLIENTS_ONLY", CLIENT_TESTS_PART1_ID, SECURE_CLIENTS_ONLY_MSK, 0x00001A07, false, 5, TFM_VERSION_POLICY_RELAXED}, -#endif // USE_CLIENT_TESTS_PART1 - -#ifdef USE_SERVER_TESTS_PART1 -/* ----------------------------------------------------------------------------- - * SERVER_TESTS_PART1 Services - * -------------------------------------------------------------------------- */ -{"SERVER_TESTS_PART1_CONTROL", SERVER_TESTS_PART1_ID, CONTROL_MSK, 0x00001A01, true, 5, TFM_VERSION_POLICY_RELAXED}, -{"SERVER_TESTS_PART1_TEST", SERVER_TESTS_PART1_ID, TEST_MSK, 0x00001A02, true, 12, TFM_VERSION_POLICY_STRICT}, -#endif // USE_SERVER_TESTS_PART1 - -#ifdef USE_SERVER_TESTS_PART2 -/* ----------------------------------------------------------------------------- - * SERVER_TESTS_PART2 Services - * -------------------------------------------------------------------------- */ -{"SERVER_TESTS_PART2_ROT_SRV_REVERSE", SERVER_TESTS_PART2_ID, ROT_SRV_REVERSE_MSK, 0x00001A03, false, 5, TFM_VERSION_POLICY_STRICT}, -{"SERVER_TESTS_PART2_ROT_SRV_DB_TST", SERVER_TESTS_PART2_ID, ROT_SRV_DB_TST_MSK, 0x00001A04, false, 5, TFM_VERSION_POLICY_STRICT}, -#endif // USE_SERVER_TESTS_PART2 - -#ifdef USE_SMOKE_TESTS_PART1 -/* ----------------------------------------------------------------------------- - * SMOKE_TESTS_PART1 Services - * -------------------------------------------------------------------------- */ -{"SMOKE_TESTS_PART1_ROT_SRV1", SMOKE_TESTS_PART1_ID, ROT_SRV1_MSK, 0x00001A00, true, 5, TFM_VERSION_POLICY_RELAXED}, -#endif // USE_SMOKE_TESTS_PART1 - -#endif // USE_PSA_TEST_PARTITIONS - -#endif // __TFM_SERVICE_LIST_INC__ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_spm_signal_defs.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_spm_signal_defs.h deleted file mode 100644 index be52471c555..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/inc/tfm_spm_signal_defs.h +++ /dev/null @@ -1,145 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version 1.1 - ******************************************************************************/ - -#ifndef __TFM_SPM_SIGNAL_DEFS_H__ -#define __TFM_SPM_SIGNAL_DEFS_H__ - -/*************************** Service Partitions *******************************/ -/* ----------------------------------------------------------------------------- - * ATTEST_SRV Signals - * -------------------------------------------------------------------------- */ -#define PSA_ATTEST_GET_TOKEN_POS (4UL) -#define PSA_ATTEST_GET_TOKEN (1UL << PSA_ATTEST_GET_TOKEN_POS) -#define PSA_ATTEST_GET_TOKEN_SIZE_POS (5UL) -#define PSA_ATTEST_GET_TOKEN_SIZE (1UL << PSA_ATTEST_GET_TOKEN_SIZE_POS) -#define PSA_ATTEST_INJECT_KEY_POS (6UL) -#define PSA_ATTEST_INJECT_KEY (1UL << PSA_ATTEST_INJECT_KEY_POS) - -/* ----------------------------------------------------------------------------- - * CRYPTO_SRV Signals - * -------------------------------------------------------------------------- */ -#define PSA_CRYPTO_INIT_POS (4UL) -#define PSA_CRYPTO_INIT (1UL << PSA_CRYPTO_INIT_POS) -#define PSA_MAC_POS (5UL) -#define PSA_MAC (1UL << PSA_MAC_POS) -#define PSA_HASH_POS (6UL) -#define PSA_HASH (1UL << PSA_HASH_POS) -#define PSA_ASYMMETRIC_POS (7UL) -#define PSA_ASYMMETRIC (1UL << PSA_ASYMMETRIC_POS) -#define PSA_SYMMETRIC_POS (8UL) -#define PSA_SYMMETRIC (1UL << PSA_SYMMETRIC_POS) -#define PSA_AEAD_POS (9UL) -#define PSA_AEAD (1UL << PSA_AEAD_POS) -#define PSA_KEY_MNG_POS (10UL) -#define PSA_KEY_MNG (1UL << PSA_KEY_MNG_POS) -#define PSA_RNG_POS (11UL) -#define PSA_RNG (1UL << PSA_RNG_POS) -#define PSA_CRYPTO_FREE_POS (12UL) -#define PSA_CRYPTO_FREE (1UL << PSA_CRYPTO_FREE_POS) -#define PSA_KEY_DERIVATION_POS (13UL) -#define PSA_KEY_DERIVATION (1UL << PSA_KEY_DERIVATION_POS) -#define PSA_ENTROPY_INJECT_POS (14UL) -#define PSA_ENTROPY_INJECT (1UL << PSA_ENTROPY_INJECT_POS) - -/* ----------------------------------------------------------------------------- - * PLATFORM Signals - * -------------------------------------------------------------------------- */ -#define PSA_PLATFORM_LC_GET_MSK_POS (4UL) -#define PSA_PLATFORM_LC_GET_MSK (1UL << PSA_PLATFORM_LC_GET_MSK_POS) -#define PSA_PLATFORM_LC_SET_MSK_POS (5UL) -#define PSA_PLATFORM_LC_SET_MSK (1UL << PSA_PLATFORM_LC_SET_MSK_POS) -#define PSA_PLATFORM_SYSTEM_RESET_MSK_POS (6UL) -#define PSA_PLATFORM_SYSTEM_RESET_MSK (1UL << PSA_PLATFORM_SYSTEM_RESET_MSK_POS) -#define PSA_PLATFORM_IOCTL_MSK_POS (7UL) -#define PSA_PLATFORM_IOCTL_MSK (1UL << PSA_PLATFORM_IOCTL_MSK_POS) - -/* ----------------------------------------------------------------------------- - * ITS Signals - * -------------------------------------------------------------------------- */ -#define PSA_ITS_GET_MSK_POS (4UL) -#define PSA_ITS_GET_MSK (1UL << PSA_ITS_GET_MSK_POS) -#define PSA_ITS_SET_MSK_POS (5UL) -#define PSA_ITS_SET_MSK (1UL << PSA_ITS_SET_MSK_POS) -#define PSA_ITS_INFO_MSK_POS (6UL) -#define PSA_ITS_INFO_MSK (1UL << PSA_ITS_INFO_MSK_POS) -#define PSA_ITS_REMOVE_MSK_POS (7UL) -#define PSA_ITS_REMOVE_MSK (1UL << PSA_ITS_REMOVE_MSK_POS) -#define PSA_ITS_RESET_MSK_POS (8UL) -#define PSA_ITS_RESET_MSK (1UL << PSA_ITS_RESET_MSK_POS) - -/*************************** Test Partitions **********************************/ -#ifdef USE_PSA_TEST_PARTITIONS - -#ifdef USE_CRYPTO_ACL_TEST -/* ----------------------------------------------------------------------------- - * CRYPTO_ACL_TEST Signals - * -------------------------------------------------------------------------- */ -#define CRYPTO_GENERATE_KEY_MSK_POS (4UL) -#define CRYPTO_GENERATE_KEY_MSK (1UL << CRYPTO_GENERATE_KEY_MSK_POS) -#define CRYPTO_OPEN_KEY_MSK_POS (5UL) -#define CRYPTO_OPEN_KEY_MSK (1UL << CRYPTO_OPEN_KEY_MSK_POS) -#define CRYPTO_CLOSE_KEY_MSK_POS (6UL) -#define CRYPTO_CLOSE_KEY_MSK (1UL << CRYPTO_CLOSE_KEY_MSK_POS) -#define CRYPTO_DESTROY_KEY_MSK_POS (7UL) -#define CRYPTO_DESTROY_KEY_MSK (1UL << CRYPTO_DESTROY_KEY_MSK_POS) -#define CRYPTO_GET_KEY_ATTRIBUTES_MSK_POS (8UL) -#define CRYPTO_GET_KEY_ATTRIBUTES_MSK (1UL << CRYPTO_GET_KEY_ATTRIBUTES_MSK_POS) -#define CRYPTO_IMPORT_KEY_MSK_POS (9UL) -#define CRYPTO_IMPORT_KEY_MSK (1UL << CRYPTO_IMPORT_KEY_MSK_POS) -#endif // USE_CRYPTO_ACL_TEST - -#ifdef USE_CLIENT_TESTS_PART1 -/* ----------------------------------------------------------------------------- - * CLIENT_TESTS_PART1 Signals - * -------------------------------------------------------------------------- */ -#define PART1_ROT_SRV1_MSK_POS (4UL) -#define PART1_ROT_SRV1_MSK (1UL << PART1_ROT_SRV1_MSK_POS) -#define DROP_CONN_MSK_POS (5UL) -#define DROP_CONN_MSK (1UL << DROP_CONN_MSK_POS) -#define SECURE_CLIENTS_ONLY_MSK_POS (6UL) -#define SECURE_CLIENTS_ONLY_MSK (1UL << SECURE_CLIENTS_ONLY_MSK_POS) -#endif // USE_CLIENT_TESTS_PART1 - -#ifdef USE_SERVER_TESTS_PART1 -/* ----------------------------------------------------------------------------- - * SERVER_TESTS_PART1 Signals - * -------------------------------------------------------------------------- */ -#define CONTROL_MSK_POS (4UL) -#define CONTROL_MSK (1UL << CONTROL_MSK_POS) -#define TEST_MSK_POS (5UL) -#define TEST_MSK (1UL << TEST_MSK_POS) -#endif // USE_SERVER_TESTS_PART1 - -#ifdef USE_SERVER_TESTS_PART2 -/* ----------------------------------------------------------------------------- - * SERVER_TESTS_PART2 Signals - * -------------------------------------------------------------------------- */ -#define ROT_SRV_REVERSE_MSK_POS (4UL) -#define ROT_SRV_REVERSE_MSK (1UL << ROT_SRV_REVERSE_MSK_POS) -#define ROT_SRV_DB_TST_MSK_POS (5UL) -#define ROT_SRV_DB_TST_MSK (1UL << ROT_SRV_DB_TST_MSK_POS) -#endif // USE_SERVER_TESTS_PART2 - -#ifdef USE_SMOKE_TESTS_PART1 -/* ----------------------------------------------------------------------------- - * SMOKE_TESTS_PART1 Signals - * -------------------------------------------------------------------------- */ -#define ROT_SRV1_MSK_POS (4UL) -#define ROT_SRV1_MSK (1UL << ROT_SRV1_MSK_POS) -#endif // USE_SMOKE_TESTS_PART1 - -#endif // USE_PSA_TEST_PARTITIONS - -#endif // __TFM_SPM_SIGNAL_DEFS_H__ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/mbed_lib.json b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/mbed_lib.json deleted file mode 100644 index 90222c7d0c6..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/mbed_lib.json +++ /dev/null @@ -1,11 +0,0 @@ -{ - "name": "tfm-s", - "macros": ["MBED_FAULT_HANDLER_DISABLED"], - "config": { - "max_ns_thread_count": { - "help": "maximum allowed number of non-secure threads", - "macro_name": "TFM_MAX_NS_THREAD_COUNT", - "value": 10 - } - } -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/platform/include/tfm_spm_hal.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/platform/include/tfm_spm_hal.h deleted file mode 100644 index 3ce0b29b199..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/platform/include/tfm_spm_hal.h +++ /dev/null @@ -1,190 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_SPM_HAL_H__ -#define __TFM_SPM_HAL_H__ - -#include -#include "tfm_secure_api.h" -#include "spm_api.h" - -/** - * \brief Holds peripheral specific data fields required to manage the - * peripherals isolation - * - * This structure has to be defined in the platform directory, and may have - * different definition for each platform. The structure should contain fields - * that describe the peripheral for the functions that are prototyped in this - * file and are responsible for configuring the isolation of the peripherals. - * - * Pointers to structures of this type are managed by the SPM, and passed to the - * necessary function on isolation request. The pointers are also defined by the - * platform in the header file tfm_peripherals_def.h. For details on this, see - * the documentation of that file. - */ -struct tfm_spm_partition_platform_data_t; - -#if defined (TFM_PSA_API) || (TFM_LVL != 1) -/** - * \brief Holds SPM db fields that define the memory regions used by a - * partition. - */ -struct tfm_spm_partition_memory_data_t -{ - uint32_t code_start; /*!< Start of the code memory of this partition. */ - uint32_t code_limit; /*!< Address of the byte beyond the end of the code - * memory of this partition. - */ - uint32_t ro_start; /*!< Start of the read only memory of this - * partition. - */ - uint32_t ro_limit; /*!< Address of the byte beyond the end of the read - * only memory of this partition. - */ - uint32_t rw_start; /*!< Start of the data region of this partition. */ - uint32_t rw_limit; /*!< Address of the byte beyond the end of the data - * region of this partition. - */ - uint32_t zi_start; /*!< Start of the zero initialised data region of - * this partition. - */ - uint32_t zi_limit; /*!< Address of the byte beyond the end of the zero - * initialised region of this partition. - */ - uint32_t stack_bottom; /*!< The bottom of the stack for the partition. */ - uint32_t stack_top; /*!< The top of the stack for the partition. */ -}; -#endif - -/** - * \brief This function initialises the HW used for isolation, and sets the - * default configuration for them. - * - * This function is called during TF-M core early startup, before DB init - */ -void tfm_spm_hal_init_isolation_hw(void); - -/** - * \brief This function initialises the HW used for isolation, and sets the - * default configuration for them. - * This function is called during TF-M core early startup, after DB init - */ -void tfm_spm_hal_setup_isolation_hw(void); - -/** - * \brief Configure peripherals for a partition based on the platfotm data from - * the DB - * - * This function is called during partition initialisation (before calling the - * init function for the partition) - * - * \param[in] platform_data The platform fields of the partition DB record to - * be used for configuration. Can be NULL. - */ -void tfm_spm_hal_configure_default_isolation( - const struct tfm_spm_partition_platform_data_t *platform_data); -/** - * \brief Configures the system debug properties. - * The default configuration of this function should disable secure debug - * when either DAUTH_NONE or DAUTH_NS_ONLY define is set. It is up to the - * platform owner to decide if secure debug can be turned on in their - * system, if DAUTH_FULL define is present. - * The DAUTH_CHIP_DEFAULT define should not be considered a safe default - * option unless explicitly noted by the chip vendor. - * The implementation has to expect that one of those defines is going to - * be set. Otherwise, a compile error needs to be triggered. - */ -void tfm_spm_hal_init_debug(void); - -/** - * \brief Enables the fault handlers - */ -void enable_fault_handlers(void); - -/** - * \brief Configures the system reset request properties - */ -void system_reset_cfg(void); - -/** - * \brief Configures all external interrupts to target the - * NS state, apart for the ones associated to secure - * peripherals (plus MPC and PPC) - */ -void nvic_interrupt_target_state_cfg(void); - -/** - * \brief This function enable the interrupts associated - * to the secure peripherals (plus the isolation boundary violation - * interrupts) - */ -void nvic_interrupt_enable(void); - -/** - * \brief Get the VTOR value of non-secure image - * - * \return Returns the address where the vector table of the non-secure image - * is located - */ -uint32_t tfm_spm_hal_get_ns_VTOR(void); - -/** - * \brief Get the initial address of non-secure image main stack - * - * \return Returns the initial non-secure MSP - */ -uint32_t tfm_spm_hal_get_ns_MSP(void); - -/** - * \brief Get the entry point of the non-secure image - * - * \return Returns the address of the non-secure image entry point - */ -uint32_t tfm_spm_hal_get_ns_entry_point(void); - - -#if (TFM_LVL != 1) && !defined(TFM_PSA_API) -/** - * \brief Configure the sandbox for a partition. - * - * \param[in] memory_data The memory ranges from the partition DB for this - * partition - * \param[in] platform_data The platform fields of the partition DB record - * for this partition. Can be NULL. - * - * \return Returns the result operation as per \ref spm_err_t - */ -enum spm_err_t tfm_spm_hal_partition_sandbox_config( - const struct tfm_spm_partition_memory_data_t *memory_data, - const struct tfm_spm_partition_platform_data_t *platform_data); - -/** - * \brief Deconfigure the sandbox for a partition. - * - * \param[in] memory_data The memory ranges from the partition DB for this - * partition - * \param[in] platform_data The platform fields of the partition DB record - * for this partition. Can be NULL. - * - * \return Returns the result operation as per \ref spm_err_t - */ -enum spm_err_t tfm_spm_hal_partition_sandbox_deconfig( - const struct tfm_spm_partition_memory_data_t *memory_data, - const struct tfm_spm_partition_platform_data_t *platform_data); - -/** - * \brief Set the share region mode - * - * \param[in] share The mode to set - * - * \return Returns the result operation as per \ref spm_err_t - */ -enum spm_err_t tfm_spm_hal_set_share_region( - enum tfm_buffer_share_region_e share); -#endif - -#endif /* __TFM_SPM_HAL_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/dir_core.dox b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/dir_core.dox deleted file mode 100644 index a8da84823bb..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/dir_core.dox +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -//This file holds description for the current directory. This documentation -//will be included in the Doxygen output. - -/*! -\dir -\brief Source code for the TF-M core. -\details This directory holds the source code of the "TF-M core" module. - -*/ \ No newline at end of file diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_arch_v8m.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_arch_v8m.h deleted file mode 100644 index 96914c07469..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_arch_v8m.h +++ /dev/null @@ -1,66 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_ARCH_V8M_H__ -#define __TFM_ARCH_V8M_H__ - -#include "cmsis.h" - -#define XPSR_T32 0x01000000 -#define LR_UNPRIVILEGED 0xfffffffd - -/* This header file collects the ARCH related operations. */ -struct tfm_state_context_base { - uint32_t r0; - uint32_t r1; - uint32_t r2; - uint32_t r3; - uint32_t r12; - uint32_t ra_lr; - uint32_t ra; - uint32_t xpsr; -}; - -struct tfm_state_context_ext { - uint32_t r4; - uint32_t r5; - uint32_t r6; - uint32_t r7; - uint32_t r8; - uint32_t r9; - uint32_t r10; - uint32_t r11; - uint32_t sp; - uint32_t sp_limit; - uint32_t dummy; - uint32_t lr; -}; - -struct tfm_state_context { - struct tfm_state_context_ext ctxb; -}; - -#define TFM_STATE_1ST_ARG(ctx) \ - (((struct tfm_state_context_base *)(ctx)->ctxb.sp)->r0) -#define TFM_STATE_2ND_ARG(ctx) \ - (((struct tfm_state_context_base *)(ctx)->ctxb.sp)->r1) -#define TFM_STATE_3RD_ARG(ctx) \ - (((struct tfm_state_context_base *)(ctx)->ctxb.sp)->r2) -#define TFM_STATE_4TH_ARG(ctx) \ - (((struct tfm_state_context_base *)(ctx)->ctxb.sp)->r3) -#define TFM_STATE_RET_VAL(ctx) \ - (((struct tfm_state_context_base *)(ctx)->ctxb.sp)->r0) - -__STATIC_INLINE void tfm_trigger_pendsv(void) -{ - SCB->ICSR = SCB_ICSR_PENDSVSET_Msk; -} - -void tfm_initialize_context(struct tfm_state_context *ctx, - uint32_t r0, uint32_t ra, - uint32_t sp, uint32_t sp_limit); - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_internal_defines.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_internal_defines.h deleted file mode 100644 index a5382c57805..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_internal_defines.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (c) 2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_INTERNAL_DEFINES_H__ -#define __TFM_INTERNAL_DEFINES_H__ - -/* IPC internal return status */ -#define IPC_SUCCESS 0 -#define IPC_ERROR_BAD_PARAMETERS (INT32_MIN) -#define IPC_ERROR_SHORT_BUFFER (INT32_MIN + 1) -#define IPC_ERROR_VERSION (INT32_MIN + 2) -#define IPC_ERROR_MEMORY_CHECK (INT32_MIN + 3) -#define IPC_ERROR_GENERIC (INT32_MIN + 0x1F) - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_list.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_list.h deleted file mode 100644 index 976450362e7..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_list.h +++ /dev/null @@ -1,98 +0,0 @@ -/* - * Copyright (c) 2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_LIST_H__ -#define __TFM_LIST_H__ - -/* List structure */ -struct tfm_list_node_t { - struct tfm_list_node_t *prev; - struct tfm_list_node_t *next; -}; - -/** - * \brief Initialize list head. - * - * \param[in] head List head need to be initialized. - */ -__STATIC_INLINE void tfm_list_init(struct tfm_list_node_t *head) -{ - head->next = head; - head->prev = head; -} - -/** - * \brief Add one node to list tail. - * - * \param[in] head List head initialized by \ref tfm_list_init. - * \param[in] node List node want to be added. - */ -__STATIC_INLINE void -tfm_list_add_tail(struct tfm_list_node_t *head, struct tfm_list_node_t *node) -{ - head->prev->next = node; - node->prev = head->prev; - head->prev = node; - node->next = head; -} - -/** - * \brief Check if a list is empty. - * - * \param[in] head List head initialized by \ref tfm_list_init. - * - * \returns returns 1 for empty, or 0 for not. - */ -__STATIC_INLINE int32_t tfm_list_is_empty(struct tfm_list_node_t *head) -{ - return (head->next == head); -} - -/** - * \brief Insert one node to list head. - * - * \param[in] head List head initialized by \ref tfm_list_init. - * \param[in] node List node want to be inserted. - */ -__STATIC_INLINE void -tfm_list_insert_first(struct tfm_list_node_t *head, - struct tfm_list_node_t *node) -{ - node->next = head->next; - node->prev = head; - head->next->prev = node; - head->next = node; -} - -/** - * \brief Retrieve the fist node from list. - * - * \param[in] head List head initialized by \ref tfm_list_init. - * - * \returns Returns the pointer to first list node. - */ -__STATIC_INLINE -struct tfm_list_node_t *tfm_list_first_node(struct tfm_list_node_t *head) -{ - return head->next; -} - -/** - * \brief Delete one node from list. - * - * \param[in] node List node want to be deleted. - */ -__STATIC_INLINE void tfm_list_del_node(struct tfm_list_node_t *node) -{ - node->prev->next = node->next; - node->next->prev = node->prev; -} - -/* Go through each node of a list */ -#define TFM_LIST_FOR_EACH(node, head) \ - for (node = (head)->next; node != head; node = node->next) - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_message_queue.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_message_queue.h deleted file mode 100644 index 44f5af44bf5..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_message_queue.h +++ /dev/null @@ -1,68 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_MESSAGE_QUEUE_H__ -#define __TFM_MESSAGE_QUEUE_H__ - -#ifndef TFM_MSG_QUEUE_MAX_MSG_NUM -#define TFM_MSG_QUEUE_MAX_MSG_NUM 128 -#endif -#define TFM_MSG_MAGIC 0x15154343 -/* Message struct to collect parameter from client */ -struct tfm_msg_body_t { - int32_t magic; - struct tfm_spm_service_t *service; /* RoT service pointer */ - psa_handle_t handle; /* Connected Service handle */ - struct tfm_event_t ack_evnt; /* Event for ack reponse */ - psa_msg_t msg; /* PSA message body */ - psa_invec invec[PSA_MAX_IOVEC]; /* Put in/out vectors in msg body */ - psa_outvec outvec[PSA_MAX_IOVEC]; - psa_outvec *caller_outvec; /* - * Save caller outvec pointer for - * write length update - */ - struct tfm_msg_body_t *next; /* List operators */ -}; - -struct tfm_msg_queue_t { - struct tfm_msg_body_t *head; /* Queue head */ - struct tfm_msg_body_t *tail; /* Queue tail */ - uint32_t size; /* Number of the queue member */ -}; - -/** - * \brief Enqueue a message into message queue. - * - * \param[in] queue Message queue, it will be initialized - * if has not been initialized. - * \param[in] node Message queue node want to be enqueue. - * - * \retval IPC_SUCCESS Success. - * \retval IPC_ERROR_BAD_PARAMETERS Parameters error. - */ -int32_t tfm_msg_enqueue(struct tfm_msg_queue_t *queue, - struct tfm_msg_body_t *node); - -/** - * \brief Dequeue a message from message queue. - * - * \param[in] queue Message queue. - * - * \retval node pointer Success. - * \retval NULL Queue is NULL or size is zero. - */ -struct tfm_msg_body_t *tfm_msg_dequeue(struct tfm_msg_queue_t *queue); - -/** - * \brief Check if a message queue is empty. - * - * \param[in] queue Message queue. - * - * \returns Returns 1 for empty, or 0 for not. - */ -int32_t tfm_msg_queue_is_empty(struct tfm_msg_queue_t *queue); - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_pools.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_pools.h deleted file mode 100644 index 1072f78f0f5..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_pools.h +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_POOLS_H__ -#define __TFM_POOLS_H__ - -/* - * Resource pool - few known size resources allocation/free is required, - * so pool is more applicable than heap. - */ - -/* - * Pool Instance: - * [ Pool Instance ] + N * [ Pool Chunks ] - */ -struct tfm_pool_chunk_t { - struct tfm_list_node_t list; /* Chunk list */ - void *pool; /* Point to the parent pool */ - uint8_t data[0]; /* Data indicator */ -}; - -struct tfm_pool_instance_t { - size_t chunksz; /* Chunks size of pool member */ - struct tfm_list_node_t chunks_list; /* Chunk list head in pool */ - struct tfm_pool_chunk_t chunks[0]; /* Data indicator */ -}; - -/* - * This will declares a static memory pool variable with chunk memory. - * Parameters: - * name - Variable name, will be used when register - * chunksz - chunk size in bytes - * num - Number of chunks - */ -#define TFM_POOL_DECLARE(name, chunksz, num) \ - static uint8_t name##_pool_buf[((chunksz) + \ - sizeof(struct tfm_pool_chunk_t)) * (num) \ - + sizeof(struct tfm_pool_instance_t)] \ - __attribute__((aligned(4))); \ - static struct tfm_pool_instance_t *name = \ - (struct tfm_pool_instance_t *)name##_pool_buf - -/* Get the head size of memory pool */ -#define POOL_HEAD_SIZE (sizeof(struct tfm_pool_instance_t) + \ - sizeof(struct tfm_pool_chunk_t)) - -/* Get the whole size of memory pool */ -#define POOL_BUFFER_SIZE(name) sizeof(name##_pool_buf) - -/** - * \brief Register a memory pool. - * - * \param[in] pool Pointer to memory pool declared by - * \ref TFM_POOL_DECLARE - * \param[in] poolsz Size of the pool buffer. - * \param[in] chunksz Size of chunks. - * \param[in] num Number of chunks. - * - * \retval IPC_SUCCESS Success. - * \retval IPC_ERROR_BAD_PARAMETERS Parameters error. - */ -int32_t tfm_pool_init(struct tfm_pool_instance_t *pool, size_t poolsz, - size_t chunksz, size_t num); - -/** - * \brief Allocate a memory from pool. - * - * \param[in] pool pool pointer decleared by \ref TFM_POOL_DECLARE - * - * \retval buffer pointer Success. - * \retval NULL Failed. - */ -void *tfm_pool_alloc(struct tfm_pool_instance_t *pool); - -/** - * \brief Free the allocated memory. - * - * \param[in] ptr Buffer pointer want to free. - */ -void tfm_pool_free(void *ptr); - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_spm.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_spm.h deleted file mode 100644 index 82c25ebdd1e..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_spm.h +++ /dev/null @@ -1,326 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_SPM_H__ -#define __TFM_SPM_H__ - -#include -#include "tfm_list.h" -#include "tfm_secure_api.h" - -#ifndef TFM_SPM_MAX_ROT_SERV_NUM -#define TFM_SPM_MAX_ROT_SERV_NUM 28 -#endif -#define TFM_VERSION_POLICY_RELAXED 0 -#define TFM_VERSION_POLICY_STRICT 1 - -#ifndef TFM_CONN_HANDLE_MAX_NUM -#define TFM_CONN_HANDLE_MAX_NUM 32 -#endif - -/* RoT connection handle list */ -struct tfm_conn_handle_t { - psa_handle_t handle; /* Handle value */ - void *rhandle; /* Reverse handle value */ - struct tfm_list_node_t list; /* list node */ -}; - -/* Service database defined by manifest */ -struct tfm_spm_service_db_t { - char *name; /* Service name */ - uint32_t partition_id; /* Partition ID which service belong to */ - psa_signal_t signal; /* Service signal */ - uint32_t sid; /* Service identifier */ - bool non_secure_client; /* If can be called by non secure client */ - uint32_t minor_version; /* Minor version */ - uint32_t minor_policy; /* Minor version policy */ -}; - -/* RoT Service data */ -struct tfm_spm_service_t { - struct tfm_spm_service_db_t *service_db; /* Service database pointer */ - struct tfm_spm_ipc_partition_t *partition; /* - * Point to secure partition - * data - */ - struct tfm_list_node_t handle_list; /* Service handle list */ - struct tfm_msg_queue_t msg_queue; /* Message queue */ - struct tfm_list_node_t list; /* For list operation */ -}; - -/* - * FixMe: This structure is for IPC partition which is different with library - * mode partition. There needs to be an alignment for IPC partition database - * and library mode database. - */ -/* Secure Partition data */ -struct tfm_spm_ipc_partition_t { - int32_t index; /* Partition index */ - int32_t id; /* Secure partition ID */ - struct tfm_event_t signal_evnt; /* Event signal */ - uint32_t signals; /* Service signals had been triggered*/ - uint32_t signal_mask; /* Service signal mask passed by psa_wait() */ - struct tfm_list_node_t service_list;/* Service list */ -}; - -/*************************** Extended SPM functions **************************/ - -/** - * \brief Get the running partition ID. - * - * \return Returns the partition ID - */ -uint32_t tfm_spm_partition_get_running_partition_id_ext(void); - -/** - * \brief Get the current partition mode. - * - * \param[in] partition_idx Index of current partition - * - * \retval TFM_PARTITION_PRIVILEGED_MODE Privileged mode - * \retval TFM_PARTITION_UNPRIVILEGED_MODE Unprivileged mode - */ -uint32_t tfm_spm_partition_get_privileged_mode(uint32_t partition_idx); - -/******************** Service handle management functions ********************/ - -/** - * \brief Create connection handle for client connect - * - * \param[in] service Target service context pointer - * - * \retval PSA_NULL_HANDLE Create failed \ref PSA_NULL_HANDLE - * \retval >0 Service handle created, \ref psa_handle_t - */ -psa_handle_t tfm_spm_create_conn_handle(struct tfm_spm_service_t *service); - -/** - * \brief Free connection handle which not used anymore. - * - * \param[in] service Target service context pointer - * \param[in] conn_handle Connection handle created by - * tfm_spm_create_conn_handle(), \ref psa_handle_t - * - * \retval IPC_SUCCESS Success - * \retval IPC_ERROR_BAD_PARAMETERS Bad parameters input - * \retval "Does not return" Panic for not find service by handle - */ -int32_t tfm_spm_free_conn_handle(struct tfm_spm_service_t *service, - psa_handle_t conn_handle); - -/** - * \brief Set reverse handle value for connection. - * - * \param[in] service Target service context pointer - * \param[in] conn_handle Connection handle created by - * tfm_spm_create_conn_handle(), \ref psa_handle_t - * \param[in] rhandle rhandle need to save - * - * \retval IPC_SUCCESS Success - * \retval IPC_ERROR_BAD_PARAMETERS Bad parameters input - * \retval "Does not return" Panic for not find handle node - */ -int32_t tfm_spm_set_rhandle(struct tfm_spm_service_t *service, - psa_handle_t conn_handle, - void *rhandle); - -/** - * \brief Get reverse handle value from connection hanlde. - * - * \param[in] service Target service context pointer - * \param[in] conn_handle Connection handle created by - * tfm_spm_create_conn_handle(), \ref psa_handle_t - * - * \retval void * Success - * \retval "Does not return" Panic for those: - * service pointer are NULL - * hanlde is \ref PSA_NULL_HANDLE - * handle node does not be found - */ -void *tfm_spm_get_rhandle(struct tfm_spm_service_t *service, - psa_handle_t conn_handle); - -/******************** Partition management functions *************************/ - -/** - * \brief Get current running partition context. - * - * \retval NULL Failed - * \retval "Not NULL" Return the parttion context pointer - * \ref spm_partition_t structures - */ -struct tfm_spm_ipc_partition_t *tfm_spm_get_running_partition(void); - -/** - * \brief Get the service context by signal. - * - * \param[in] partition Partition context pointer - * \ref spm_partition_t structures - * \param[in] signal Signal associated with inputs to the Secure - * Partition, \ref psa_signal_t - * - * \retval NULL Failed - * \retval "Not NULL" Target service context pointer, - * \ref spm_service_t structures - */ -struct tfm_spm_service_t * -tfm_spm_get_service_by_signal(struct tfm_spm_ipc_partition_t *partition, - psa_signal_t signal); - -/** - * \brief Get the service context by service ID. - * - * \param[in] sid RoT Service identity - * - * \retval NULL Failed - * \retval "Not NULL" Target service context pointer, - * \ref spm_service_t structures - */ -struct tfm_spm_service_t *tfm_spm_get_service_by_sid(uint32_t sid); - -/** - * \brief Get the service context by connection handle. - * - * \param[in] conn_handle Connection handle created by - * tfm_spm_create_conn_handle() - * - * \retval NULL Failed - * \retval "Not NULL" Target service context pointer, - * \ref spm_service_t structures - */ -struct tfm_spm_service_t * - tfm_spm_get_service_by_handle(psa_handle_t conn_handle); - -/** - * \brief Get the partition context by partition ID. - * - * \param[in] partition_id Partition identity - * - * \retval NULL Failed - * \retval "Not NULL" Target partition context pointer, - * \ref spm_partition_t structures - */ -struct tfm_spm_ipc_partition_t * - tfm_spm_get_partition_by_id(int32_t partition_id); - -/************************ Message functions **********************************/ - -/** - * \brief Get message context by message handle. - * - * \param[in] msg_handle Message handle which is a reference generated - * by the SPM to a specific message. - * - * \return The message body context pointer - * \ref msg_body_t structures - */ -struct tfm_msg_body_t *tfm_spm_get_msg_from_handle(psa_handle_t msg_handle); - -/** - * \brief Create a message for PSA client call. - * - * \param[in] service Target service context pointer, which can be - * obtained by partition management functions - * \prarm[in] handle Connect handle return by psa_connect(). Should - * be \ref PSA_NULL_HANDLE in psa_connect(). - * \param[in] type Message type, PSA_IPC_CONNECT, PSA_IPC_CALL or - * PSA_IPC_DISCONNECT - * \param[in] ns_caller Whether from NS caller - * \param[in] invec Array of input \ref psa_invec structures - * \param[in] in_len Number of input \ref psa_invec structures - * \param[in] outvec Array of output \ref psa_outvec structures - * \param[in] out_len Number of output \ref psa_outvec structures - * \param[in] caller_outvec Array of caller output \ref psa_outvec structures - * - * \retval NULL Failed - * \retval "Not NULL" New message body pointer \ref msg_body_t structures - */ -struct tfm_msg_body_t *tfm_spm_create_msg(struct tfm_spm_service_t *service, - psa_handle_t handle, - uint32_t type, int32_t ns_caller, - psa_invec *invec, size_t in_len, - psa_outvec *outvec, size_t out_len, - psa_outvec *caller_outvec); - -/** - * \brief Free message which unused anymore - * - * \param[in] msg Message pointer which want to free - * \ref msg_body_t structures - * - * \retval void Success - * \retval "Does not return" Failed - */ -void tfm_spm_free_msg(struct tfm_msg_body_t *msg); - -/** - * \brief Send message and wake up the SP who is waiting on - * message queue, block the current thread and - * scheduler triggered - * - * \param[in] service Target service context pointer, which can be - * obtained by partition management functions - * \param[in] msg message created by spm_create_msg() - * \ref msg_body_t structures - * - * \retval IPC_SUCCESS Success - * \retval IPC_ERROR_BAD_PARAMETERS Bad parameters input - * \retval IPC_ERROR_GENERIC Failed to enqueue message to service message queue - */ -int32_t tfm_spm_send_event(struct tfm_spm_service_t *service, - struct tfm_msg_body_t *msg); - -/** - * \brief Check the client minor version according to - * version policy - * - * \param[in] service Target service context pointer, which can be get - * by partition management functions - * \param[in] minor_version Client support minor version - * - * \retval IPC_SUCCESS Success - * \retval IPC_ERROR_BAD_PARAMETERS Bad parameters input - * \retval IPC_ERROR_VERSION Check failed - */ -int32_t tfm_spm_check_client_version(struct tfm_spm_service_t *service, - uint32_t minor_version); - -/** - * \brief Check the memory reference is valid. - * - * \param[in] buffer Pointer of memory reference - * \param[in] len Length of memory reference in bytes - * \param[in] ns_caller From non-secure caller - * \param[in] access Type of access specified by the - * \ref tfm_memory_access_e - * \param[in] privileged Privileged mode or unprivileged mode: - * \ref TFM_PARTITION_UNPRIVILEGED_MODE - * \ref TFM_PARTITION_PRIVILEGED_MODE - * - * \retval IPC_SUCCESS Success - * \retval IPC_ERROR_BAD_PARAMETERS Bad parameters input - * \retval IPC_ERROR_MEMORY_CHECK Check failed - */ -int32_t tfm_memory_check(void *buffer, size_t len, int32_t ns_caller, - enum tfm_memory_access_e access, - uint32_t privileged); - -/* This function should be called before schedule function */ -void tfm_spm_init(void); - -/* - * PendSV specified function. - * - * Parameters : - * ctxb - State context storage pointer - * - * Notes: - * This is a staging API. Scheduler should be called in SPM finally and - * this function will be obsoleted later. - */ -void tfm_pendsv_do_schedule(struct tfm_state_context_ext *ctxb); - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_svcalls.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_svcalls.h deleted file mode 100644 index 97c506be14a..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_svcalls.h +++ /dev/null @@ -1,108 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_SVCALLS_H__ -#define __TFM_SVCALLS_H__ - -/* Svcall for PSA Client APIs */ - -/** - * \brief SVC handler for \ref psa_framework_version. - * - * \return version The version of the PSA Framework implementation - * that is providing the runtime services to the - * caller. - */ -uint32_t tfm_svcall_psa_framework_version(void); - -/** - * \brief SVC handler for \ref psa_version. - * - * \param[in] args Include all input arguments: sid. - * \param[in] ns_caller If 'non-zero', call from non-secure client. - * Or from secure client. - * - * \retval PSA_VERSION_NONE The RoT Service is not implemented, or the - * caller is not permitted to access the service. - * \retval > 0 The minor version of the implemented RoT - * Service. - */ -uint32_t tfm_svcall_psa_version(uint32_t *args, int32_t ns_caller); - -/** - * \brief SVC handler for \ref psa_connect. - * - * \param[in] args Include all input arguments: - * sid, minor_version. - * \param[in] ns_caller If 'non-zero', call from non-secure client. - * Or from secure client. - * - * \retval > 0 A handle for the connection. - * \retval PSA_CONNECTION_REFUSED The SPM or RoT Service has refused the - * connection. - * \retval PSA_CONNECTION_BUSY The SPM or RoT Service cannot make the - * connection at the moment. - * \retval "Does not return" The RoT Service ID and version are not - * supported, or the caller is not permitted to - * access the service. - */ -psa_handle_t tfm_svcall_psa_connect(uint32_t *args, int32_t ns_caller); - -/** - * \brief SVC handler for \ref psa_call. - * - * \param[in] args Include all input arguments: - * handle, in_vec, in_len, out_vec, out_len. - * \param[in] ns_caller If 'non-zero', call from non-secure client. - * Or from secure client. - * \param[in] lr EXC_RETURN value of the SVC. - * - * \retval >=0 RoT Service-specific status value. - * \retval <0 RoT Service-specific error code. - * \retval PSA_DROP_CONNECTION The connection has been dropped by the RoT - * Service. This indicates that either this or - * a previous message was invalid. - * \retval "Does not return" The call is invalid, one or more of the - * following are true: - * \arg An invalid handle was passed. - * \arg The connection is already handling a request. - * \arg An invalid memory reference was provided. - * \arg in_len + out_len > PSA_MAX_IOVEC. - * \arg The message is unrecognized by the RoT - * Service or incorrectly formatted. - */ -psa_status_t tfm_svcall_psa_call(uint32_t *args, int32_t ns_caller, - uint32_t lr); - -/** - * \brief SVC handler for \ref psa_close. - * - * \param[in] args Include all input arguments: handle. - * \param[in] ns_caller If 'non-zero', call from non-secure client. - * Or from secure client. - * - * \retval void Success. - * \retval "Does not return" The call is invalid, one or more of the - * following are true: - * \arg An invalid handle was provided that is not - * the null handle. - * \arg The connection is handling a request. - */ -void tfm_svcall_psa_close(uint32_t *args, int32_t ns_caller); - -/** - * \brief SVC handler for IPC functions - * - * \param[in] svc_num SVC number - * \param[in] ctx Argument context - * \param[in] lr EXC_RETURN value of the SVC. - * - * \returns Return values from those who has, - * or PSA_SUCCESS. - */ -int32_t SVC_Handler_IPC(tfm_svc_number_t svc_num, uint32_t *ctx, uint32_t lr); - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_thread.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_thread.h deleted file mode 100644 index 68aa5a20b07..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_thread.h +++ /dev/null @@ -1,232 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_THREAD_H__ -#define __TFM_THREAD_H__ - -#include "tfm_arch_v8m.h" -#include "cmsis_compiler.h" - -/* Status code */ -#define THRD_STAT_CREATING 0 -#define THRD_STAT_RUNNING 1 -#define THRD_STAT_BLOCK 2 -#define THRD_STAT_DETACH 3 -#define THRD_STAT_INVALID 4 - -/* Security attribute - default as security */ -#define THRD_ATTR_SECURE_OFFSET 16 -#define THRD_ATTR_SECURE (0) -#define THRD_ATTR_NON_SECURE (1 << THRD_ATTR_SECURE_OFFSET) - -/* Lower value has higher priority */ -#define THRD_PRIOR_MASK 0xFF -#define THRD_PRIOR_HIGHEST 0x0 -#define THRD_PRIOR_MEDIUM 0x7F -#define THRD_PRIOR_LOWEST 0xFF - -/* Error code */ -#define THRD_SUCCESS 0 -#define THRD_ERR_INVALID_PARAM 1 - -/* Thread entry function type */ -typedef void *(*tfm_thrd_func_t)(void *); - -/* Thread context */ -struct tfm_thrd_ctx { - tfm_thrd_func_t pfn; /* entry function */ - void *param; /* entry parameter */ - uint8_t *sp_base; /* stack bottom */ - uint8_t *sp_top; /* stack top */ - uint32_t prior; /* priority */ - uint32_t status; /* status */ - - struct tfm_state_context state_ctx; /* State context */ - struct tfm_thrd_ctx *next; /* next thread in list */ -}; - -/* - * Initialize a thread context with the necessary info. - * - * Parameters : - * pth - pointer of caller provided thread context - * pfn - thread entry function - * param - thread entry function parameter - * sp_base - stack pointer base (higher address) - * sp_top - stack pointer top (lower address) - * - * Notes : - * Thread contex rely on caller allocated memory; initialize members in - * context. This function does not insert thread into schedulable list. - */ -void tfm_thrd_init(struct tfm_thrd_ctx *pth, - tfm_thrd_func_t pfn, void *param, - uint8_t *sp_base, uint8_t *sp_top); - -/* Set thread priority. - * - * Parameters : - * pth - pointer of thread context - * prior - priority value (0~255) - * - * Notes : - * Set thread priority. Priority is set to THRD_PRIOR_MEDIUM in - * tfm_thrd_init(). - */ -void __STATIC_INLINE tfm_thrd_priority(struct tfm_thrd_ctx *pth, - uint32_t prior) -{ - pth->prior &= ~THRD_PRIOR_MASK; - pth->prior |= prior & THRD_PRIOR_MASK; -} - -/* - * Set thread security attribute. - * - * Parameters : - * pth - pointer of thread context - * attr_secure - THRD_ATTR_SECURE or THRD_ATTR_NON_SECURE - * - * Notes - * Reuse prior of thread context to shift down non-secure thread priority. - */ -void __STATIC_INLINE tfm_thrd_secure(struct tfm_thrd_ctx *pth, - uint32_t attr_secure) -{ - pth->prior &= ~THRD_ATTR_NON_SECURE; - pth->prior |= attr_secure; -} - -/* - * Set thread status. - * - * Parameters : - * pth - pointer of thread context - * new_status - new status of thread - * - * Return : - * None - * - * Notes : - * Thread status is not changed if invalid status value inputed. - */ -void tfm_thrd_set_status(struct tfm_thrd_ctx *pth, uint32_t new_status); - -/* - * Get thread status. - * - * Parameters : - * pth - pointer of thread context - * - * Return : - * Status of thread - */ -uint32_t __STATIC_INLINE tfm_thrd_get_status(struct tfm_thrd_ctx *pth) -{ - return pth->status; -} - -/* - * Set thread state return value. - * - * Parameters : - * pth - pointer of thread context - * retval - return value to be set for thread state - * - * Notes : - * This API is useful for blocked syscall blocking thread. Syscall - * could set its return value to the caller before caller goes. - */ -void __STATIC_INLINE tfm_thrd_set_retval(struct tfm_thrd_ctx *pth, - uint32_t retval) -{ - TFM_STATE_RET_VAL(&pth->state_ctx) = retval; -} - -/* - * Validate thread context and insert it into schedulable list. - * - * Parameters : - * pth - pointer of thread context - * - * Return : - * THRD_SUCCESS for success. Or an error is returned. - * - * Notes : - * This function validates thread info. It returns error if thread info - * is not correct. Thread is avaliable after successful tfm_thrd_start(). - */ -uint32_t tfm_thrd_start(struct tfm_thrd_ctx *pth); - -/* - * Get current running thread. - * - * Return : - * Current running thread context pointer. - */ -struct tfm_thrd_ctx *tfm_thrd_curr_thread(void); - -/* - * Get next running thread in list. - * - * Return : - * Pointer of next thread to be run. - */ -struct tfm_thrd_ctx *tfm_thrd_next_thread(void); - -/* - * Start scheduler for existing threads - * - * Parameters: - * pth - pointer of the caller context collecting thread - * - * Notes : - * This function should be called only ONCE to start the scheduler. - * Caller needs to provide a thread object to collect current context. - * The usage of the collected context is caller defined. - */ -void tfm_thrd_start_scheduler(struct tfm_thrd_ctx *pth); - -/* - * Activate a scheduling action after exception. - * - * Notes : - * This function could be called multiple times before scheduling. - */ -void tfm_thrd_activate_schedule(void); - -/* - * Save current context into 'prev' thread and switch to 'next'. - * - * Parameters : - * ctxb - latest caller context - * prev - previous thread to be switched out - * next - thread to be run - * - * Notes : - * This function could be called multiple times before scheduling. - */ -void tfm_thrd_context_switch(struct tfm_state_context_ext *ctxb, - struct tfm_thrd_ctx *prev, - struct tfm_thrd_ctx *next); - -/* - * Svcall to exit current running thread. - * - * Notes : - * Remove current thread out of schedulable list. - */ -void tfm_svcall_thrd_exit(void); - -/* - * Exit current running thread for client. - * - * Notes: - * Must be called in thread mode. - */ -void tfm_thrd_exit(void); - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_utils.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_utils.h deleted file mode 100644 index 17f94c065bc..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_utils.h +++ /dev/null @@ -1,29 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_UTILS_H__ -#define __TFM_UTILS_H__ - -/* CPU spin here */ -void tfm_panic(void); - -/* Assert and spin */ -#define TFM_ASSERT(cond) \ - do { \ - if (!(cond)) { \ - printf("Assert:%s:%d", __FUNCTION__, __LINE__); \ - while (1) \ - ; \ - } \ - } while (0) - -/* Get container structure start address from member */ -#define TFM_GET_CONTAINER_PTR(ptr, type, member) \ - (type *)((unsigned long)(ptr) - offsetof(type, member)) - -int32_t tfm_bitcount(uint32_t n); - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_wait.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_wait.h deleted file mode 100644 index 0bb6ea38e90..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include/tfm_wait.h +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#ifndef __TFM_WAIT_H__ -#define __TFM_WAIT_H__ - -#include "cmsis_compiler.h" - -/* The magic number has two purposes: corruption detection and debug */ -#define TFM_EVENT_MAGIC 0x65766e74 - -struct tfm_event_t { - uint32_t magic; /* 'evnt' */ - struct tfm_thrd_ctx *owner; /* Event blocked thread */ -}; - -/* - * Initialize an event object. - * - * Parameters: - * pevnt - The pointer of event object allocated by the caller - */ -void __STATIC_INLINE tfm_event_init(struct tfm_event_t *pevnt) -{ - pevnt->magic = TFM_EVENT_MAGIC; - pevnt->owner = NULL; -} - -/* - * Wait on an event object. - * - * Parameters: - * pevnt - The pointer of event object allocated by the caller - * - * Notes: - * Block caller thread by calling this function. - */ -void tfm_event_wait(struct tfm_event_t *pevnt); - -/* - * Wake up an event object. - * - * Parameters : - * pevnt - The pointer of event object allocated by the caller - * retval - Value to be returned to owner - * - * Notes: - * Wake up the blocked thread and set parameter 'retval' as the return value. - */ -void tfm_event_wake(struct tfm_event_t *pevnt, uint32_t retval); - -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/psa_client.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/psa_client.c deleted file mode 100644 index 6abc9665a1d..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/psa_client.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include -#include "tfm_svc.h" -#include "psa_client.h" - -__attribute__((naked, section("SFN"))) -uint32_t psa_framework_version(void) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_FRAMEWORK_VERSION)); -} - -__attribute__((naked, section("SFN"))) -uint32_t psa_version(uint32_t sid) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_VERSION)); -} - -__attribute__((naked, section("SFN"))) -psa_handle_t psa_connect(uint32_t sid, uint32_t minor_version) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_CONNECT)); -} - -__attribute__((naked, section("SFN"))) -psa_status_t psa_call(psa_handle_t handle, - const psa_invec *in_vec, - size_t in_len, - psa_outvec *out_vec, - size_t out_len) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_CALL)); -} - -__attribute__((naked, section("SFN"))) -void psa_close(psa_handle_t handle) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_CLOSE)); -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/psa_service.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/psa_service.c deleted file mode 100644 index 0c86954d210..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/psa_service.c +++ /dev/null @@ -1,96 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include -#include "tfm_svc.h" -#include "psa_client.h" -#include "psa_service.h" - -__attribute__((naked, section("SFN"))) -psa_signal_t psa_wait(psa_signal_t signal_mask, uint32_t timeout) - -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_WAIT)); -} - -__attribute__((naked, section("SFN"))) -psa_status_t psa_get(psa_signal_t signal, psa_msg_t *msg) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_GET)); -} - -__attribute__((naked, section("SFN"))) -void psa_set_rhandle(psa_handle_t msg_handle, void *rhandle) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_SET_RHANDLE)); -} - -__attribute__((naked, section("SFN"))) -size_t psa_read(psa_handle_t msg_handle, uint32_t invec_idx, - void *buffer, size_t num_bytes) - -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_READ)); -} - -__attribute__((naked, section("SFN"))) -size_t psa_skip(psa_handle_t msg_handle, uint32_t invec_idx, size_t num_bytes) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_SKIP)); -} - -__attribute__((naked, section("SFN"))) -void psa_write(psa_handle_t msg_handle, uint32_t outvec_idx, - const void *buffer, size_t num_bytes) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_WRITE)); -} - -__attribute__((naked, section("SFN"))) -void psa_reply(psa_handle_t msg_handle, psa_status_t retval) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_REPLY)); -} - -__attribute__((naked, section("SFN"))) -void psa_notify(int32_t partition_id) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_NOTIFY)); -} - -__attribute__((naked, section("SFN"))) -void psa_clear(void) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_CLEAR)); -} - -__attribute__((naked, section("SFN"))) -void psa_eoi(psa_signal_t irq_signal) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_PSA_EOI)); -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_arch_v8m.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_arch_v8m.c deleted file mode 100644 index ebe1c45a6d0..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_arch_v8m.c +++ /dev/null @@ -1,147 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#include -#include - -#include "tfm_arch_v8m.h" -#include "cmsis.h" -#include "psa_client.h" -#include "psa_service.h" -#include "tfm_utils.h" -#include "tfm_thread.h" -#include "tfm_memory_utils.h" - -/* This file contains the ARCH code for ARM V8M */ - -__attribute__((section("SFN"))) -static void exit_zone(void) -{ - tfm_thrd_exit(); -} - -void tfm_initialize_context(struct tfm_state_context *ctx, - uint32_t r0, uint32_t ra, - uint32_t sp, uint32_t sp_limit) -{ - /* - * For security consideration, set unused registers into ZERO; - * and only necessary registers are set here. - */ - struct tfm_state_context_base *p_ctxa = - (struct tfm_state_context_base *)sp; - - /* - * Shift back SP to leave space for holding base context - * since thread is kicked off through exception return. - */ - p_ctxa--; - - /* Basic context is considerate at thread start.*/ - tfm_memset(p_ctxa, 0, sizeof(*p_ctxa)); - p_ctxa->r0 = r0; - p_ctxa->ra = ra; - p_ctxa->ra_lr = (uint32_t)exit_zone; - p_ctxa->xpsr = XPSR_T32; - - tfm_memset(ctx, 0, sizeof(*ctx)); - ctx->ctxb.sp = (uint32_t)p_ctxa; - ctx->ctxb.sp_limit = sp_limit; - ctx->ctxb.lr = LR_UNPRIVILEGED; -} - -/* - * Stack status at PendSV entry: - * - * [ R0 - R3 ]<- PSP - * [ R12 ] - * [ LR_of_RA ] - * MSP->[ ........ ] [ RA ] - * [ ........ ] [ XPSR ] - * [ ........ ] - * [ ........ ] - * - * Stack status before calling pendsv_do_schedule(): - * - * MSP->[ R4 - R11 ] - * [ PSP ]--->[ R0 - R3 ] - * [ PSP Limit] [ R12 ] - * [ R2(dummy)] [ LR_of_RA ] - * [ LR ] [ RA ] - * [ ........ ] [ XPSR ] - * [ ........ ] [ ........ ] - * [ ........ ] - * - * pendsv_do_schedule() updates stacked context into current thread and - * replace stacked context with context of next thread. - * - * Scheduler does not support handler mode thread so take PSP/PSP_LIMIT as - * thread SP/SP_LIMIT. R2 holds dummy data due to stack operation is 8 bytes - * aligned. - */ -#if defined(__ARM_ARCH_8M_MAIN__) -__attribute__((naked)) void PendSV_Handler(void) -{ - __ASM volatile( - "mrs r0, psp \n" - "mrs r1, psplim \n" - "push {r0, r1, r2, lr} \n" - "push {r4-r11} \n" - "mov r0, sp \n" - "bl tfm_pendsv_do_schedule \n" - "pop {r4-r11} \n" - "pop {r0, r1, r2, lr} \n" - "msr psp, r0 \n" - "msr psplim, r1 \n" - "bx lr \n" - ); -} -#elif defined(__ARM_ARCH_8M_BASE__) -__attribute__((naked)) void PendSV_Handler(void) -{ - __ASM volatile( - "mrs r0, psp \n" - "mrs r1, psplim \n" - "push {r0, r1, r2, lr} \n" - "push {r4-r7} \n" - "mov r4, r8 \n" - "mov r5, r9 \n" - "mov r6, r10 \n" - "mov r7, r11 \n" - "push {r4-r7} \n" - "mov r0, sp \n" - "bl tfm_pendsv_do_schedule \n" - "pop {r4-r7} \n" - "mov r8, r4 \n" - "mov r9, r5 \n" - "mov r10, r6 \n" - "mov r11, r7 \n" - "pop {r4-r7} \n" - "pop {r0-r3} \n" - "mov lr, r3 \n" - "msr psp, r0 \n" - "msr psplim, r1 \n" - "bx lr \n" - ); -} -#else -#error "Unsupported ARM Architecture." -#endif - -/* Reserved for future usage */ -__attribute__((naked)) void MemManage_Handler(void) -{ - __ASM volatile("b ."); -} - -__attribute__((naked)) void BusFault_Handler(void) -{ - __ASM volatile("b ."); -} -__attribute__((naked)) void UsageFault_Handler(void) -{ - __ASM volatile("b ."); -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_message_queue.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_message_queue.c deleted file mode 100644 index 83ebf50edb8..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_message_queue.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Copyright (c) 2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#include -#include -#include "tfm_thread.h" -#include "tfm_wait.h" -#include "psa_client.h" -#include "psa_service.h" -#include "tfm_internal_defines.h" -#include "tfm_message_queue.h" - -/* Message queue process */ -int32_t tfm_msg_enqueue(struct tfm_msg_queue_t *queue, - struct tfm_msg_body_t *node) -{ - if (!queue || !node) { - return IPC_ERROR_BAD_PARAMETERS; - } - - if (queue->size == 0) { - queue->head = node; - queue->tail = node; - } else { - queue->tail->next = node; - queue->tail = node; - } - queue->size++; - return IPC_SUCCESS; -} - -struct tfm_msg_body_t *tfm_msg_dequeue(struct tfm_msg_queue_t *queue) -{ - struct tfm_msg_body_t *pop_node; - - if (!queue) { - return NULL; - } - - if (queue->size == 0) { - return NULL; - } - - pop_node = queue->head; - queue->head = queue->head->next; - queue->size--; - return pop_node; -} - -int32_t tfm_msg_queue_is_empty(struct tfm_msg_queue_t *queue) -{ - return queue->size == 0 ? 1 : 0; -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_pools.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_pools.c deleted file mode 100644 index 83342b88bb6..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_pools.c +++ /dev/null @@ -1,87 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#include -#include -#include -#include -#include "tfm_thread.h" -#include "tfm_wait.h" -#include "psa_client.h" -#include "psa_service.h" -#include "tfm_internal_defines.h" -#include "cmsis_compiler.h" -#include "tfm_utils.h" -#include "tfm_list.h" -#include "tfm_pools.h" -#include "tfm_memory_utils.h" - -int32_t tfm_pool_init(struct tfm_pool_instance_t *pool, size_t poolsz, - size_t chunksz, size_t num) -{ - struct tfm_pool_chunk_t *pchunk; - size_t i; - - if (!pool || num == 0) { - return IPC_ERROR_BAD_PARAMETERS; - } - - /* Ensure buffer is large enough */ - if (poolsz != ((chunksz + sizeof(struct tfm_pool_chunk_t)) * num + - sizeof(struct tfm_pool_instance_t))) { - return IPC_ERROR_BAD_PARAMETERS; - } - - /* Buffer should be BSS cleared but clear it again */ - tfm_memset(pool, 0, poolsz); - - /* Chain pool chunks */ - tfm_list_init(&pool->chunks_list); - - pchunk = (struct tfm_pool_chunk_t *)pool->chunks; - for (i = 0; i < num; i++) { - pchunk->pool = pool; - tfm_list_add_tail(&pool->chunks_list, &pchunk->list); - pchunk = (struct tfm_pool_chunk_t *)&pchunk->data[chunksz]; - } - - /* Prepare instance and insert to pool list */ - pool->chunksz = chunksz; - - return IPC_SUCCESS; -} - -void *tfm_pool_alloc(struct tfm_pool_instance_t *pool) -{ - struct tfm_list_node_t *node; - struct tfm_pool_chunk_t *pchunk; - - if (!pool) { - return NULL; - } - - if (tfm_list_is_empty(&pool->chunks_list)) { - return NULL; - } - - node = tfm_list_first_node(&pool->chunks_list); - pchunk = TFM_GET_CONTAINER_PTR(node, struct tfm_pool_chunk_t, list); - - /* Remove node from list node, it will be added when pool free */ - tfm_list_del_node(node); - - return &pchunk->data; -} - -void tfm_pool_free(void *ptr) -{ - struct tfm_pool_chunk_t *pchunk; - struct tfm_pool_instance_t *pool; - - pchunk = TFM_GET_CONTAINER_PTR(ptr, struct tfm_pool_chunk_t, data); - pool = (struct tfm_pool_instance_t *)pchunk->pool; - tfm_list_add_tail(&pool->chunks_list, &pchunk->list); -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_spm.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_spm.c deleted file mode 100644 index 5ee30a614ee..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_spm.c +++ /dev/null @@ -1,619 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#include -#include -#include -#include -#include -#include "psa_client.h" -#include "psa_service.h" -#include "tfm_utils.h" -#include "platform/include/tfm_spm_hal.h" -#include "spm_api.h" -#include "spm_db.h" -#include "spm_db_setup.h" -#include "tfm_internal_defines.h" -#include "tfm_wait.h" -#include "tfm_message_queue.h" -#include "tfm_list.h" -#include "tfm_pools.h" -#include "tfm_spm.h" -#include "tfm_spm_signal_defs.h" -#include "tfm_thread.h" -#include "region_defs.h" -#include "tfm_nspm.h" -#include "tfm_memory_utils.h" -#include "platform/mbed_toolchain.h" - -/* - * IPC partitions. - * FixMe: Need to get align with spm_partition_db_t. - */ -static struct tfm_spm_ipc_partition_t - g_spm_ipc_partition[SPM_MAX_PARTITIONS] = {}; - -/* Extern SPM variable */ -extern struct spm_partition_db_t g_spm_partition_db; - -/* Extern secure lock variable */ -extern int32_t tfm_secure_lock; -/* Pools */ -TFM_POOL_DECLARE(conn_handle_pool, sizeof(struct tfm_conn_handle_t), - TFM_CONN_HANDLE_MAX_NUM); -TFM_POOL_DECLARE(spm_service_pool, sizeof(struct tfm_spm_service_t), - TFM_SPM_MAX_ROT_SERV_NUM); -TFM_POOL_DECLARE(msg_db_pool, sizeof(struct tfm_msg_body_t), - TFM_MSG_QUEUE_MAX_MSG_NUM); - -static struct tfm_spm_service_db_t g_spm_service_db[] = { - #include "tfm_service_list.inc" -}; - -/********************** SPM functions for handler mode ***********************/ - -/* Service handle management functions */ -psa_handle_t tfm_spm_create_conn_handle(struct tfm_spm_service_t *service) -{ - struct tfm_conn_handle_t *node; - - TFM_ASSERT(service); - - /* Get buffer for handle list structure from handle pool */ - node = (struct tfm_conn_handle_t *)tfm_pool_alloc(conn_handle_pool); - if (!node) { - return PSA_NULL_HANDLE; - } - - /* Global unique handle, use handle buffer address directly */ - node->handle = (psa_handle_t)node; - - /* Add handle node to list for next psa functions */ - tfm_list_add_tail(&service->handle_list, &node->list); - - return node->handle; -} - -static struct tfm_conn_handle_t * -tfm_spm_find_conn_handle_node(struct tfm_spm_service_t *service, - psa_handle_t conn_handle) -{ - struct tfm_conn_handle_t *handle_node; - struct tfm_list_node_t *node, *head; - - TFM_ASSERT(service); - - head = &service->handle_list; - TFM_LIST_FOR_EACH(node, head) { - handle_node = TFM_GET_CONTAINER_PTR(node, struct tfm_conn_handle_t, - list); - if (handle_node->handle == conn_handle) { - return handle_node; - } - } - return NULL; -} - -int32_t tfm_spm_free_conn_handle(struct tfm_spm_service_t *service, - psa_handle_t conn_handle) -{ - struct tfm_conn_handle_t *node; - - TFM_ASSERT(service); - - /* There are many handles for each RoT Service */ - node = tfm_spm_find_conn_handle_node(service, conn_handle); - if (!node) { - tfm_panic(); - } - - /* Remove node from handle list */ - tfm_list_del_node(&node->list); - - node->rhandle = NULL; - - /* Back handle buffer to pool */ - tfm_pool_free(node); - return IPC_SUCCESS; -} - -int32_t tfm_spm_set_rhandle(struct tfm_spm_service_t *service, - psa_handle_t conn_handle, - void *rhandle) -{ - struct tfm_conn_handle_t *node; - - TFM_ASSERT(service); - /* Set reverse handle value only be allowed for a connected handle */ - TFM_ASSERT(conn_handle != PSA_NULL_HANDLE); - - /* There are many handles for each RoT Service */ - node = tfm_spm_find_conn_handle_node(service, conn_handle); - if (!node) { - tfm_panic(); - } - - node->rhandle = rhandle; - return IPC_SUCCESS; -} - -void *tfm_spm_get_rhandle(struct tfm_spm_service_t *service, - psa_handle_t conn_handle) -{ - struct tfm_conn_handle_t *node; - - TFM_ASSERT(service); - /* Get reverse handle value only be allowed for a connected handle */ - TFM_ASSERT(conn_handle != PSA_NULL_HANDLE); - - /* There are many handles for each RoT Service */ - node = tfm_spm_find_conn_handle_node(service, conn_handle); - if (!node) { - tfm_panic(); - } - - return node->rhandle; -} - -/* Partition management functions */ -struct tfm_spm_service_t * -tfm_spm_get_service_by_signal(struct tfm_spm_ipc_partition_t *partition, - psa_signal_t signal) -{ - struct tfm_list_node_t *node, *head; - struct tfm_spm_service_t *service; - - TFM_ASSERT(partition); - - if (tfm_list_is_empty(&partition->service_list)) { - tfm_panic(); - } - - head = &partition->service_list; - TFM_LIST_FOR_EACH(node, head) { - service = TFM_GET_CONTAINER_PTR(node, struct tfm_spm_service_t, list); - if (service->service_db->signal == signal) { - return service; - } - } - return NULL; -} - -struct tfm_spm_service_t *tfm_spm_get_service_by_sid(uint32_t sid) -{ - uint32_t i; - struct tfm_list_node_t *node, *head; - struct tfm_spm_service_t *service; - - for (i = 0; i < SPM_MAX_PARTITIONS; i++) { - /* Skip partition without IPC flag */ - if ((tfm_spm_partition_get_flags(g_spm_ipc_partition[i].index) & - SPM_PART_FLAG_IPC) == 0) { - continue; - } - - if (tfm_list_is_empty(&g_spm_ipc_partition[i].service_list)) { - continue; - } - - head = &g_spm_ipc_partition[i].service_list; - TFM_LIST_FOR_EACH(node, head) { - service = TFM_GET_CONTAINER_PTR(node, struct tfm_spm_service_t, - list); - if (service->service_db->sid == sid) { - return service; - } - } - } - return NULL; -} - -struct tfm_spm_service_t * - tfm_spm_get_service_by_handle(psa_handle_t conn_handle) -{ - uint32_t i; - struct tfm_conn_handle_t *handle; - struct tfm_list_node_t *service_node, *service_head; - struct tfm_list_node_t *handle_node, *handle_head; - struct tfm_spm_service_t *service; - - for (i = 0; i < SPM_MAX_PARTITIONS; i++) { - /* Skip partition without IPC flag */ - if ((tfm_spm_partition_get_flags(g_spm_ipc_partition[i].index) & - SPM_PART_FLAG_IPC) == 0) { - continue; - } - - if (tfm_list_is_empty(&g_spm_ipc_partition[i].service_list)) { - continue; - } - - service_head = &g_spm_ipc_partition[i].service_list; - TFM_LIST_FOR_EACH(service_node, service_head) { - service = TFM_GET_CONTAINER_PTR(service_node, - struct tfm_spm_service_t, list); - handle_head = &service->handle_list; - TFM_LIST_FOR_EACH(handle_node, handle_head) { - handle = TFM_GET_CONTAINER_PTR(handle_node, - struct tfm_conn_handle_t, list); - if (handle->handle == conn_handle) { - return service; - } - } - } - } - return NULL; -} - -struct tfm_spm_ipc_partition_t * - tfm_spm_get_partition_by_id(int32_t partition_id) -{ - uint32_t i; - - for (i = 0; i < SPM_MAX_PARTITIONS; i++) { - if (g_spm_ipc_partition[i].id == partition_id) { - return &g_spm_ipc_partition[i]; - } - } - return NULL; -} - -struct tfm_spm_ipc_partition_t *tfm_spm_get_running_partition(void) -{ - uint32_t spid; - - spid = tfm_spm_partition_get_running_partition_id_ext(); - - return tfm_spm_get_partition_by_id(spid); -} - -int32_t tfm_spm_check_client_version(struct tfm_spm_service_t *service, - uint32_t minor_version) -{ - TFM_ASSERT(service); - - switch (service->service_db->minor_policy) { - case TFM_VERSION_POLICY_RELAXED: - if (minor_version > service->service_db->minor_version) { - return IPC_ERROR_VERSION; - } - break; - case TFM_VERSION_POLICY_STRICT: - if (minor_version != service->service_db->minor_version) { - return IPC_ERROR_VERSION; - } - break; - default: - return IPC_ERROR_VERSION; - } - return IPC_SUCCESS; -} - -/* Message functions */ -struct tfm_msg_body_t *tfm_spm_get_msg_from_handle(psa_handle_t msg_handle) -{ - /* - * There may be one error handle passed by the caller in two conditions: - * 1. Not a valid message handle. - * 2. Handle between different Partitions. Partition A passes one handle - * belong to other Partitions and tries to access other's data. - * So, need do necessary checking to prevent those conditions. - */ - struct tfm_msg_body_t *msg; - uint32_t partition_id; - - msg = (struct tfm_msg_body_t *)msg_handle; - if (!msg) { - return NULL; - } - - /* - * FixMe: For condition 1: using a magic number to define it's a message. - * It needs to be an enhancement to check the handle belong to service. - */ - if (msg->magic != TFM_MSG_MAGIC) { - return NULL; - } - - /* For condition 2: check if the partition ID is same */ - partition_id = tfm_spm_partition_get_running_partition_id_ext(); - if (partition_id != msg->service->partition->id) { - return NULL; - } - - return msg; -} - -struct tfm_msg_body_t *tfm_spm_create_msg(struct tfm_spm_service_t *service, - psa_handle_t handle, - uint32_t type, int32_t ns_caller, - psa_invec *invec, size_t in_len, - psa_outvec *outvec, size_t out_len, - psa_outvec *caller_outvec) -{ - struct tfm_msg_body_t *msg = NULL; - uint32_t i; - - TFM_ASSERT(service); - TFM_ASSERT(!(invec == NULL && in_len != 0)); - TFM_ASSERT(!(outvec == NULL && out_len != 0)); - TFM_ASSERT(in_len <= PSA_MAX_IOVEC); - TFM_ASSERT(out_len <= PSA_MAX_IOVEC); - TFM_ASSERT(in_len + out_len <= PSA_MAX_IOVEC); - - /* Get message buffer from message pool */ - msg = (struct tfm_msg_body_t *)tfm_pool_alloc(msg_db_pool); - if (!msg) { - return NULL; - } - - /* Clear message buffer before using it */ - tfm_memset(msg, 0, sizeof(struct tfm_msg_body_t)); - - tfm_event_init(&msg->ack_evnt); - msg->magic = TFM_MSG_MAGIC; - msg->service = service; - msg->handle = handle; - msg->caller_outvec = caller_outvec; - /* Get current partition id */ - if (ns_caller) { - msg->msg.client_id = tfm_nspm_get_current_client_id(); - } else { - msg->msg.client_id = tfm_spm_partition_get_running_partition_id_ext(); - } - - /* Copy contents */ - msg->msg.type = type; - - for (i = 0; i < in_len; i++) { - msg->msg.in_size[i] = invec[i].len; - msg->invec[i].base = invec[i].base; - } - - for (i = 0; i < out_len; i++) { - msg->msg.out_size[i] = outvec[i].len; - msg->outvec[i].base = outvec[i].base; - /* Out len is used to record the writed number, set 0 here again */ - msg->outvec[i].len = 0; - } - - /* Use message address as handle */ - msg->msg.handle = (psa_handle_t)msg; - - /* For connected handle, set rhandle to every message */ - if (handle != PSA_NULL_HANDLE) { - msg->msg.rhandle = tfm_spm_get_rhandle(service, handle); - } - - return msg; -} - -void tfm_spm_free_msg(struct tfm_msg_body_t *msg) -{ - tfm_pool_free(msg); -} - -int32_t tfm_spm_send_event(struct tfm_spm_service_t *service, - struct tfm_msg_body_t *msg) -{ - TFM_ASSERT(service); - TFM_ASSERT(msg); - - /* Enqueue message to service message queue */ - if (tfm_msg_enqueue(&service->msg_queue, msg) != IPC_SUCCESS) { - return IPC_ERROR_GENERIC; - } - - /* Messages put. Update signals */ - service->partition->signals |= service->service_db->signal; - - tfm_event_wake(&service->partition->signal_evnt, - (service->partition->signals & - service->partition->signal_mask)); - - tfm_event_wait(&msg->ack_evnt); - - return IPC_SUCCESS; -} - -/* SPM extend functions */ -uint32_t tfm_spm_partition_get_running_partition_id_ext(void) -{ - struct tfm_thrd_ctx *pth = tfm_thrd_curr_thread(); - struct spm_partition_desc_t *partition; - - partition = TFM_GET_CONTAINER_PTR(pth, struct spm_partition_desc_t, - sp_thrd); - return partition->static_data.partition_id; -} - -static struct tfm_thrd_ctx * -tfm_spm_partition_get_thread_info_ext(uint32_t partition_idx) -{ - return &g_spm_partition_db.partitions[partition_idx].sp_thrd; -} - -static tfm_thrd_func_t - tfm_spm_partition_get_init_func_ext(uint32_t partition_idx) -{ - return (tfm_thrd_func_t)(g_spm_partition_db.partitions[partition_idx]. - static_data.partition_init); -} - -static uint32_t tfm_spm_partition_get_priority_ext(uint32_t partition_idx) -{ - return g_spm_partition_db.partitions[partition_idx].static_data. - partition_priority; -} - -int32_t tfm_memory_check(void *buffer, size_t len, int32_t ns_caller, - enum tfm_memory_access_e access, - uint32_t privileged) -{ - int32_t err; - - /* If len is zero, this indicates an empty buffer and base is ignored */ - if (len == 0) { - return IPC_SUCCESS; - } - - if (!buffer) { - return IPC_ERROR_BAD_PARAMETERS; - } - - if ((uintptr_t)buffer > (UINTPTR_MAX - len)) { - return IPC_ERROR_MEMORY_CHECK; - } - - if (access == TFM_MEMORY_ACCESS_RW) { - err = tfm_core_has_write_access_to_region(buffer, len, ns_caller, - privileged); - } else { - err = tfm_core_has_read_access_to_region(buffer, len, ns_caller, - privileged); - } - if (err == TFM_SUCCESS) { - return IPC_SUCCESS; - } - - return IPC_ERROR_MEMORY_CHECK; -} - -uint32_t tfm_spm_partition_get_privileged_mode(uint32_t partition_idx) -{ - if (tfm_spm_partition_get_flags(partition_idx) & SPM_PART_FLAG_PSA_ROT) { - return TFM_PARTITION_PRIVILEGED_MODE; - } else { - return TFM_PARTITION_UNPRIVILEGED_MODE; - } -} - -/********************** SPM functions for thread mode ************************/ - -void tfm_spm_init(void) -{ - uint32_t i, num; - struct tfm_spm_ipc_partition_t *partition; - struct tfm_spm_service_t *service; - struct tfm_thrd_ctx *pth, this_thrd; - struct spm_partition_desc_t *part; - - tfm_pool_init(conn_handle_pool, - POOL_BUFFER_SIZE(conn_handle_pool), - sizeof(struct tfm_conn_handle_t), - TFM_CONN_HANDLE_MAX_NUM); - tfm_pool_init(spm_service_pool, POOL_BUFFER_SIZE(spm_service_pool), - sizeof(struct tfm_spm_service_t), - TFM_SPM_MAX_ROT_SERV_NUM); - tfm_pool_init(msg_db_pool, POOL_BUFFER_SIZE(msg_db_pool), - sizeof(struct tfm_msg_body_t), - TFM_MSG_QUEUE_MAX_MSG_NUM); - - /* Init partition first for it will be used when init service */ - for (i = 0; i < SPM_MAX_PARTITIONS; i++) { - part = &g_spm_partition_db.partitions[i]; - tfm_spm_hal_configure_default_isolation(part->platform_data); - g_spm_ipc_partition[i].index = i; - if ((tfm_spm_partition_get_flags(i) & SPM_PART_FLAG_IPC) == 0) { - continue; - } - g_spm_ipc_partition[i].id = tfm_spm_partition_get_partition_id(i); - - tfm_event_init(&g_spm_ipc_partition[i].signal_evnt); - tfm_list_init(&g_spm_ipc_partition[i].service_list); - - pth = tfm_spm_partition_get_thread_info_ext(i); - if (!pth) { - tfm_panic(); - } - - tfm_thrd_init(pth, - tfm_spm_partition_get_init_func_ext(i), - NULL, - (uint8_t *)tfm_spm_partition_get_stack_top(i), - (uint8_t *)tfm_spm_partition_get_stack_bottom(i)); - - pth->prior = tfm_spm_partition_get_priority_ext(i); - - /* Kick off */ - if (tfm_thrd_start(pth) != THRD_SUCCESS) { - tfm_panic(); - } - } - - /* Init Service */ - num = sizeof(g_spm_service_db) / sizeof(struct tfm_spm_service_db_t); - for (i = 0; i < num; i++) { - partition = - tfm_spm_get_partition_by_id(g_spm_service_db[i].partition_id); - if (!partition) { - tfm_panic(); - } - service = (struct tfm_spm_service_t *)tfm_pool_alloc(spm_service_pool); - if (!service) { - tfm_panic(); - } - service->service_db = &g_spm_service_db[i]; - service->partition = partition; - tfm_list_init(&service->handle_list); - tfm_list_add_tail(&partition->service_list, &service->list); - } - - /* - * All threads initialized, start the scheduler. - * - * NOTE: - * Here is the booting privileged thread mode, and will never - * return to this place after scheduler is started. The start - * function has to save current runtime context to act as a - * 'current thread' to avoid repeating NULL 'current thread' - * checking while context switching. This saved context is worthy - * of being saved somewhere if there are potential usage purpose. - * Let's save this context in a local variable 'this_thrd' at - * current since there is no usage for it. - * Also set tfm_nspm_thread_entry as pfn for this thread to - * use in detecting NS/S thread scheduling changes. - */ - this_thrd.pfn = (tfm_thrd_func_t)tfm_nspm_thread_entry; - tfm_thrd_start_scheduler(&this_thrd); -} - -MBED_USED void tfm_pendsv_do_schedule(struct tfm_state_context_ext *ctxb) -{ -#if TFM_LVL == 2 - struct spm_partition_desc_t *p_next_partition; - uint32_t is_privileged; -#endif - struct tfm_thrd_ctx *pth_next = tfm_thrd_next_thread(); - struct tfm_thrd_ctx *pth_curr = tfm_thrd_curr_thread(); - - if (pth_curr != pth_next) { -#if TFM_LVL == 2 - p_next_partition = TFM_GET_CONTAINER_PTR(pth_next, - struct spm_partition_desc_t, - sp_thrd); - - if (p_next_partition->static_data.partition_flags & - SPM_PART_FLAG_PSA_ROT) { - is_privileged = TFM_PARTITION_PRIVILEGED_MODE; - } else { - is_privileged = TFM_PARTITION_UNPRIVILEGED_MODE; - } - - tfm_spm_partition_change_privilege(is_privileged); -#endif - /* Increase the secure lock, if we enter secure from non-secure */ - if ((void *)pth_curr->pfn == (void *)tfm_nspm_thread_entry) { - ++tfm_secure_lock; - } - /* Decrease the secure lock, if we return from secure to non-secure */ - if ((void *)pth_next->pfn == (void *)tfm_nspm_thread_entry) { - --tfm_secure_lock; - } - - tfm_thrd_context_switch(ctxb, pth_curr, pth_next); - } -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_svcalls.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_svcalls.c deleted file mode 100644 index eefc031d04e..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_svcalls.c +++ /dev/null @@ -1,1026 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#include -#include -#include -#include -#include "psa_client.h" -#include "psa_service.h" -#include "tfm_svc.h" -#include "tfm_svcalls.h" -#include "tfm_thread.h" -#include "tfm_wait.h" -#include "tfm_utils.h" -#include "tfm_internal_defines.h" -#include "tfm_message_queue.h" -#include "tfm_spm.h" -#include "tfm_api.h" -#include "tfm_secure_api.h" -#include "tfm_memory_utils.h" -#include "spm_api.h" - -#define PSA_TIMEOUT_MASK PSA_BLOCK - -/************************* SVC handler for PSA Client APIs *******************/ - -uint32_t tfm_svcall_psa_framework_version(void) -{ - return PSA_FRAMEWORK_VERSION; -} - -uint32_t tfm_svcall_psa_version(uint32_t *args, int32_t ns_caller) -{ - uint32_t sid; - struct tfm_spm_service_t *service; - - TFM_ASSERT(args != NULL); - sid = (uint32_t)args[0]; - /* - * It should return PSA_VERSION_NONE if the RoT Service is not - * implemented. - */ - service = tfm_spm_get_service_by_sid(sid); - if (!service) { - return PSA_VERSION_NONE; - } - - /* - * It should return PSA_VERSION_NONE if the caller is not authorized - * to access the RoT Service. - */ - if (ns_caller && !service->service_db->non_secure_client) { - return PSA_VERSION_NONE; - } - - return service->service_db->minor_version; -} - -psa_handle_t tfm_svcall_psa_connect(uint32_t *args, int32_t ns_caller) -{ - uint32_t sid; - uint32_t minor_version; - struct tfm_spm_service_t *service; - struct tfm_msg_body_t *msg; - - TFM_ASSERT(args != NULL); - sid = (uint32_t)args[0]; - minor_version = (uint32_t)args[1]; - - /* It is a fatal error if the RoT Service does not exist on the platform */ - service = tfm_spm_get_service_by_sid(sid); - if (!service) { - tfm_panic(); - } - - /* - * It is a fatal error if the caller is not authorized to access the RoT - * Service. - */ - if (ns_caller && !service->service_db->non_secure_client) { - tfm_panic(); - } - - /* - * It is a fatal error if the version of the RoT Service requested is not - * supported on the platform. - */ - if (tfm_spm_check_client_version(service, minor_version) != IPC_SUCCESS) { - tfm_panic(); - } - - /* No input or output needed for connect message */ - msg = tfm_spm_create_msg(service, PSA_NULL_HANDLE, PSA_IPC_CONNECT, - ns_caller, NULL, 0, NULL, 0, NULL); - if (!msg) { - return PSA_NULL_HANDLE; - } - - /* - * Send message and wake up the SP who is waiting on message queue, - * and scheduler triggered - */ - tfm_spm_send_event(service, msg); - - return PSA_NULL_HANDLE; -} - -psa_status_t tfm_svcall_psa_call(uint32_t *args, int32_t ns_caller, uint32_t lr) -{ - psa_handle_t handle; - psa_invec *inptr, invecs[PSA_MAX_IOVEC]; - psa_outvec *outptr, outvecs[PSA_MAX_IOVEC]; - size_t in_num, out_num; - struct tfm_spm_service_t *service; - struct tfm_msg_body_t *msg; - int i; - struct tfm_spm_ipc_partition_t *partition = NULL; - uint32_t privileged; - - TFM_ASSERT(args != NULL); - handle = (psa_handle_t)args[0]; - - partition = tfm_spm_get_running_partition(); - if (!partition) { - tfm_panic(); - } - privileged = tfm_spm_partition_get_privileged_mode(partition->index); - - if (!ns_caller) { - inptr = (psa_invec *)args[1]; - in_num = (size_t)args[2]; - outptr = (psa_outvec *)args[3]; - /* - * 5th parameter is pushed at stack top before SVC, then PE hardware - * stacks the execution context. The size of the context depends on - * various settings: - * - if FP is not used, 5th parameter is at 8th position counting - * from SP; - * - if FP is used and FPCCR_S.TS is 0, 5th parameter is at 26th - * position counting from SP; - * - if FP is used and FPCCR_S.TS is 1, 5th parameter is at 42th - * position counting from SP. - */ - if (lr & EXC_RETURN_FPU_FRAME_BASIC) { - out_num = (size_t)args[8]; -#if defined (__FPU_USED) && (__FPU_USED == 1U) - } else if (FPU->FPCCR & FPU_FPCCR_TS_Msk) { - out_num = (size_t)args[42]; -#endif - } else { - out_num = (size_t)args[26]; - } - } else { - /* - * FixMe: From non-secure caller, vec and len are composed into a new - * struct parameter. Need to extract them. - */ - /* - * Read parameters from the arguments. It is a fatal error if the - * memory reference for buffer is invalid or not readable. - */ - if (tfm_memory_check((void *)args[1], sizeof(uint32_t), - ns_caller, TFM_MEMORY_ACCESS_RO, privileged) != IPC_SUCCESS) { - tfm_panic(); - } - if (tfm_memory_check((void *)args[2], sizeof(uint32_t), - ns_caller, TFM_MEMORY_ACCESS_RO, privileged) != IPC_SUCCESS) { - tfm_panic(); - } - - inptr = (psa_invec *)((psa_invec *)args[1])->base; - in_num = ((psa_invec *)args[1])->len; - outptr = (psa_outvec *)((psa_invec *)args[2])->base; - out_num = ((psa_invec *)args[2])->len; - } - - /* It is a fatal error if in_len + out_len > PSA_MAX_IOVEC. */ - if (in_num + out_num > PSA_MAX_IOVEC) { - tfm_panic(); - } - - /* It is a fatal error if an invalid handle was passed. */ - service = tfm_spm_get_service_by_handle(handle); - if (!service) { - /* FixMe: Need to implement one mechanism to resolve this failure. */ - tfm_panic(); - } - - /* - * Read client invecs from the wrap input vector. It is a fatal error - * if the memory reference for the wrap input vector is invalid or not - * readable. - */ - if (tfm_memory_check((void *)inptr, in_num * sizeof(psa_invec), - ns_caller, TFM_MEMORY_ACCESS_RO, privileged) != IPC_SUCCESS) { - tfm_panic(); - } - /* - * Read client outvecs from the wrap output vector and will update the - * actual length later. It is a fatal error if the memory reference for - * the wrap output vector is invalid or not read-write. - */ - if (tfm_memory_check((void *)outptr, out_num * sizeof(psa_outvec), - ns_caller, TFM_MEMORY_ACCESS_RW, privileged) != IPC_SUCCESS) { - tfm_panic(); - } - - tfm_memset(invecs, 0, sizeof(invecs)); - tfm_memset(outvecs, 0, sizeof(outvecs)); - - /* Copy the address out to avoid TOCTOU attacks. */ - tfm_memcpy(invecs, inptr, in_num * sizeof(psa_invec)); - tfm_memcpy(outvecs, outptr, out_num * sizeof(psa_outvec)); - - /* - * For client input vector, it is a fatal error if the provided payload - * memory reference was invalid or not readable. - */ - for (i = 0; i < in_num; i++) { - if (tfm_memory_check((void *)invecs[i].base, invecs[i].len, - ns_caller, TFM_MEMORY_ACCESS_RO, privileged) != IPC_SUCCESS) { - tfm_panic(); - } - } - /* - * For client output vector, it is a fatal error if the provided payload - * memory reference was invalid or not read-write. - */ - for (i = 0; i < out_num; i++) { - if (tfm_memory_check(outvecs[i].base, outvecs[i].len, - ns_caller, TFM_MEMORY_ACCESS_RW, privileged) != IPC_SUCCESS) { - tfm_panic(); - } - } - - /* - * FixMe: Need to check if the message is unrecognized by the RoT - * Service or incorrectly formatted. - */ - msg = tfm_spm_create_msg(service, handle, PSA_IPC_CALL, ns_caller, invecs, - in_num, outvecs, out_num, outptr); - if (!msg) { - /* FixMe: Need to implement one mechanism to resolve this failure. */ - tfm_panic(); - } - - /* - * Send message and wake up the SP who is waiting on message queue, - * and scheduler triggered - */ - if (tfm_spm_send_event(service, msg) != IPC_SUCCESS) { - /* FixMe: Need to refine failure process here. */ - tfm_panic(); - } - return PSA_SUCCESS; -} - -void tfm_svcall_psa_close(uint32_t *args, int32_t ns_caller) -{ - psa_handle_t handle; - struct tfm_spm_service_t *service; - struct tfm_msg_body_t *msg; - - TFM_ASSERT(args != NULL); - handle = args[0]; - /* It will have no effect if called with the NULL handle */ - if (handle == PSA_NULL_HANDLE) { - return; - } - - /* - * It is a fatal error if an invalid handle was provided that is not the - * null handle.. - */ - service = tfm_spm_get_service_by_handle(handle); - if (!service) { - /* FixMe: Need to implement one mechanism to resolve this failure. */ - tfm_panic(); - } - - /* No input or output needed for close message */ - msg = tfm_spm_create_msg(service, handle, PSA_IPC_DISCONNECT, ns_caller, - NULL, 0, NULL, 0, NULL); - if (!msg) { - /* FixMe: Need to implement one mechanism to resolve this failure. */ - return; - } - - /* - * Send message and wake up the SP who is waiting on message queue, - * and scheduler triggered - */ - tfm_spm_send_event(service, msg); -} - -/*********************** SVC handler for PSA Service APIs ********************/ - -/** - * \brief SVC handler for \ref psa_wait. - * - * \param[in] args Include all input arguments: - * signal_mask, timeout. - * - * \retval >0 At least one signal is asserted. - * \retval 0 No signals are asserted. This is only seen when - * a polling timeout is used. - */ -static psa_signal_t tfm_svcall_psa_wait(uint32_t *args) -{ - psa_signal_t signal_mask; - uint32_t timeout; - struct tfm_spm_ipc_partition_t *partition = NULL; - - TFM_ASSERT(args != NULL); - signal_mask = (psa_signal_t)args[0]; - timeout = args[1]; - - /* - * Timeout[30:0] are reserved for future use. - * SPM must ignore the value of RES. - */ - timeout &= PSA_TIMEOUT_MASK; - - partition = tfm_spm_get_running_partition(); - if (!partition) { - tfm_panic(); - } - - /* - * Expected signals are included in signal wait mask, ignored signals - * should not be set and affect caller thread status. Save this mask for - * further checking while signals are ready to be set. - */ - partition->signal_mask = signal_mask; - - /* - * tfm_event_wait() blocks the caller thread if no signals are available. - * In this case, the return value of this function is temporary set into - * runtime context. After new signal(s) are available, the return value - * is updated with the available signal(s) and blocked thread gets to run. - */ - if (timeout == PSA_BLOCK && (partition->signals & signal_mask) == 0) { - tfm_event_wait(&partition->signal_evnt); - } - - return partition->signals & signal_mask; -} - -/** - * \brief SVC handler for \ref psa_get. - * - * \param[in] args Include all input arguments: signal, msg. - * - * \retval PSA_SUCCESS Success, *msg will contain the delivered - * message. - * \retval PSA_ERR_NOMSG Message could not be delivered. - * \retval "Does not return" The call is invalid because one or more of the - * following are true: - * \arg signal has more than a single bit set. - * \arg signal does not correspond to a RoT Service. - * \arg The RoT Service signal is not currently - * asserted. - * \arg The msg pointer provided is not a valid memory - * reference. - */ -static psa_status_t tfm_svcall_psa_get(uint32_t *args) -{ - psa_signal_t signal; - psa_msg_t *msg = NULL; - struct tfm_spm_service_t *service = NULL; - struct tfm_msg_body_t *tmp_msg = NULL; - struct tfm_spm_ipc_partition_t *partition = NULL; - uint32_t privileged; - - TFM_ASSERT(args != NULL); - signal = (psa_signal_t)args[0]; - msg = (psa_msg_t *)args[1]; - - /* - * Only one message could be retrieved every time for psa_get(). It is a - * fatal error if the input signal has more than a signal bit set. - */ - if (tfm_bitcount(signal) != 1) { - tfm_panic(); - } - - partition = tfm_spm_get_running_partition(); - if (!partition) { - tfm_panic(); - } - privileged = tfm_spm_partition_get_privileged_mode(partition->index); - - /* - * Write the message to the service buffer. It is a fatal error if the - * input msg pointer is not a valid memory reference or not read-write. - */ - if (tfm_memory_check((void *)msg, sizeof(psa_msg_t), - false, TFM_MEMORY_ACCESS_RW, privileged) != IPC_SUCCESS) { - tfm_panic(); - } - - /* - * It is a fatal error if the caller call psa_get() when no message has - * been set. The caller must call this function after a RoT Service signal - * is returned by psa_wait(). - */ - if (partition->signals == 0) { - tfm_panic(); - } - - /* - * It is a fatal error if the RoT Service signal is not currently asserted. - */ - if ((partition->signals & signal) == 0) { - tfm_panic(); - } - - /* - * Get Rot service by signal from partition. It is a fatal error if geting - * failed which mean the input signal is not correspond to a RoT service. - */ - service = tfm_spm_get_service_by_signal(partition, signal); - if (!service) { - tfm_panic(); - } - - tmp_msg = tfm_msg_dequeue(&service->msg_queue); - if (!tmp_msg) { - return PSA_ERR_NOMSG; - } - - tfm_memcpy(msg, &tmp_msg->msg, sizeof(psa_msg_t)); - - /* - * There may be mutiple messages for this RoT Service signal, do not clear - * its mask until no remaining message. - */ - if (tfm_msg_queue_is_empty(&service->msg_queue)) { - partition->signals &= ~signal; - } - - return PSA_SUCCESS; -} - -/** - * \brief SVC handler for \ref psa_set_rhandle. - * - * \param[in] args Include all input arguments: - * msg_handle, rhandle. - * - * \retval void Success, rhandle will be provided with all - * subsequent messages delivered on this - * connection. - * \retval "Does not return" msg_handle is invalid. - */ -static void tfm_svcall_psa_set_rhandle(uint32_t *args) -{ - psa_handle_t msg_handle; - void *rhandle = NULL; - struct tfm_msg_body_t *msg = NULL; - - TFM_ASSERT(args != NULL); - msg_handle = (psa_handle_t)args[0]; - rhandle = (void *)args[1]; - - /* It is a fatal error if message handle is invalid */ - msg = tfm_spm_get_msg_from_handle(msg_handle); - if (!msg) { - tfm_panic(); - } - - /* - * Connection handle is not created while SP is processing PSA_IPC_CONNECT - * message. Store reverse handle temporarily and re-set it after the - * connection created. - */ - if (msg->handle != PSA_NULL_HANDLE) { - tfm_spm_set_rhandle(msg->service, msg->handle, rhandle); - } else { - msg->msg.rhandle = rhandle; - } -} - -/** - * \brief SVC handler for \ref psa_read. - * - * \param[in] args Include all input arguments: - * msg_handle, invec_idx, buffer, num_bytes. - * - * \retval >0 Number of bytes copied. - * \retval 0 There was no remaining data in this input - * vector. - * \retval "Does not return" The call is invalid, one or more of the - * following are true: - * \arg msg_handle is invalid. - * \arg msg_handle does not refer to a - * \ref PSA_IPC_CALL message. - * \arg invec_idx is equal to or greater than - * \ref PSA_MAX_IOVEC. - * \arg the memory reference for buffer is invalid or - * not writable. - */ -static size_t tfm_svcall_psa_read(uint32_t *args) -{ - psa_handle_t msg_handle; - uint32_t invec_idx; - void *buffer = NULL; - size_t num_bytes; - size_t bytes; - struct tfm_msg_body_t *msg = NULL; - uint32_t privileged; - struct tfm_spm_ipc_partition_t *partition = NULL; - - TFM_ASSERT(args != NULL); - msg_handle = (psa_handle_t)args[0]; - invec_idx = args[1]; - buffer = (void *)args[2]; - num_bytes = (size_t)args[3]; - - /* It is a fatal error if message handle is invalid */ - msg = tfm_spm_get_msg_from_handle(msg_handle); - if (!msg) { - tfm_panic(); - } - - partition = msg->service->partition; - privileged = tfm_spm_partition_get_privileged_mode(partition->index); - - /* - * It is a fatal error if message handle does not refer to a PSA_IPC_CALL - * message - */ - if (msg->msg.type != PSA_IPC_CALL) { - tfm_panic(); - } - - /* - * It is a fatal error if invec_idx is equal to or greater than - * PSA_MAX_IOVEC - */ - if (invec_idx >= PSA_MAX_IOVEC) { - tfm_panic(); - } - - /* There was no remaining data in this input vector */ - if (msg->msg.in_size[invec_idx] == 0) { - return 0; - } - - /* - * Copy the client data to the service buffer. It is a fatal error - * if the memory reference for buffer is invalid or not read-write. - */ - if (tfm_memory_check(buffer, num_bytes, false, - TFM_MEMORY_ACCESS_RW, privileged) != IPC_SUCCESS) { - tfm_panic(); - } - - bytes = num_bytes > msg->msg.in_size[invec_idx] ? - msg->msg.in_size[invec_idx] : num_bytes; - - tfm_memcpy(buffer, msg->invec[invec_idx].base, bytes); - - /* There maybe some remaining data */ - msg->invec[invec_idx].base += bytes; - msg->msg.in_size[invec_idx] -= bytes; - - return bytes; -} - -/** - * \brief SVC handler for \ref psa_skip. - * - * \param[in] args Include all input arguments: - * msg_handle, invec_idx, num_bytes. - * - * \retval >0 Number of bytes skipped. - * \retval 0 There was no remaining data in this input - * vector. - * \retval "Does not return" The call is invalid, one or more of the - * following are true: - * \arg msg_handle is invalid. - * \arg msg_handle does not refer to a - * \ref PSA_IPC_CALL message. - * \arg invec_idx is equal to or greater than - * \ref PSA_MAX_IOVEC. - */ -static size_t tfm_svcall_psa_skip(uint32_t *args) -{ - psa_handle_t msg_handle; - uint32_t invec_idx; - size_t num_bytes; - struct tfm_msg_body_t *msg = NULL; - - TFM_ASSERT(args != NULL); - msg_handle = (psa_handle_t)args[0]; - invec_idx = args[1]; - num_bytes = (size_t)args[2]; - - /* It is a fatal error if message handle is invalid */ - msg = tfm_spm_get_msg_from_handle(msg_handle); - if (!msg) { - tfm_panic(); - } - - /* - * It is a fatal error if message handle does not refer to a PSA_IPC_CALL - * message - */ - if (msg->msg.type != PSA_IPC_CALL) { - tfm_panic(); - } - - /* - * It is a fatal error if invec_idx is equal to or greater than - * PSA_MAX_IOVEC - */ - if (invec_idx >= PSA_MAX_IOVEC) { - tfm_panic(); - } - - /* There was no remaining data in this input vector */ - if (msg->msg.in_size[invec_idx] == 0) { - return 0; - } - - /* - * If num_bytes is greater than the remaining size of the input vector then - * the remaining size of the input vector is used. - */ - if (num_bytes > msg->msg.in_size[invec_idx]) { - num_bytes = msg->msg.in_size[invec_idx]; - } - - /* There maybe some remaining data */ - msg->invec[invec_idx].base += num_bytes; - msg->msg.in_size[invec_idx] -= num_bytes; - - return num_bytes; -} - -/** - * \brief SVC handler for \ref psa_write. - * - * \param[in] args Include all input arguments: - * msg_handle, outvec_idx, buffer, num_bytes. - * - * \retval void Success - * \retval "Does not return" The call is invalid, one or more of the - * following are true: - * \arg msg_handle is invalid. - * \arg msg_handle does not refer to a - * \ref PSA_IPC_CALL message. - * \arg outvec_idx is equal to or greater than - * \ref PSA_MAX_IOVEC. - * \arg The memory reference for buffer is invalid. - * \arg The call attempts to write data past the end - * of the client output vector. - */ -static void tfm_svcall_psa_write(uint32_t *args) -{ - psa_handle_t msg_handle; - uint32_t outvec_idx; - void *buffer = NULL; - size_t num_bytes; - struct tfm_msg_body_t *msg = NULL; - uint32_t privileged; - struct tfm_spm_ipc_partition_t *partition = NULL; - - TFM_ASSERT(args != NULL); - msg_handle = (psa_handle_t)args[0]; - outvec_idx = args[1]; - buffer = (void *)args[2]; - num_bytes = (size_t)args[3]; - - /* It is a fatal error if message handle is invalid */ - msg = tfm_spm_get_msg_from_handle(msg_handle); - if (!msg) { - tfm_panic(); - } - - partition = msg->service->partition; - privileged = tfm_spm_partition_get_privileged_mode(partition->index); - - /* - * It is a fatal error if message handle does not refer to a PSA_IPC_CALL - * message - */ - if (msg->msg.type != PSA_IPC_CALL) { - tfm_panic(); - } - - /* - * It is a fatal error if outvec_idx is equal to or greater than - * PSA_MAX_IOVEC - */ - if (outvec_idx >= PSA_MAX_IOVEC) { - tfm_panic(); - } - - /* - * It is a fatal error if the call attempts to write data past the end of - * the client output vector - */ - if (num_bytes > msg->msg.out_size[outvec_idx] - - msg->outvec[outvec_idx].len) { - tfm_panic(); - } - - /* - * Copy the service buffer to client outvecs. It is a fatal error - * if the memory reference for buffer is invalid or not readable. - */ - if (tfm_memory_check(buffer, num_bytes, false, - TFM_MEMORY_ACCESS_RO, privileged) != IPC_SUCCESS) { - tfm_panic(); - } - - tfm_memcpy(msg->outvec[outvec_idx].base + msg->outvec[outvec_idx].len, - buffer, num_bytes); - - /* Update the write number */ - msg->outvec[outvec_idx].len += num_bytes; -} - -static void update_caller_outvec_len(struct tfm_msg_body_t *msg) -{ - int32_t i = 0; - - /* - * FixeMe: abstract these part into dedicated functions to avoid - * accessing thread context in psa layer - */ - TFM_ASSERT(msg->ack_evnt.owner->status == THRD_STAT_BLOCK); - - while (msg->msg.out_size[i] != 0) { - TFM_ASSERT(msg->caller_outvec[i].base == msg->outvec[i].base); - msg->caller_outvec[i].len = msg->outvec[i].len; - i++; - } -} -/** - * \brief SVC handler for \ref psa_reply. - * - * \param[in] args Include all input arguments: - * msg_handle, status. - * - * \retval void Success. - * \retval "Does not return" The call is invalid, one or more of the - * following are true: - * \arg msg_handle is invalid. - * \arg An invalid status code is specified for the - * type of message. - */ -static void tfm_svcall_psa_reply(uint32_t *args) -{ - psa_handle_t msg_handle; - psa_status_t status; - struct tfm_spm_service_t *service = NULL; - struct tfm_msg_body_t *msg = NULL; - psa_handle_t connect_handle; - int32_t ret = PSA_SUCCESS; - - TFM_ASSERT(args != NULL); - msg_handle = (psa_handle_t)args[0]; - status = (psa_status_t)args[1]; - - /* It is a fatal error if message handle is invalid */ - msg = tfm_spm_get_msg_from_handle(msg_handle); - if (!msg) { - tfm_panic(); - } - - /* - * RoT Service information is needed in this function, stored it in message - * body structure. Only two parameters are passed in this function: handle - * and status, so it is useful and simply to do like this. - */ - service = msg->service; - if (!service) { - tfm_panic(); - } - - /* - * Three type of message are passed in this function: CONNECT, CALL, - * DISCONNECT. It needs to process differently for each type. - */ - switch (msg->msg.type) { - case PSA_IPC_CONNECT: - /* - * Reply to PSA_IPC_CONNECT message. Connect handle is created if the - * input status is PSA_SUCCESS. Others return values are based on the - * input status. - */ - if (status == PSA_SUCCESS) { - connect_handle = tfm_spm_create_conn_handle(service); - if (connect_handle == PSA_NULL_HANDLE) { - tfm_panic(); - } - ret = connect_handle; - - /* Set reverse handle after connection created if needed. */ - if (msg->msg.rhandle) { - tfm_spm_set_rhandle(service, connect_handle, msg->msg.rhandle); - } - } else if (status == PSA_CONNECTION_REFUSED) { - ret = PSA_CONNECTION_REFUSED; - } else if (status == PSA_CONNECTION_BUSY) { - ret = PSA_CONNECTION_BUSY; - } else { - tfm_panic(); - } - break; - case PSA_IPC_CALL: - /* Reply to PSA_IPC_CALL message. Return values are based on status */ - if (status == PSA_SUCCESS) { - ret = PSA_SUCCESS; - } else if (status == PSA_DROP_CONNECTION) { - ret = PSA_DROP_CONNECTION; - } else if ((status >= (INT32_MIN + 1)) && - (status <= (INT32_MIN + 127))) { - tfm_panic(); - } else if ((status >= (INT32_MIN + 128)) && (status <= -1)) { - ret = status; - } else if ((status >= 1) && (status <= INT32_MAX)) { - ret = status; - } else { - tfm_panic(); - } - - /* - * The total number of bytes written to a single parameter must be - * reported to the client by updating the len member of the psa_outvec - * structure for the parameter before returning from psa_call(). - */ - update_caller_outvec_len(msg); - break; - case PSA_IPC_DISCONNECT: - /* Service handle is not used anymore */ - tfm_spm_free_conn_handle(service, msg->handle); - - /* - * If the message type is PSA_IPC_DISCONNECT, then the status code is - * ignored - */ - break; - default: - tfm_panic(); - } - - tfm_event_wake(&msg->ack_evnt, ret); - - /* Message should not be unsed anymore */ - tfm_spm_free_msg(msg); -} - -/** - * \brief SVC handler for \ref psa_notify. - * - * \param[in] args Include all input arguments: partition_id. - * - * \retval void Success. - * \retval "Does not return" partition_id does not correspond to a Secure - * Partition. - */ -static void tfm_svcall_psa_notify(uint32_t *args) -{ - int32_t partition_id; - struct tfm_spm_ipc_partition_t *partition = NULL; - - TFM_ASSERT(args != NULL); - partition_id = (int32_t)args[0]; - - /* - * The value of partition_id must be greater than zero as the target of - * notification must be a Secure Partition, providing a Non-secure - * Partition ID is a fatal error. - */ - if (!TFM_CLIENT_ID_IS_S(partition_id)) { - tfm_panic(); - } - - /* - * It is a fatal error if partition_id does not correspond to a Secure - * Partition. - */ - partition = tfm_spm_get_partition_by_id(partition_id); - if (!partition) { - tfm_panic(); - } - - partition->signals |= PSA_DOORBELL; - - /* - * The target partition may be blocked with waiting for signals after - * called psa_wait(). Set the return value with the available signals - * before wake it up with tfm_event_signal(). - */ - tfm_event_wake(&partition->signal_evnt, - partition->signals & partition->signal_mask); -} - -/** - * \brief SVC handler for \ref psa_clear. - * - * \retval void Success. - * \retval "Does not return" The Secure Partition's doorbell signal is not - * currently asserted. - */ -static void tfm_svcall_psa_clear(uint32_t *args) -{ - struct tfm_spm_ipc_partition_t *partition = NULL; - - partition = tfm_spm_get_running_partition(); - if (!partition) { - tfm_panic(); - } - - /* - * It is a fatal error if the Secure Partition's doorbell signal is not - * currently asserted. - */ - if ((partition->signals & PSA_DOORBELL) == 0) { - tfm_panic(); - } - partition->signals &= ~PSA_DOORBELL; -} - -/** - * \brief SVC handler for \ref psa_eoi. - * - * \param[in] args Include all input arguments: irq_signal. - * - * \retval void Success. - * \retval "Does not return" The call is invalid, one or more of the - * following are true: - * \arg irq_signal is not an interrupt signal. - * \arg irq_signal indicates more than one signal. - * \arg irq_signal is not currently asserted. - */ -static void tfm_svcall_psa_eoi(uint32_t *args) -{ - psa_signal_t irq_signal; - struct tfm_spm_ipc_partition_t *partition = NULL; - - TFM_ASSERT(args != NULL); - irq_signal = (psa_signal_t)args[0]; - - partition = tfm_spm_get_running_partition(); - if (!partition) { - tfm_panic(); - } - - /* - * FixMe: It is a fatal error if passed signal is not an interrupt signal. - */ - - /* It is a fatal error if passed signal indicates more than one signals. */ - if (tfm_bitcount(partition->signals) != 1) { - tfm_panic(); - } - - /* It is a fatal error if passed signal is not currently asserted */ - if ((partition->signals & irq_signal) == 0) { - tfm_panic(); - } - - partition->signals &= ~irq_signal; - - /* FixMe: re-enable interrupt */ -} - -int32_t SVC_Handler_IPC(tfm_svc_number_t svc_num, uint32_t *ctx, uint32_t lr) -{ - switch (svc_num) { - case TFM_SVC_SCHEDULE: - tfm_thrd_activate_schedule(); - break; - case TFM_SVC_EXIT_THRD: - tfm_svcall_thrd_exit(); - break; - case TFM_SVC_PSA_FRAMEWORK_VERSION: - return tfm_svcall_psa_framework_version(); - case TFM_SVC_PSA_VERSION: - return tfm_svcall_psa_version(ctx, 0); - case TFM_SVC_PSA_CONNECT: - return tfm_svcall_psa_connect(ctx, 0); - case TFM_SVC_PSA_CALL: - return tfm_svcall_psa_call(ctx, 0, lr); - case TFM_SVC_PSA_CLOSE: - tfm_svcall_psa_close(ctx, 0); - break; - case TFM_SVC_PSA_WAIT: - return tfm_svcall_psa_wait(ctx); - case TFM_SVC_PSA_GET: - return tfm_svcall_psa_get(ctx); - case TFM_SVC_PSA_SET_RHANDLE: - tfm_svcall_psa_set_rhandle(ctx); - break; - case TFM_SVC_PSA_READ: - return tfm_svcall_psa_read(ctx); - case TFM_SVC_PSA_SKIP: - return tfm_svcall_psa_skip(ctx); - case TFM_SVC_PSA_WRITE: - tfm_svcall_psa_write(ctx); - break; - case TFM_SVC_PSA_REPLY: - tfm_svcall_psa_reply(ctx); - break; - case TFM_SVC_PSA_NOTIFY: - tfm_svcall_psa_notify(ctx); - break; - case TFM_SVC_PSA_CLEAR: - tfm_svcall_psa_clear(ctx); - break; - case TFM_SVC_PSA_EOI: - tfm_svcall_psa_eoi(ctx); - break; - default: - break; - } - return PSA_SUCCESS; -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_thread.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_thread.c deleted file mode 100644 index 21f22091a7a..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_thread.c +++ /dev/null @@ -1,181 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#include -#include -#include "tfm_arch_v8m.h" -#include "tfm_thread.h" -#include "tfm_utils.h" -#include "tfm_memory_utils.h" -#include "tfm_svc.h" -#include "spm_api.h" - -/* Force ZERO in case ZI(bss) clear is missing */ -static struct tfm_thrd_ctx *p_thrd_head = NULL; -static struct tfm_thrd_ctx *p_runn_head = NULL; -static struct tfm_thrd_ctx *p_curr_thrd = NULL; - -/* Define Macro to fetch global to support future expansion (PERCPU e.g.) */ -#define LIST_HEAD p_thrd_head -#define RUNN_HEAD p_runn_head -#define CURR_THRD p_curr_thrd - -static struct tfm_thrd_ctx *find_next_running_thread(struct tfm_thrd_ctx *pth) -{ - while (pth && pth->status != THRD_STAT_RUNNING) { - pth = pth->next; - } - - return pth; -} - -/* To get next running thread for scheduler */ -struct tfm_thrd_ctx *tfm_thrd_next_thread(void) -{ - /* - * First RUNNING thread has highest priority since threads are sorted with - * priority. - */ - return find_next_running_thread(RUNN_HEAD); -} - -/* To get current thread for caller */ -struct tfm_thrd_ctx *tfm_thrd_curr_thread() -{ - return CURR_THRD; -} - -/* Insert a new thread into list by descending priority (Highest at head) */ -static void insert_by_prior(struct tfm_thrd_ctx **head, - struct tfm_thrd_ctx *node) -{ - if (*head == NULL || (node->prior <= (*head)->prior)) { - node->next = *head; - *head = node; - } else { - struct tfm_thrd_ctx *iter = *head; - - while (iter->next && (node->prior > iter->next->prior)) { - iter = iter->next; - } - node->next = iter->next; - iter->next = node; - } -} - -/* - * Set first running thread as head to reduce enumerate - * depth while searching for a first running thread. - */ -static void update_running_head(struct tfm_thrd_ctx **runn, - struct tfm_thrd_ctx *node) -{ - if ((node->status == THRD_STAT_RUNNING) && - (*runn == NULL || (node->prior < (*runn)->prior))) { - *runn = node; - } else { - *runn = find_next_running_thread(LIST_HEAD); - } -} - -/* Set context members only. No validation here */ -void tfm_thrd_init(struct tfm_thrd_ctx *pth, - tfm_thrd_func_t pfn, void *param, - uint8_t *sp_base, uint8_t *sp_top) -{ - pth->prior = THRD_PRIOR_MEDIUM; - pth->status = THRD_STAT_CREATING; - pth->pfn = pfn; - pth->param = param; - pth->sp_base = sp_base; - pth->sp_top = sp_top; -} - -uint32_t tfm_thrd_start(struct tfm_thrd_ctx *pth) -{ - /* Validate parameters before really start */ - if ((pth->status != THRD_STAT_CREATING) || - (pth->pfn == NULL) || - (pth->sp_base == NULL) || - (pth->sp_top == NULL)) { - return THRD_ERR_INVALID_PARAM; - } - - /* Thread management runs in handler mode; set context for thread mode. */ - tfm_initialize_context(&pth->state_ctx, - (uint32_t)pth->param, (uint32_t)pth->pfn, - (uint32_t)pth->sp_base, (uint32_t)pth->sp_top); - - /* Insert a new thread with priority */ - insert_by_prior(&LIST_HEAD, pth); - - /* Mark it as RUNNING after insertion */ - tfm_thrd_set_status(pth, THRD_STAT_RUNNING); - - return THRD_SUCCESS; -} - -void tfm_thrd_set_status(struct tfm_thrd_ctx *pth, uint32_t new_status) -{ - TFM_ASSERT(pth != NULL && new_status < THRD_STAT_INVALID); - - pth->status = new_status; - update_running_head(&RUNN_HEAD, pth); -} - -/* Scheduling won't happen immediately but after the exception returns */ -void tfm_thrd_activate_schedule(void) -{ - tfm_trigger_pendsv(); -} - -void tfm_thrd_start_scheduler(struct tfm_thrd_ctx *pth) -{ - /* - * There is no selected thread before scheduler start, assign - * a caller provided thread as current thread. This function - * should get called only ONCE; further calling triggers assert. - */ - TFM_ASSERT(CURR_THRD == NULL); - TFM_ASSERT(pth != NULL); - - CURR_THRD = pth; - tfm_thrd_activate_schedule(); -} - -/* Remove current thread out of the schedulable list */ -void tfm_svcall_thrd_exit(void) -{ - CURR_THRD->status = THRD_STAT_DETACH; - tfm_trigger_pendsv(); -} - -__attribute__((section("SFN"))) -void tfm_thrd_exit(void) -{ - SVC(TFM_SVC_EXIT_THRD); - while (1) { - ; - } -} - -void tfm_thrd_context_switch(struct tfm_state_context_ext *ctxb, - struct tfm_thrd_ctx *prev, - struct tfm_thrd_ctx *next) -{ - TFM_ASSERT(prev != NULL); - TFM_ASSERT(next != NULL); - - /* - * First, update latest context into the current thread context. - * Then, update background context with next thread's context. - */ - tfm_memcpy(&prev->state_ctx.ctxb, ctxb, sizeof(*ctxb)); - tfm_memcpy(ctxb, &next->state_ctx.ctxb, sizeof(next->state_ctx.ctxb)); - - /* Update current thread indicator */ - CURR_THRD = next; -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_utils.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_utils.c deleted file mode 100644 index 1586633a742..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_utils.c +++ /dev/null @@ -1,32 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#include -#include -#include "tfm_utils.h" - -void tfm_panic(void) -{ - while (1) - ; -} - -int32_t tfm_bitcount(uint32_t n) -{ - int32_t count = 0; - uint8_t tmp; - - while (n) { - tmp = n & 0xFF; - while (tmp) { - count += tmp & 0x1; - tmp >>= 1; - } - n >>= 8; - } - - return count; -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_wait.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_wait.c deleted file mode 100644 index 44c801c43a5..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/tfm_wait.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ -#include -#include "tfm_thread.h" -#include "tfm_utils.h" -#include "tfm_wait.h" - -void tfm_event_wait(struct tfm_event_t *pevnt) -{ - TFM_ASSERT(pevnt && pevnt->magic == TFM_EVENT_MAGIC); - - pevnt->owner = tfm_thrd_curr_thread(); - tfm_thrd_set_status(pevnt->owner, THRD_STAT_BLOCK); - tfm_thrd_activate_schedule(); -} - -void tfm_event_wake(struct tfm_event_t *pevnt, uint32_t retval) -{ - TFM_ASSERT(pevnt && pevnt->magic == TFM_EVENT_MAGIC); - - if (pevnt->owner && pevnt->owner->status == THRD_STAT_BLOCK) { - tfm_thrd_set_status(pevnt->owner, THRD_STAT_RUNNING); - tfm_thrd_set_retval(pevnt->owner, retval); - tfm_thrd_activate_schedule(); - } -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/secure_utilities.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/secure_utilities.h deleted file mode 100644 index 82a4f5a8a0c..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/secure_utilities.h +++ /dev/null @@ -1,109 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __SECURE_UTILITIES_H__ -#define __SECURE_UTILITIES_H__ - -#include -#include "cmsis_compiler.h" -#include "tfm_svc.h" - -#define EXC_RETURN_INDICATOR (0xF << 28) -#define EXC_RETURN_SECURITY_STACK_STATUS_MASK (0x3 << 5) -#define EXC_RETURN_SECURE_STACK (1 << 6) -#define EXC_RETURN_FPU_FRAME_BASIC (1 << 4) -#define EXC_RETURN_MODE_THREAD (1 << 3) -#define EXC_RETURN_STACK_PROCESS (1 << 2) -#define EXC_RETURN_EXC_SECURE (1) - -#define EXC_NUM_THREAD_MODE (0) -#define EXC_NUM_SVCALL (11) -#define EXC_NUM_PENDSV (14) -#define EXC_NUM_SYSTICK (15) - -#define printf(...) - -/* Disable NS exceptions by setting NS PRIMASK to 1 */ -#define TFM_NS_EXC_DISABLE() __TZ_set_PRIMASK_NS(1) -/* Enable NS exceptions by setting NS PRIMASK to 0 */ -#define TFM_NS_EXC_ENABLE() __TZ_set_PRIMASK_NS(0) - -struct tfm_exc_stack_t { - uint32_t R0; - uint32_t R1; - uint32_t R2; - uint32_t R3; - uint32_t R12; - uint32_t LR; - uint32_t RetAddr; - uint32_t XPSR; -}; - -#ifdef TFM_CORE_DEBUG -#define LOG_MSG_HDLR(MSG) printf("[Sec Handler] %s\r\n", MSG) -#else -/* FixMe: redirect to secure log area */ -#define LOG_MSG_HDLR(MSG) printf("[Sec Handler] %s\r\n", MSG) -#endif - -#define LOG_MSG_THR(MSG) \ - __ASM volatile("MOV r0, %0\n" \ - "SVC %1\n" \ - : : "r" (MSG), "I" (TFM_SVC_PRINT)) - -#define LOG_MSG(MSG) \ - do { \ - if (__get_active_exc_num()) { \ - LOG_MSG_HDLR(MSG); \ - } else { \ - LOG_MSG_THR(MSG); \ - } \ - } while (0) - -#ifdef TFM_CORE_DEBUG -#define ERROR_MSG(MSG) printf("[Sec Error] %s\r\n", MSG) -#else -/* FixMe: redirect to secure log area */ -#define ERROR_MSG(MSG) printf("[Sec Error] %s\r\n", MSG) -#endif - -/** - * \brief Get Link Register - * \details Returns the value of the Link Register (LR) - * \return LR value - */ - -__attribute__ ((always_inline)) __STATIC_INLINE uint32_t __get_LR(void) -{ - register uint32_t result; - - __ASM volatile ("MOV %0, LR\n" : "=r" (result)); - return result; -} - -__attribute__ ((always_inline)) -__STATIC_INLINE uint32_t __get_active_exc_num(void) -{ - IPSR_Type IPSR; - - /* if non-zero, exception is active. NOT banked S/NS */ - IPSR.w = __get_IPSR(); - return IPSR.b.ISR; -} - -__attribute__ ((always_inline)) -__STATIC_INLINE void __set_CONTROL_SPSEL(uint32_t SPSEL) -{ - CONTROL_Type ctrl; - - ctrl.w = __get_CONTROL(); - ctrl.b.SPSEL = SPSEL; - __set_CONTROL(ctrl.w); - __ISB(); -} - -#endif /* __SECURE_UTILITIES_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_boot_data.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_boot_data.c deleted file mode 100644 index 44c38a35ca7..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_boot_data.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include "bl2/include/tfm_boot_status.h" -#include "tfm_memory_utils.h" -#include "tfm_internal.h" -#include "tfm_api.h" -#include "flash_layout.h" -#include "secure_fw/spm/spm_api.h" -#ifdef TFM_PSA_API -#include "tfm_internal_defines.h" -#include "tfm_utils.h" -#include "psa_service.h" -#include "tfm_thread.h" -#include "tfm_wait.h" -#include "tfm_message_queue.h" -#include "tfm_spm.h" -#endif - -/*! - * \def BOOT_DATA_VALID - * - * \brief Indicates that shared data between bootloader and runtime firmware was - * passed the sanity check with success. - */ -#define BOOT_DATA_VALID (1u) - -/*! - * \def BOOT_DATA_INVALID - * - * \brief Indicates that shared data between bootloader and runtime firmware was - * failed on sanity check. - */ -#define BOOT_DATA_INVALID (0u) - -/*! - * \var is_boot_data_valid - * - * \brief Indicates the status of shared data between bootloader and runtime - * firmware - */ -static uint32_t is_boot_data_valid = BOOT_DATA_INVALID; - -void tfm_core_validate_boot_data(void) -{ - struct tfm_boot_data *boot_data; - - boot_data = (struct tfm_boot_data *)BOOT_TFM_SHARED_DATA_BASE; - - /* FixMe: Enhance sanity check of shared memory area, it might be invalid: - * - temporal exposure of RAM to non-secure actors - * - mismatched addresses - * - version mismatch between bootloader and runtime binary - * - etc. - */ - if (boot_data->header.tlv_magic == SHARED_DATA_TLV_INFO_MAGIC) { - is_boot_data_valid = BOOT_DATA_VALID; - } -} - -void tfm_core_get_boot_data_handler(uint32_t args[]) -{ - uint8_t tlv_major = (uint8_t)args[0]; - uint8_t *buf_start = (uint8_t *)args[1]; - uint16_t buf_size = (uint16_t)args[2]; - uint8_t *ptr; - struct tfm_boot_data *boot_data; - struct shared_data_tlv_entry tlv_entry; - uintptr_t tlv_end, offset; -#ifndef TFM_PSA_API - uint32_t running_partition_idx = - tfm_spm_partition_get_running_partition_idx(); - uint32_t res; -#else - struct tfm_spm_ipc_partition_t *partition = NULL; - uint32_t privileged; -#endif - -#ifndef TFM_PSA_API - /* Make sure that the output pointer points to a memory area that is owned - * by the partition - */ - res = tfm_core_check_buffer_access(running_partition_idx, - (void *)buf_start, - buf_size, - 2); /* Check 4 bytes alignment */ - if (!res) { - /* Not in accessible range, return error */ - args[0] = TFM_ERROR_INVALID_PARAMETER; - return; - } -#else - partition = tfm_spm_get_running_partition(); - if (!partition) { - tfm_panic(); - } - privileged = tfm_spm_partition_get_privileged_mode(partition->index); - - if (tfm_memory_check(buf_start, buf_size, false, TFM_MEMORY_ACCESS_RW, - privileged) != IPC_SUCCESS) { - /* Not in accessible range, return error */ - args[0] = TFM_ERROR_INVALID_PARAMETER; - return; - } -#endif - - /* FixMe: Check whether caller has access right to given tlv_major_type */ - - if (is_boot_data_valid != BOOT_DATA_VALID) { - args[0] = TFM_ERROR_INVALID_PARAMETER; - return; - } - - /* Get the boundaries of TLV section */ - boot_data = (struct tfm_boot_data *)BOOT_TFM_SHARED_DATA_BASE; - tlv_end = BOOT_TFM_SHARED_DATA_BASE + boot_data->header.tlv_tot_len; - offset = BOOT_TFM_SHARED_DATA_BASE + SHARED_DATA_HEADER_SIZE; - - /* Add header to output buffer as well */ - if (buf_size < SHARED_DATA_HEADER_SIZE) { - args[0] = TFM_ERROR_INVALID_PARAMETER; - return; - } else { - boot_data = (struct tfm_boot_data *)buf_start; - boot_data->header.tlv_magic = SHARED_DATA_TLV_INFO_MAGIC; - boot_data->header.tlv_tot_len = SHARED_DATA_HEADER_SIZE; - ptr = boot_data->data; - } - - /* Iterates over the TLV section and copy TLVs with requested major - * type to the provided buffer. - */ - for (; offset < tlv_end; offset += tlv_entry.tlv_len) { - /* Create local copy to avoid unaligned access */ - tfm_memcpy(&tlv_entry, - (const void *)offset, - SHARED_DATA_ENTRY_HEADER_SIZE); - if (GET_MAJOR(tlv_entry.tlv_type) == tlv_major) { - /* Check buffer overflow */ - if (((ptr - buf_start) + tlv_entry.tlv_len) > buf_size) { - args[0] = TFM_ERROR_INVALID_PARAMETER; - return; - } - - tfm_memcpy(ptr, (const void *)offset, tlv_entry.tlv_len); - - ptr += tlv_entry.tlv_len; - boot_data->header.tlv_tot_len += tlv_entry.tlv_len; - } - } - args[0] = TFM_SUCCESS; - return; -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_core.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_core.c deleted file mode 100644 index 5a830916013..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_core.c +++ /dev/null @@ -1,234 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include "region_defs.h" -#include "tfm_core.h" -#include "tfm_internal.h" -#include "tfm_api.h" -#include "platform/include/tfm_spm_hal.h" -#include "secure_utilities.h" -#include "secure_fw/spm/spm_api.h" -#include "secure_fw/include/tfm_spm_services_api.h" -#ifdef TFM_PSA_API -#include "psa_client.h" -#include "psa_service.h" -#include "tfm_thread.h" -#include "tfm_wait.h" -#include "tfm_message_queue.h" -#include "tfm_spm.h" -#endif - -/* - * Avoids the semihosting issue - * FixMe: describe 'semihosting issue' - */ -#if defined(__ARMCC_VERSION) -__asm(" .global __ARM_use_no_argv\n"); -#endif - -#if defined ( __GNUC__ ) -/* The macro cmse_nsfptr_create defined in the gcc library uses the non-standard - * gcc C lanuage extension 'typeof'. TF-M is built with '-std=c99' so typeof - * cannot be used in the code. As a workaround cmse_nsfptr_create is redefined - * here to use only standard language elements. */ -#undef cmse_nsfptr_create -#define cmse_nsfptr_create(p) ((intptr_t) (p) & ~1) -#endif - -#ifndef TFM_LVL -#error TFM_LVL is not defined! -#endif -#if (TFM_LVL != 1) && (TFM_LVL != 2) && (TFM_LVL != 3) -#error Only TFM_LVL 1, 2 and 3 are supported! -#endif - -#ifndef TFM_PSA_API -/* Macros to pick linker symbols and allow to form the partition data base */ -#define REGION(a, b, c) a##b##c -#define REGION_NAME(a, b, c) REGION(a, b, c) -#define REGION_DECLARE(a, b, c) extern uint32_t REGION_NAME(a, b, c) - -REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base); -REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit); -#endif - -void configure_ns_code(void) -{ - /* SCB_NS.VTOR points to the Non-secure vector table base address */ - SCB_NS->VTOR = tfm_spm_hal_get_ns_VTOR(); - - /* Setups Main stack pointer of the non-secure code */ - uint32_t ns_msp = tfm_spm_hal_get_ns_MSP(); - - __TZ_set_MSP_NS(ns_msp); - - /* Get the address of non-secure code entry point to jump there */ - uint32_t entry_ptr = tfm_spm_hal_get_ns_entry_point(); - - /* Clears LSB of the function address to indicate the function-call - * will perform the switch from secure to non-secure - */ - ns_entry = (nsfptr_t) cmse_nsfptr_create(entry_ptr); -} - -int32_t tfm_core_init(void) -{ - /* Enables fault handlers */ - enable_fault_handlers(); - - /* Configures the system reset request properties */ - system_reset_cfg(); - - /* Configures debug authentication */ - tfm_spm_hal_init_debug(); - - __enable_irq(); - - LOG_MSG("Secure image initializing!"); - -#ifdef TFM_CORE_DEBUG - printf("TFM level is: %d\r\n", TFM_LVL); -#endif - - tfm_core_validate_boot_data(); - - tfm_spm_hal_init_isolation_hw(); - - configure_ns_code(); - - /* Configures all interrupts to retarget NS state, except for - * secure peripherals - */ - nvic_interrupt_target_state_cfg(); - /* Enable secure peripherals interrupts */ - nvic_interrupt_enable(); - -#ifdef TFM_PSA_API - /* FixMe: In case of IPC messaging, scratch area must not be referenced - * These variables should be removed when all obsolete references are - * removed from the codebase - */ - tfm_scratch_area = NULL; - tfm_scratch_area_size = 0; -#else - tfm_scratch_area = - (uint8_t *)®ION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base); - tfm_scratch_area_size = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit) - - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base); -#endif - return 0; -} - -static int32_t tfm_core_set_secure_exception_priorities(void) -{ - uint32_t VECTKEY; - SCB_Type *scb = SCB; - uint32_t AIRCR; - - /* Set PRIS flag is AIRCR */ - AIRCR = scb->AIRCR; - VECTKEY = (~AIRCR & SCB_AIRCR_VECTKEYSTAT_Msk); - scb->AIRCR = SCB_AIRCR_PRIS_Msk | - VECTKEY | - (AIRCR & ~SCB_AIRCR_VECTKEY_Msk); - - /* FixMe: Explicitly set secure fault and Secure SVC priority to highest */ - - /* - * Set secure PendSV priority to the lowest in SECURE state. - * - * IMPORTANT NOTE: - * - * Although the priority of the secure PendSV must be the lowest possible - * among other interrupts in the Secure state, it must be ensured that - * PendSV is not preempted nor masked by Non-Secure interrupts to ensure - * the integrity of the Secure operation. - * When AIRCR.PRIS is set, the Non-Secure execution can act on - * FAULTMASK_NS, PRIMASK_NS or BASEPRI_NS register to boost its priority - * number up to the value 0x80. - * For this reason, set the priority of the PendSV interrupt to the next - * priority level configurable on the platform, just below 0x80. - */ - NVIC_SetPriority(PendSV_IRQn, (1 << (__NVIC_PRIO_BITS - 1)) - 1); - - return TFM_SUCCESS; -} - -void tfm_core_spm_request_handler(const struct tfm_exc_stack_t *svc_ctx) -{ - uint32_t *res_ptr = (uint32_t *)&svc_ctx->R0; - - /* FixMe: check if caller partition is permitted to make an SPM request */ - - switch (svc_ctx->R0) { - case TFM_SPM_REQUEST_RESET_VOTE: - /* FixMe: this is a placeholder for checks to be performed before - * allowing execution of reset - */ - *res_ptr = TFM_SUCCESS; - break; - default: - *res_ptr = TFM_ERROR_INVALID_PARAMETER; - } -} - -int main(void) -{ - if (tfm_core_init() != 0) { - /* Placeholder for error handling, currently ignored. */ - } - - if (tfm_spm_db_init() != SPM_ERR_OK) { - /* Placeholder for error handling, currently ignored. */ - } - - tfm_spm_hal_setup_isolation_hw(); - -#ifndef TFM_PSA_API - tfm_spm_partition_set_state(TFM_SP_CORE_ID, SPM_PARTITION_STATE_RUNNING); - - extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; - uint32_t psp_stack_bottom = (uint32_t)Image$$ARM_LIB_STACK$$ZI$$Base; - - __set_PSPLIM(psp_stack_bottom); - - if (tfm_spm_partition_init() != SPM_ERR_OK) { - /* Certain systems might refuse to boot altogether if partitions fail - * to initialize. This is a placeholder for such an error handler - */ - } - - /* - * Prioritise secure exceptions to avoid NS being able to pre-empt - * secure SVC or SecureFault. Do it before PSA API initialization. - */ - tfm_core_set_secure_exception_priorities(); - - /* We close the TFM_SP_CORE_ID partition, because its only purpose is - * to be able to pass the state checks for the tests started from secure. - */ - tfm_spm_partition_set_state(TFM_SP_CORE_ID, SPM_PARTITION_STATE_CLOSED); - tfm_spm_partition_set_state(TFM_SP_NON_SECURE_ID, - SPM_PARTITION_STATE_RUNNING); - -#ifdef TFM_CORE_DEBUG - /* Jumps to non-secure code */ - LOG_MSG("Jumping to non-secure code..."); -#endif - - jump_to_ns_code(); -#else - /* - * Prioritise secure exceptions to avoid NS being able to pre-empt - * secure SVC or SecureFault. Do it before PSA API initialization. - */ - tfm_core_set_secure_exception_priorities(); - tfm_spm_init(); -#endif -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_core.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_core.h deleted file mode 100644 index 94470d0bdbd..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_core.h +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_CORE_H__ -#define __TFM_CORE_H__ - -#include -#include "tfm_svc.h" -#include "secure_utilities.h" - -extern uint32_t tfm_scratch_area_size; -extern uint8_t *tfm_scratch_area; - -#endif /* __TFM_CORE_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_handler.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_handler.c deleted file mode 100644 index 79caca211c5..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_handler.c +++ /dev/null @@ -1,225 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include - -#include "secure_utilities.h" -#include "tfm_svc.h" -#include "tfm_secure_api.h" -#include "region_defs.h" -#include "tfm_api.h" -#include "tfm_internal.h" -#include "tfm_memory_utils.h" -#ifdef TFM_PSA_API -#include -#include "tfm_svcalls.h" -#endif -#include "platform/mbed_toolchain.h" - -/* This SVC handler is called when a secure partition requests access to a - * buffer area - */ -extern int32_t tfm_core_set_buffer_area_handler(const uint32_t args[]); -#ifdef TFM_PSA_API -extern void tfm_psa_ipc_request_handler(const uint32_t svc_args[]); -#endif - -struct tfm_fault_context_s { - uint32_t R0; - uint32_t R1; - uint32_t R2; - uint32_t R3; - uint32_t R12; - uint32_t LR; - uint32_t ReturnAddress; - uint32_t RETPSR; -} tfm_fault_context; - -#if defined(__ARM_ARCH_8M_MAIN__) -/** - * \brief Overwrites default Secure fault handler. - */ -void SecureFault_Handler(void) -{ - /* figure out context from which we landed in fault handler */ - uint32_t lr = __get_LR(); - uint32_t sp; - - if (lr & EXC_RETURN_SECURE_STACK) { - if (lr & EXC_RETURN_STACK_PROCESS) { - sp = __get_PSP(); - } else { - sp = __get_MSP(); - } - } else { - if (lr & EXC_RETURN_STACK_PROCESS) { - sp = __TZ_get_PSP_NS(); - } else { - sp = __TZ_get_MSP_NS(); - } - } - - /* Only save the context if sp is valid */ - if ((sp >= S_DATA_START && - sp <= (S_DATA_LIMIT - sizeof(tfm_fault_context)) + 1) || - (sp >= NS_DATA_START && - sp <= (NS_DATA_LIMIT - sizeof(tfm_fault_context)) + 1)) { - tfm_memcpy(&tfm_fault_context, - (const void *)sp, - sizeof(tfm_fault_context)); - } - - LOG_MSG("Oops... Secure fault!!! You're not going anywhere!"); - while (1) { - ; - } -} -#elif defined(__ARM_ARCH_8M_BASE__) -/** - * \brief Overwrites default Hard fault handler. - * - * In case of a baseline implementation fault conditions that would generate a - * SecureFault in a mainline implementation instead generate a Secure HardFault. - */ -void HardFault_Handler(void) -{ - /* In a baseline implementation there is no way, to find out whether this is - * a hard fault triggered directly, or another fault that has been - * escalated. - */ - while (1) { - ; - } -} -#else -#error "Unsupported ARM Architecture." -#endif - -#if defined(__ARM_ARCH_8M_MAIN__) -__attribute__((naked)) void SVC_Handler(void) -{ - __ASM volatile( - "TST lr, #4\n" /* Check store SP in thread mode to r0 */ - "IT EQ\n" - "BXEQ lr\n" - "MRS r0, PSP\n" - "MOV r1, lr\n" - "BL SVCHandler_main\n" - "BX r0\n" - ); -} -#elif defined(__ARM_ARCH_8M_BASE__) -__attribute__((naked)) void SVC_Handler(void) -{ - __ASM volatile( - ".syntax unified\n" - "MOVS r0, #4\n" /* Check store SP in thread mode to r0 */ - "MOV r1, lr\n" - "TST r0, r1\n" - "BEQ handler\n" - "MRS r0, PSP\n" /* Coming from thread mode */ - "B sp_stored\n" - "handler:\n" - "BX lr\n" /* Coming from handler mode */ - "sp_stored:\n" - "MOV r1, lr\n" - "BL SVCHandler_main\n" - "BX r0\n" - ); -} -#else -#error "Unsupported ARM Architecture." -#endif - -MBED_USED uint32_t SVCHandler_main(uint32_t *svc_args, uint32_t lr) -{ - uint8_t svc_number; - /* - * Stack contains: - * r0, r1, r2, r3, r12, r14 (lr), the return address and xPSR - * First argument (r0) is svc_args[0] - */ - if (lr & EXC_RETURN_SECURE_STACK) { - /* SV called directly from secure context. Check instruction for - * svc_number - */ - svc_number = ((uint8_t *)svc_args[6])[-2]; - } else { - /* Secure SV executing with NS return. - * NS cannot directly trigger S SVC so this should not happen - * FixMe: check for security implications - */ - return lr; - } - switch (svc_number) { -#ifdef TFM_PSA_API - case TFM_SVC_IPC_REQUEST: - tfm_psa_ipc_request_handler(svc_args); - break; - case TFM_SVC_SCHEDULE: - case TFM_SVC_EXIT_THRD: - case TFM_SVC_PSA_FRAMEWORK_VERSION: - case TFM_SVC_PSA_VERSION: - case TFM_SVC_PSA_CONNECT: - case TFM_SVC_PSA_CALL: - case TFM_SVC_PSA_CLOSE: - case TFM_SVC_PSA_WAIT: - case TFM_SVC_PSA_GET: - case TFM_SVC_PSA_SET_RHANDLE: - case TFM_SVC_PSA_READ: - case TFM_SVC_PSA_SKIP: - case TFM_SVC_PSA_WRITE: - case TFM_SVC_PSA_REPLY: - case TFM_SVC_PSA_NOTIFY: - case TFM_SVC_PSA_CLEAR: - case TFM_SVC_PSA_EOI: - svc_args[0] = SVC_Handler_IPC(svc_number, svc_args, lr); - break; -#else - case TFM_SVC_SFN_REQUEST: - lr = tfm_core_partition_request_svc_handler(svc_args, lr); - break; - case TFM_SVC_SFN_RETURN: - lr = tfm_core_partition_return_handler(lr); - break; - case TFM_SVC_VALIDATE_SECURE_CALLER: - tfm_core_validate_secure_caller_handler(svc_args); - break; - case TFM_SVC_GET_CALLER_CLIENT_ID: - tfm_core_get_caller_client_id_handler(svc_args); - break; - case TFM_SVC_SPM_REQUEST: - tfm_core_spm_request_handler((struct tfm_exc_stack_t *)svc_args); - break; - case TFM_SVC_MEMORY_CHECK: - tfm_core_memory_permission_check_handler(svc_args); - break; - case TFM_SVC_SET_SHARE_AREA: - tfm_core_set_buffer_area_handler(svc_args); - break; -#endif - case TFM_SVC_PRINT: - printf("\e[1;34m[Sec Thread] %s\e[0m\r\n", (char *)svc_args[0]); - break; - case TFM_SVC_GET_BOOT_DATA: - tfm_core_get_boot_data_handler(svc_args); - break; - default: - LOG_MSG("Unknown SVC number requested!"); - break; - } - - return lr; -} - -void tfm_access_violation_handler(void) -{ - while (1) { - ; - } -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_internal.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_internal.h deleted file mode 100644 index 62734788333..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_internal.h +++ /dev/null @@ -1,100 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include "secure_utilities.h" - -#ifndef __TFM_INTERNAL_H__ -#define __TFM_INTERNAL_H__ - -/* - * This function pointer is meant to only hold non secure function pointers. - * It will be turned into a non-secure one (LSB cleared) before being called - * whatever happens anyway (unless cast to another function pointer type). - * Registers will be cleared before branching so that no information leaks - * from secure to non-secure world. - */ -typedef void __attribute__((cmse_nonsecure_call)) (*nsfptr_t) (void); - -extern nsfptr_t ns_entry; - -/** - * \brief Signal that secure partition initialisation is finished - */ -void tfm_secure_api_init_done(void); - -/** - * \brief Jumps to non-secure code. - */ -void jump_to_ns_code(void); - -/** - * \brief Called if veneer is running in thread mode - */ -uint32_t tfm_core_partition_request_svc_handler( - const uint32_t *svc_args, uint32_t lr); - -/** - * \brief Called when secure service returns - */ -uint32_t tfm_core_partition_return_handler(uint32_t lr); - -/** - * \brief Called by secure service to check if client is secure - */ -void tfm_core_validate_secure_caller_handler(const uint32_t svc_args[]); - -/** - * \brief Stores caller's client id in state context - */ -void tfm_core_get_caller_client_id_handler(const uint32_t svc_args[]); - -/** - * \brief Checks if a secure service's access to a memory location is permitted - */ -void tfm_core_memory_permission_check_handler(const uint32_t svc_args[]); - -/** - * \brief Handle an SPM request by a secure service - */ -void tfm_core_spm_request_handler(const struct tfm_exc_stack_t *svc_ctx); - -/** - * \brief Check whether a buffer is ok for writing to by the privileged API - * function. - * - * This function checks whether the caller partition owns the buffer, can write - * to it, and the buffer has proper alignment. - * - * \param[in] partition_idx Partition index - * \param[in] start_addr The start address of the buffer - * \param[in] len The length of the buffer - * \param[in] alignment The expected alignment (in bits) - * - * \return 1 if the check passes, 0 otherwise. - * - * \note For a 0 long buffer the check fails. - */ -int32_t tfm_core_check_buffer_access(uint32_t partition_idx, - void *start_addr, - size_t len, - uint32_t alignment); - -/** - * \brief Retrieve secure partition related data from shared memory area, which - * stores shared data between bootloader and runtime firmware. - * - * \param[in] args Pointer to stack frame, which carries input parameters. - */ -void tfm_core_get_boot_data_handler(uint32_t args[]); - -/** - * \brief Validate the content of shared memory area, which stores the shared - * data between bootloader and runtime firmware. - */ -void tfm_core_validate_boot_data(void); - -#endif /* __TFM_INTERNAL_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_memory_utils.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_memory_utils.h deleted file mode 100644 index 150e3cc977b..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_memory_utils.h +++ /dev/null @@ -1,45 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_MEMORY_UTILS_H__ -#define __TFM_MEMORY_UTILS_H__ - -#include -#include "cmsis_compiler.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/* FIXME: The following functions are wrappers around standard C library - * functions: memcpy, memcmp, memset - * In long term standard C library might be removed from TF-M project or - * replaced with a secure implementation due to security concerns. - */ -__attribute__ ((always_inline)) __STATIC_INLINE -void *tfm_memcpy(void *dest, const void *src, size_t num) -{ - return (memcpy(dest, src, num)); -} - -__attribute__ ((always_inline)) __STATIC_INLINE -int tfm_memcmp(const void *ptr1, const void *ptr2, size_t num) -{ - return (memcmp(ptr1, ptr2, num)); -} - -__attribute__ ((always_inline)) __STATIC_INLINE -void *tfm_memset(void *ptr, int value, size_t num) -{ - return (memset(ptr, value, num)); -} - -#ifdef __cplusplus -} -#endif - -#endif /* __TFM_MEMORY_UTILS_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_nspm.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_nspm.c deleted file mode 100644 index 027726585c7..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_nspm.c +++ /dev/null @@ -1,324 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include -#include "secure_utilities.h" -#include "tfm_api.h" -#ifdef TFM_PSA_API -#include "tfm_utils.h" -#include "tfm_internal.h" -#endif - -#ifndef TFM_MAX_NS_THREAD_COUNT -#define TFM_MAX_NS_THREAD_COUNT 8 -#endif -#define INVALID_CLIENT_ID 0 - -#define DEFAULT_NS_CLIENT_ID ((int32_t)-1) - -#define INVALID_NS_CLIENT_IDX (-1) -#define DEFAULT_NS_CLIENT_IDX 0 - -typedef uint32_t TZ_ModuleId_t; -typedef uint32_t TZ_MemoryId_t; - -static struct ns_client_list_t { - int32_t ns_client_id; - int32_t next_free_index; -} NsClientIdList[TFM_MAX_NS_THREAD_COUNT]; - -static int32_t free_index = 0U; -static int32_t active_ns_client_idx = INVALID_NS_CLIENT_IDX; - -static int get_next_ns_client_id() -{ -#ifdef TFM_NS_CLIENT_IDENTIFICATION - static int32_t next_ns_client_id = DEFAULT_NS_CLIENT_ID; - - if (next_ns_client_id > 0) - { - next_ns_client_id = DEFAULT_NS_CLIENT_ID; - } - return next_ns_client_id--; -#else - return DEFAULT_NS_CLIENT_ID; -#endif -} - -void tfm_nspm_configure_clients(void) -{ - int32_t i; - - /* Default to one NS client */ - free_index = 1; - NsClientIdList[0].ns_client_id = get_next_ns_client_id(); - for (i = 1; i < TFM_MAX_NS_THREAD_COUNT; ++i) { - NsClientIdList[i].ns_client_id = INVALID_CLIENT_ID; - } - active_ns_client_idx = DEFAULT_NS_CLIENT_IDX; -} - -int32_t tfm_nspm_get_current_client_id() -{ - if (active_ns_client_idx == INVALID_NS_CLIENT_IDX) - { - return 0; - } else { - return NsClientIdList[active_ns_client_idx].ns_client_id; - } -} - -/* TF-M implementation of the CMSIS TZ RTOS thread context management API */ - -/// Initialize secure context memory system -/// \return execution status (1: success, 0: error) -/* This veneer is TF-M internal, not a secure service */ -__attribute__((cmse_nonsecure_entry)) -uint32_t TZ_InitContextSystem_S(void) -{ - int32_t i; - - if (__get_active_exc_num() == EXC_NUM_THREAD_MODE) { - /* This veneer should only be called by NS RTOS in handler mode */ - return 0U; - } - - /* NS RTOS supports TZ context management, override defaults */ -#ifdef PRINT_NSPM_DEBUG - LOG_MSG("NS RTOS initialized TZ RTOS context management"); -#endif /* PRINT_NSPM_DEBUG */ - for (i = 1; i < TFM_MAX_NS_THREAD_COUNT; ++i) { - NsClientIdList[i].ns_client_id = INVALID_CLIENT_ID; - NsClientIdList[i].next_free_index = i + 1; - } - - /* Terminate list */ - NsClientIdList[i - 1].next_free_index = INVALID_NS_CLIENT_IDX; - /* Success */ - return 1U; -} - - -/// Allocate context memory for calling secure software modules in TrustZone -/// \param[in] module identifies software modules called from non-secure mode -/// \return value != 0 id TrustZone memory slot identifier -/// \return value 0 no memory available or internal error -/* This veneer is TF-M internal, not a secure service */ -__attribute__((cmse_nonsecure_entry)) -TZ_MemoryId_t TZ_AllocModuleContext_S (TZ_ModuleId_t module) -{ - TZ_MemoryId_t tz_id; - (void) module; /* Currently unused */ - - if (__get_active_exc_num() == EXC_NUM_THREAD_MODE) { - /* This veneer should only be called by NS RTOS in handler mode */ - return 0U; - } - - if (free_index < 0) { - /* No more free slots */ - return 0U; - } - - /* TZ_MemoryId_t must be a positive integer */ - tz_id = (TZ_MemoryId_t)free_index + 1; - NsClientIdList[free_index].ns_client_id = get_next_ns_client_id(); -#ifdef PRINT_NSPM_DEBUG - printf("TZ_AllocModuleContext_S called, returning id %d\r\n", - NsClientIdList[free_index].ns_client_id); -#endif /* PRINT_NSPM_DEBUG */ - free_index = NsClientIdList[free_index].next_free_index; - - return tz_id; -} - - -/// Free context memory that was previously allocated with \ref TZ_AllocModuleContext_S -/// \param[in] id TrustZone memory slot identifier -/// \return execution status (1: success, 0: error) -/* This veneer is TF-M internal, not a secure service */ -__attribute__((cmse_nonsecure_entry)) -uint32_t TZ_FreeModuleContext_S (TZ_MemoryId_t id) -{ - uint32_t index; - - if (__get_active_exc_num() == EXC_NUM_THREAD_MODE) { - /* This veneer should only be called by NS RTOS in handler mode */ - return 0U; - } - - if ((id == 0U) || (id > TFM_MAX_NS_THREAD_COUNT)) { - /* Invalid TZ_MemoryId_t */ - return 0U; - } - - index = id - 1; - - if (NsClientIdList[index].ns_client_id == INVALID_CLIENT_ID) { - /* Non-existent client */ - return 0U; - } - -#ifdef PRINT_NSPM_DEBUG - printf("TZ_FreeModuleContext_S called for id %d\r\n", - NsClientIdList[index].ns_client_id); -#endif /* PRINT_NSPM_DEBUG */ - if (active_ns_client_idx == index) { -#ifdef PRINT_NSPM_DEBUG - printf("Freeing active NS client, NS inactive\r\n"); -#endif /* PRINT_NSPM_DEBUG */ - active_ns_client_idx = DEFAULT_NS_CLIENT_IDX; - } - NsClientIdList[index].ns_client_id = INVALID_CLIENT_ID; - NsClientIdList[index].next_free_index = free_index; - - free_index = index; - - return 1U; // Success -} - - -/// Load secure context (called on RTOS thread context switch) -/// \param[in] id TrustZone memory slot identifier -/// \return execution status (1: success, 0: error) -/* This veneer is TF-M internal, not a secure service */ -__attribute__((cmse_nonsecure_entry)) -uint32_t TZ_LoadContext_S (TZ_MemoryId_t id) -{ - uint32_t index; - - if (__get_active_exc_num() == EXC_NUM_THREAD_MODE) { - /* This veneer should only be called by NS RTOS in handler mode */ - return 0U; - } - -#ifdef PRINT_NSPM_DEBUG - LOG_MSG("TZ_LoadContext_S called"); -#endif /* PRINT_NSPM_DEBUG */ - if ((id == 0U) || (id > TFM_MAX_NS_THREAD_COUNT)) { - /* Invalid TZ_MemoryId_t */ - return 0U; - } - - index = id - 1; - - if (NsClientIdList[index].ns_client_id == INVALID_CLIENT_ID) { - /* Non-existent client */ - return 0U; - } - - active_ns_client_idx = index; -#ifdef PRINT_NSPM_DEBUG - printf("TZ_LoadContext_S called for id %d\r\n", - NsClientIdList[index].ns_client_id); -#endif /* PRINT_NSPM_DEBUG */ - - return 1U; // Success -} - - -/// Store secure context (called on RTOS thread context switch) -/// \param[in] id TrustZone memory slot identifier -/// \return execution status (1: success, 0: error) -/* This veneer is TF-M internal, not a secure service */ -__attribute__((cmse_nonsecure_entry)) -uint32_t TZ_StoreContext_S (TZ_MemoryId_t id) -{ - uint32_t index; - - if (__get_active_exc_num() == EXC_NUM_THREAD_MODE) { - /* This veneer should only be called by NS RTOS in handler mode */ - return 0U; - } - -#ifdef PRINT_NSPM_DEBUG - LOG_MSG("TZ_StoreContext_S called"); -#endif /* PRINT_NSPM_DEBUG */ - /* id corresponds to context being swapped out on NS side */ - if ((id == 0U) || (id > TFM_MAX_NS_THREAD_COUNT)) { - /* Invalid TZ_MemoryId_t */ - return 0U; - } - - index = id - 1; - - if (NsClientIdList[index].ns_client_id == INVALID_CLIENT_ID) { - /* Non-existent client */ - return 0U; - } - - if (active_ns_client_idx != index) { -#ifdef PRINT_NSPM_DEBUG - printf("TZ_StoreContext_S called for id %d, active id: %d\r\n", - NsClientIdList[index].ns_client_id, - NsClientIdList[active_ns_client_idx].ns_client_id); -#endif /* PRINT_NSPM_DEBUG */ - return 0U; - } - -#ifdef PRINT_NSPM_DEBUG - printf("TZ_StoreContext_S called for id %d\r\n", - NsClientIdList[index].ns_client_id); -#endif /* PRINT_NSPM_DEBUG */ - active_ns_client_idx = DEFAULT_NS_CLIENT_IDX; - - return 1U; // Success -} - -#ifdef TFM_NS_CLIENT_IDENTIFICATION -__attribute__((cmse_nonsecure_entry)) -enum tfm_status_e tfm_register_client_id (int32_t ns_client_id) -{ - int current_client_id; - - if (__get_active_exc_num() == EXC_NUM_THREAD_MODE) { - /* This veneer should only be called by NS RTOS in handler mode */ - return TFM_ERROR_NS_THREAD_MODE_CALL; - } - - if (ns_client_id >= 0) { - /* The client ID is invalid */ - return TFM_ERROR_INVALID_PARAMETER; - } - - if (active_ns_client_idx < 0) { - /* No client is active */ - return TFM_ERROR_GENERIC; - } - - current_client_id = NsClientIdList[active_ns_client_idx].ns_client_id; - if (current_client_id >= 0 ) { - /* The client ID is invalid */ - return TFM_ERROR_INVALID_PARAMETER; - } - - NsClientIdList[active_ns_client_idx].ns_client_id = ns_client_id; -#ifdef PRINT_NSPM_DEBUG - printf("tfm_register_client_id called with id %d\r\n", ns_client_id); -#endif /* PRINT_NSPM_DEBUG */ - - return TFM_SUCCESS; -} -#endif - -#ifdef TFM_PSA_API -__attribute__((section("SFN"))) -psa_status_t tfm_nspm_thread_entry(void) -{ -#ifdef TFM_CORE_DEBUG - /* Jumps to non-secure code */ - LOG_MSG("Jumping to non-secure code..."); -#endif - - jump_to_ns_code(); - - /* Should not run here */ - TFM_ASSERT(false); - return PSA_SUCCESS; -} -#endif diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_nspm.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_nspm.h deleted file mode 100644 index 572c734c0fb..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_nspm.h +++ /dev/null @@ -1,37 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_NSPM_H__ -#define __TFM_NSPM_H__ - -#include - -/** - * \brief initialise the NS context database - */ -void tfm_nspm_configure_clients(void); - -/** - * \brief Get the client ID of the current NS client - * - * \return The client id of the current NS client. 0 (invalid client id) is - * returned in case of error. - */ -int32_t tfm_nspm_get_current_client_id(void); - -#ifdef TFM_PSA_API -/** - * \brief NSPM thread main entry function - * - * \return PSA_SUCCESS indicates failed. - * - * Note: This function should not return back. - */ -psa_status_t tfm_nspm_thread_entry(void); -#endif - -#endif /* __TFM_NSPM_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_platform_core_api.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_platform_core_api.h deleted file mode 100644 index 7092e0c1bcc..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_platform_core_api.h +++ /dev/null @@ -1,24 +0,0 @@ -/* - * Copyright (c) 2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_PLATFORM_CORE_API_H__ -#define __TFM_PLATFORM_CORE_API_H__ - -/** - * \brief Should be called in case of access violation. - * - * There might be platform specific means, by which it is possible on a - * subsystem to detect access violation. For example a platform can have a - * Peripheral Protection Controller, to detect unauthorised accesses to - * peripheral registers. Setting up the protection, and handling the violation - * is implemented in platform specific code. However TF-M should be able to - * decide how to proceed if a violation happens. So to notify TF-M, platform - * code have to call this function, if a violation happens. - */ -void tfm_access_violation_handler(void); - -#endif /* __TFM_PLATFORM_CORE_API_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_secure_api.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_secure_api.c deleted file mode 100644 index 951765a1637..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_secure_api.c +++ /dev/null @@ -1,176 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include -#include -#include -#include "tfm_secure_api.h" -#include "tfm_nspm.h" -#include "secure_utilities.h" -#include "secure_fw/spm/spm_api.h" -#include "region_defs.h" -#include "tfm_api.h" - -#define EXC_RETURN_SECURE_FUNCTION 0xFFFFFFFD - -#ifndef TFM_LVL -#error TFM_LVL is not defined! -#endif - -/* Macros to pick linker symbols and allow references to sections */ -#define REGION(a, b, c) a##b##c -#define REGION_NAME(a, b, c) REGION(a, b, c) -#define REGION_DECLARE(a, b, c) extern uint32_t REGION_NAME(a, b, c) - -#ifndef TFM_PSA_API /* Only use scratch if using veneer functions, not IPC */ -REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base); -REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit); -#endif /* !defined(TFM_PSA_API) */ - -/* This is the "Big Lock" on the secure side, to guarantee single entry - * to SPE - */ -int32_t tfm_secure_lock; - -/** - * \brief Check whether a memory range is inside a memory region. - * - * \param[in] p The start address of the range to check - * \param[in] s The size of the range to check - * \param[in] region_start The start address of the region, which should - * contain the range - * \param[in] region_len The size of the region, which should contain the - * range - * - * \return TFM_SUCCESS if the region contains the range, - * TFM_ERROR_GENERIC otherwise. - */ -static int32_t check_address_range(const void *p, size_t s, - uintptr_t region_start, uint32_t region_len) -{ - int32_t range_in_region; - - /* Check for overflow in the range parameters */ - if ((uintptr_t)p > UINTPTR_MAX-s) { - return TFM_ERROR_GENERIC; - } - - /* We trust the region parameters, and don't check for overflow */ - - /* Calculate the result */ - range_in_region = ((uintptr_t)p >= region_start) && - ((uintptr_t)p+s <= region_start+region_len); - if (range_in_region) { - return TFM_SUCCESS; - } else { - return TFM_ERROR_GENERIC; - } -} - -/** - * \brief Check whether the current partition has access to a memory range - * - * This function assumes, that the current MPU configuration is set for the - * partition to be checked. The flags should contain information of the - * execution mode of the partition code (priv/unpriv), and access type - * (read/write) as specified in "ARMv8-M Security Extensions: Requirements on - * Development Tools" chapter "Address range check intrinsic" - * - * \param[in] p The start address of the range to check - * \param[in] s The size of the range to check - * \param[in] flags The flags to pass to the cmse_check_address_range func - * - * \return TFM_SUCCESS if the partition has access to the memory range, - * TFM_ERROR_GENERIC otherwise. - */ -static int32_t has_access_to_region(const void *p, size_t s, int flags) -{ - int32_t range_access_allowed_by_mpu; - -#ifndef TFM_PSA_API /* Only use scratch if using veneer functions, not IPC */ - uint32_t scratch_base = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base); - uint32_t scratch_limit = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit); -#endif /* !defined(TFM_PSA_API) */ - - /* Use the TT instruction to check access to the partition's regions*/ - range_access_allowed_by_mpu = - cmse_check_address_range((void *)p, s, flags) != NULL; - - if (range_access_allowed_by_mpu) { - return TFM_SUCCESS; - } - -#ifndef TFM_PSA_API /* Only use scratch if using veneer functions, not IPC */ - /* If the check for the current MPU settings fails, check for the share - * region, only if the partition is secure - */ - if ((flags & CMSE_NONSECURE) == 0) { - if (check_address_range(p, s, scratch_base, - scratch_limit+1-scratch_base) == TFM_SUCCESS) { - return TFM_SUCCESS; - } - } -#endif /* !defined(TFM_PSA_API) */ - - /* If all else fails, check whether the region is in the non-secure - * memory - */ - if (check_address_range(p, s, NS_CODE_START, - NS_CODE_LIMIT+1-NS_CODE_START) == TFM_SUCCESS || - check_address_range(p, s, NS_DATA_START, - NS_DATA_LIMIT+1-NS_DATA_START) == TFM_SUCCESS) { - return TFM_SUCCESS; - } else { - return TFM_ERROR_GENERIC; - } -} - -int32_t tfm_core_has_read_access_to_region(const void *p, size_t s, - uint32_t ns_caller, - uint32_t privileged) -{ - int flags = CMSE_MPU_READ; - - if (privileged == TFM_PARTITION_UNPRIVILEGED_MODE) { - flags |= CMSE_MPU_UNPRIV; - } - - if (ns_caller) { - flags |= CMSE_NONSECURE; - } - - return has_access_to_region(p, s, flags); -} - -int32_t tfm_core_has_write_access_to_region(void *p, size_t s, - uint32_t ns_caller, - uint32_t privileged) -{ - int flags = CMSE_MPU_READWRITE; - - if (privileged == TFM_PARTITION_UNPRIVILEGED_MODE) { - flags |= CMSE_MPU_UNPRIV; - } - - if (ns_caller) { - flags |= CMSE_NONSECURE; - } - - return has_access_to_region(p, s, flags); -} - -void tfm_secure_api_error_handler(void) -{ - ERROR_MSG("Security violation when calling secure API"); - while (1) { - ; - } -} - diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_secure_api.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_secure_api.h deleted file mode 100644 index 02f766a8e6a..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_secure_api.h +++ /dev/null @@ -1,214 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_SECURE_API_H__ -#define __TFM_SECURE_API_H__ - -#include -#include "tfm_svc.h" -#include "secure_utilities.h" -#include "tfm_core.h" -#include "tfm_api.h" -#include "bl2/include/tfm_boot_status.h" - -/*! - * \def __tfm_secure_gateway_attributes__ - * - * \brief Attributes for secure gateway functions - */ -#define __tfm_secure_gateway_attributes__ \ - __attribute__((cmse_nonsecure_entry, noinline, section("SFN"))) - -/* Hide specific errors if not debugging */ -#ifdef TFM_CORE_DEBUG -#define TFM_ERROR_STATUS(status) (status) -#else -#define TFM_ERROR_STATUS(status) (TFM_PARTITION_BUSY) -#endif - -#define TFM_SFN_API_LEGACY 0 -#define TFM_SFN_API_IOVEC 1 - -#ifndef TFM_LVL -#error TFM_LVL is not defined! -#endif - -extern void tfm_secure_api_error_handler(void); - -typedef int32_t(*sfn_t)(int32_t, int32_t, int32_t, int32_t); - -struct tfm_sfn_req_s { - uint32_t sp_id; - sfn_t sfn; - int32_t *args; - uint32_t caller_part_idx; - int32_t iovec_api; - uint32_t ns_caller; -}; - -enum tfm_buffer_share_region_e { - TFM_BUFFER_SHARE_DISABLE, - TFM_BUFFER_SHARE_NS_CODE, - TFM_BUFFER_SHARE_SCRATCH, - TFM_BUFFER_SHARE_PRIV, /* only for TCB in level 2, all in level 1 */ - TFM_BUFFER_SHARE_DEFAULT, -}; - -enum tfm_ns_region_e { - TFM_NS_REGION_CODE = 0, - TFM_NS_REGION_DATA, - TFM_NS_REGION_VENEER, - TFM_NS_REGION_PERIPH_1, - TFM_NS_REGION_PERIPH_2, - TFM_NS_SECONDARY_IMAGE_REGION, -}; - -enum tfm_memory_access_e { - TFM_MEMORY_ACCESS_RO = 1, - TFM_MEMORY_ACCESS_RW = 2, -}; - -extern int32_t tfm_core_set_buffer_area(enum tfm_buffer_share_region_e share); - -extern int32_t tfm_core_validate_secure_caller(void); - -extern int32_t tfm_core_get_caller_client_id(int32_t *caller_client_id); - -extern int32_t tfm_core_memory_permission_check(const void *ptr, - uint32_t size, - int32_t access); - -extern int32_t tfm_core_get_boot_data(uint8_t major_type, - struct tfm_boot_data *boot_data, - uint32_t len); - -int32_t tfm_core_sfn_request(const struct tfm_sfn_req_s *desc_ptr); - -int32_t tfm_core_sfn_request_thread_mode(struct tfm_sfn_req_s *desc_ptr); - -/** - * \brief Check whether the current partition has read access to a memory range - * - * This function assumes, that the current MPU configuration is set for the - * partition to be checked. - * - * \param[in] p The start address of the range to check - * \param[in] s The size of the range to check - * \param[in] ns_caller Whether the current partition is a non-secure one - * \param[in] privileged Privileged mode or unprivileged mode: - * \ref TFM_PARTITION_UNPRIVILEGED_MODE - * \ref TFM_PARTITION_PRIVILEGED_MODE - * - * \return TFM_SUCCESS if the partition has access to the memory range, - * TFM_ERROR_GENERIC otherwise. - */ -int32_t tfm_core_has_read_access_to_region(const void *p, size_t s, - uint32_t ns_caller, - uint32_t privileged); - -/** - * \brief Check whether the current partition has write access to a memory range - * - * This function assumes, that the current MPU configuration is set for the - * partition to be checked. - * - * \param[in] p The start address of the range to check - * \param[in] s The size of the range to check - * \param[in] ns_caller Whether the current partition is a non-secure one - * \param[in] privileged Privileged mode or unprivileged mode: - * \ref TFM_PARTITION_UNPRIVILEGED_MODE - * \ref TFM_PARTITION_PRIVILEGED_MODE - * - * \return TFM_SUCCESS if the partition has access to the memory range, - * TFM_ERROR_GENERIC otherwise. - */ -int32_t tfm_core_has_write_access_to_region(void *p, size_t s, - uint32_t ns_caller, - uint32_t privileged); - -#ifdef TFM_PSA_API -/* The following macros are only valid if secure services can be called - * using veneer functions. This is not the case if IPC messaging is enabled - */ -#define TFM_CORE_IOVEC_SFN_REQUEST(id, fn, a, b, c, d) \ - do { \ - ERROR_MSG("Invalid TF-M configuration detected"); \ - tfm_secure_api_error_handler(); \ - /* This point never reached */ \ - return (int32_t)TFM_ERROR_GENERIC; \ - } while (0) -#define TFM_CORE_SFN_REQUEST(id, fn, a, b, c, d) \ - do { \ - ERROR_MSG("Invalid TF-M configuration detected"); \ - tfm_secure_api_error_handler(); \ - /* This point never reached */ \ - return (int32_t)TFM_ERROR_GENERIC; \ - } while (0) -#else -#define TFM_CORE_IOVEC_SFN_REQUEST(id, fn, a, b, c, d) \ - return tfm_core_partition_request(id, fn, TFM_SFN_API_IOVEC, \ - (int32_t)a, (int32_t)b, (int32_t)c, (int32_t)d) - -#define TFM_CORE_SFN_REQUEST(id, fn, a, b, c, d) \ - return tfm_core_partition_request(id, fn, TFM_SFN_API_LEGACY, \ - (int32_t)a, (int32_t)b, (int32_t)c, (int32_t)d) - -__attribute__ ((always_inline)) __STATIC_INLINE -int32_t tfm_core_partition_request(uint32_t id, void *fn, int32_t iovec_api, - int32_t arg1, int32_t arg2, int32_t arg3, int32_t arg4) -{ - int32_t args[4] = {arg1, arg2, arg3, arg4}; - struct tfm_sfn_req_s desc, *desc_ptr = &desc; - - desc.sp_id = id; - desc.sfn = (sfn_t) fn; - desc.args = args; - /* - * This preprocessor condition checks if a version of GCC smaller than - * 7.3.1 is being used to compile the code. - * These versions are affected by a bug on the cmse_nonsecure_caller - * intrinsic which returns incorrect results. - * Please check Bug 85203 on GCC Bugzilla for more information. - */ -#if defined(__GNUC__) && !defined(__ARMCC_VERSION) && \ - (__GNUC__ < 7 || \ - (__GNUC__ == 7 && (__GNUC_MINOR__ < 3 || \ - (__GNUC_MINOR__ == 3 && __GNUC_PATCHLEVEL__ < 1)))) - /* - * Use the fact that, if called from Non-Secure, the LSB of the return - * address is set to 0. - */ - desc.ns_caller = (uint32_t)!( - (intptr_t)__builtin_extract_return_addr(__builtin_return_address(0U)) - & 1); -#else - /* - * Convert the result of cmse_nonsecure_caller from an int to a uint32_t - * to prevent using an int in the tfm_sfn_req_s structure. - */ - desc.ns_caller = (cmse_nonsecure_caller() != 0) ? 1U : 0U; -#endif /* Check for GCC compiler version smaller than 7.3.1 */ - desc.iovec_api = iovec_api; - if (__get_active_exc_num() != EXC_NUM_THREAD_MODE) { - /* FixMe: Error severity TBD */ - return TFM_ERROR_GENERIC; - } else { -#if TFM_LVL == 1 - if (desc.ns_caller) { - return tfm_core_sfn_request(desc_ptr); - } else { - return tfm_core_sfn_request_thread_mode(desc_ptr); - } -#else - return tfm_core_sfn_request(desc_ptr); -#endif - - } -} -#endif - -#endif /* __TFM_SECURE_API_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_spm_services.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_spm_services.c deleted file mode 100644 index 83ff41b674c..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_spm_services.c +++ /dev/null @@ -1,166 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include - -#include "tfm_svc.h" -#include "tfm_secure_api.h" -#include "tfm_internal.h" -#include "secure_fw/include/tfm_spm_services_api.h" -#include "spm_api.h" - -uint8_t *tfm_scratch_area; -uint32_t tfm_scratch_area_size; -nsfptr_t ns_entry; - -void jump_to_ns_code(void) -{ -#if TFM_LVL == 3 || ((!defined(TFM_PSA_API)) && (TFM_LVL != 1)) - /* Initialization is done, set thread mode to unprivileged. */ - tfm_spm_partition_change_privilege(TFM_PARTITION_UNPRIVILEGED_MODE); -#endif - /* All changes made to memory will be effective after this point */ - __DSB(); - __ISB(); - - /* Calls the non-secure Reset_Handler to jump to the non-secure binary */ - ns_entry(); -} - -#ifndef TFM_PSA_API -#if defined(__ARM_ARCH_8M_MAIN__) -__attribute__((naked)) int32_t tfm_core_sfn_request( - const struct tfm_sfn_req_s *desc_ptr) -{ - __ASM volatile( - "PUSH {r4-r12, lr}\n" - "SVC %[SVC_REQ]\n" - "MOV r4, #0\n" - "MOV r5, #0\n" - "MOV r6, #0\n" - "MOV r7, #0\n" - "MOV r8, #0\n" - "MOV r9, #0\n" - "MOV r10, #0\n" - "MOV r11, #0\n" - "BLX lr\n" - "SVC %[SVC_RET]\n" - "POP {r4-r12, pc}\n" - : : [SVC_REQ] "I" (TFM_SVC_SFN_REQUEST) - , [SVC_RET] "I" (TFM_SVC_SFN_RETURN) - : "r0"); -} -#elif defined(__ARM_ARCH_8M_BASE__) -__attribute__((naked)) int32_t tfm_core_sfn_request( - const struct tfm_sfn_req_s *desc_ptr) -{ - __ASM volatile( - ".syntax unified\n" - "PUSH {lr}\n" - "PUSH {r4-r7}\n" - "MOV r4, r8\n" - "MOV r5, r9\n" - "MOV r6, r10\n" - "MOV r7, r11\n" - "PUSH {r4-r7}\n" - "MOV r4, r12\n" - "PUSH {r4}\n" - "SVC %[SVC_REQ]\n" - "MOVS r4, #0\n" - "MOV r5, r4\n" - "MOV r6, r4\n" - "MOV r7, r4\n" - "MOV r8, r4\n" - "MOV r9, r4\n" - "MOV r10, r4\n" - "MOV r11, r4\n" - "BLX lr\n" - "SVC %[SVC_RET]\n" - "POP {r4}\n" - "MOV r12, r4\n" - "POP {r4-r7}\n" - "MOV r8, r4\n" - "MOV r9, r5\n" - "MOV r10, r6\n" - "MOV r11, r7\n" - "POP {r4-r7}\n" - "POP {pc}\n" - : : [SVC_REQ] "I" (TFM_SVC_SFN_REQUEST) - , [SVC_RET] "I" (TFM_SVC_SFN_RETURN) - : "r0"); -} -#else -#error "Unsupported ARM Architecture." -#endif - -__attribute__((naked)) -int32_t tfm_core_memory_permission_check(const void *ptr, - uint32_t len, - int32_t access) -{ - __ASM volatile( - "SVC %0\n" - "BX lr\n" - : : "I" (TFM_SVC_MEMORY_CHECK)); -} - -__attribute__((naked)) -int32_t tfm_core_get_caller_client_id(int32_t *caller_client_id) -{ - __ASM volatile( - "SVC %0\n" - "BX LR\n" - : : "I" (TFM_SVC_GET_CALLER_CLIENT_ID)); -} - -__attribute__((naked)) -int32_t tfm_spm_request_reset_vote(void) -{ - __ASM volatile( - "MOVS R0, %0\n" - "B tfm_spm_request\n" - : : "I" (TFM_SPM_REQUEST_RESET_VOTE)); -} - -__attribute__((naked)) -int32_t tfm_spm_request(void) -{ - __ASM volatile( - "SVC %0\n" - "BX lr\n" - : : "I" (TFM_SVC_SPM_REQUEST)); -} - -__attribute__((naked)) -int32_t tfm_core_validate_secure_caller(void) -{ - __ASM volatile( - "SVC %0\n" - "BX lr\n" - : : "I" (TFM_SVC_VALIDATE_SECURE_CALLER)); -} - -__attribute__((naked)) -int32_t tfm_core_set_buffer_area(enum tfm_buffer_share_region_e share) -{ - __ASM volatile( - "SVC %0\n" - "BX lr\n" - : : "I" (TFM_SVC_SET_SHARE_AREA)); -} -#endif - -__attribute__((naked)) -int32_t tfm_core_get_boot_data(uint8_t major_type, - struct tfm_boot_data *boot_status, - uint32_t len) -{ - __ASM volatile( - "SVC %0\n" - "BX lr\n" - : : "I" (TFM_SVC_GET_BOOT_DATA)); -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_svc.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_svc.h deleted file mode 100644 index e0c11021d33..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/tfm_svc.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_SVC_H__ -#define __TFM_SVC_H__ - -#include "cmsis.h" - -typedef enum { - TFM_SVC_SFN_REQUEST = 0, - TFM_SVC_SFN_RETURN, - TFM_SVC_VALIDATE_SECURE_CALLER, - TFM_SVC_GET_CALLER_CLIENT_ID, - TFM_SVC_MEMORY_CHECK, - TFM_SVC_SET_SHARE_AREA, - TFM_SVC_SPM_REQUEST, - TFM_SVC_PRINT, - TFM_SVC_GET_BOOT_DATA, -#ifdef TFM_PSA_API - TFM_SVC_IPC_REQUEST, - TFM_SVC_SCHEDULE, - TFM_SVC_EXIT_THRD, - /* PSA Client SVC */ - TFM_SVC_PSA_FRAMEWORK_VERSION, - TFM_SVC_PSA_VERSION, - TFM_SVC_PSA_CONNECT, - TFM_SVC_PSA_CALL, - TFM_SVC_PSA_CLOSE, - /* PSA Service SVC */ - TFM_SVC_PSA_WAIT, - TFM_SVC_PSA_GET, - TFM_SVC_PSA_SET_RHANDLE, - TFM_SVC_PSA_READ, - TFM_SVC_PSA_SKIP, - TFM_SVC_PSA_WRITE, - TFM_SVC_PSA_REPLY, - TFM_SVC_PSA_NOTIFY, - TFM_SVC_PSA_CLEAR, - TFM_SVC_PSA_EOI, -#endif -} tfm_svc_number_t; - -#define SVC(code) __ASM volatile("svc %0" : : "I" (code)) - -#endif /* __TFM_SVC_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/include/dir_include.dox b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/include/dir_include.dox deleted file mode 100644 index 10d074ff22b..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/include/dir_include.dox +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -//This file holds description for the current directory. This documentation -//will be included in the Doxygen output. - -/*! -\dir -\brief Include files for the TF-M. -\details This directory currently only holds the include file for the SPM -module. - -*/ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/include/tfm_spm_services_api.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/include/tfm_spm_services_api.h deleted file mode 100644 index be08ed278c7..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/include/tfm_spm_services_api.h +++ /dev/null @@ -1,22 +0,0 @@ -/* - * Copyright (c) 2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_SPM_SERVICES_API_H__ -#define __TFM_SPM_SERVICES_API_H__ - -enum tfm_spm_request_type_t { - TFM_SPM_REQUEST_RESET_VOTE, -}; - -/** - * \brief Request a vote from SPM on a system reset - * - * \return Returns 0 if request is accepted, any other value means reject - */ -int32_t tfm_spm_request_reset_vote(void); - -#endif /* __TFM_SPM_SERVICES_API_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/ns_callable/tfm_psa_api_veneers.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/ns_callable/tfm_psa_api_veneers.c deleted file mode 100644 index 7d8ff202601..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/ns_callable/tfm_psa_api_veneers.c +++ /dev/null @@ -1,134 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include -#include "psa_client.h" -#include "psa_service.h" -#include "secure_utilities.h" -#include "tfm_secure_api.h" -#include "tfm_api.h" -#include "tfm_svcalls.h" - -/* FixMe: check if this is really needed */ -extern int32_t tfm_secure_lock; - -__attribute__ ((always_inline)) __STATIC_INLINE -int32_t tfm_psa_veneer_sanity_check(struct tfm_sfn_req_s *desc_ptr) -{ - if (desc_ptr->ns_caller) { - if (tfm_secure_lock != 0) { - /* Secure domain is already locked! - * FixMe: Decide if this is a fault or permitted in case of PSA - * API usage - */ - return TFM_ERROR_SECURE_DOMAIN_LOCKED; - } - } else { - /* Secure partition should not call a different secure partition - * using TFM PSA veneers - */ - return TFM_ERROR_INVALID_EXC_MODE; - } - return TFM_SUCCESS; -} - -/* Veneer implementation */ - -#define TFM_CORE_NS_IPC_REQUEST_VENEER(fn, a, b, c, d) \ - return tfm_core_ns_ipc_request(fn, (int32_t)a, (int32_t)b, \ - (int32_t)c, (int32_t)d) - -__attribute__ ((naked, section("SFN"))) -static int32_t tfm_core_ipc_request(const struct tfm_sfn_req_s *desc_ptr) -{ - __ASM volatile("SVC %0 \n" - "BX LR \n" - : : "I" (TFM_SVC_IPC_REQUEST)); -} - -__attribute__ ((always_inline)) __STATIC_INLINE -int32_t tfm_core_ns_ipc_request(void *fn, int32_t arg1, int32_t arg2, - int32_t arg3, int32_t arg4) -{ - int32_t args[4] = {arg1, arg2, arg3, arg4}; - struct tfm_sfn_req_s desc = {0}; - - desc.sfn = fn; - desc.args = args; - desc.ns_caller = cmse_nonsecure_caller(); - - if (__get_active_exc_num() != EXC_NUM_THREAD_MODE) - { - /* FIXME: Proper error handling to be implemented */ - return TFM_ERROR_INVALID_EXC_MODE; - } else { - return tfm_core_ipc_request(&desc); - } -} - -/* FixMe: these functions need to have different attributes compared to those - * legacy veneers which may be called by secure partitions. - * They won't call legacy SFN but instead will be handlers for TF-M - */ - -__tfm_secure_gateway_attributes__ -uint32_t tfm_psa_framework_version_veneer(void) -{ - TFM_CORE_NS_IPC_REQUEST_VENEER(tfm_svcall_psa_framework_version, 0, 0, - 0, 0); -} - -__tfm_secure_gateway_attributes__ -uint32_t tfm_psa_version_veneer(uint32_t sid) -{ - TFM_CORE_NS_IPC_REQUEST_VENEER(tfm_svcall_psa_version, sid, 0, 0, 0); -} - -__tfm_secure_gateway_attributes__ -psa_handle_t tfm_psa_connect_veneer(uint32_t sid, uint32_t minor_version) -{ - TFM_CORE_NS_IPC_REQUEST_VENEER(tfm_svcall_psa_connect, sid, - minor_version, 0, 0); -} - -__tfm_secure_gateway_attributes__ -psa_status_t tfm_psa_call_veneer(psa_handle_t handle, - const psa_invec *in_vecs, - psa_outvec *out_vecs) -{ - TFM_CORE_NS_IPC_REQUEST_VENEER(tfm_svcall_psa_call, handle, in_vecs, - out_vecs, 0); -} - -__tfm_secure_gateway_attributes__ -psa_status_t tfm_psa_close_veneer(psa_handle_t handle) -{ - TFM_CORE_NS_IPC_REQUEST_VENEER(tfm_svcall_psa_close, handle, 0, 0, 0); -} - -void tfm_psa_ipc_request_handler(uint32_t svc_ctx[]) -{ - uint32_t *r0_ptr = svc_ctx; - - /* The only argument to the SVC call is stored in the stacked r0 */ - struct tfm_sfn_req_s *desc_ptr = (struct tfm_sfn_req_s *) *r0_ptr; - - if(tfm_psa_veneer_sanity_check(desc_ptr) != TFM_SUCCESS) { - /* FixMe: consider error handling - this may be critical error */ - *r0_ptr = TFM_ERROR_INVALID_PARAMETER; - return; - } - - /* Store SVC return value in stacked r0 */ - *r0_ptr = desc_ptr->sfn((int32_t)desc_ptr->args, - desc_ptr->ns_caller, - 0, - 0); - - return; -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/dir_spm.dox b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/dir_spm.dox deleted file mode 100644 index 92c8a272e7e..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/dir_spm.dox +++ /dev/null @@ -1,16 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -//This file holds description for the current directory. This documentation -//will be included in the Doxygen output. - -/*! -\dir -\brief Source code for the Secure Partition Manager. -\details This directory holds the source code of the "TF-M SPM" module. - -*/ \ No newline at end of file diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_api.c b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_api.c deleted file mode 100644 index f589cd9a2fd..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_api.c +++ /dev/null @@ -1,416 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -/* This file contains the APIs exported by the SPM to tfm core */ - -#include -#include -#include "spm_api.h" -#include "platform/include/tfm_spm_hal.h" -#include "tfm_memory_utils.h" -#include "spm_db_setup.h" -#include "tfm_internal.h" -#include "tfm_api.h" -#include "tfm_nspm.h" -#include "secure_fw/core/tfm_core.h" -#include "tfm_peripherals_def.h" -#include "spm_partition_defs.h" - - -struct spm_partition_db_t g_spm_partition_db = {0,}; - -typedef enum { - TFM_INIT_FAILURE, -} sp_error_type_t; - -/* - * This function is called when a secure partition causes an error. - * In case of an error in the error handling, a non-zero value have to be - * returned. - */ -#ifndef TFM_PSA_API -static void tfm_spm_partition_err_handler( - const struct spm_partition_desc_t *partition, - sp_error_type_t err_type, - int32_t err_code) -{ -#ifdef TFM_CORE_DEBUG - if (err_type == TFM_INIT_FAILURE) { - printf("Partition init failed for partition id 0x%08X\r\n", - partition->static_data.partition_id); - } else { - printf( - "Unknown partition error %d (code: %d) for partition id 0x%08X\r\n", - err_type, err_code, partition->static_data.partition_id); - } -#else - (void)err_type; - (void)err_code; -#endif - tfm_spm_partition_set_state(partition->static_data.partition_id, - SPM_PARTITION_STATE_CLOSED); -} -#endif /* !defined(TFM_PSA_API) */ - -/* - * This function prevents name clashes between the variable names accessibles in - * the scope of where tfm_partition_list.inc is included and the varaible names - * defined inside tfm_partition_list.inc file. - */ -static inline enum spm_err_t add_user_defined_partitions(void) { - #include "tfm_partition_list.inc" - - return SPM_ERR_OK; -} - -uint32_t get_partition_idx(uint32_t partition_id) -{ - uint32_t i; - - if (partition_id == INVALID_PARTITION_ID) { - return SPM_INVALID_PARTITION_IDX; - } - - for (i = 0; i < g_spm_partition_db.partition_count; ++i) { - if (g_spm_partition_db.partitions[i].static_data.partition_id == - partition_id) { - return i; - } - } - return SPM_INVALID_PARTITION_IDX; -} - -enum spm_err_t tfm_spm_db_init(void) -{ - struct spm_partition_desc_t *part_ptr; - enum spm_err_t err; - - (void)tfm_memset (&g_spm_partition_db, 0, sizeof(g_spm_partition_db)); - - /* This function initialises partition db */ - g_spm_partition_db.running_partition_idx = SPM_INVALID_PARTITION_IDX; - g_spm_partition_db.partition_count = 0; - - /* There are a few partitions that are used by TF-M internally. - * These are explicitly added to the partition db here. - */ - - /* For the non secure Execution environment */ -#if (TFM_LVL != 1) || defined(TFM_PSA_API) - extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[]; - extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit[]; - uint32_t psp_stack_bottom = (uint32_t)Image$$ARM_LIB_STACK$$ZI$$Base; - uint32_t psp_stack_top = (uint32_t)Image$$ARM_LIB_STACK$$ZI$$Limit; -#endif - if (g_spm_partition_db.partition_count >= SPM_MAX_PARTITIONS) { - return SPM_ERR_INVALID_CONFIG; - } - part_ptr = &(g_spm_partition_db.partitions[ - g_spm_partition_db.partition_count]); - part_ptr->static_data.partition_id = TFM_SP_NON_SECURE_ID; -#ifdef TFM_PSA_API - part_ptr->static_data.partition_flags = SPM_PART_FLAG_APP_ROT | - SPM_PART_FLAG_IPC; - part_ptr->static_data.partition_priority = TFM_PRIORITY_LOW; - part_ptr->static_data.partition_init = tfm_nspm_thread_entry; -#else - part_ptr->static_data.partition_flags = 0; -#endif - -#if (TFM_LVL != 1) || defined(TFM_PSA_API) - part_ptr->memory_data.stack_bottom = psp_stack_bottom; - part_ptr->memory_data.stack_top = psp_stack_top; - /* Since RW, ZI and stack are configured as one MPU region, configure - * RW start address to psp_stack_bottom to get RW access to stack - */ - part_ptr->memory_data.rw_start = psp_stack_bottom; -#endif - - part_ptr->runtime_data.partition_state = SPM_PARTITION_STATE_UNINIT; - tfm_nspm_configure_clients(); - ++g_spm_partition_db.partition_count; - - /* For the TF-M core environment itself */ - if (g_spm_partition_db.partition_count >= SPM_MAX_PARTITIONS) { - return SPM_ERR_INVALID_CONFIG; - } - part_ptr = &(g_spm_partition_db.partitions[ - g_spm_partition_db.partition_count]); - part_ptr->static_data.partition_id = TFM_SP_CORE_ID; - part_ptr->static_data.partition_flags = - SPM_PART_FLAG_APP_ROT | SPM_PART_FLAG_PSA_ROT; - part_ptr->runtime_data.partition_state = SPM_PARTITION_STATE_UNINIT; - ++g_spm_partition_db.partition_count; - - err = add_user_defined_partitions(); - if (err != SPM_ERR_OK) { - return err; - } - - g_spm_partition_db.is_init = 1; - - return SPM_ERR_OK; -} - -#ifndef TFM_PSA_API -enum spm_err_t tfm_spm_partition_init(void) -{ - struct spm_partition_desc_t *part; - struct tfm_sfn_req_s desc; - int32_t args[4] = {0}; - int32_t fail_cnt = 0; - uint32_t idx; - - /* Call the init function for each partition */ - for (idx = 0; idx < g_spm_partition_db.partition_count; ++idx) { - part = &g_spm_partition_db.partitions[idx]; - tfm_spm_hal_configure_default_isolation(part->platform_data); - if (part->static_data.partition_init == NULL) { - tfm_spm_partition_set_state(idx, SPM_PARTITION_STATE_IDLE); - tfm_spm_partition_set_caller_partition_idx(idx, - SPM_INVALID_PARTITION_IDX); - } else { - int32_t res; - - desc.args = args; - desc.ns_caller = 0U; - desc.iovec_api = TFM_SFN_API_IOVEC; - desc.sfn = (sfn_t)part->static_data.partition_init; - desc.sp_id = part->static_data.partition_id; - res = tfm_core_sfn_request(&desc); - if (res == TFM_SUCCESS) { - tfm_spm_partition_set_state(idx, SPM_PARTITION_STATE_IDLE); - } else { - tfm_spm_partition_err_handler(part, TFM_INIT_FAILURE, res); - fail_cnt++; - } - } - } - - tfm_secure_api_init_done(); - - if (fail_cnt == 0) { - return SPM_ERR_OK; - } else { - return SPM_ERR_PARTITION_NOT_AVAILABLE; - } -} -#endif /* !defined(TFM_PSA_API) */ - -#if (TFM_LVL != 1) || defined(TFM_PSA_API) -uint32_t tfm_spm_partition_get_stack_bottom(uint32_t partition_idx) -{ - return g_spm_partition_db.partitions[partition_idx]. - memory_data.stack_bottom; -} - -uint32_t tfm_spm_partition_get_stack_top(uint32_t partition_idx) -{ - return g_spm_partition_db.partitions[partition_idx].memory_data.stack_top; -} -#endif - -#if (TFM_LVL != 1) && !defined(TFM_PSA_API) -enum spm_err_t tfm_spm_partition_sandbox_config(uint32_t partition_idx) -{ - struct spm_partition_desc_t *part; - if (!g_spm_partition_db.is_init) { - return SPM_ERR_PARTITION_DB_NOT_INIT; - } - - part = &g_spm_partition_db.partitions[partition_idx]; - - return tfm_spm_hal_partition_sandbox_config(&(part->memory_data), - part->platform_data); - -} - -enum spm_err_t tfm_spm_partition_sandbox_deconfig(uint32_t partition_idx) -{ - /* This function takes a partition id and disables the - * SPM partition for that partition - */ - - struct spm_partition_desc_t *part; - - part = &g_spm_partition_db.partitions[partition_idx]; - - return tfm_spm_hal_partition_sandbox_deconfig(&(part->memory_data), - part->platform_data); -} - -uint32_t tfm_spm_partition_get_zi_start(uint32_t partition_idx) -{ - return g_spm_partition_db.partitions[partition_idx]. - memory_data.zi_start; -} - -uint32_t tfm_spm_partition_get_zi_limit(uint32_t partition_idx) -{ - return g_spm_partition_db.partitions[partition_idx]. - memory_data.zi_limit; -} - -uint32_t tfm_spm_partition_get_rw_start(uint32_t partition_idx) -{ - return g_spm_partition_db.partitions[partition_idx]. - memory_data.rw_start; -} - -uint32_t tfm_spm_partition_get_rw_limit(uint32_t partition_idx) -{ - return g_spm_partition_db.partitions[partition_idx]. - memory_data.rw_limit; -} - -void tfm_spm_partition_set_stack(uint32_t partition_idx, uint32_t stack_ptr) -{ - g_spm_partition_db.partitions[partition_idx]. - runtime_data.stack_ptr = stack_ptr; -} -#endif - -uint32_t tfm_spm_partition_get_partition_id(uint32_t partition_idx) -{ - return g_spm_partition_db.partitions[partition_idx].static_data. - partition_id; -} - -uint32_t tfm_spm_partition_get_flags(uint32_t partition_idx) -{ - return g_spm_partition_db.partitions[partition_idx].static_data. - partition_flags; -} - -#ifndef TFM_PSA_API -void tfm_spm_partition_store_context(uint32_t partition_idx, - uint32_t stack_ptr, uint32_t lr) -{ - g_spm_partition_db.partitions[partition_idx]. - runtime_data.stack_ptr = stack_ptr; - g_spm_partition_db.partitions[partition_idx]. - runtime_data.lr = lr; -} - -const struct spm_partition_runtime_data_t * - tfm_spm_partition_get_runtime_data(uint32_t partition_idx) -{ - return &(g_spm_partition_db.partitions[partition_idx].runtime_data); -} - -void tfm_spm_partition_set_state(uint32_t partition_idx, uint32_t state) -{ - g_spm_partition_db.partitions[partition_idx].runtime_data.partition_state = - state; - if (state == SPM_PARTITION_STATE_RUNNING) { - g_spm_partition_db.running_partition_idx = partition_idx; - } -} - -void tfm_spm_partition_set_caller_partition_idx(uint32_t partition_idx, - uint32_t caller_partition_idx) -{ - g_spm_partition_db.partitions[partition_idx].runtime_data. - caller_partition_idx = caller_partition_idx; -} - -void tfm_spm_partition_set_caller_client_id(uint32_t partition_idx, - int32_t caller_client_id) -{ - g_spm_partition_db.partitions[partition_idx].runtime_data. - caller_client_id = caller_client_id; -} - -enum spm_err_t tfm_spm_partition_set_share(uint32_t partition_idx, - uint32_t share) -{ - enum spm_err_t ret = SPM_ERR_OK; - -#if TFM_LVL != 1 - /* Only need to set configuration on levels higher than 1 */ - ret = tfm_spm_hal_set_share_region(share); -#endif - - if (ret == SPM_ERR_OK) { - g_spm_partition_db.partitions[partition_idx].runtime_data.share = share; - } - return ret; -} - -enum spm_err_t tfm_spm_partition_set_iovec(uint32_t partition_idx, - const int32_t *args) -{ - struct spm_partition_runtime_data_t *runtime_data = - &g_spm_partition_db.partitions[partition_idx].runtime_data; - size_t i; - - if ((args[1] < 0) || (args[3] < 0)) { - return SPM_ERR_INVALID_PARAMETER; - } - - runtime_data->iovec_args.in_len = (size_t)args[1]; - for (i = 0U; i < runtime_data->iovec_args.in_len; ++i) { - runtime_data->iovec_args.in_vec[i].base = - ((psa_invec *)args[0])[i].base; - runtime_data->iovec_args.in_vec[i].len = ((psa_invec *)args[0])[i].len; - } - runtime_data->iovec_args.out_len = (size_t)args[3]; - for (i = 0U; i < runtime_data->iovec_args.out_len; ++i) { - runtime_data->iovec_args.out_vec[i].base = - ((psa_outvec *)args[2])[i].base; - runtime_data->iovec_args.out_vec[i].len = - ((psa_outvec *)args[2])[i].len; - } - runtime_data->orig_outvec = (psa_outvec *)args[2]; - runtime_data->iovec_api = 1; - - return SPM_ERR_OK; -} - -uint32_t tfm_spm_partition_get_running_partition_idx(void) -{ - return g_spm_partition_db.running_partition_idx; -} - -void tfm_spm_partition_cleanup_context(uint32_t partition_idx) -{ - struct spm_partition_desc_t *partition = - &(g_spm_partition_db.partitions[partition_idx]); - int32_t i; - - partition->runtime_data.caller_partition_idx = SPM_INVALID_PARTITION_IDX; - partition->runtime_data.share = 0; - partition->runtime_data.iovec_args.in_len = 0; - for (i = 0; i < PSA_MAX_IOVEC; ++i) { - partition->runtime_data.iovec_args.in_vec[i].base = 0; - partition->runtime_data.iovec_args.in_vec[i].len = 0; - } - partition->runtime_data.iovec_args.out_len = 0; - for (i = 0; i < PSA_MAX_IOVEC; ++i) { - partition->runtime_data.iovec_args.out_vec[i].base = 0; - partition->runtime_data.iovec_args.out_vec[i].len = 0; - } - partition->runtime_data.orig_outvec = 0; - partition->runtime_data.iovec_api = 0; -} -#endif /* !defined(TFM_PSA_API) */ - -__attribute__((section("SFN"))) -void tfm_spm_partition_change_privilege(uint32_t privileged) -{ - CONTROL_Type ctrl; - - ctrl.w = __get_CONTROL(); - - if (privileged == TFM_PARTITION_PRIVILEGED_MODE) { - ctrl.b.nPRIV = 0; - } else { - ctrl.b.nPRIV = 1; - } - - __set_CONTROL(ctrl.w); -} diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_api.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_api.h deleted file mode 100644 index a15434d43ae..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_api.h +++ /dev/null @@ -1,355 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __SPM_API_H__ -#define __SPM_API_H__ - -/* This file contains the apis exported by the SPM to tfm core */ -#include "tfm_api.h" -#include "spm_partition_defs.h" -#include "secure_fw/core/tfm_secure_api.h" - -#define SPM_INVALID_PARTITION_IDX (~0U) - -/* Privileged definitions for partition thread mode */ -#define TFM_PARTITION_PRIVILEGED_MODE 1 -#define TFM_PARTITION_UNPRIVILEGED_MODE 0 - -enum spm_err_t { - SPM_ERR_OK = 0, - SPM_ERR_PARTITION_DB_NOT_INIT, - SPM_ERR_PARTITION_ALREADY_ACTIVE, - SPM_ERR_PARTITION_NOT_AVAILABLE, - SPM_ERR_INVALID_PARAMETER, - SPM_ERR_INVALID_CONFIG, -}; - -enum spm_part_state_t { - SPM_PARTITION_STATE_UNINIT = 0, - SPM_PARTITION_STATE_IDLE, - SPM_PARTITION_STATE_RUNNING, - SPM_PARTITION_STATE_SUSPENDED, - SPM_PARTITION_STATE_BLOCKED, - SPM_PARTITION_STATE_CLOSED -}; - -enum spm_part_flag_mask_t { - SPM_PART_FLAG_APP_ROT = 0x01, - SPM_PART_FLAG_PSA_ROT = 0x02, - SPM_PART_FLAG_IPC = 0x04 -}; - -/** - * \brief Holds the iovec parameters that are passed to a service - * - * \note The size of the structure is (and have to be) multiple of 8 bytes - */ -struct iovec_args_t { - psa_invec in_vec[PSA_MAX_IOVEC]; /*!< Array of psa_invec objects */ - size_t in_len; /*!< Number psa_invec objects in in_vec - */ - psa_outvec out_vec[PSA_MAX_IOVEC]; /*!< Array of psa_outvec objects */ - size_t out_len; /*!< Number psa_outvec objects in out_vec - */ -}; - -/** - * \brief Runtime context information of a partition - */ -struct spm_partition_runtime_data_t { - uint32_t partition_state; - uint32_t caller_partition_idx; - int32_t caller_client_id; - uint32_t share; - uint32_t stack_ptr; - uint32_t lr; - int32_t iovec_api; /*!< Whether the function in the partition - * had been called using the iovec API. - * FIXME: Remove the field once this is the - * only option - */ - struct iovec_args_t iovec_args; - psa_outvec *orig_outvec; -}; - - -/** - * \brief Returns the index of the partition with the given partition ID. - * - * \param[in] partition_id Partition id - * - * \return the partition idx if partition_id is valid, - * \ref SPM_INVALID_PARTITION_IDX othervise - */ -uint32_t get_partition_idx(uint32_t partition_id); - -#if (TFM_LVL != 1) || defined(TFM_PSA_API) -/** - * \brief Get bottom of stack region for a partition - * - * \param[in] partition_idx Partition index - * - * \return Stack region bottom value - * - * \note This function doesn't check if partition_idx is valid. - */ -uint32_t tfm_spm_partition_get_stack_bottom(uint32_t partition_idx); - -/** - * \brief Get top of stack region for a partition - * - * \param[in] partition_idx Partition index - * - * \return Stack region top value - * - * \note This function doesn't check if partition_idx is valid. - */ -uint32_t tfm_spm_partition_get_stack_top(uint32_t partition_idx); -#endif - -#if (TFM_LVL != 1) && !defined(TFM_PSA_API) -/** - * \brief Configure isolated sandbox for a partition - * - * \param[in] partition_idx Partition index - * - * \return Error code \ref spm_err_t - * - * \note This function doesn't check if partition_idx is valid. - */ -enum spm_err_t tfm_spm_partition_sandbox_config(uint32_t partition_idx); - -/** - * \brief Deconfigure sandbox for a partition - * - * \param[in] partition_idx Partition index - * - * \return Error code \ref spm_err_t - * - * \note This function doesn't check if partition_idx is valid. - */ -enum spm_err_t tfm_spm_partition_sandbox_deconfig(uint32_t partition_idx); - -/** - * \brief Get the start of the zero-initialised region for a partition - * - * \param[in] partition_idx Partition idx - * - * \return Start of the zero-initialised region - * - * \note This function doesn't check if partition_idx is valid. - */ -uint32_t tfm_spm_partition_get_zi_start(uint32_t partition_idx); - -/** - * \brief Get the limit of the zero-initialised region for a partition - * - * \param[in] partition_idx Partition idx - * - * \return Limit of the zero-initialised region - * - * \note This function doesn't check if partition_idx is valid. - * \note The address returned is not part of the region. - */ -uint32_t tfm_spm_partition_get_zi_limit(uint32_t partition_idx); - -/** - * \brief Get the start of the read-write region for a partition - * - * \param[in] partition_idx Partition idx - * - * \return Start of the read-write region - * - * \note This function doesn't check if partition_idx is valid. - */ -uint32_t tfm_spm_partition_get_rw_start(uint32_t partition_idx); - -/** - * \brief Get the limit of the read-write region for a partition - * - * \param[in] partition_idx Partition idx - * - * \return Limit of the read-write region - * - * \note This function doesn't check if partition_idx is valid. - * \note The address returned is not part of the region. - */ -uint32_t tfm_spm_partition_get_rw_limit(uint32_t partition_idx); - -/** - * \brief Save stack pointer for partition in database - * - * \param[in] partition_idx Partition index - * \param[in] stack_ptr Stack pointer to be stored - * - * \note This function doesn't check if partition_idx is valid. - */ -void tfm_spm_partition_set_stack(uint32_t partition_idx, uint32_t stack_ptr); -#endif - -/** - * \brief Get the id of the partition for its index from the db - * - * \param[in] partition_idx Partition index - * - * \return Partition ID for that partition - * - * \note This function doesn't check if partition_idx is valid. - */ -uint32_t tfm_spm_partition_get_partition_id(uint32_t partition_idx); - -/** - * \brief Get the flags associated with a partition - * - * \param[in] partition_idx Partition index - * - * \return Flags associated with the partition - * - * \note This function doesn't check if partition_idx is valid. - */ -uint32_t tfm_spm_partition_get_flags(uint32_t partition_idx); - -#ifndef TFM_PSA_API -/** - * \brief Get the current runtime data of a partition - * - * \param[in] partition_idx Partition index - * - * \return The runtime data of the specified partition - * - * \note This function doesn't check if partition_idx is valid. - */ -const struct spm_partition_runtime_data_t * - tfm_spm_partition_get_runtime_data(uint32_t partition_idx); - -/** - * \brief Returns the index of the partition that has running state - * - * \return The index of the partition with the running state, if there is any - * set. 0 otherwise. - */ -uint32_t tfm_spm_partition_get_running_partition_idx(void); - -/** - * \brief Save stack pointer and link register for partition in database - * - * \param[in] partition_idx Partition index - * \param[in] stack_ptr Stack pointer to be stored - * \param[in] lr Link register to be stored - * - * \note This function doesn't check if partition_idx is valid. - */ -void tfm_spm_partition_store_context(uint32_t partition_idx, - uint32_t stack_ptr, uint32_t lr); - -/** - * \brief Set the current state of a partition - * - * \param[in] partition_idx Partition index - * \param[in] state The state to be set - * - * \note This function doesn't check if partition_idx is valid. - * \note The state has to have the value set of \ref spm_part_state_t. - */ -void tfm_spm_partition_set_state(uint32_t partition_idx, uint32_t state); - -/** - * \brief Set the caller partition index for a given partition - * - * \param[in] partition_idx Partition index - * \param[in] caller_partition_idx The index of the caller partition - * - * \note This function doesn't check if any of the partition_idxs are valid. - */ -void tfm_spm_partition_set_caller_partition_idx(uint32_t partition_idx, - uint32_t caller_partition_idx); - -/** -* \brief Set the caller client ID for a given partition -* -* \param[in] partition_idx Partition index -* \param[in] caller_client_id The ID of the calling client -* -* \note This function doesn't check if any of the partition_idxs are valid. -*/ -void tfm_spm_partition_set_caller_client_id(uint32_t partition_idx, - int32_t caller_client_id); - -/** - * \brief Set the buffer share region of the partition - * - * \param[in] partition_idx Partition index - * \param[in] share The buffer share region to be set - * - * \return Error code \ref spm_err_t - * - * \note This function doesn't check if partition_idx is valid. - * \note share has to have the value set of \ref tfm_buffer_share_region_e - */ -enum spm_err_t tfm_spm_partition_set_share(uint32_t partition_idx, - uint32_t share); - -/** - * \brief Set the iovec parameters for the partition - * - * \param[in] partition_idx Partition index - * \param[in] args The arguments of the secure function - * - * args is expected to be of type int32_t[4] where: - * args[0] is in_vec - * args[1] is in_len - * args[2] is out_vec - * args[3] is out_len - * - * \return Error code \ref spm_err_t - * - * \note This function doesn't check if partition_idx is valid. - * \note This function assumes that the iovecs that are passed in args are - * valid, and does no sanity check on them at all. - */ -enum spm_err_t tfm_spm_partition_set_iovec(uint32_t partition_idx, - const int32_t *args); - -/** - * \brief Execute partition init function - * - * \return Error code \ref spm_err_t - */ -enum spm_err_t tfm_spm_partition_init(void); - -/** - * \brief Clears the context info from the database for a partition. - * - * \param[in] partition_idx Partition index - * - * \note This function doesn't check if partition_idx is valid. - */ -void tfm_spm_partition_cleanup_context(uint32_t partition_idx); -#endif /* !defined(TFM_PSA_API) */ - -/** - * \brief Initialize partition database - * - * \return Error code \ref spm_err_t - */ -enum spm_err_t tfm_spm_db_init(void); - -/** - * \brief Change the privilege mode for partition thread mode. - * - * \param[in] privileged Privileged mode, - * \ref TFM_PARTITION_PRIVILEGED_MODE - * and \ref TFM_PARTITION_UNPRIVILEGED_MODE - * - * \note Barrier instructions are not called by this function, and if - * it is called in thread mode, it might be necessary to call - * them after this function returns (just like it is done in - * jump_to_ns_code()). - */ -void tfm_spm_partition_change_privilege(uint32_t privileged); - -#endif /*__SPM_API_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_db.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_db.h deleted file mode 100644 index dfdaf32ca10..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_db.h +++ /dev/null @@ -1,83 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __SPM_DB_H__ -#define __SPM_DB_H__ - - -#ifdef TFM_PSA_API -#include "tfm_thread.h" -#endif - -struct spm_partition_desc_t; -struct spm_partition_db_t; - -typedef psa_status_t(*sp_init_function)(void); - -#define TFM_PARTITION_TYPE_APP "APPLICATION-ROT" -#define TFM_PARTITION_TYPE_PSA "PSA-ROT" - -#ifdef TFM_PSA_API -enum tfm_partition_priority { - TFM_PRIORITY_LOW = THRD_PRIOR_LOWEST, - TFM_PRIORITY_NORMAL = THRD_PRIOR_MEDIUM, - TFM_PRIORITY_HIGH = THRD_PRIOR_HIGHEST, -}; -#else -enum tfm_partition_priority { - TFM_PRIORITY_LOW = 0xFF, - TFM_PRIORITY_NORMAL = 0x7F, - TFM_PRIORITY_HIGH = 0, -}; -#endif - -#define TFM_PRIORITY(LEVEL) TFM_PRIORITY_##LEVEL - -/** - * Holds the fields of the partition DB used by the SPM code. The values of - * these fields are calculated at compile time, and set during initialisation - * phase. - */ -struct spm_partition_static_data_t { - uint32_t partition_id; - uint32_t partition_flags; - uint32_t partition_priority; - sp_init_function partition_init; -}; - -/** - * Holds the fields that define a partition for SPM. The fields are further - * divided to structures, to keep the related fields close to each other. - */ -struct spm_partition_desc_t { - struct spm_partition_static_data_t static_data; - struct spm_partition_runtime_data_t runtime_data; - struct tfm_spm_partition_platform_data_t *platform_data; -#if (TFM_LVL != 1) || defined(TFM_PSA_API) - struct tfm_spm_partition_memory_data_t memory_data; -#endif -#ifdef TFM_PSA_API - struct tfm_thrd_ctx sp_thrd; -#endif -}; - -/* Macros to pick linker symbols and allow to form the partition data base */ -#define REGION(a, b, c) a##b##c -#define REGION_NAME(a, b, c) REGION(a, b, c) -/* Changed from #if (TFM_LVL == 1) && !defined(TFM_PSA_API) to #if (TFM_LVL == 1) to avoid linker error. - TF-M build autogenerates region details (code, ro, rw, zi and stack ) using linker scripts. We do not - hve that in mbed-os build yet. -*/ -#if (TFM_LVL == 1) -#define REGION_DECLARE(a, b, c) -#else -#define REGION_DECLARE(a, b, c) extern uint32_t REGION_NAME(a, b, c) -#define PART_REGION_ADDR(partition, region) \ - (uint32_t)®ION_NAME(Image$$, partition, region) -#endif - -#endif /* __SPM_DB_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_db_setup.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_db_setup.h deleted file mode 100644 index 2cecfb78b08..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_db_setup.h +++ /dev/null @@ -1,138 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __SPM_DB_SETUP_H__ -#define __SPM_DB_SETUP_H__ - -#include -#include "spm_db.h" - -/** - * \brief Get the index of a partition. - * - * Gets the index of a partition in the partition db based on the partition ID - * provided as a parameter. - * - * \param[in] partition_idx The index of the partition - * - * \return \ref INVALID_PARTITION_IDX if the provided index is invalid. The - * index of the partition otherwise. - */ -uint32_t get_partition_idx(uint32_t partition_id); - -struct spm_partition_db_t { - uint32_t is_init; - uint32_t partition_count; - uint32_t running_partition_idx; - struct spm_partition_desc_t partitions[SPM_MAX_PARTITIONS]; -}; - -#define PARTITION_INIT_STATIC_DATA(data, partition, flags, id, priority) \ - do { \ - data.partition_id = partition##_ID; \ - data.partition_flags = flags; \ - data.partition_priority = TFM_PRIORITY(priority); \ - } while (0) - -/* Changed from #if (TFM_LVL == 1) && !defined(TFM_PSA_API) to #if (TFM_LVL == 1) to avoid linker error. - TF-M build autogenerates region details (code, ro, rw, zi and stack ) using linker scripts. We do not - hve that in mbed-os build yet. -*/ -#if (TFM_LVL == 1) -#define PARTITION_INIT_MEMORY_DATA(data, partition) -#else -#define PARTITION_INIT_MEMORY_DATA(data, partition) \ - do { \ - data.code_start = PART_REGION_ADDR(partition, $$Base); \ - data.code_limit = PART_REGION_ADDR(partition, $$Limit); \ - data.ro_start = PART_REGION_ADDR(partition, $$RO$$Base); \ - data.ro_limit = PART_REGION_ADDR(partition, $$RO$$Limit); \ - data.rw_start = PART_REGION_ADDR(partition, _DATA$$RW$$Base); \ - data.rw_limit = PART_REGION_ADDR(partition, _DATA$$RW$$Limit); \ - data.zi_start = PART_REGION_ADDR(partition, _DATA$$ZI$$Base); \ - data.zi_limit = PART_REGION_ADDR(partition, _DATA$$ZI$$Limit); \ - data.stack_bottom = PART_REGION_ADDR(partition, _STACK$$ZI$$Base); \ - data.stack_top = PART_REGION_ADDR(partition, _STACK$$ZI$$Limit); \ - } while (0) -#endif - -#if TFM_LVL == 1 -#define PARTITION_INIT_RUNTIME_DATA(data, partition) \ - do { \ - data.partition_state = SPM_PARTITION_STATE_UNINIT; \ - } while (0) -#else -#define PARTITION_INIT_RUNTIME_DATA(data, partition) \ - do { \ - data.partition_state = SPM_PARTITION_STATE_UNINIT; \ - /* The top of the stack is reserved for the iovec */ \ - /* parameters of the service called. That's why in */ \ - /* data.stack_ptr we extract sizeof(struct iovec_args_t) */ \ - /* from the limit. */ \ - data.stack_ptr = \ - PART_REGION_ADDR(partition, _STACK$$ZI$$Limit - \ - sizeof(struct iovec_args_t)); \ - } while (0) -#endif - -#define PARTITION_DECLARE(partition, flag, type, id, priority, part_stack_size) \ - do { \ - REGION_DECLARE(Image$$, partition, $$Base); \ - REGION_DECLARE(Image$$, partition, $$Limit); \ - REGION_DECLARE(Image$$, partition, $$RO$$Base); \ - REGION_DECLARE(Image$$, partition, $$RO$$Limit); \ - REGION_DECLARE(Image$$, partition, _DATA$$RW$$Base); \ - REGION_DECLARE(Image$$, partition, _DATA$$RW$$Limit); \ - REGION_DECLARE(Image$$, partition, _DATA$$ZI$$Base); \ - REGION_DECLARE(Image$$, partition, _DATA$$ZI$$Limit); \ - REGION_DECLARE(Image$$, partition, _STACK$$ZI$$Base); \ - REGION_DECLARE(Image$$, partition, _STACK$$ZI$$Limit); \ - int32_t flags = flag; \ - if (tfm_memcmp(type, TFM_PARTITION_TYPE_APP, \ - strlen(TFM_PARTITION_TYPE_APP)) == 0) { \ - flags |= SPM_PART_FLAG_APP_ROT; \ - } else if (tfm_memcmp(type, TFM_PARTITION_TYPE_PSA, \ - strlen(TFM_PARTITION_TYPE_PSA)) == 0) { \ - flags |= SPM_PART_FLAG_PSA_ROT | SPM_PART_FLAG_APP_ROT; \ - } else { \ - return SPM_ERR_INVALID_CONFIG; \ - } \ - struct spm_partition_desc_t *part_ptr; \ - if (g_spm_partition_db.partition_count >= SPM_MAX_PARTITIONS) { \ - return SPM_ERR_INVALID_CONFIG; \ - } \ - __attribute__((section(".data.partitions_stacks"))) \ - static uint8_t partition##_stack[part_stack_size] __attribute__((aligned(8))); \ - part_ptr = &(g_spm_partition_db.partitions[ \ - g_spm_partition_db.partition_count]); \ - part_ptr->memory_data.stack_bottom = (uint32_t)partition##_stack; \ - part_ptr->memory_data.stack_top = part_ptr->memory_data.stack_bottom + part_stack_size; \ - PARTITION_INIT_STATIC_DATA(part_ptr->static_data, partition, flags, \ - id, priority); \ - PARTITION_INIT_RUNTIME_DATA(part_ptr->runtime_data, partition); \ - PARTITION_INIT_MEMORY_DATA(part_ptr->memory_data, partition); \ - ++g_spm_partition_db.partition_count; \ - } while (0) - -#define PARTITION_ADD_INIT_FUNC(partition, init_func) \ - do { \ - extern int32_t init_func(void); \ - uint32_t partition_idx = get_partition_idx(partition##_ID); \ - struct spm_partition_desc_t *part_ptr = \ - &(g_spm_partition_db.partitions[partition_idx]); \ - part_ptr->static_data.partition_init = init_func; \ - } while (0) - -#define PARTITION_ADD_PERIPHERAL(partition, peripheral) \ - do { \ - uint32_t partition_idx = get_partition_idx(partition##_ID); \ - struct spm_partition_desc_t *part_ptr = \ - &(g_spm_partition_db.partitions[partition_idx]); \ - part_ptr->platform_data = peripheral; \ - } while (0) - -#endif /* __SPM_DB_SETUP_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_partition_defs.h b/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_partition_defs.h deleted file mode 100644 index 0533881f872..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm/spm_partition_defs.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (c) 2017-2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __SPM_PARTITION_DEFS_H__ -#define __SPM_PARTITION_DEFS_H__ - -/* FixMe: allocations to be settled. - * 8 bits reserved by TFM for secure partition Id in this prototype - */ -#define TFM_SP_BASE 256 - -/* A reserved partition ID that is used for uninitialised data */ -#define INVALID_PARTITION_ID (~0U) - -/* ***** partition ID-s internal to the TFM ***** */ -#define TFM_INTERNAL_PARTITIONS (2) - -/* From the SPM point of view the non secure processing environment is handled - * as a special secure partition. This simplifies the context switch - * operations. - */ -#define TFM_SP_NON_SECURE_ID (0) -/* A dummy partition for TFM_SP_CORE is created to handle secure partition - * calls done directly from the core, before NS execution started. - */ -#define TFM_SP_CORE_ID (1) - -#include "tfm_partition_defs.inc" - -/* This limit is only used to define the size of the database reserved for - * partitions. There's no requirement that it match the number of partitions - * that get registered in a specific build - */ -#define SPM_MAX_PARTITIONS (TFM_MAX_USER_PARTITIONS + TFM_INTERNAL_PARTITIONS) - -#endif /* __SPM_PARTITION_DEFS_H__ */ diff --git a/components/TARGET_PSA/TARGET_TFM/tf-m-integration.md b/components/TARGET_PSA/TARGET_TFM/tf-m-integration.md deleted file mode 100644 index f3b4f545561..00000000000 --- a/components/TARGET_PSA/TARGET_TFM/tf-m-integration.md +++ /dev/null @@ -1,111 +0,0 @@ -# TF-M integration to Mbed-OS -This document is an initial draft for TF-M for Mbed-OS porting guide . - -## Audience -This guide is intended for developers wishing to port Mbed-OS with TF-M used as a secure kernel for ARMv8-M targets. - -Prior knowledge with both TF-M & Mbed-OS concepts is assumed. - -## Build system concepts: - -Mbed-OS build system is based on [Mbed-CLI](https://github.com/ARMmbed/mbed-cli). -Mbed-CLI build system performs lookup for source and header files within project directory and adds them all to a build. All folders will be scanned for sources except for: -- folders starting with `TARGET_*` -- folders starting with `COMPONENT_*` -- folders starting with `FEATURE_*` -- folders starting with `TESTS_*` (not true for `mbed test` builds) -- files and folders listed in `.mbedignore` - -The ignored folders listed above can be explicitly added to a compilation by adding following keys to a target description in `targets.json`: -- adding `extra_labels_add`, `inherits` and `sub_target` for adding `TARGET_*` -- adding `components_add` for adding `COMPONENT_*` -- `features_add` for adding `FEATURE_*` - -TF-M is built as bare-metal in a secure target, in order to build a secure target with TF-M as its' kernel need to add `--app-config /tools/psa/tfm/mbed_app.json` to the build command of the secure target. - -## Build hooks - -Mbed-OS testing tools are designed to work with a single image (`.bin` or `.hex`). -When building mbed-os for TF-M targets two images are created. One for normal world(NW) and one for TrustZone(TZ). -Mbed-OS build system provides `post_binary_hook` that allows executing arbitrary Python script for merging NW and TZ images. Typically `post_binary_hook` is added to NW target and assumes TZ target images as a prerequisite. - -## Porting TF-M targets - -Typically firmware for TF-M targets consist of 2 or more images: normal world and TrustZone image. More images can be present in case boot loaders are used. -Two images must be built and linked separately. TrustZone image must be built first. - -There may be code and/or header files sharing between the two targets. -Nested folder layout typically provides more easy code reuse between two targets: -Example: - -```txt -└── tragets - └── TARGET_ - └── TARGET_ - ├── common_files <-- files shared between NW and TZ images - ├── TARGET__NS - │   └── normal_world_files <-- files only to be included for NW build - └── TARGET__S - └── trustzone_files <-- files only to be included for TZ build -``` - -The target should be represented in a following way in `target.json` (`MUSCA_A1` is taken for example and should be substituted): -```json -... -"ARM_MUSCA_A1": { - "public": false, - "inherits": ["Target"], - "supported_toolchains": ["ARMC6", "GCC_ARM"], - "default_toolchain": "ARMC6", - "extra_labels": ["ARM_SSG", "MUSCA_A1"], - }, - "ARM_MUSCA_A1_NS": { - "inherits": ["NSPE_Target", "ARM_MUSCA_A1"], - "core": "Cortex-M33-NS", - "device_has_add": ["INTERRUPTIN", "LPTICKER", "SERIAL", "SLEEP", "USTICKER"], - "macros": [ - "MBED_FAULT_HANDLER_DISABLED", - "MBEDTLS_PSA_CRYPTO_C" - ], - "extra_labels_add": ["MUSCA_A1_NS", "PSA", "TFM"], - "post_binary_hook": {"function": "ArmMuscaA1Code.binary_hook"} - }, - "ARM_MUSCA_A1_S": { - "inherits": ["SPE_Target", "ARM_MUSCA_A1"], - "core": "Cortex-M33", - "device_has_add": ["FLASH"], - "macros": [ - "MBED_MPU_CUSTOM", - "MBEDTLS_PSA_CRYPTO_SPM", - "MBEDTLS_PSA_CRYPTO_C", - "MBEDTLS_ENTROPY_NV_SEED" - ], - "components_add": ["FLASHIAP"], - "extra_labels_add": ["MUSCA_A1_S", "PSA", "TFM"] - }, -``` - -Example details: -- Secure target: - - `"device_has_add": ["FLASH"]` and `"components_add": ["FLASHIAP"]` for enabling storage stack. Required by PSA Internal storage service. - - `"extra_labels_add": ["PSA", "TFM"]` are required to add PSA services and TF-M SPM implementation sources to a compilation - - all the macros from the example above are required - - must inherit from `SPE_Target` -- Nonsecure target: - - must inherit from `NSPE_Target` - - `"extra_labels_add": ["PSA", "TFM"]` are required to add PSA services and TF-M SPM implementation sources to a compilation - - all the macros from the example above are required - - `post_binary_hook` is used to combine secure and non-secure images - -### HAL -For porting Mbed-OS & TF-M both Mbed-OS and TF-M HAL layers should be created. - -#### Mbed-OS HAL: -Follow instructions for [Mbed-OS HAL porting](https://os.mbed.com/docs/mbed-os/v5.11/porting/porting-hal-modules.html) - -#### TF-M: -Mbed-OS contains customized TF-M version. TF-M services reference implementation was replaced by Mbed-OS version. Thus TF-M has different HAL layer comparing to vanilla [TF-M reference implementation](https://git.trustedfirmware.org/trusted-firmware-m.git/about/). - -The porting layer consists of: -- All functions listed in: `components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/platform/include/tfm_spm_hal.h` -- Flash API `mbed-os/hal/flash_api.h` implementation is required for TZ image. It is used by PSA Internal trusted storage implementation. diff --git a/components/TARGET_PSA/services/attestation/COMPONENT_SPE/psa_attestation_partition.c b/components/TARGET_PSA/services/attestation/COMPONENT_SPE/psa_attestation_partition.c deleted file mode 100755 index 3459a7d7688..00000000000 --- a/components/TARGET_PSA/services/attestation/COMPONENT_SPE/psa_attestation_partition.c +++ /dev/null @@ -1,253 +0,0 @@ -/* -* Copyright (c) 2018-2019 ARM Limited. All rights reserved. -* -* SPDX-License-Identifier: Apache-2.0 -* -* Licensed under the Apache License, Version 2.0 (the License); you may -* not use this file except in compliance with the License. -* You may obtain a copy of the License at -* -* http://www.apache.org/licenses/LICENSE-2.0 -* -* Unless required by applicable law or agreed to in writing, software -* distributed under the License is distributed on an AS IS BASIS, WITHOUT -* WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -* See the License for the specific language governing permissions and -* limitations under the License. -*/ - -// ---------------------------------- Includes --------------------------------- -#include "psa/client.h" -#include "psa/service.h" - -#include "mbed_spm_partitions.h" -#include "psa_initial_attestation_api.h" -#include "psa_attest_inject_key.h" -#include "psa_inject_attestation_key_impl.h" -#include "attestation.h" -#include -#include -#include "psa/crypto.h" - -int32_t g_caller_id = 0; - -static void set_caller_id(psa_msg_t *msg) -{ - g_caller_id = msg->client_id; -} - -// ------------------------- Partition's Main Thread --------------------------- - -static void psa_attest_get_token(void) -{ - psa_msg_t msg = { 0 }; - enum psa_attest_err_t status = PSA_ATTEST_ERR_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_ATTEST_GET_TOKEN, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - break; - } - case PSA_IPC_CALL: { - uint8_t *challenge_buff = NULL; - uint8_t *token_buff = NULL; - uint32_t bytes_read = 0; - - challenge_buff = calloc(1, msg.in_size[0]); - if (challenge_buff == NULL) { - status = PSA_ATTEST_ERR_GENERAL; - break; - } - bytes_read = psa_read(msg.handle, 0, - challenge_buff, msg.in_size[0]); - if (bytes_read != msg.in_size[0]) { - free(challenge_buff); - SPM_PANIC("SPM read length mismatch"); - } - - token_buff = calloc(1, msg.out_size[0]); - if (token_buff == NULL) { - status = PSA_ATTEST_ERR_GENERAL; - free(challenge_buff); - break; - } - - psa_invec in_vec[1] = { { challenge_buff, msg.in_size[0] } }; - psa_outvec out_vec[1] = { { token_buff, msg.out_size[0] } }; - - status = attest_init(); - if (status != PSA_ATTEST_ERR_SUCCESS) { - free(challenge_buff); - free(token_buff); - break; - } - - set_caller_id(&msg); - status = initial_attest_get_token(in_vec, 1, out_vec, 1); - if (status == PSA_ATTEST_ERR_SUCCESS) { - psa_write(msg.handle, 0, out_vec[0].base, out_vec[0].len); - } - - free(challenge_buff); - free(token_buff); - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -static void psa_attest_get_token_size(void) -{ - psa_msg_t msg = { 0 }; - enum psa_attest_err_t status = PSA_ATTEST_ERR_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_ATTEST_GET_TOKEN_SIZE, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - break; - } - case PSA_IPC_CALL: { - uint32_t challenge_size; - uint32_t token_size; - uint32_t bytes_read = 0; - - bytes_read = psa_read(msg.handle, 0, - &challenge_size, msg.in_size[0]); - if (bytes_read != msg.in_size[0]) { - SPM_PANIC("SPM read length mismatch"); - } - - psa_invec in_vec[1] = { { &challenge_size, msg.in_size[0] } }; - psa_outvec out_vec[1] = { { &token_size, msg.out_size[0] } }; - - status = attest_init(); - if (status != PSA_ATTEST_ERR_SUCCESS) { - break; - } - - set_caller_id(&msg); - status = initial_attest_get_token_size(in_vec, 1, out_vec, 1); - if (status == PSA_ATTEST_ERR_SUCCESS) { - psa_write(msg.handle, 0, out_vec[0].base, out_vec[0].len); - } - - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -static void psa_attest_inject_key(void) -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_ATTEST_INJECT_KEY, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - break; - } - case PSA_IPC_CALL: { - uint8_t *public_key_data = NULL; - size_t public_key_data_length = 0; - uint8_t *key_data = NULL; - psa_key_type_t type; - uint32_t bytes_read = 0; - - if (msg.in_size[0] != sizeof(psa_key_type_t)) { - status = PSA_ERROR_INVALID_ARGUMENT; - break; - } - - bytes_read = psa_read(msg.handle, 0, &type, msg.in_size[0]); - if (bytes_read != msg.in_size[0]) { - SPM_PANIC("SPM read length mismatch"); - } - - public_key_data = calloc(1, msg.out_size[0]); - if (public_key_data == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - if (msg.in_size[1] != 0) { - key_data = calloc(1, msg.in_size[1]); - if (key_data == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(public_key_data); - break; - } - - bytes_read = psa_read(msg.handle, 1, - key_data, msg.in_size[1]); - if (bytes_read != msg.in_size[1]) { - free(public_key_data); - free(key_data); - SPM_PANIC("SPM read length mismatch"); - } - } - status = psa_attestation_inject_key_impl(key_data, - msg.in_size[1], - type, - public_key_data, - msg.out_size[0], - &public_key_data_length); - - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, public_key_data, public_key_data_length); - } - - psa_write(msg.handle, 1, - &public_key_data_length, sizeof(public_key_data_length)); - free(public_key_data); - if (key_data != NULL) { - free(key_data); - } - break; - - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -void attest_main(void *ptr) -{ - while (1) { - uint32_t signals = psa_wait(ATTEST_SRV_WAIT_ANY_SID_MSK, PSA_BLOCK); - if (signals & PSA_ATTEST_GET_TOKEN) { - psa_attest_get_token(); - } - if (signals & PSA_ATTEST_GET_TOKEN_SIZE) { - psa_attest_get_token_size(); - } - if (signals & PSA_ATTEST_INJECT_KEY) { - psa_attest_inject_key(); - } - } -} diff --git a/components/TARGET_PSA/services/attestation/attestation_partition_psa.json b/components/TARGET_PSA/services/attestation/attestation_partition_psa.json deleted file mode 100755 index f021d4996db..00000000000 --- a/components/TARGET_PSA/services/attestation/attestation_partition_psa.json +++ /dev/null @@ -1,47 +0,0 @@ -{ - "name": "ATTEST_SRV", - "type": "APPLICATION-ROT", - "priority": "NORMAL", - "id": "0x00000025", - "entry_point": "attest_main", - "stack_size": "0x2000", - "heap_size": "0x2000", - "services": [ - { - "name": "PSA_ATTEST_GET_TOKEN_ID", - "identifier": "0x00000F10", - "signal": "PSA_ATTEST_GET_TOKEN", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_ATTEST_GET_TOKEN_SIZE_ID", - "identifier": "0x00000F11", - "signal": "PSA_ATTEST_GET_TOKEN_SIZE", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_ATTEST_INJECT_KEY_ID", - "identifier": "0x00000F12", - "signal": "PSA_ATTEST_INJECT_KEY", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - } - ], - "extern_sids": [ - "PSA_CRYPTO_INIT_ID", - "PSA_HASH_ID", - "PSA_ASYMMETRIC_ID", - "PSA_KEY_MNG_ID", - "PSA_CRYPTO_FREE_ID", - "PSA_KEY_DERIVATION_ID", - "PSA_PLATFORM_LC_GET" - ], - "source_files": [ - "COMPONENT_SPE/psa_attestation_partition.c" - ] -} diff --git a/components/TARGET_PSA/services/crypto/COMPONENT_PSA_SRV_IPC/crypto_struct.h b/components/TARGET_PSA/services/crypto/COMPONENT_PSA_SRV_IPC/crypto_struct.h index 9ffa1f7a373..465ccbb916e 100644 --- a/components/TARGET_PSA/services/crypto/COMPONENT_PSA_SRV_IPC/crypto_struct.h +++ b/components/TARGET_PSA/services/crypto/COMPONENT_PSA_SRV_IPC/crypto_struct.h @@ -14,9 +14,4 @@ * See the License for the specific language governing permissions and * limitations under the License. */ -#ifdef PSA_CRYPTO_SECURE -#include "crypto_struct_spe.h" -#else #include "crypto_struct_ipc.h" -#endif - diff --git a/components/TARGET_PSA/services/crypto/COMPONENT_SPE/crypto_spe.h b/components/TARGET_PSA/services/crypto/COMPONENT_SPE/crypto_spe.h deleted file mode 100644 index 46efdf8cd03..00000000000 --- a/components/TARGET_PSA/services/crypto/COMPONENT_SPE/crypto_spe.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright (c) 2020, Arm Limited and affiliates. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -/** - * \file psa/crypto_spe.h - * \brief Platform Security Architecture cryptography module - */ - -#ifndef PSA_CRYPTO_SPE_H -#define PSA_CRYPTO_SPE_H - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define psa_crypto_init psa_sec_crypto_init -#define psa_get_key_attributes psa_sec_get_key_attributes -#define psa_reset_key_attributes psa_sec_reset_key_attributes -#define psa_open_key psa_sec_open_key -#define psa_close_key psa_sec_close_key -#define psa_import_key psa_sec_import_key -#define psa_destroy_key psa_sec_destroy_key -#define psa_export_key psa_sec_export_key -#define psa_export_public_key psa_sec_export_public_key -#define psa_copy_key psa_sec_copy_key -#define psa_hash_compute psa_sec_hash_compute -#define psa_hash_compare psa_sec_hash_compare -#define psa_hash_setup psa_sec_hash_setup -#define psa_hash_update psa_sec_hash_update -#define psa_hash_finish psa_sec_hash_finish -#define psa_hash_verify psa_sec_hash_verify -#define psa_hash_abort psa_sec_hash_abort -#define psa_hash_clone psa_sec_hash_clone -#define psa_mac_compute psa_sec_mac_compute -#define psa_mac_verify psa_sec_mac_verify -#define psa_mac_sign_setup psa_sec_mac_sign_setup -#define psa_mac_verify_setup psa_sec_mac_verify_setup -#define psa_mac_update psa_sec_mac_update -#define psa_mac_sign_finish psa_sec_mac_sign_finish -#define psa_mac_verify_finish psa_sec_mac_verify_finish -#define psa_mac_abort psa_sec_mac_abort -#define psa_cipher_encrypt psa_sec_cipher_encrypt -#define psa_cipher_decrypt psa_sec_cipher_decrypt -#define psa_cipher_encrypt_setup psa_sec_cipher_encrypt_setup -#define psa_cipher_decrypt_setup psa_sec_cipher_decrypt_setup -#define psa_cipher_generate_iv psa_sec_cipher_generate_iv -#define psa_cipher_set_iv psa_sec_cipher_set_iv -#define psa_cipher_update psa_sec_cipher_update -#define psa_cipher_finish psa_sec_cipher_finish -#define psa_cipher_abort psa_sec_cipher_abort -#define psa_aead_encrypt psa_sec_aead_encrypt -#define psa_aead_decrypt psa_sec_aead_decrypt -#define psa_aead_encrypt_setup psa_sec_aead_encrypt_setup -#define psa_aead_decrypt_setup psa_sec_aead_decrypt_setup -#define psa_aead_generate_nonce psa_sec_aead_generate_nonce -#define psa_aead_set_nonce psa_sec_aead_set_nonce -#define psa_aead_set_lengths psa_sec_aead_set_lengths -#define psa_aead_update_ad psa_sec_aead_update_ad -#define psa_aead_update psa_sec_aead_update -#define psa_aead_finish psa_sec_aead_finish -#define psa_aead_verify psa_sec_aead_verify -#define psa_aead_abort psa_sec_aead_abort -#define psa_sign_hash psa_sec_sign_hash -#define psa_verify_hash psa_sec_verify_hash -#define psa_asymmetric_encrypt psa_sec_asymmetric_encrypt -#define psa_asymmetric_decrypt psa_sec_asymmetric_decrypt -#define psa_key_derivation_setup psa_sec_key_derivation_setup -#define psa_key_derivation_get_capacity psa_sec_key_derivation_get_capacity -#define psa_key_derivation_set_capacity psa_sec_key_derivation_set_capacity -#define psa_key_derivation_input_bytes psa_sec_key_derivation_input_bytes -#define psa_key_derivation_input_key psa_sec_key_derivation_input_key -#define psa_key_derivation_key_agreement psa_sec_key_derivation_key_agreement -#define psa_key_derivation_output_bytes psa_sec_key_derivation_output_bytes -#define psa_key_derivation_output_key psa_sec_key_derivation_output_key -#define psa_key_derivation_abort psa_sec_key_derivation_abort -#define psa_raw_key_agreement psa_sec_raw_key_agreement -#define psa_generate_random psa_sec_generate_random -#define psa_generate_key psa_sec_generate_key - -#define mbedtls_psa_crypto_free mbedtls_psa_sec_crypto_free -#define mbedtls_psa_inject_entropy mbedtls_psa_sec_inject_entropy -#define psa_set_key_domain_parameters psa_sec_set_key_domain_parameters -#define psa_get_key_domain_parameters psa_sec_get_key_domain_parameters - -#define MBEDTLS_PSA_CRYPTO_KEY_FILE_ID_ENCODES_OWNER 1 - -#include "crypto.h" - -#ifdef __cplusplus -} -#endif - -/* The file "crypto_extra.h" contains vendor-specific definitions. This - * can include vendor-defined algorithms, extra functions, etc. */ -#include "crypto_extra.h" - -#endif /* PSA_CRYPTO_SPE_H */ diff --git a/components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_access_control.c b/components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_access_control.c deleted file mode 100644 index 9a6baa5d209..00000000000 --- a/components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_access_control.c +++ /dev/null @@ -1,85 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited and affiliates - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include - -#include "psa/client.h" -#include "psa/service.h" -#include "psa_crypto_access_control.h" -#include "psa_crypto_core.h" -#include "psa_crypto_slot_management.h" - -typedef struct psa_crypto_access_control_s { - psa_key_handle_t key_handle; - int32_t partition_id; -} psa_crypto_access_control_t; - -static psa_crypto_access_control_t crypto_access_control_arr[PSA_KEY_SLOT_COUNT]; - -static inline void psa_crypto_access_control_reset() -{ - memset(crypto_access_control_arr, 0, sizeof(crypto_access_control_arr)); -} - -void psa_crypto_access_control_init(void) -{ - psa_crypto_access_control_reset(); -} - -void psa_crypto_access_control_destroy(void) -{ - psa_crypto_access_control_reset(); -} - -void psa_crypto_access_control_register_handle(psa_key_handle_t key_handle, int32_t partition_id) -{ - for (size_t i = 0; i < PSA_KEY_SLOT_COUNT; i++) { - if (crypto_access_control_arr[i].key_handle == 0 && - crypto_access_control_arr[i].partition_id == 0) { - crypto_access_control_arr[i].key_handle = key_handle; - crypto_access_control_arr[i].partition_id = partition_id; - return; - } - } - - SPM_PANIC("psa_crypto_access_control_register_handle failed"); -} - -void psa_crypto_access_control_unregister_handle(psa_key_handle_t key_handle) -{ - for (size_t i = 0; i < PSA_KEY_SLOT_COUNT; i++) { - if (crypto_access_control_arr[i].key_handle == key_handle) { - crypto_access_control_arr[i].key_handle = 0; - crypto_access_control_arr[i].partition_id = 0; - return; - } - } - - SPM_PANIC("psa_crypto_access_control_unregister_handle failed"); -} - -uint8_t psa_crypto_access_control_is_handle_permitted(psa_key_handle_t key_handle, int32_t partition_id) -{ - for (size_t i = 0; i < PSA_KEY_SLOT_COUNT; i++) { - if (crypto_access_control_arr[i].key_handle == key_handle && - crypto_access_control_arr[i].partition_id == partition_id) { - return 1; - } - } - - return 0; -} diff --git a/components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_access_control.h b/components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_access_control.h deleted file mode 100644 index c588e1423c9..00000000000 --- a/components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_access_control.h +++ /dev/null @@ -1,40 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited and affiliates - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef PSA_CRYPTO_ACCESS_CONTROL_H -#define PSA_CRYPTO_ACCESS_CONTROL_H - -#include - -#include "crypto_platform.h" - -/* initialize the module, resets all tracked information */ -void psa_crypto_access_control_init(void); - -/* deinitialize the module, resets all tracked information */ -void psa_crypto_access_control_destroy(void); - -/* tracks and associates the key_handle with partition_id */ -void psa_crypto_access_control_register_handle(psa_key_handle_t key_handle, int32_t partition_id); - -/* removes tracking of the key_handle */ -void psa_crypto_access_control_unregister_handle(psa_key_handle_t key_handle); - -/* checks if the key_handle is associated with the partition_id, returns 0 is false otherwise 1 */ -uint8_t psa_crypto_access_control_is_handle_permitted(psa_key_handle_t key_handle, int32_t partition_id); - -#endif /* PSA_CRYPTO_ACCESS_CONTROL_H */ diff --git a/components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_partition.c b/components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_partition.c deleted file mode 100644 index 11516a10860..00000000000 --- a/components/TARGET_PSA/services/crypto/COMPONENT_SPE/psa_crypto_partition.c +++ /dev/null @@ -1,2483 +0,0 @@ -/* - * Copyright (c) 2020, Arm Limited and affiliates. - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -// ---------------------------------- Includes --------------------------------- -#include -#include -#include "psa/client.h" -#include "psa/service.h" - - -#define PSA_CRYPTO_SECURE 1 -#include "crypto_spe.h" -#include "crypto_platform_spe.h" -#include "mbed_spm_partitions.h" -#include "mbedtls/entropy.h" -#include "psa_crypto_access_control.h" - -#if defined(MBEDTLS_PLATFORM_C) -#include "mbedtls/platform.h" -#else -#define mbedtls_calloc calloc -#define mbedtls_free free -#endif - -#include "mbed_assert.h" - -// ---------------------------------- Macros ----------------------------------- -#if !defined(MIN) -#define MIN( a, b ) ( ( ( a ) < ( b ) ) ? ( a ) : ( b ) ) -#endif - -// -------------------------------- Structures --------------------------------- -typedef struct psa_spm_hash_clone_s { - int32_t partition_id; - void *source_operation; - uint8_t ref_count; -} psa_spm_hash_clone_t; - -// ---------------------------------- Globals ---------------------------------- -static int psa_spm_init_count = 0; - -/* maximal memory allocation for reading large hash or mac input buffers. -the data will be read in chunks of size */ -#if !defined (MAX_DATA_CHUNK_SIZE_IN_BYTES) -#define MAX_DATA_CHUNK_SIZE_IN_BYTES 400 -#endif - -#ifndef MAX_CONCURRENT_HASH_CLONES -#define MAX_CONCURRENT_HASH_CLONES 2 -#endif -static psa_spm_hash_clone_t psa_spm_hash_clones[MAX_CONCURRENT_HASH_CLONES]; - -#define CLIENT_PSA_KEY_ID_SIZE_IN_BYTES 4 -MBED_STATIC_ASSERT(sizeof(psa_key_id_t) != CLIENT_PSA_KEY_ID_SIZE_IN_BYTES, "Unexpected psa_key_id_t size"); - -// ------------------------- Internal Helper Functions ------------------------- -static inline psa_status_t reserve_hash_clone(int32_t partition_id, void *source_operation, size_t *index) -{ - /* check if the the clone request source operation is already part of another active clone operation, - * for the same source, if so then reuse it and increment its ref_count by 1. A scenario as such may happen - * in case there was a context switch between calls of PSA_HASH_CLONE_BEGIN and PSA_HASH_CLONE_END (on the - * client side) leading to PSA_HASH_CLONE_BEGIN being executed more than one time without a call to - * PSA_HASH_CLONE_END */ - for (*index = 0; *index < MAX_CONCURRENT_HASH_CLONES; (*index)++) { - if (psa_spm_hash_clones[*index].partition_id == partition_id && - psa_spm_hash_clones[*index].source_operation == source_operation) { - psa_spm_hash_clones[*index].ref_count++; - return PSA_SUCCESS; - } - } - - /* find an available empty entry in the array */ - for (*index = 0; *index < MAX_CONCURRENT_HASH_CLONES; (*index)++) { - if (psa_spm_hash_clones[*index].partition_id == 0 && - psa_spm_hash_clones[*index].source_operation == NULL) { - psa_spm_hash_clones[*index].partition_id = partition_id; - psa_spm_hash_clones[*index].source_operation = source_operation; - psa_spm_hash_clones[*index].ref_count++; - return PSA_SUCCESS; - } - } - - return PSA_ERROR_BAD_STATE; -} - -static inline void release_hash_clone(psa_spm_hash_clone_t *hash_clone) -{ - hash_clone->ref_count--; - if (hash_clone->ref_count == 0) { - hash_clone->partition_id = 0; - hash_clone->source_operation = NULL; - } -} - -static void clear_hash_clone(void *source_operation) -{ - for (size_t i = 0; i < MAX_CONCURRENT_HASH_CLONES; i++) { - if (psa_spm_hash_clones[i].source_operation == source_operation) { - psa_spm_hash_clones[i].partition_id = 0; - psa_spm_hash_clones[i].source_operation = NULL; - psa_spm_hash_clones[i].ref_count = 0; - break; - } - } -} - -static inline psa_status_t get_hash_clone(size_t index, int32_t partition_id, - psa_spm_hash_clone_t **hash_clone) -{ - if (index >= MAX_CONCURRENT_HASH_CLONES || - psa_spm_hash_clones[index].partition_id != partition_id || - psa_spm_hash_clones[index].source_operation == NULL) { - return PSA_ERROR_BAD_STATE; - } - - *hash_clone = &psa_spm_hash_clones[index]; - return PSA_SUCCESS; -} - -static void free_message_context(psa_msg_t *msg) -{ - mbedtls_free(msg->rhandle); - psa_set_rhandle(msg->handle, NULL); -} - -static void read_attributes(psa_handle_t handle, - psa_key_owner_id_t owner, - psa_key_attributes_t *attributes) -{ - uint32_t bytes_read; - psa_client_key_attributes_t client; - - bytes_read = psa_read(handle, 1, &client, sizeof(client)); - if (bytes_read != sizeof(client)) { - SPM_PANIC("SPM read length mismatch"); - } - /* We currently don't support domain parameters */ - attributes->domain_parameters = NULL; - attributes->domain_parameters_size = 0; - psa_core_attributes_to_server(&client.core, owner, &attributes->core); -} - -// -------------------- Unimplemented PSA Crypto functions -------------------- -psa_status_t psa_cipher_encrypt(psa_key_handle_t handle, - psa_algorithm_t alg, - const uint8_t *input, - size_t input_length, - uint8_t *output, - size_t output_size, - size_t *output_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_cipher_decrypt(psa_key_handle_t handle, - psa_algorithm_t alg, - const uint8_t *input, - size_t input_length, - uint8_t *output, - size_t output_size, - size_t *output_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_hash_compute(psa_algorithm_t alg, - const uint8_t *input, - size_t input_length, - uint8_t *hash, - size_t hash_size, - size_t *hash_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_hash_compare(psa_algorithm_t alg, - const uint8_t *input, - size_t input_length, - const uint8_t *hash, - const size_t hash_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_mac_compute(psa_key_handle_t handle, - psa_algorithm_t alg, - const uint8_t *input, - size_t input_length, - uint8_t *mac, - size_t mac_size, - size_t *mac_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_mac_verify(psa_key_handle_t handle, - psa_algorithm_t alg, - const uint8_t *input, - size_t input_length, - const uint8_t *mac, - const size_t mac_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_encrypt_setup(psa_aead_operation_t *operation, - psa_key_handle_t handle, - psa_algorithm_t alg) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_decrypt_setup(psa_aead_operation_t *operation, - psa_key_handle_t handle, - psa_algorithm_t alg) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_generate_nonce(psa_aead_operation_t *operation, - uint8_t *nonce, - size_t nonce_size, - size_t *nonce_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_set_nonce(psa_aead_operation_t *operation, - const uint8_t *nonce, - size_t nonce_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_set_lengths(psa_aead_operation_t *operation, - size_t ad_length, - size_t plaintext_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_update_ad(psa_aead_operation_t *operation, - const uint8_t *input, - size_t input_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_update(psa_aead_operation_t *operation, - const uint8_t *input, - size_t input_length, - uint8_t *output, - size_t output_size, - size_t *output_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_finish(psa_aead_operation_t *operation, - uint8_t *ciphertext, - size_t ciphertext_size, - size_t *ciphertext_length, - uint8_t *tag, - size_t tag_size, - size_t *tag_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_verify(psa_aead_operation_t *operation, - uint8_t *plaintext, - size_t plaintext_size, - size_t *plaintext_length, - const uint8_t *tag, - size_t tag_length) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - -psa_status_t psa_aead_abort(psa_aead_operation_t *operation) -{ - return PSA_ERROR_NOT_SUPPORTED; -} - - -// ------------------------- Partition's Main Thread --------------------------- -static void psa_crypto_init_operation(void) -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_CRYPTO_INIT, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - break; - } - - case PSA_IPC_CALL: { - status = psa_crypto_init(); - if (status == PSA_SUCCESS) { - ++psa_spm_init_count; - if (psa_spm_init_count == 1) { - memset(psa_spm_hash_clones, 0, sizeof(psa_spm_hash_clones)); - psa_crypto_access_control_init(); - } - } - - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -static void psa_crypto_free_operation(void) -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_CRYPTO_FREE, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - break; - } - - case PSA_IPC_CALL: { - /** perform crypto_free iff the number of init-s - * is equal to the number of free-s - */ - if (psa_spm_init_count > 0) { - --psa_spm_init_count; - } - - if (psa_spm_init_count == 0) { - memset(psa_spm_hash_clones, 0, sizeof(psa_spm_hash_clones)); - psa_crypto_access_control_destroy(); - mbedtls_psa_crypto_free(); - } - - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -static void psa_mac_operation(void) -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_MAC, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: { - psa_mac_operation_t *psa_operation = mbedtls_calloc(1, sizeof(psa_mac_operation_t)); - if (psa_operation == NULL) { - status = PSA_CONNECTION_REFUSED; - break; - } - - psa_set_rhandle(msg.handle, psa_operation); - break; - } - - case PSA_IPC_CALL: { - uint32_t bytes_read; - psa_crypto_ipc_t psa_crypto = { 0 }; - - if (msg.in_size[0] != sizeof(psa_crypto_ipc_t)) { - status = PSA_ERROR_COMMUNICATION_FAILURE; - break; - } - - bytes_read = psa_read(msg.handle, 0, &psa_crypto, msg.in_size[0]); - if (bytes_read != msg.in_size[0]) { - SPM_PANIC("SPM read length mismatch"); - } - - switch (psa_crypto.func) { - case PSA_MAC_COMPUTE: { - uint8_t *input = NULL; - size_t input_length = msg.in_size[1]; - uint8_t *mac = NULL; - size_t mac_size = msg.out_size[0]; - size_t mac_length; - - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto.handle, msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - /* Read in input. */ - if (input_length > 0) { - input = mbedtls_calloc(1, input_length); - if (input == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - bytes_read = psa_read(msg.handle, 1, input, input_length); - if (bytes_read != input_length) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Allocate the mac output buffer. */ - if (mac_size > 0) { - mac = mbedtls_calloc(1, mac_size); - if (mac == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(input); - break; - } - } - - status = psa_mac_compute(psa_crypto.handle, - psa_crypto.alg, - input, input_length, - mac, mac_size, &mac_length); - if (status == PSA_SUCCESS) { - /* Write out the mac. */ - psa_write(msg.handle, 0, mac, mac_length); - psa_write(msg.handle, 1, - &mac_length, sizeof(mac_length)); - } - - free(mac); - free(input); - break; - } - - case PSA_MAC_VERIFY: { - uint8_t *input = NULL; - size_t input_length = msg.in_size[1]; - uint8_t *mac = NULL; - size_t mac_length = msg.in_size[2]; - - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto.handle, msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - /* Read in input. */ - if (input_length > 0) { - input = mbedtls_calloc(1, input_length); - if (input == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - bytes_read = psa_read(msg.handle, 1, input, input_length); - if (bytes_read != input_length) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Read in mac. */ - if (mac_length > 0) { - mac = mbedtls_calloc(1, mac_length); - if (mac == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(input); - break; - } - } - bytes_read = psa_read(msg.handle, 2, mac, mac_length); - if (bytes_read != mac_length) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_mac_verify(psa_crypto.handle, - psa_crypto.alg, - input, input_length, - mac, mac_length); - free(mac); - free(input); - break; - } - - case PSA_MAC_SIGN_SETUP: { - if (psa_crypto_access_control_is_handle_permitted(psa_crypto.handle, msg.client_id)) { - status = psa_mac_sign_setup(msg.rhandle, psa_crypto.handle, psa_crypto.alg); - } else { - status = PSA_ERROR_INVALID_HANDLE; - } - - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - case PSA_MAC_VERIFY_SETUP: { - if (psa_crypto_access_control_is_handle_permitted(psa_crypto.handle, msg.client_id)) { - status = psa_mac_verify_setup(msg.rhandle, psa_crypto.handle, psa_crypto.alg); - } else { - status = PSA_ERROR_INVALID_HANDLE; - } - - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - case PSA_MAC_UPDATE: { - uint8_t *input_buffer = NULL; - size_t data_remaining = msg.in_size[1]; - size_t allocation_size = MIN(data_remaining, MAX_DATA_CHUNK_SIZE_IN_BYTES); - size_t size_to_read = 0; - - if (allocation_size > 0) { - input_buffer = mbedtls_calloc(1, allocation_size); - if (input_buffer == NULL) { - psa_mac_abort(msg.rhandle); - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - while (data_remaining > 0) { - size_to_read = MIN(data_remaining, MAX_DATA_CHUNK_SIZE_IN_BYTES); - - bytes_read = psa_read(msg.handle, 1, input_buffer, size_to_read); - if (bytes_read != size_to_read) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_mac_update(msg.rhandle, input_buffer, bytes_read); - // stop on error - if (status != PSA_SUCCESS) { - break; - } - data_remaining = data_remaining - bytes_read; - } - - mbedtls_free(input_buffer); - } - } else { - status = psa_mac_update(msg.rhandle, input_buffer, allocation_size); - } - - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - case PSA_MAC_SIGN_FINISH: { - uint8_t *mac = NULL; - size_t mac_size = 0, mac_length = 0; - - bytes_read = psa_read(msg.handle, 1, &mac_size, msg.in_size[1]); - if (bytes_read != msg.in_size[1]) { - SPM_PANIC("SPM read length mismatch"); - } - - if (mac_size > 0) { - mac = mbedtls_calloc(1, mac_size); - if (mac == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } - } - - if (status == PSA_SUCCESS) { - status = psa_mac_sign_finish(msg.rhandle, mac, mac_size, &mac_length); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, mac, mac_length); - psa_write(msg.handle, 1, &mac_length, sizeof(mac_length)); - } - mbedtls_free(mac); - } else { - psa_mac_abort(msg.rhandle); - } - - free_message_context(&msg); - break; - } - - case PSA_MAC_VERIFY_FINISH: { - uint8_t *mac = NULL; - size_t mac_length = 0; - - bytes_read = psa_read(msg.handle, 1, &mac_length, msg.in_size[1]); - if (bytes_read != msg.in_size[1] || mac_length != msg.in_size[2]) { - SPM_PANIC("SPM read length mismatch"); - } - - if (mac_length > 0) { - mac = mbedtls_calloc(1, mac_length); - if (mac == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - bytes_read = psa_read(msg.handle, 2, mac, mac_length); - if (bytes_read != mac_length) { - SPM_PANIC("SPM read length mismatch"); - } - } - } - - if (status == PSA_SUCCESS) { - status = psa_mac_verify_finish(msg.rhandle, mac, mac_length); - mbedtls_free(mac); - } else { - psa_mac_abort(msg.rhandle); - } - - free_message_context(&msg); - break; - } - - case PSA_MAC_ABORT: { - status = psa_mac_abort(msg.rhandle); - free_message_context(&msg); - break; - } - - default: { - status = PSA_ERROR_NOT_SUPPORTED; - break; - } - - break; - } - - break; - } - - case PSA_IPC_DISCONNECT: { - if (msg.rhandle != NULL) { - psa_mac_abort(msg.rhandle); - free_message_context(&msg); - } - - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -static void psa_hash_operation(void) -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_HASH, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: { - psa_hash_operation_t *psa_operation = mbedtls_calloc(1, sizeof(psa_hash_operation_t)); - if (psa_operation == NULL) { - status = PSA_CONNECTION_REFUSED; - break; - } - - psa_set_rhandle(msg.handle, psa_operation); - break; - } - - case PSA_IPC_CALL: { - uint32_t bytes_read = 0; - psa_crypto_ipc_t psa_crypto = {0}; - - if (msg.in_size[0] != sizeof(psa_crypto_ipc_t)) { - status = PSA_ERROR_COMMUNICATION_FAILURE; - break; - } - - bytes_read = psa_read(msg.handle, 0, &psa_crypto, msg.in_size[0]); - if (bytes_read != msg.in_size[0]) { - SPM_PANIC("SPM read length mismatch"); - } - - switch (psa_crypto.func) { - case PSA_HASH_COMPUTE: { - uint8_t *input = NULL; - size_t input_length = msg.in_size[1]; - uint8_t *hash = NULL; - size_t hash_size = msg.out_size[0]; - size_t hash_length; - - /* Read in input. */ - if (input_length > 0) { - input = mbedtls_calloc(1, input_length); - if (input == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - bytes_read = psa_read(msg.handle, 1, input, input_length); - if (bytes_read != input_length) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Allocate the hash output buffer. */ - if (hash_size > 0) { - hash = mbedtls_calloc(1, hash_size); - if (hash == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(input); - break; - } - } - - status = psa_hash_compute(psa_crypto.alg, - input, input_length, - hash, hash_size, &hash_length); - if (status == PSA_SUCCESS) { - /* Write out the hash. */ - psa_write(msg.handle, 0, hash, hash_length); - psa_write(msg.handle, 1, - &hash_length, sizeof(hash_length)); - } - - free(hash); - free(input); - break; - } - - case PSA_HASH_COMPARE: { - uint8_t *input = NULL; - size_t input_length = msg.in_size[1]; - uint8_t *hash = NULL; - size_t hash_length = msg.in_size[2]; - - /* Read in input. */ - if (input_length > 0) { - input = mbedtls_calloc(1, input_length); - if (input == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - bytes_read = psa_read(msg.handle, 1, input, input_length); - if (bytes_read != input_length) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Read in hash. */ - if (hash_length > 0) { - hash = mbedtls_calloc(1, hash_length); - if (hash == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(input); - break; - } - } - bytes_read = psa_read(msg.handle, 2, hash, hash_length); - if (bytes_read != hash_length) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_hash_compare(psa_crypto.alg, - input, input_length, - hash, hash_length); - free(hash); - free(input); - break; - } - - case PSA_HASH_SETUP: { - status = psa_hash_setup(msg.rhandle, - psa_crypto.alg); - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - case PSA_HASH_UPDATE: { - uint8_t *input_buffer = NULL; - size_t data_remaining = msg.in_size[1]; - size_t size_to_read = 0; - size_t allocation_size = MIN(data_remaining, MAX_DATA_CHUNK_SIZE_IN_BYTES); - - if (allocation_size > 0) { - input_buffer = mbedtls_calloc(1, allocation_size); - if (input_buffer == NULL) { - psa_hash_abort(msg.rhandle); - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - while (data_remaining > 0) { - size_to_read = MIN(data_remaining, MAX_DATA_CHUNK_SIZE_IN_BYTES); - - bytes_read = psa_read(msg.handle, 1, input_buffer, size_to_read); - if (bytes_read != size_to_read) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_hash_update(msg.rhandle, input_buffer, bytes_read); - // stop on error - if (status != PSA_SUCCESS) { - break; - } - data_remaining = data_remaining - bytes_read; - } - - mbedtls_free(input_buffer); - } - } else { - status = psa_hash_update(msg.rhandle, input_buffer, allocation_size); - } - - if (status != PSA_SUCCESS) { - clear_hash_clone(msg.rhandle); - free_message_context(&msg); - } - break; - } - - case PSA_HASH_FINISH: { - uint8_t *hash = NULL; - size_t hash_size = 0, hash_length = 0; - - bytes_read = psa_read(msg.handle, 1, &hash_size, msg.in_size[1]); - if (bytes_read != msg.in_size[1]) { - SPM_PANIC("SPM read length mismatch"); - } - - if (hash_size > 0) { - hash = mbedtls_calloc(1, hash_size); - if (hash == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } - } - - if (status == PSA_SUCCESS) { - status = psa_hash_finish(msg.rhandle, hash, hash_size, &hash_length); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, hash, hash_length); - psa_write(msg.handle, 1, &hash_length, sizeof(hash_length)); - } - mbedtls_free(hash); - } else { - psa_hash_abort(msg.rhandle); - } - - clear_hash_clone(msg.rhandle); - free_message_context(&msg); - break; - } - - case PSA_HASH_VERIFY: { - uint8_t *hash = NULL; - size_t hash_length = 0; - - bytes_read = psa_read(msg.handle, 1, &hash_length, msg.in_size[1]); - if (bytes_read != msg.in_size[1] || hash_length != msg.in_size[2]) { - SPM_PANIC("SPM read length mismatch"); - } - - if (hash_length > 0) { - hash = mbedtls_calloc(1, hash_length); - if (hash == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - bytes_read = psa_read(msg.handle, 2, hash, hash_length); - if (bytes_read != hash_length) { - SPM_PANIC("SPM read length mismatch"); - } - } - } - - if (status == PSA_SUCCESS) { - status = psa_hash_verify(msg.rhandle, hash, hash_length); - mbedtls_free(hash); - } else { - psa_hash_abort(msg.rhandle); - } - - clear_hash_clone(msg.rhandle); - free_message_context(&msg); - break; - } - - case PSA_HASH_ABORT: { - status = psa_hash_abort(msg.rhandle); - clear_hash_clone(msg.rhandle); - free_message_context(&msg); - break; - } - - case PSA_HASH_CLONE_BEGIN: { - size_t index = 0; - status = reserve_hash_clone(msg.client_id, msg.rhandle, &index); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, &index, sizeof(index)); - } - break; - } - - case PSA_HASH_CLONE_END: { - psa_spm_hash_clone_t *hash_clone = NULL; - size_t index; - - bytes_read = psa_read(msg.handle, 1, &index, msg.in_size[1]); - if (bytes_read != msg.in_size[1]) { - SPM_PANIC("SPM read length mismatch"); - } - - status = get_hash_clone(index, msg.client_id, &hash_clone); - if (status == PSA_SUCCESS) { - status = psa_hash_clone(hash_clone->source_operation, msg.rhandle); - release_hash_clone(hash_clone); - } - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - default: { - status = PSA_ERROR_NOT_SUPPORTED; - break; - } - } - - break; - } - - case PSA_IPC_DISCONNECT: { - if (msg.rhandle != NULL) { - psa_hash_abort(msg.rhandle); - clear_hash_clone(msg.rhandle); - free_message_context(&msg); - } - - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -static void psa_asymmetric_operation(void) -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_ASYMMETRIC, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - break; - } - - case PSA_IPC_CALL: { - if (msg.in_size[0] != sizeof(psa_crypto_ipc_asymmetric_t)) { - status = PSA_ERROR_COMMUNICATION_FAILURE; - break; - } - - uint32_t bytes_read = 0; - psa_crypto_ipc_asymmetric_t psa_crypto = {0}; - - bytes_read = psa_read(msg.handle, 0, &psa_crypto, msg.in_size[0]); - if (bytes_read != msg.in_size[0]) { - SPM_PANIC("SPM read length mismatch"); - } - - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto.handle, - msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - switch (psa_crypto.func) { - case PSA_SIGN_HASH: { - uint8_t *signature = NULL; - uint8_t *hash = NULL; - size_t signature_length = 0, - signature_size = msg.out_size[0], - hash_size = msg.in_size[1]; - - if (signature_size > 0) { - signature = mbedtls_calloc(1, signature_size); - if (signature == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } - } - if (status == PSA_SUCCESS && hash_size > 0) { - hash = mbedtls_calloc(1, hash_size); - if (hash == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - bytes_read = psa_read(msg.handle, 1, hash, hash_size); - if (bytes_read != hash_size) { - SPM_PANIC("SPM read length mismatch"); - } - } - } - - if (status == PSA_SUCCESS) { - status = psa_sign_hash(psa_crypto.handle, psa_crypto.alg, - hash, hash_size, - signature, signature_size, &signature_length); - - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, signature, signature_length); - } - psa_write(msg.handle, 1, &signature_length, sizeof(signature_length)); - } - - mbedtls_free(hash); - mbedtls_free(signature); - break; - } - - case PSA_VERIFY_HASH: { - uint8_t *signature = NULL; - uint8_t *hash = NULL; - size_t signature_size = msg.in_size[1], - hash_size = msg.in_size[2]; - - if (signature_size > 0) { - signature = mbedtls_calloc(1, signature_size); - if (signature == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - bytes_read = psa_read(msg.handle, 1, signature, signature_size); - if (bytes_read != signature_size) { - SPM_PANIC("SPM read length mismatch"); - } - } - } - if (status == PSA_SUCCESS && hash_size > 0) { - hash = mbedtls_calloc(1, hash_size); - if (hash == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - bytes_read = psa_read(msg.handle, 2, hash, hash_size); - if (bytes_read != hash_size) { - SPM_PANIC("SPM read length mismatch"); - } - } - } - - if (status == PSA_SUCCESS) { - status = psa_verify_hash(psa_crypto.handle, psa_crypto.alg, - hash, hash_size, - signature, signature_size); - } - - mbedtls_free(signature); - mbedtls_free(hash); - break; - } - - case PSA_ASYMMETRIC_ENCRYPT: - case PSA_ASYMMETRIC_DECRYPT: { - uint8_t *input = NULL, *salt = NULL, *output = NULL, *buffer = NULL; - size_t output_length = 0, - buffer_size = msg.in_size[1], - output_size = msg.out_size[0]; - - if (buffer_size > 0) { - buffer = mbedtls_calloc(1, buffer_size); - if (buffer == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - bytes_read = psa_read(msg.handle, 1, buffer, buffer_size); - if (bytes_read != buffer_size) { - SPM_PANIC("SPM read length mismatch"); - } - - input = buffer; - salt = buffer + psa_crypto.input_length; - } - } - if (status == PSA_SUCCESS && output_size > 0) { - output = mbedtls_calloc(1, output_size); - if (output == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } - } - - if (status == PSA_SUCCESS) { - if (psa_crypto.func == PSA_ASYMMETRIC_ENCRYPT) { - status = psa_asymmetric_encrypt(psa_crypto.handle, psa_crypto.alg, - input, psa_crypto.input_length, - salt, psa_crypto.salt_length, - output, output_size, &output_length); - } else { - status = psa_asymmetric_decrypt(psa_crypto.handle, psa_crypto.alg, - input, psa_crypto.input_length, - salt, psa_crypto.salt_length, - output, output_size, &output_length); - } - - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, output, output_length); - } - psa_write(msg.handle, 1, &output_length, sizeof(output_length)); - } - - mbedtls_free(output); - mbedtls_free(buffer); - break; - } - - default: { - status = PSA_ERROR_NOT_SUPPORTED; - break; - } - } - - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -static void psa_aead_operation() -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_AEAD, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: { - psa_aead_operation_t *psa_operation = - mbedtls_calloc(1, sizeof(*psa_operation)); - if (psa_operation == NULL) { - status = PSA_CONNECTION_REFUSED; - break; - } - - psa_set_rhandle(msg.handle, psa_operation); - break; - } - - case PSA_IPC_CALL: { - if (msg.in_size[0] != sizeof(psa_crypto_ipc_aead_t)) { - status = PSA_ERROR_COMMUNICATION_FAILURE; - break; - } - - uint32_t bytes_read = 0; - psa_crypto_ipc_aead_t psa_crypto = {0}; - - bytes_read = psa_read(msg.handle, 0, &psa_crypto, msg.in_size[0]); - if (bytes_read != msg.in_size[0]) { - SPM_PANIC("SPM read length mismatch"); - } - - switch (psa_crypto.func) { - case PSA_AEAD_ENCRYPT: - case PSA_AEAD_DECRYPT: { - uint8_t *input = NULL, *additional_data = NULL, *output = NULL, *buffer = NULL; - size_t output_length = 0, - buffer_size = msg.in_size[1], - output_size = msg.out_size[0]; - - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto.handle, - msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - if (buffer_size > 0) { - buffer = mbedtls_calloc(1, buffer_size); - if (buffer == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - bytes_read = psa_read(msg.handle, 1, buffer, buffer_size); - if (bytes_read != buffer_size) { - SPM_PANIC("SPM read length mismatch"); - } - - additional_data = buffer; - input = buffer + psa_crypto.additional_data_length; - } - } - if (status == PSA_SUCCESS && output_size > 0) { - output = mbedtls_calloc(1, output_size); - if (output == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } - } - - if (status == PSA_SUCCESS) { - if (psa_crypto.func == PSA_AEAD_ENCRYPT) { - status = psa_aead_encrypt(psa_crypto.handle, psa_crypto.alg, - psa_crypto.nonce, (size_t)psa_crypto.nonce_size, - additional_data, psa_crypto.additional_data_length, - input, psa_crypto.input_length, - output, output_size, &output_length); - } else { - status = psa_aead_decrypt(psa_crypto.handle, psa_crypto.alg, - psa_crypto.nonce, (size_t)psa_crypto.nonce_size, - additional_data, psa_crypto.additional_data_length, - input, psa_crypto.input_length, - output, output_size, &output_length); - } - - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, output, output_length); - psa_write(msg.handle, 1, &output_length, sizeof(output_length)); - } - } - - mbedtls_free(buffer); - mbedtls_free(output); - break; - } - - case PSA_AEAD_ENCRYPT_SETUP: { - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto.handle, - msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - status = psa_aead_encrypt_setup(msg.rhandle, - psa_crypto.handle, - psa_crypto.alg); - break; - } - - case PSA_AEAD_DECRYPT_SETUP: { - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto.handle, - msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - status = psa_aead_decrypt_setup(msg.rhandle, - psa_crypto.handle, - psa_crypto.alg); - - status = PSA_ERROR_NOT_SUPPORTED; - break; - } - - case PSA_AEAD_GENERATE_NONCE: { - uint8_t *nonce; - size_t nonce_size = msg.out_size[0]; - size_t nonce_length; - - /* Allocate the nonce buffer. */ - if (nonce_size > 0) { - nonce = mbedtls_calloc(1, nonce_size); - if (nonce == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - - status = psa_aead_generate_nonce( - msg.rhandle, - nonce, nonce_size, &nonce_length); - if (status == PSA_SUCCESS) { - /* Write out the nonce. */ - psa_write(msg.handle, 0, nonce, nonce_length); - psa_write(msg.handle, 1, &nonce_length, sizeof(nonce_length)); - } - free(nonce); - break; - } - - case PSA_AEAD_SET_NONCE: { - uint8_t *nonce = NULL; - size_t nonce_length = msg.in_size[1]; - - /* Read in the nonce. */ - if (nonce_length > 0) { - nonce = mbedtls_calloc(1, nonce_length); - if (nonce == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - bytes_read = psa_read(msg.handle, 1, nonce, nonce_length); - if (bytes_read != nonce_length) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_aead_set_nonce( - msg.rhandle, nonce, nonce_length); - free(nonce); - break; - } - - case PSA_AEAD_SET_LENGTHS: { - status = psa_aead_set_lengths( - msg.rhandle, - psa_crypto.additional_data_length, - psa_crypto.input_length); - break; - } - - case PSA_AEAD_UPDATE_AD: { - uint8_t *input = NULL; - size_t input_length = msg.in_size[1]; - - /* Read in input. */ - if (input_length > 0) { - input = mbedtls_calloc(1, input_length); - if (input == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - bytes_read = psa_read(msg.handle, 1, input, input_length); - if (bytes_read != input_length) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_aead_update_ad( - msg.rhandle, input, input_length); - - free(input); - break; - } - - case PSA_AEAD_UPDATE: { - uint8_t *input; - size_t input_length = msg.in_size[1]; - uint8_t *output; - size_t output_size = msg.out_size[0]; - size_t output_length; - - /* Read in input. */ - if (input_length > 0) { - input = mbedtls_calloc(1, input_length); - if (input == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - bytes_read = psa_read(msg.handle, 1, input, input_length); - if (bytes_read != input_length) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Allocate the output buffer. */ - if (output_size > 0) { - output = mbedtls_calloc(1, output_size); - if (output == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(input); - break; - } - } - - status = psa_aead_update( - msg.rhandle, input, input_length, - output, output_size, &output_length); - if (status == PSA_SUCCESS) { - /* Write out the output. */ - psa_write(msg.handle, 0, output, output_length); - psa_write(msg.handle, 1, &output_length, sizeof(output_length)); - } - free(output); - free(input); - break; - } - - case PSA_AEAD_FINISH: { - uint8_t *ciphertext = NULL; - size_t ciphertext_size = msg.out_size[0]; - size_t ciphertext_length; - uint8_t *tag = NULL; - size_t tag_size = msg.out_size[2]; - size_t tag_length; - - /* Allocate ciphertext. */ - if (ciphertext_size > 0) { - ciphertext = mbedtls_calloc(1, ciphertext_size); - if (ciphertext == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - - /* Allocate tag. */ - if (tag_size > 0) { - tag = mbedtls_calloc(1, tag_size); - if (tag == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(ciphertext); - break; - } - } - - status = psa_aead_finish(msg.rhandle, - ciphertext, - ciphertext_size, - &ciphertext_length, - tag, - tag_size, - &tag_length); - if (status == PSA_SUCCESS) { - /* Write out ciphertext. */ - if (ciphertext_size > 0) { - psa_write(msg.handle, 0, ciphertext, - ciphertext_length); - psa_write(msg.handle, 1, &ciphertext_length, - sizeof(ciphertext_length)); - } - - /* Write out tag. */ - if (tag_size > 0) { - psa_write(msg.handle, 2, tag, tag_length); - psa_write(msg.handle, 3, &tag_length, - sizeof(tag_length)); - } - } - free(tag); - free(ciphertext); - break; - } - - case PSA_AEAD_VERIFY: { - uint8_t *plaintext = NULL; - size_t plaintext_size = msg.out_size[0]; - size_t plaintext_length; - uint8_t *tag = NULL; - size_t tag_length = msg.in_size[1]; - - /* Allocate plaintext. */ - if (plaintext_size > 0) { - plaintext = mbedtls_calloc(1, plaintext_size); - if (plaintext == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - - /* Read in tag. */ - if (tag_length > 0) { - tag = mbedtls_calloc(1, tag_length); - if (tag == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(plaintext); - break; - } - } - bytes_read = psa_read(msg.handle, 1, tag, tag_length); - if (bytes_read != tag_length) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_aead_verify(msg.rhandle, - plaintext, - plaintext_size, - &plaintext_length, - tag, - tag_length); - if (status == PSA_SUCCESS) { - /* Write out the plaintext. */ - psa_write(msg.handle, 0, plaintext, plaintext_length); - psa_write(msg.handle, 1, &plaintext_length, - sizeof(plaintext_length)); - } - - free(tag); - free(plaintext); - break; - } - - case PSA_AEAD_ABORT: { - status = psa_aead_abort(msg.rhandle); - free_message_context(&msg); - break; - } - - default: { - status = PSA_ERROR_NOT_SUPPORTED; - break; - } - } - - break; - } - - case PSA_IPC_DISCONNECT: { - if (msg.rhandle != NULL) { - psa_aead_abort(msg.rhandle); - free_message_context(&msg); - } - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -static void psa_symmetric_operation(void) -{ - psa_status_t status = PSA_SUCCESS; - psa_msg_t msg = { 0 }; - - if (PSA_SUCCESS != psa_get(PSA_SYMMETRIC, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: { - psa_cipher_operation_t *psa_operation = - mbedtls_calloc(1, sizeof(psa_cipher_operation_t)); - if (psa_operation == NULL) { - status = PSA_CONNECTION_REFUSED; - break; - } - - psa_set_rhandle(msg.handle, psa_operation); - break; - } - - case PSA_IPC_CALL: { - uint32_t bytes_read; - psa_crypto_ipc_t psa_crypto_ipc = { 0 }; - - if (msg.in_size[0] != sizeof(psa_crypto_ipc_t)) { - status = PSA_ERROR_COMMUNICATION_FAILURE; - break; - } - - bytes_read = psa_read(msg.handle, 0, &psa_crypto_ipc, - msg.in_size[0]); - if (bytes_read != msg.in_size[0]) { - SPM_PANIC("SPM read length mismatch"); - } - - switch (psa_crypto_ipc.func) { - case PSA_CIPHER_ENCRYPT: - case PSA_CIPHER_DECRYPT: { - uint8_t *input = NULL; - size_t input_length = msg.in_size[1]; - uint8_t *output = NULL; - size_t output_size = msg.out_size[0]; - size_t output_length; - - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto_ipc.handle, msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - } - - /* Read in input. */ - if (input_length > 0) { - input = mbedtls_calloc(1, input_length); - if (input == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - bytes_read = psa_read(msg.handle, 1, input, input_length); - if (bytes_read != input_length) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Allocate the output buffer. */ - if (output_size > 0) { - output = mbedtls_calloc(1, output_size); - if (output == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(input); - break; - } - } - - /* Perform encrypt or decrypt. */ - switch (psa_crypto_ipc.func) { - case PSA_CIPHER_ENCRYPT: - status = psa_cipher_encrypt( - psa_crypto_ipc.handle, - psa_crypto_ipc.alg, - input, input_length, - output, output_size, &output_length); - break; - case PSA_CIPHER_DECRYPT: - status = psa_cipher_decrypt( - psa_crypto_ipc.handle, - psa_crypto_ipc.alg, - input, input_length, - output, output_size, &output_length); - break; - default: - SPM_PANIC("Unexpected func"); - } - - if (status == PSA_SUCCESS) { - /* Write out the output. */ - psa_write(msg.handle, 0, output, output_length); - psa_write(msg.handle, 1, &output_length, sizeof(output_length)); - } - free(input); - free(output); - break; - } - - case PSA_CIPHER_ENCRYPT_SETUP: { - if (psa_crypto_access_control_is_handle_permitted(psa_crypto_ipc.handle, msg.client_id)) { - status = psa_cipher_encrypt_setup(msg.rhandle, psa_crypto_ipc.handle, psa_crypto_ipc.alg); - } else { - status = PSA_ERROR_INVALID_HANDLE; - } - - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - case PSA_CIPHER_DECRYPT_SETUP: { - if (psa_crypto_access_control_is_handle_permitted(psa_crypto_ipc.handle, msg.client_id)) { - status = psa_cipher_decrypt_setup(msg.rhandle, psa_crypto_ipc.handle, psa_crypto_ipc.alg); - } else { - status = PSA_ERROR_INVALID_HANDLE; - } - - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - case PSA_CIPHER_GENERATE_IV: { - size_t iv_length = 0; - size_t iv_size = msg.out_size[0]; - unsigned char iv[PSA_AEAD_MAX_NONCE_SIZE] = { 0 }; - - status = psa_cipher_generate_iv(msg.rhandle, iv, - iv_size, &iv_length); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, iv, iv_length); - psa_write(msg.handle, 1, &iv_length, - sizeof(iv_length)); - } else { - free_message_context(&msg); - } - break; - } - - case PSA_CIPHER_SET_IV: { - size_t iv_length = msg.in_size[1]; - unsigned char iv[PSA_AEAD_MAX_NONCE_SIZE] = { 0 }; - - bytes_read = psa_read(msg.handle, 1, iv, iv_length); - if (bytes_read != iv_length) { - SPM_PANIC("SPM read length mismatch"); - } - status = psa_cipher_set_iv(msg.rhandle, iv, iv_length); - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - case PSA_CIPHER_UPDATE: { - size_t input_length = msg.in_size[1], - output_size = msg.out_size[0], - output_length = 0; - uint8_t *input = NULL; - unsigned char *output = NULL; - - if (input_length > 0) { - input = mbedtls_calloc(1, input_length); - if (input == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } else { - bytes_read = psa_read(msg.handle, 1, input, input_length); - if (bytes_read != input_length) { - SPM_PANIC("SPM read length mismatch"); - } - } - } - if (status == PSA_SUCCESS && output_size > 0) { - output = mbedtls_calloc(1, output_size); - if (output == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } - } - - if (status == PSA_SUCCESS) { - status = psa_cipher_update(msg.rhandle, input, input_length, output, output_size, - &output_length); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, output, output_length); - psa_write(msg.handle, 1, &output_length, sizeof(output_length)); - } - } else { - psa_cipher_abort(msg.rhandle); - } - - mbedtls_free(input); - mbedtls_free(output); - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - case PSA_CIPHER_FINISH: { - uint8_t *output = NULL; - size_t output_size = msg.out_size[0], - output_length = 0; - - if (output_size > 0) { - output = mbedtls_calloc(1, output_size); - if (output == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - } - } - - if (status == PSA_SUCCESS) { - status = psa_cipher_finish(msg.rhandle, output, output_size, &output_length); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, output, output_length); - psa_write(msg.handle, 1, &output_length, sizeof(output_length)); - } - mbedtls_free(output); - } else { - psa_cipher_abort(msg.rhandle); - } - - free_message_context(&msg); - break; - } - - case PSA_CIPHER_ABORT: { - status = psa_cipher_abort(msg.rhandle); - free_message_context(&msg); - break; - } - - default: { - status = PSA_ERROR_NOT_SUPPORTED; - break; - } - } - - break; - } - - case PSA_IPC_DISCONNECT: { - if (msg.rhandle != NULL) { - psa_cipher_abort(msg.rhandle); - free_message_context(&msg); - } - - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - - -static void psa_key_management_operation(void) -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - int32_t partition_id = 0; - - if (PSA_SUCCESS != psa_get(PSA_KEY_MNG, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - break; - } - - case PSA_IPC_CALL: { - if (msg.in_size[0] != sizeof(psa_key_mng_ipc_t)) { - status = PSA_ERROR_COMMUNICATION_FAILURE; - break; - } - - uint32_t bytes_read = 0; - psa_key_mng_ipc_t psa_key_mng = {0}; - - bytes_read = psa_read(msg.handle, 0, - &psa_key_mng, msg.in_size[0]); - - if (bytes_read != msg.in_size[0]) { - SPM_PANIC("SPM read length mismatch"); - } - - partition_id = msg.client_id; - - switch (psa_key_mng.func) { - case PSA_GET_KEY_ATTRIBUTES: { - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - psa_client_key_attributes_t client; - - if (!psa_crypto_access_control_is_handle_permitted(psa_key_mng.handle, - partition_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - status = psa_get_key_attributes(psa_key_mng.handle, &attributes); - if (status == PSA_SUCCESS) { - /* We currently don't support domain parameters */ - attributes.domain_parameters = NULL; - attributes.domain_parameters_size = 0; - - psa_core_attributes_to_client(&attributes.core, &client.core); - psa_write(msg.handle, 0, &client, sizeof(client)); - } - - break; - } - - case PSA_OPEN_KEY: { - psa_key_id_t id; - id.owner = msg.client_id; - - bytes_read = psa_read(msg.handle, 1, &(id.key_id), msg.in_size[1]); - if (bytes_read != msg.in_size[1]) { - SPM_PANIC("SPM read length mismatch"); - } - - if (msg.in_size[1] != CLIENT_PSA_KEY_ID_SIZE_IN_BYTES) { - SPM_PANIC("Unexpected psa_key_id_t size received from client"); - } - - status = psa_open_key(id, &psa_key_mng.handle); - if (status == PSA_SUCCESS) { - psa_crypto_access_control_register_handle(psa_key_mng.handle, partition_id); - psa_write(msg.handle, 0, &psa_key_mng.handle, sizeof(psa_key_mng.handle)); - } - break; - } - - case PSA_CLOSE_KEY: { - if (!psa_crypto_access_control_is_handle_permitted(psa_key_mng.handle, - partition_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - status = psa_close_key(psa_key_mng.handle); - if (status == PSA_SUCCESS) { - psa_crypto_access_control_unregister_handle(psa_key_mng.handle); - } - - break; - } - - case PSA_IMPORT_KEY: { - size_t attributes_length = msg.in_size[1]; - psa_key_attributes_t attributes = PSA_KEY_ATTRIBUTES_INIT; - size_t data_length = msg.in_size[2]; - uint8_t *data = NULL; - psa_key_handle_t handle; - - /* Read in attributes. */ - read_attributes(msg.handle, msg.client_id, &attributes); - - /* Read in data. */ - if (data_length > 0) { - data = mbedtls_calloc(1, data_length); - if (data == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - bytes_read = psa_read(msg.handle, 2, data, data_length); - if (bytes_read != data_length) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Import the data as a key. */ - status = psa_import_key(&attributes, data, data_length, &handle); - - if (status == PSA_SUCCESS) { - /* Write out the allocated handle. */ - psa_crypto_access_control_register_handle(handle, partition_id); - psa_write(msg.handle, 0, &handle, sizeof(handle)); - } - mbedtls_free(data); - break; - } - - case PSA_DESTROY_KEY: { - if (!psa_crypto_access_control_is_handle_permitted(psa_key_mng.handle, - partition_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - status = psa_destroy_key(psa_key_mng.handle); - if (status == PSA_SUCCESS) { - psa_crypto_access_control_unregister_handle(psa_key_mng.handle); - } - - break; - } - - case PSA_EXPORT_KEY: { - uint8_t *data = NULL; - size_t data_size = msg.out_size[0]; - size_t data_length; - - if (!psa_crypto_access_control_is_handle_permitted(psa_key_mng.handle, partition_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - if (data_size > 0) { - data = mbedtls_calloc(1, data_size); - if (data == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - - status = psa_export_key(psa_key_mng.handle, data, data_size, &data_length); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, data, data_length); - } - psa_write(msg.handle, 1, &data_length, sizeof(data_length)); - - mbedtls_free(data); - break; - } - - case PSA_EXPORT_PUBLIC_KEY: { - size_t data_size = msg.out_size[0]; - size_t data_length; - uint8_t *data = NULL; - - if (!psa_crypto_access_control_is_handle_permitted(psa_key_mng.handle, partition_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - if (data_size > 0) { - data = mbedtls_calloc(1, data_size); - if (data == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - - status = psa_export_public_key(psa_key_mng.handle, data, data_size, &data_length); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, data, data_length); - } - psa_write(msg.handle, 1, &data_length, sizeof(data_length)); - - mbedtls_free(data); - break; - } - - case PSA_COPY_KEY: { - psa_key_handle_t target_handle; - psa_key_attributes_t attributes; - - if (!psa_crypto_access_control_is_handle_permitted(psa_key_mng.handle, partition_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - /* Read in attributes. */ - read_attributes(msg.handle, msg.client_id, &attributes); - - status = psa_copy_key(psa_key_mng.handle, &attributes, &target_handle); - if (status == PSA_SUCCESS) { - psa_crypto_access_control_register_handle(target_handle, partition_id); - psa_write(msg.handle, 0, &target_handle, sizeof(target_handle)); - } - break; - } - - case PSA_GENERATE_KEY: { - psa_key_attributes_t attributes; - psa_key_handle_t handle; - - /* Read in attributes. */ - read_attributes(msg.handle, msg.client_id, &attributes); - - status = psa_generate_key(&attributes, &handle); - if (status == PSA_SUCCESS) { - /* Write out the allocated handle. */ - psa_crypto_access_control_register_handle(handle, partition_id); - psa_write(msg.handle, 0, &handle, sizeof(handle)); - } - break; - } - - default: { - status = PSA_ERROR_NOT_SUPPORTED; - break; - } - } - - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - -static void psa_entropy_operation(void) -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_ENTROPY_INJECT, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - status = PSA_SUCCESS; - break; - } - - case PSA_IPC_CALL: { -#if defined(MBEDTLS_PSA_INJECT_ENTROPY) - unsigned char *seed = NULL; - uint32_t bytes_read; - size_t seed_size = msg.in_size[0]; - if (MBEDTLS_ENTROPY_MAX_SEED_SIZE < seed_size) { - status = PSA_ERROR_INVALID_ARGUMENT; - break; - } - - if (seed_size > 0) { - seed = mbedtls_calloc(1, seed_size); - if (seed == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - - bytes_read = psa_read(msg.handle, 0, seed, seed_size); - if (bytes_read != seed_size) { - SPM_PANIC("SPM read length mismatch"); - } - - status = mbedtls_psa_inject_entropy(seed, seed_size); - mbedtls_free(seed); -#else - status = PSA_ERROR_NOT_SUPPORTED; -#endif /* MBEDTLS_PSA_INJECT_ENTROPY */ - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - - -static void psa_rng_operation(void) -{ - psa_msg_t msg = { 0 }; - psa_status_t status = PSA_SUCCESS; - - if (PSA_SUCCESS != psa_get(PSA_RNG, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: - case PSA_IPC_DISCONNECT: { - break; - } - - case PSA_IPC_CALL: { - size_t random_size = msg.out_size[0]; - unsigned char *random = NULL; - - if (random_size > 0) { - random = mbedtls_calloc(1, random_size); - if (random == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - - status = psa_generate_random(random, random_size); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, random, random_size); - } - - mbedtls_free(random); - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - - -void psa_crypto_key_derivation_operations(void) -{ - psa_status_t status = PSA_SUCCESS; - psa_msg_t msg = { 0 }; - - if (PSA_SUCCESS != psa_get(PSA_KEY_DERIVATION, &msg)) { - return; - } - switch (msg.type) { - case PSA_IPC_CONNECT: { - psa_key_derivation_operation_t *psa_operation = - mbedtls_calloc(1, sizeof(*psa_operation)); - if (psa_operation == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - - psa_set_rhandle(msg.handle, psa_operation); - break; - } - - case PSA_IPC_CALL: { - uint32_t bytes_read; - psa_crypto_derivation_ipc_t psa_crypto_ipc = { 0 }; - if (msg.in_size[0] != sizeof(psa_crypto_derivation_ipc_t)) { - status = PSA_ERROR_COMMUNICATION_FAILURE; - break; - } - - bytes_read = psa_read(msg.handle, 0, &psa_crypto_ipc, - msg.in_size[0]); - if (bytes_read != msg.in_size[0]) { - SPM_PANIC("SPM read length mismatch"); - } - - switch (psa_crypto_ipc.func) { - case PSA_KEY_DERIVATION_SETUP: { - status = psa_key_derivation_setup(msg.rhandle, - psa_crypto_ipc.alg); - if (status != PSA_SUCCESS) { - free_message_context(&msg); - } - break; - } - - case PSA_KEY_DERIVATION_GET_CAPACITY: { - size_t capacity = 0; - - status = psa_key_derivation_get_capacity(msg.rhandle, - &capacity); - if (status == PSA_SUCCESS) { - psa_write(msg.handle, 0, &capacity, sizeof(capacity)); - } - break; - } - - case PSA_KEY_DERIVATION_SET_CAPACITY: { - size_t capacity = 0; - - /* Read capacity */ - bytes_read = psa_read(msg.handle, 1, &capacity, - msg.in_size[1]); - if (bytes_read != sizeof(capacity)) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_key_derivation_set_capacity(msg.rhandle, - capacity); - break; - } - - case PSA_KEY_DERIVATION_INPUT_BYTES: { - psa_key_derivation_step_t step; - uint8_t *data; - size_t data_length = msg.in_size[2]; - - /* Read step. */ - bytes_read = psa_read(msg.handle, 1, &step, - msg.in_size[1]); - if (bytes_read != sizeof(step)) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Read data. */ - data = mbedtls_calloc(1, data_length); - if (data == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - bytes_read = psa_read(msg.handle, 2, data, data_length); - if (bytes_read != data_length) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_key_derivation_input_bytes(msg.rhandle, step, - data, data_length); - - free(data); - break; - } - - case PSA_KEY_DERIVATION_INPUT_KEY: { - psa_key_derivation_step_t step; - - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto_ipc.handle, msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - /* Read step. */ - bytes_read = psa_read(msg.handle, 1, &step, - msg.in_size[1]); - if (bytes_read != sizeof(step)) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_key_derivation_input_key( - msg.rhandle, step, psa_crypto_ipc.handle); - break; - } - - case PSA_KEY_DERIVATION_KEY_AGREEMENT: { - psa_key_derivation_step_t step; - uint8_t *peer_key; - size_t peer_key_length = msg.in_size[2]; - - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto_ipc.handle, msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - /* Read step. */ - bytes_read = psa_read(msg.handle, 1, &step, - msg.in_size[1]); - if (bytes_read != sizeof(step)) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Read peer_key. */ - peer_key = mbedtls_calloc(1, peer_key_length); - if (peer_key == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - bytes_read = psa_read(msg.handle, 2, - peer_key, peer_key_length); - if (bytes_read != peer_key_length) { - SPM_PANIC("SPM read length mismatch"); - } - - status = psa_key_derivation_key_agreement( - msg.rhandle, step, psa_crypto_ipc.handle, - peer_key, peer_key_length); - - free(peer_key); - break; - } - - case PSA_KEY_DERIVATION_OUTPUT_BYTES: { - uint8_t *output = NULL; - size_t output_length = msg.out_size[0]; - - /* Allocate the output buffer. */ - if (output_length > 0) { - output = mbedtls_calloc(1, output_length); - if (output == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - } - - status = psa_key_derivation_output_bytes( - msg.rhandle, output, output_length); - if (status == PSA_SUCCESS) { - /* Write the output. */ - psa_write(msg.handle, 0, output, output_length); - } - free(output); - break; - } - - case PSA_KEY_DERIVATION_OUTPUT_KEY: { - psa_key_attributes_t attributes; - psa_key_handle_t handle; - - /* Read in attributes. */ - read_attributes(msg.handle, msg.client_id, &attributes); - - status = psa_key_derivation_output_key( - &attributes, msg.rhandle, &handle); - if (status == PSA_SUCCESS) { - /* Write out the allocated handle. */ - psa_crypto_access_control_register_handle(handle, msg.client_id); - psa_write(msg.handle, 0, &handle, sizeof(handle)); - } - break; - } - - case PSA_KEY_DERIVATION_ABORT: { - status = psa_key_derivation_abort(msg.rhandle); - free_message_context(&msg); - break; - } - - case PSA_RAW_KEY_AGREEMENT: { - uint8_t *peer_key; - size_t peer_key_length = msg.in_size[1]; - uint8_t *output; - size_t output_size = msg.out_size[0]; - size_t output_length; - - if (!psa_crypto_access_control_is_handle_permitted(psa_crypto_ipc.handle, msg.client_id)) { - status = PSA_ERROR_INVALID_HANDLE; - break; - } - - /* Read peer_key. */ - peer_key = mbedtls_calloc(1, peer_key_length); - if (peer_key == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - break; - } - bytes_read = psa_read(msg.handle, 1, - peer_key, peer_key_length); - if (bytes_read != peer_key_length) { - SPM_PANIC("SPM read length mismatch"); - } - - /* Allocate the output buffer. */ - if (output_size > 0) { - output = mbedtls_calloc(1, output_size); - if (output == NULL) { - status = PSA_ERROR_INSUFFICIENT_MEMORY; - free(peer_key); - break; - } - } - - status = psa_raw_key_agreement(psa_crypto_ipc.alg, - psa_crypto_ipc.handle, - peer_key, - peer_key_length, - output, - output_size, - &output_length); - if (status == PSA_SUCCESS) { - /* Write the output. */ - psa_write(msg.handle, 0, output, output_length); - psa_write(msg.handle, 1, - &output_length, sizeof(output_length)); - } - - free(output); - free(peer_key); - break; - } - - default: { - status = PSA_ERROR_NOT_SUPPORTED; - break; - } - } - - break; - } - case PSA_IPC_DISCONNECT: { - if (msg.rhandle != NULL) { - psa_key_derivation_abort(msg.rhandle); - free_message_context(&msg); - } - - break; - } - - default: { - SPM_PANIC("Unexpected message type %d!", (int)(msg.type)); - break; - } - } - - psa_reply(msg.handle, status); -} - - -void crypto_main(void *ptr) -{ - while (1) { - psa_signal_t signals = 0; - signals = psa_wait(CRYPTO_SRV_WAIT_ANY_SID_MSK, PSA_BLOCK); - if (signals & PSA_CRYPTO_INIT) { - psa_crypto_init_operation(); - } - if (signals & PSA_MAC) { - psa_mac_operation(); - } - if (signals & PSA_HASH) { - psa_hash_operation(); - } - if (signals & PSA_SYMMETRIC) { - psa_symmetric_operation(); - } - if (signals & PSA_ASYMMETRIC) { - psa_asymmetric_operation(); - } - if (signals & PSA_AEAD) { - psa_aead_operation(); - } - if (signals & PSA_KEY_MNG) { - psa_key_management_operation(); - } - if (signals & PSA_RNG) { - psa_rng_operation(); - } - if (signals & PSA_CRYPTO_FREE) { - psa_crypto_free_operation(); - } - if (signals & PSA_KEY_DERIVATION) { - psa_crypto_key_derivation_operations(); - } - if (signals & PSA_ENTROPY_INJECT) { - psa_entropy_operation(); - } - } -} diff --git a/components/TARGET_PSA/services/crypto/crypto_partition_psa.json b/components/TARGET_PSA/services/crypto/crypto_partition_psa.json deleted file mode 100755 index a9330c53717..00000000000 --- a/components/TARGET_PSA/services/crypto/crypto_partition_psa.json +++ /dev/null @@ -1,108 +0,0 @@ -{ - "name": "CRYPTO_SRV", - "type": "APPLICATION-ROT", - "priority": "NORMAL", - "id": "0x00000023", - "entry_point": "crypto_main", - "stack_size": "0x4000", - "heap_size": "0x400", - "services": [ - { - "name": "PSA_CRYPTO_INIT_ID", - "identifier": "0x00000F00", - "signal": "PSA_CRYPTO_INIT", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_MAC_ID", - "identifier": "0x00000F01", - "signal": "PSA_MAC", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_HASH_ID", - "identifier": "0x00000F02", - "signal": "PSA_HASH", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_ASYMMETRIC_ID", - "identifier": "0x00000F03", - "signal": "PSA_ASYMMETRIC", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_SYMMETRIC_ID", - "identifier": "0x00000F04", - "signal": "PSA_SYMMETRIC", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_AEAD_ID", - "identifier": "0x00000F05", - "signal": "PSA_AEAD", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_KEY_MNG_ID", - "identifier": "0x00000F06", - "signal": "PSA_KEY_MNG", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_RNG_ID", - "identifier": "0x00000F07", - "signal": "PSA_RNG", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_CRYPTO_FREE_ID", - "identifier": "0x00000F08", - "signal": "PSA_CRYPTO_FREE", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_KEY_DERIVATION_ID", - "identifier": "0x00000F09", - "signal": "PSA_KEY_DERIVATION", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - }, - { - "name": "PSA_ENTROPY_ID", - "identifier": "0x00000F0A", - "signal": "PSA_ENTROPY_INJECT", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "STRICT" - } - ], - "extern_sids": [ - "PSA_ITS_GET", - "PSA_ITS_SET", - "PSA_ITS_INFO", - "PSA_ITS_REMOVE" - ], - "source_files": [ - "COMPONENT_SPE/psa_crypto_partition.c" - ] -} diff --git a/components/TARGET_PSA/services/platform/COMPONENT_SPE/platform_partition.c b/components/TARGET_PSA/services/platform/COMPONENT_SPE/platform_partition.c deleted file mode 100644 index 308b3a74c87..00000000000 --- a/components/TARGET_PSA/services/platform/COMPONENT_SPE/platform_partition.c +++ /dev/null @@ -1,202 +0,0 @@ -/* Copyright (c) 2019-2020 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "mbed_spm_partitions.h" -#include "platform_srv_impl.h" -#include "psa/lifecycle.h" -#include "psa/internal_trusted_storage.h" -#include "psa/service.h" - -#define INPUT_BUFFER_SIZE 64 -#define OUTPUT_BUFFER_SIZE 64 - -typedef psa_status_t (*SignalHandler)(psa_msg_t *); - -static psa_status_t lifecycle_get(psa_msg_t *msg) -{ - uint32_t lc_state; - - if (msg->out_size[0] != sizeof(lc_state)) { - return PSA_DROP_CONNECTION; - } - - psa_status_t status = psa_platfrom_lifecycle_get_impl(&lc_state); - if (status == PSA_SUCCESS) { - psa_write(msg->handle, 0, &lc_state, sizeof(lc_state)); - } - - return status; -} - -static psa_status_t lifecycle_change_request(psa_msg_t *msg) -{ - uint32_t lc_state; - - if (msg->in_size[0] != sizeof(lc_state)) { - return PSA_DROP_CONNECTION; - } - if (psa_read(msg->handle, 0, &lc_state, sizeof(lc_state)) != sizeof(lc_state)) { - return PSA_DROP_CONNECTION; - } - return psa_platfrom_lifecycle_change_request_impl(lc_state); - -} - -static MBED_NORETURN psa_status_t system_reset_request(psa_msg_t *msg) -{ - (void)msg; - mbed_psa_system_reset_impl(); -} - -static enum tfm_platform_err_t -platform_sp_ioctl_ipc(const psa_msg_t *msg) { - void *input = NULL; - void *output = NULL; - psa_invec invec = {0}; - psa_outvec outvec = {0}; - uint8_t input_buffer[INPUT_BUFFER_SIZE] = {0}; - uint8_t output_buffer[OUTPUT_BUFFER_SIZE] = {0}; - tfm_platform_ioctl_req_t request = 0; - enum tfm_platform_err_t ret = TFM_PLATFORM_ERR_SYSTEM_ERROR; - size_t num = 0; - uint32_t in_len = PSA_MAX_IOVEC; - uint32_t out_len = PSA_MAX_IOVEC; - - while ((in_len > 0) && (msg->in_size[in_len - 1] == 0)) - { - in_len--; - } - - while ((out_len > 0) && (msg->out_size[out_len - 1] == 0)) - { - out_len--; - } - - if ((in_len < 1) || (in_len > 2) || - (out_len > 1)) - { - return TFM_PLATFORM_ERR_SYSTEM_ERROR; - } - - num = psa_read(msg->handle, 0, &request, sizeof(request)); - if (num != sizeof(request)) - { - return PSA_ERROR_PROGRAMMER_ERROR; - } - - if (in_len > 1) - { - if (msg->in_size[1] > INPUT_BUFFER_SIZE) { - return PSA_ERROR_PROGRAMMER_ERROR; - } - num = psa_read(msg->handle, 1, &input_buffer, msg->in_size[1]); - if (num != msg->in_size[1]) { - return PSA_ERROR_PROGRAMMER_ERROR; - } - invec.base = input_buffer; - invec.len = msg->in_size[1]; - input = &invec; - } - - if (out_len > 0) - { - if (msg->out_size[0] > OUTPUT_BUFFER_SIZE) { - return PSA_ERROR_PROGRAMMER_ERROR; - } - outvec.base = output_buffer; - outvec.len = msg->out_size[0]; - output = &outvec; - } - - ret = tfm_platform_hal_ioctl(request, input, output); - - if (output != NULL) - { - psa_write(msg->handle, 0, outvec.base, outvec.len); - } - - return ret; -} - -static psa_status_t platform_ioctl(psa_msg_t *msg) -{ - /* platform_sp_ioctl_ipc returns either psa_status_t or one of the - * following errorcodes: - * enum tfm_platform_err_t { - * TFM_PLATFORM_ERR_SUCCESS = 0, - * TFM_PLATFORM_ERR_SYSTEM_ERROR, - * TFM_PLATFORM_ERR_INVALID_PARAM, - * TFM_PLATFORM_ERR_NOT_SUPPORTED, - * - * TFM_PLATFORM_ERR_FORCE_INT_SIZE = INT_MAX - * }; - */ - return platform_sp_ioctl_ipc(msg); -} - -static void message_handler(psa_msg_t *msg, SignalHandler handler) -{ - psa_status_t status = PSA_SUCCESS; - switch (msg->type) { - case PSA_IPC_CONNECT: //fallthrough - case PSA_IPC_DISCONNECT: { - break; - } - case PSA_IPC_CALL: { - status = handler(msg); - break; - } - default: { - SPM_PANIC("Unexpected message type %lu!", msg->type); - break; - } - } - psa_reply(msg->handle, status); -} - -void platform_partition_entry(void *ptr) -{ - psa_signal_t signals = 0; - psa_msg_t msg = {0}; - while (1) { - signals = psa_wait(PLATFORM_WAIT_ANY_SID_MSK, PSA_BLOCK); - if ((signals & PSA_PLATFORM_LC_GET_MSK) != 0) { - if (PSA_SUCCESS != psa_get(PSA_PLATFORM_LC_GET_MSK, &msg)) { - continue; - } - message_handler(&msg, lifecycle_get); - } - if ((signals & PSA_PLATFORM_LC_SET_MSK) != 0) { - if (PSA_SUCCESS != psa_get(PSA_PLATFORM_LC_SET_MSK, &msg)) { - continue; - } - message_handler(&msg, lifecycle_change_request); - } - if ((signals & PSA_PLATFORM_SYSTEM_RESET_MSK) != 0) { - if (PSA_SUCCESS != psa_get(PSA_PLATFORM_SYSTEM_RESET_MSK, &msg)) { - continue; - } - message_handler(&msg, system_reset_request); - } - if ((signals & PSA_PLATFORM_IOCTL_MSK) != 0) { - if (PSA_SUCCESS != psa_get(PSA_PLATFORM_IOCTL_MSK, &msg)) { - continue; - } - message_handler(&msg, platform_ioctl); - } - } -} diff --git a/components/TARGET_PSA/services/platform/platform_psa.json b/components/TARGET_PSA/services/platform/platform_psa.json deleted file mode 100644 index 13a4e6f3c61..00000000000 --- a/components/TARGET_PSA/services/platform/platform_psa.json +++ /dev/null @@ -1,48 +0,0 @@ -{ - "name": "PLATFORM", - "type": "APPLICATION-ROT", - "priority": "NORMAL", - "id": "0x00000008", - "entry_point": "platform_partition_entry", - "stack_size": "0x400", - "heap_size": "0x400", - "services": [{ - "name": "PSA_PLATFORM_LC_GET", - "identifier": "0x00011000", - "signal": "PSA_PLATFORM_LC_GET_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "PSA_PLATFORM_LC_SET", - "identifier": "0x00011001", - "signal": "PSA_PLATFORM_LC_SET_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "PSA_PLATFORM_SYSTEM_RESET", - "identifier": "0x00011002", - "signal": "PSA_PLATFORM_SYSTEM_RESET_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "PSA_PLATFORM_IOCTL", - "identifier": "0x00011003", - "signal": "PSA_PLATFORM_IOCTL_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - } - ], - "extern_sids": [ - "PSA_ITS_RESET" - ], - "source_files": [ - "COMPONENT_SPE/platform_partition.c" - ] - } diff --git a/components/TARGET_PSA/services/storage/its/COMPONENT_SPE/its_partition.c b/components/TARGET_PSA/services/storage/its/COMPONENT_SPE/its_partition.c deleted file mode 100644 index b73a88d51d5..00000000000 --- a/components/TARGET_PSA/services/storage/its/COMPONENT_SPE/its_partition.c +++ /dev/null @@ -1,221 +0,0 @@ -/* Copyright (c) 2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include -#include "psa/client.h" -#include "psa/service.h" -#include "mbed_spm_partitions.h" -#include "psa/internal_trusted_storage.h" -#include "pits_impl.h" -#include "mbed_error.h" - -int kv_init_storage_config(); - -#ifdef __cplusplus -extern "C" -{ -#endif - -typedef psa_status_t (*SignalHandler)(psa_msg_t *); - -static psa_status_t storage_set(psa_msg_t *msg) -{ - psa_storage_uid_t key = 0; - void *data = NULL; - uint32_t alloc_size = msg->in_size[1]; - psa_storage_create_flags_t flags = 0; - - if ((msg->in_size[0] != sizeof(key)) || (msg->in_size[2] != sizeof(flags))) { - return PSA_DROP_CONNECTION; - } - - if (psa_read(msg->handle, 0, &key, sizeof(key)) != sizeof(key)) { - return PSA_DROP_CONNECTION; - } - - if (psa_read(msg->handle, 2, &flags, sizeof(flags)) != sizeof(flags)) { - return PSA_DROP_CONNECTION; - } - - data = malloc(alloc_size); - if (data == NULL) { - return PSA_ERROR_STORAGE_FAILURE; - } - - if (psa_read(msg->handle, 1, data, msg->in_size[1]) != msg->in_size[1]) { - free(data); - return PSA_ERROR_STORAGE_FAILURE; - } - - psa_status_t status = psa_its_set_impl(msg->client_id, key, alloc_size, data, flags); - memset(data, 0, alloc_size); - free(data); - return status; -} - -static psa_status_t storage_get(psa_msg_t *msg) -{ - psa_storage_uid_t key = 0; - uint32_t offset = 0; - size_t actual_size; - - if ((msg->in_size[0] != sizeof(key)) || - (msg->in_size[1] != sizeof(offset)) || - (msg->out_size[1] != sizeof(actual_size))) { - return PSA_DROP_CONNECTION; - } - - if (psa_read(msg->handle, 0, &key, sizeof(key)) != sizeof(key)) { - return PSA_DROP_CONNECTION; - } - - if (psa_read(msg->handle, 1, &offset, sizeof(offset)) != sizeof(offset)) { - return PSA_DROP_CONNECTION; - } - - uint8_t *data = (uint8_t *)malloc(msg->out_size[0]); - if (data == NULL) { - return PSA_ERROR_STORAGE_FAILURE; - } - - psa_status_t status = psa_its_get_impl(msg->client_id, key, offset, msg->out_size[0], data, &actual_size); - if (status == PSA_SUCCESS) { - psa_write(msg->handle, 0, data, actual_size); - psa_write(msg->handle, 1, &actual_size, sizeof(actual_size)); - } - - memset(data, 0, msg->out_size[0]); - free(data); - return status; -} - -static psa_status_t storage_info(psa_msg_t *msg) -{ - struct psa_storage_info_t info = { 0 }; - psa_storage_uid_t key = 0; - - if ((msg->in_size[0] != sizeof(key)) || (msg->out_size[0] != sizeof(info))) { - return PSA_DROP_CONNECTION; - } - - if (psa_read(msg->handle, 0, &key, sizeof(key)) != sizeof(key)) { - return PSA_DROP_CONNECTION; - } - - psa_status_t status = psa_its_get_info_impl(msg->client_id, key, &info); - if (status == PSA_SUCCESS) { - psa_write(msg->handle, 0, &info, msg->out_size[0]); - } - - return status; -} - -static psa_status_t storage_remove(psa_msg_t *msg) -{ - psa_storage_uid_t key = 0; - - if (msg->in_size[0] != sizeof(key)) { - return PSA_DROP_CONNECTION; - } - - if (psa_read(msg->handle, 0, &key, sizeof(key)) != sizeof(key)) { - return PSA_DROP_CONNECTION; - } - - return psa_its_remove_impl(msg->client_id, key); -} -static psa_status_t storage_reset(psa_msg_t *msg) -{ - (void)msg; - return psa_its_reset_impl(); -} - - - -static void message_handler(psa_msg_t *msg, SignalHandler handler) -{ - psa_status_t status = PSA_SUCCESS; - switch (msg->type) { - case PSA_IPC_CONNECT: //fallthrough - case PSA_IPC_DISCONNECT: { - break; - } - case PSA_IPC_CALL: { - status = handler(msg); - break; - } - default: { - SPM_PANIC("Unexpected message type %lu!", msg->type); - break; - } - } - psa_reply(msg->handle, status); -} - -void its_entry(void *ptr) -{ - psa_signal_t signals = 0; - psa_msg_t msg = {0}; - - while (1) { - signals = psa_wait(ITS_WAIT_ANY_SID_MSK, PSA_BLOCK); - // KVStore initiation: - // - Must be done after the psa_wait() call since only now we know OS initialization is done - // - Repeating calls has no effect - int kv_status = kv_init_storage_config(); - if (kv_status != MBED_SUCCESS) { - SPM_PANIC("KVStore initiation failed with status %d!", kv_status); - } - - if ((signals & PSA_ITS_SET_MSK) != 0) { - if (PSA_SUCCESS != psa_get(PSA_ITS_SET_MSK, &msg)) { - continue; - } - message_handler(&msg, storage_set); - } - if ((signals & PSA_ITS_GET_MSK) != 0) { - if (PSA_SUCCESS != psa_get(PSA_ITS_GET_MSK, &msg)) { - continue; - } - message_handler(&msg, storage_get); - } - if ((signals & PSA_ITS_INFO_MSK) != 0) { - if (PSA_SUCCESS != psa_get(PSA_ITS_INFO_MSK, &msg)) { - continue; - } - message_handler(&msg, storage_info); - } - if ((signals & PSA_ITS_REMOVE_MSK) != 0) { - if (PSA_SUCCESS != psa_get(PSA_ITS_REMOVE_MSK, &msg)) { - continue; - } - message_handler(&msg, storage_remove); - } - if ((signals & PSA_ITS_RESET_MSK) != 0) { - if (PSA_SUCCESS != psa_get(PSA_ITS_RESET_MSK, &msg)) { - continue; - } - message_handler(&msg, storage_reset); - } - - } -} - -#ifdef __cplusplus -} -#endif diff --git a/components/TARGET_PSA/services/storage/its/pits_psa.json b/components/TARGET_PSA/services/storage/its/pits_psa.json deleted file mode 100644 index 2296e0dccdd..00000000000 --- a/components/TARGET_PSA/services/storage/its/pits_psa.json +++ /dev/null @@ -1,53 +0,0 @@ -{ - "name": "ITS", - "type": "APPLICATION-ROT", - "priority": "NORMAL", - "id": "0x0000000A", - "entry_point": "its_entry", - "stack_size": "0x800", - "heap_size": "0x400", - "services": [{ - "name": "PSA_ITS_GET", - "identifier": "0x00011A00", - "signal": "PSA_ITS_GET_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "PSA_ITS_SET", - "identifier": "0x00011A01", - "signal": "PSA_ITS_SET_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "PSA_ITS_INFO", - "identifier": "0x00011A02", - "signal": "PSA_ITS_INFO_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "PSA_ITS_REMOVE", - "identifier": "0x00011A03", - "signal": "PSA_ITS_REMOVE_MSK", - "non_secure_clients": true, - "minor_version": 1, - "minor_policy": "RELAXED" - }, - { - "name": "PSA_ITS_RESET", - "identifier": "0x00011A04", - "signal": "PSA_ITS_RESET_MSK", - "non_secure_clients": false, - "minor_version": 1, - "minor_policy": "RELAXED" - } - ], - "source_files": [ - "COMPONENT_SPE/its_partition.c" - ] - } diff --git a/doxyfile_options b/doxyfile_options index bfe3239f2e8..6066385c3e1 100644 --- a/doxyfile_options +++ b/doxyfile_options @@ -2102,7 +2102,6 @@ PREDEFINED = DOXYGEN_ONLY \ DEVICE_QSPI \ DEVICE_STORAGE \ DEVICE_WATCHDOG \ - COMPONENT_SPE \ "TFM_LVL=1" \ "MBED_DEPRECATED_SINCE(d, m)=" \ "MBED_ENABLE_IF_CALLBACK_COMPATIBLE(F, M)=" \ diff --git a/doxygen_options.json b/doxygen_options.json index 25790195947..0c7d39caf61 100644 --- a/doxygen_options.json +++ b/doxygen_options.json @@ -6,7 +6,7 @@ "SEARCH_INCLUDES": "YES", "INCLUDE_PATH": "", "INCLUDE_FILE_PATTERNS": "", - "PREDEFINED": "DOXYGEN_ONLY DEVICE_ANALOGIN DEVICE_ANALOGOUT DEVICE_CAN DEVICE_CRC DEVICE_ETHERNET DEVICE_EMAC DEVICE_FLASH DEVICE_I2C DEVICE_I2CSLAVE DEVICE_I2C_ASYNCH DEVICE_INTERRUPTIN DEVICE_ITM DEVICE_LPTICKER DEVICE_MPU DEVICE_PORTIN DEVICE_PORTINOUT DEVICE_PORTOUT DEVICE_PWMOUT DEVICE_RTC DEVICE_TRNG DEVICE_SERIAL DEVICE_SERIAL_ASYNCH DEVICE_SERIAL_FC DEVICE_SLEEP DEVICE_SPI DEVICE_SPI_ASYNCH DEVICE_SPISLAVE DEVICE_QSPI DEVICE_STORAGE DEVICE_WATCHDOG DEVICE_RESET_REASON COMPONENT_SPE \"TFM_LVL=1\" \"MBED_DEPRECATED_SINCE(f, g)=\" \"MBED_ENABLE_IF_CALLBACK_COMPATIBLE(F, M)=\" \"MBED_DEPRECATED(s)=\" \"BLE_ROLE_OBSERVER=1\" \"BLE_ROLE_BROADCASTER=1\" \"BLE_ROLE_PERIPHERAL=1\" \"BLE_ROLE_CENTRAL=1\" \"BLE_FEATURE_GATT_CLIENT=1\" \"BLE_FEATURE_GATT_SERVER=1\" \"BLE_FEATURE_SECURITY=1\" \"BLE_FEATURE_SECURE_CONNECTIONS=1\" \"BLE_FEATURE_SIGNING=1\" \"BLE_FEATURE_PHY_MANAGEMENT=1\" \"BLE_FEATURE_WHITELIST=1\" \"BLE_FEATURE_PRIVACY=1\" \"BLE_FEATURE_PERIODIC_ADVERTISING=1\" \"BLE_FEATURE_EXTENDED_ADVERTISING=1\"", + "PREDEFINED": "DOXYGEN_ONLY DEVICE_ANALOGIN DEVICE_ANALOGOUT DEVICE_CAN DEVICE_CRC DEVICE_ETHERNET DEVICE_EMAC DEVICE_FLASH DEVICE_I2C DEVICE_I2CSLAVE DEVICE_I2C_ASYNCH DEVICE_INTERRUPTIN DEVICE_ITM DEVICE_LPTICKER DEVICE_MPU DEVICE_PORTIN DEVICE_PORTINOUT DEVICE_PORTOUT DEVICE_PWMOUT DEVICE_RTC DEVICE_TRNG DEVICE_SERIAL DEVICE_SERIAL_ASYNCH DEVICE_SERIAL_FC DEVICE_SLEEP DEVICE_SPI DEVICE_SPI_ASYNCH DEVICE_SPISLAVE DEVICE_QSPI DEVICE_STORAGE DEVICE_WATCHDOG DEVICE_RESET_REASON \"TFM_LVL=1\" \"MBED_DEPRECATED_SINCE(f, g)=\" \"MBED_ENABLE_IF_CALLBACK_COMPATIBLE(F, M)=\" \"MBED_DEPRECATED(s)=\" \"BLE_ROLE_OBSERVER=1\" \"BLE_ROLE_BROADCASTER=1\" \"BLE_ROLE_PERIPHERAL=1\" \"BLE_ROLE_CENTRAL=1\" \"BLE_FEATURE_GATT_CLIENT=1\" \"BLE_FEATURE_GATT_SERVER=1\" \"BLE_FEATURE_SECURITY=1\" \"BLE_FEATURE_SECURE_CONNECTIONS=1\" \"BLE_FEATURE_SIGNING=1\" \"BLE_FEATURE_PHY_MANAGEMENT=1\" \"BLE_FEATURE_WHITELIST=1\" \"BLE_FEATURE_PRIVACY=1\" \"BLE_FEATURE_PERIODIC_ADVERTISING=1\" \"BLE_FEATURE_EXTENDED_ADVERTISING=1\"", "EXPAND_AS_DEFINED": "", "SKIP_FUNCTION_MACROS": "NO", "STRIP_CODE_COMMENTS": "NO", diff --git a/features/frameworks/TARGET_PSA/pal/pal_mbed_os_intf.cpp b/features/frameworks/TARGET_PSA/pal/pal_mbed_os_intf.cpp index ab1803ddc15..435f8826423 100644 --- a/features/frameworks/TARGET_PSA/pal/pal_mbed_os_intf.cpp +++ b/features/frameworks/TARGET_PSA/pal/pal_mbed_os_intf.cpp @@ -89,13 +89,13 @@ static void reset_storage_for_compliance_test() static void inject_entropy() { -#if defined(MBEDTLS_ENTROPY_NV_SEED) || defined(COMPONENT_PSA_SRV_IPC) +#if defined(MBEDTLS_ENTROPY_NV_SEED) uint8_t seed[MBEDTLS_PSA_INJECT_ENTROPY_MIN_SIZE] = { 0 }; for (int i = 0; i < MBEDTLS_PSA_INJECT_ENTROPY_MIN_SIZE; ++i) { seed[i] = i; } mbedtls_psa_inject_entropy(seed, MBEDTLS_PSA_INJECT_ENTROPY_MIN_SIZE); -#endif // defined(MBEDTLS_ENTROPY_NV_SEED) || defined(COMPONENT_PSA_SRV_IPC) +#endif // defined(MBEDTLS_ENTROPY_NV_SEED) } diff --git a/features/mbedtls/mbed-crypto/importer/Makefile b/features/mbedtls/mbed-crypto/importer/Makefile index 32a4ba88723..0964ab4e6d6 100644 --- a/features/mbedtls/mbed-crypto/importer/Makefile +++ b/features/mbedtls/mbed-crypto/importer/Makefile @@ -49,9 +49,6 @@ TLS_SRC := \ # COMPONENT_PSA_SRV_IMPL - Include secure service implementation code. For # example PSA Crypto or PSA Secure Time implementations TARGET_SRV_IMPL:=$(TARGET_PREFIX)/platform/COMPONENT_PSA_SRV_IMPL -# COMPONENT_SPE - Include code that compiles ONLY to the SPE image and never -# compiles to the NSPE image -TARGET_SPE:=$(TARGET_PREFIX)/platform/COMPONENT_SPE # COMPONENT_NSPE - Include code that compiles ONLY to the NSPE image and never # compiles to the SPE image TARGET_NSPE:=$(TARGET_SRV_IMPL)/COMPONENT_NSPE @@ -88,15 +85,12 @@ rsync: # # Copying Mbed Crypto into Mbed OS... rm -rf $(TARGET_SRV_IMPL) - rm -rf $(TARGET_SPE) rm -rf $(TARGET_SRC) mkdir -p $(TARGET_SRV_IMPL) - mkdir -p $(TARGET_SPE) mkdir -p $(TARGET_NSPE) rsync -a --delete $(CRYPTO_API)/crypto_struct.h $(TARGET_NSPE)/ - rsync -a --delete $(CRYPTO_API)/crypto_struct.h $(TARGET_SPE)/crypto_struct_spe.h rsync -a --delete $(CRYPTO_DIR)/library/psa_*.c $(TARGET_SRV_IMPL)/ rsync -a --delete $(CRYPTO_DIR)/library/psa_*.h $(TARGET_SRV_IMPL)/ rsync -a --delete $(CRYPTO_DIR)/library/*.c $(TARGET_SRC)/ @@ -135,4 +129,3 @@ clean: rm -rf $(TARGET_SRC) rm -rf $(CRYPTO_DIR) rm -rf $(TARGET_SRV_IMPL) - rm -rf $(TARGET_SPE) diff --git a/features/mbedtls/mbed-crypto/platform/COMPONENT_SPE/crypto_struct_spe.h b/features/mbedtls/mbed-crypto/platform/COMPONENT_SPE/crypto_struct_spe.h deleted file mode 100644 index 122803256bb..00000000000 --- a/features/mbedtls/mbed-crypto/platform/COMPONENT_SPE/crypto_struct_spe.h +++ /dev/null @@ -1,522 +0,0 @@ -/** - * \file psa/crypto_struct.h - * - * \brief PSA cryptography module: Mbed TLS structured type implementations - * - * \note This file may not be included directly. Applications must - * include psa/crypto.h. - * - * This file contains the definitions of some data structures with - * implementation-specific definitions. - * - * In implementations with isolation between the application and the - * cryptography module, it is expected that the front-end and the back-end - * would have different versions of this file. - * - *

Design notes about multipart operation structures

- * - * Each multipart operation structure contains a `psa_algorithm_t alg` - * field which indicates which specific algorithm the structure is for. - * When the structure is not in use, `alg` is 0. Most of the structure - * consists of a union which is discriminated by `alg`. - * - * Note that when `alg` is 0, the content of other fields is undefined. - * In particular, it is not guaranteed that a freshly-initialized structure - * is all-zero: we initialize structures to something like `{0, 0}`, which - * is only guaranteed to initializes the first member of the union; - * GCC and Clang initialize the whole structure to 0 (at the time of writing), - * but MSVC and CompCert don't. - * - * In Mbed Crypto, multipart operation structures live independently from - * the key. This allows Mbed Crypto to free the key objects when destroying - * a key slot. If a multipart operation needs to remember the key after - * the setup function returns, the operation structure needs to contain a - * copy of the key. - */ -/* - * Copyright (C) 2018, ARM Limited, All Rights Reserved - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * This file is part of mbed TLS (https://tls.mbed.org) - */ - -#ifndef PSA_CRYPTO_STRUCT_H -#define PSA_CRYPTO_STRUCT_H - -#ifdef __cplusplus -extern "C" { -#endif - -/* Include the Mbed TLS configuration file, the way Mbed TLS does it - * in each of its header files. */ -#if !defined(MBEDTLS_CONFIG_FILE) -#include "mbedtls/config.h" -#else -#include MBEDTLS_CONFIG_FILE -#endif - -#include "mbedtls/cipher.h" -#include "mbedtls/cmac.h" -#include "mbedtls/gcm.h" -#include "mbedtls/md.h" -#include "mbedtls/md2.h" -#include "mbedtls/md4.h" -#include "mbedtls/md5.h" -#include "mbedtls/ripemd160.h" -#include "mbedtls/sha1.h" -#include "mbedtls/sha256.h" -#include "mbedtls/sha512.h" - -struct psa_hash_operation_s -{ - psa_algorithm_t alg; - union - { - unsigned dummy; /* Make the union non-empty even with no supported algorithms. */ -#if defined(MBEDTLS_MD2_C) - mbedtls_md2_context md2; -#endif -#if defined(MBEDTLS_MD4_C) - mbedtls_md4_context md4; -#endif -#if defined(MBEDTLS_MD5_C) - mbedtls_md5_context md5; -#endif -#if defined(MBEDTLS_RIPEMD160_C) - mbedtls_ripemd160_context ripemd160; -#endif -#if defined(MBEDTLS_SHA1_C) - mbedtls_sha1_context sha1; -#endif -#if defined(MBEDTLS_SHA256_C) - mbedtls_sha256_context sha256; -#endif -#if defined(MBEDTLS_SHA512_C) - mbedtls_sha512_context sha512; -#endif - } ctx; -}; - -#define PSA_HASH_OPERATION_INIT {0, {0}} -static inline struct psa_hash_operation_s psa_hash_operation_init( void ) -{ - const struct psa_hash_operation_s v = PSA_HASH_OPERATION_INIT; - return( v ); -} - -#if defined(MBEDTLS_MD_C) -typedef struct -{ - /** The hash context. */ - struct psa_hash_operation_s hash_ctx; - /** The HMAC part of the context. */ - uint8_t opad[PSA_HMAC_MAX_HASH_BLOCK_SIZE]; -} psa_hmac_internal_data; -#endif /* MBEDTLS_MD_C */ - -struct psa_mac_operation_s -{ - psa_algorithm_t alg; - unsigned int key_set : 1; - unsigned int iv_required : 1; - unsigned int iv_set : 1; - unsigned int has_input : 1; - unsigned int is_sign : 1; - uint8_t mac_size; - union - { - unsigned dummy; /* Make the union non-empty even with no supported algorithms. */ -#if defined(MBEDTLS_MD_C) - psa_hmac_internal_data hmac; -#endif -#if defined(MBEDTLS_CMAC_C) - mbedtls_cipher_context_t cmac; -#endif - } ctx; -}; - -#define PSA_MAC_OPERATION_INIT {0, 0, 0, 0, 0, 0, 0, {0}} -static inline struct psa_mac_operation_s psa_mac_operation_init( void ) -{ - const struct psa_mac_operation_s v = PSA_MAC_OPERATION_INIT; - return( v ); -} - -struct psa_cipher_operation_s -{ - psa_algorithm_t alg; - unsigned int key_set : 1; - unsigned int iv_required : 1; - unsigned int iv_set : 1; - uint8_t iv_size; - uint8_t block_size; - union - { - unsigned dummy; /* Enable easier initializing of the union. */ - mbedtls_cipher_context_t cipher; - } ctx; -}; - -#define PSA_CIPHER_OPERATION_INIT {0, 0, 0, 0, 0, 0, {0}} -static inline struct psa_cipher_operation_s psa_cipher_operation_init( void ) -{ - const struct psa_cipher_operation_s v = PSA_CIPHER_OPERATION_INIT; - return( v ); -} - -struct psa_aead_operation_s -{ - psa_algorithm_t alg; - unsigned int key_set : 1; - unsigned int iv_set : 1; - uint8_t iv_size; - uint8_t block_size; - union - { - unsigned dummy; /* Enable easier initializing of the union. */ - mbedtls_cipher_context_t cipher; - } ctx; -}; - -#define PSA_AEAD_OPERATION_INIT {0, 0, 0, 0, 0, {0}} -static inline struct psa_aead_operation_s psa_aead_operation_init( void ) -{ - const struct psa_aead_operation_s v = PSA_AEAD_OPERATION_INIT; - return( v ); -} - -#if defined(MBEDTLS_MD_C) -typedef struct -{ - uint8_t *info; - size_t info_length; - psa_hmac_internal_data hmac; - uint8_t prk[PSA_HASH_MAX_SIZE]; - uint8_t output_block[PSA_HASH_MAX_SIZE]; -#if PSA_HASH_MAX_SIZE > 0xff -#error "PSA_HASH_MAX_SIZE does not fit in uint8_t" -#endif - uint8_t offset_in_block; - uint8_t block_number; - unsigned int state : 2; - unsigned int info_set : 1; -} psa_hkdf_key_derivation_t; -#endif /* MBEDTLS_MD_C */ - -#if defined(MBEDTLS_MD_C) -typedef enum -{ - TLS12_PRF_STATE_INIT, /* no input provided */ - TLS12_PRF_STATE_SEED_SET, /* seed has been set */ - TLS12_PRF_STATE_KEY_SET, /* key has been set */ - TLS12_PRF_STATE_LABEL_SET, /* label has been set */ - TLS12_PRF_STATE_OUTPUT /* output has been started */ -} psa_tls12_prf_key_derivation_state_t; - -typedef struct psa_tls12_prf_key_derivation_s -{ -#if PSA_HASH_MAX_SIZE > 0xff -#error "PSA_HASH_MAX_SIZE does not fit in uint8_t" -#endif - - /* Indicates how many bytes in the current HMAC block have - * not yet been read by the user. */ - uint8_t left_in_block; - - /* The 1-based number of the block. */ - uint8_t block_number; - - psa_tls12_prf_key_derivation_state_t state; - - uint8_t *seed; - size_t seed_length; - uint8_t *label; - size_t label_length; - psa_hmac_internal_data hmac; - uint8_t Ai[PSA_HASH_MAX_SIZE]; - - /* `HMAC_hash( prk, A(i) + seed )` in the notation of RFC 5246, Sect. 5. */ - uint8_t output_block[PSA_HASH_MAX_SIZE]; -} psa_tls12_prf_key_derivation_t; -#endif /* MBEDTLS_MD_C */ - -struct psa_key_derivation_s -{ - psa_algorithm_t alg; - unsigned int can_output_key : 1; - size_t capacity; - union - { - /* Make the union non-empty even with no supported algorithms. */ - uint8_t dummy; -#if defined(MBEDTLS_MD_C) - psa_hkdf_key_derivation_t hkdf; - psa_tls12_prf_key_derivation_t tls12_prf; -#endif - } ctx; -}; - -/* This only zeroes out the first byte in the union, the rest is unspecified. */ -#define PSA_KEY_DERIVATION_OPERATION_INIT {0, 0, 0, {0}} -static inline struct psa_key_derivation_s psa_key_derivation_operation_init( void ) -{ - const struct psa_key_derivation_s v = PSA_KEY_DERIVATION_OPERATION_INIT; - return( v ); -} - -struct psa_key_policy_s -{ - psa_key_usage_t usage; - psa_algorithm_t alg; - psa_algorithm_t alg2; -}; -typedef struct psa_key_policy_s psa_key_policy_t; - -#define PSA_KEY_POLICY_INIT {0, 0, 0} -static inline struct psa_key_policy_s psa_key_policy_init( void ) -{ - const struct psa_key_policy_s v = PSA_KEY_POLICY_INIT; - return( v ); -} - -/* The type used internally for key sizes. - * Public interfaces use size_t, but internally we use a smaller type. */ -typedef uint16_t psa_key_bits_t; -/* The maximum value of the type used to represent bit-sizes. - * This is used to mark an invalid key size. */ -#define PSA_KEY_BITS_TOO_LARGE ( (psa_key_bits_t) ( -1 ) ) -/* The maximum size of a key in bits. - * Currently defined as the maximum that can be represented, rounded down - * to a whole number of bytes. - * This is an uncast value so that it can be used in preprocessor - * conditionals. */ -#define PSA_MAX_KEY_BITS 0xfff8 - -/** A mask of flags that can be stored in key attributes. - * - * This type is also used internally to store flags in slots. Internal - * flags are defined in library/psa_crypto_core.h. Internal flags may have - * the same value as external flags if they are properly handled during - * key creation and in psa_get_key_attributes. - */ -typedef uint16_t psa_key_attributes_flag_t; - -#define MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER \ - ( (psa_key_attributes_flag_t) 0x0001 ) - -/* A mask of key attribute flags used externally only. - * Only meant for internal checks inside the library. */ -#define MBEDTLS_PSA_KA_MASK_EXTERNAL_ONLY ( \ - MBEDTLS_PSA_KA_FLAG_HAS_SLOT_NUMBER | \ - 0 ) - -/* A mask of key attribute flags used both internally and externally. - * Currently there aren't any. */ -#define MBEDTLS_PSA_KA_MASK_DUAL_USE ( \ - 0 ) - -typedef struct -{ - psa_key_type_t type; - psa_key_lifetime_t lifetime; - psa_key_id_t id; - psa_key_policy_t policy; - psa_key_bits_t bits; - psa_key_attributes_flag_t flags; -} psa_core_key_attributes_t; - -/* The server must be able to interpret the attributes as specified by the - * client. The server works with the psa_key_id_t encoding the key owner, but - * the client works with the psa_key_id_t not containing the key owner (pure - * psa_app_key_id_t. */ -typedef struct -{ - psa_key_type_t type; - psa_key_lifetime_t lifetime; - psa_app_key_id_t id; - psa_key_policy_t policy; - psa_key_bits_t bits; - psa_key_attributes_flag_t flags; -} psa_client_core_key_attributes_t; - -#define PSA_CORE_KEY_ATTRIBUTES_INIT {0, 0, PSA_KEY_ID_INIT, PSA_KEY_POLICY_INIT, 0, 0} - -struct psa_key_attributes_s -{ - psa_core_key_attributes_t core; -#if defined(MBEDTLS_PSA_CRYPTO_SE_C) - psa_key_slot_number_t slot_number; -#endif /* MBEDTLS_PSA_CRYPTO_SE_C */ - void *domain_parameters; - size_t domain_parameters_size; -}; - -#if defined(MBEDTLS_PSA_CRYPTO_SE_C) -#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, 0, NULL, 0} -#else -#define PSA_KEY_ATTRIBUTES_INIT {PSA_CORE_KEY_ATTRIBUTES_INIT, NULL, 0} -#endif -typedef struct psa_client_key_attributes_s -{ - psa_client_core_key_attributes_t core; -#if defined(MBEDTLS_PSA_CRYPTO_SE_C) - psa_key_slot_number_t slot_number; -#endif /* MBEDTLS_PSA_CRYPTO_SE_C */ - void *domain_parameters; - size_t domain_parameters_size; -} psa_client_key_attributes_t; - -static inline struct psa_key_attributes_s psa_key_attributes_init( void ) -{ - const struct psa_key_attributes_s v = PSA_KEY_ATTRIBUTES_INIT; - return( v ); -} - -static void psa_core_attributes_to_client( - const psa_core_key_attributes_t *server, - psa_client_core_key_attributes_t *client) -{ - client->type = server->type; - client->lifetime = server->lifetime; - client->id = server->id.key_id; - client->policy = server->policy; - client->bits = server->bits; - client->flags = server->flags; -} - -static void psa_core_attributes_to_server( - const psa_client_core_key_attributes_t *client, - psa_key_owner_id_t owner, - psa_core_key_attributes_t *server) -{ - server->type = client->type; - server->lifetime = client->lifetime; - server->id.key_id = client->id; - server->id.owner = owner; - server->policy = client->policy; - server->bits = client->bits; - server->flags = client->flags; -} - -static inline void psa_set_key_id(psa_key_attributes_t *attributes, - psa_key_id_t id) -{ - attributes->core.id = id; - if( attributes->core.lifetime == PSA_KEY_LIFETIME_VOLATILE ) - attributes->core.lifetime = PSA_KEY_LIFETIME_PERSISTENT; -} - -static inline psa_key_id_t psa_get_key_id( - const psa_key_attributes_t *attributes) -{ - return( attributes->core.id ); -} - -static inline void psa_set_key_lifetime(psa_key_attributes_t *attributes, - psa_key_lifetime_t lifetime) -{ - attributes->core.lifetime = lifetime; - if( lifetime == PSA_KEY_LIFETIME_VOLATILE ) - { -#ifdef MBEDTLS_PSA_CRYPTO_KEY_FILE_ID_ENCODES_OWNER - attributes->core.id.key_id = 0; - attributes->core.id.owner = 0; -#else - attributes->core.id = 0; -#endif - } -} - -static inline psa_key_lifetime_t psa_get_key_lifetime( - const psa_key_attributes_t *attributes) -{ - return( attributes->core.lifetime ); -} - -static inline void psa_set_key_usage_flags(psa_key_attributes_t *attributes, - psa_key_usage_t usage_flags) -{ - attributes->core.policy.usage = usage_flags; -} - -static inline psa_key_usage_t psa_get_key_usage_flags( - const psa_key_attributes_t *attributes) -{ - return( attributes->core.policy.usage ); -} - -static inline void psa_set_key_algorithm(psa_key_attributes_t *attributes, - psa_algorithm_t alg) -{ - attributes->core.policy.alg = alg; -} - -static inline psa_algorithm_t psa_get_key_algorithm( - const psa_key_attributes_t *attributes) -{ - return( attributes->core.policy.alg ); -} - -/* This function is declared in crypto_extra.h, which comes after this - * header file, but we need the function here, so repeat the declaration. */ -psa_status_t psa_set_key_domain_parameters(psa_key_attributes_t *attributes, - psa_key_type_t type, - const uint8_t *data, - size_t data_length); - -static inline void psa_set_key_type(psa_key_attributes_t *attributes, - psa_key_type_t type) -{ - if( attributes->domain_parameters == NULL ) - { - /* Common case: quick path */ - attributes->core.type = type; - } - else - { - /* Call the bigger function to free the old domain paramteres. - * Ignore any errors which may arise due to type requiring - * non-default domain parameters, since this function can't - * report errors. */ - (void) psa_set_key_domain_parameters( attributes, type, NULL, 0 ); - } -} - -static inline psa_key_type_t psa_get_key_type( - const psa_key_attributes_t *attributes) -{ - return( attributes->core.type ); -} - -static inline void psa_set_key_bits(psa_key_attributes_t *attributes, - size_t bits) -{ - if( bits > PSA_MAX_KEY_BITS ) - attributes->core.bits = PSA_KEY_BITS_TOO_LARGE; - else - attributes->core.bits = (psa_key_bits_t) bits; -} - -static inline size_t psa_get_key_bits( - const psa_key_attributes_t *attributes) -{ - return( attributes->core.bits ); -} - -#ifdef __cplusplus -} -#endif - -#endif /* PSA_CRYPTO_STRUCT_H */ diff --git a/hal/spm_api.h b/hal/spm_api.h deleted file mode 100644 index cc00974ce43..00000000000 --- a/hal/spm_api.h +++ /dev/null @@ -1,73 +0,0 @@ - -/** \addtogroup hal */ -/** @{*/ -/* Copyright (c) 2017-2018 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __SPM_API_H__ -#define __SPM_API_H__ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - - -/** @defgroup SPM-HAL SPM HAL API - * The HAL functions for PSA SPM - * @{ - */ - - -/* ------------------------------------ HAL-SPE API ------------------------- */ - - -#if defined(COMPONENT_SPE) -/** - * Start running the NSPE. - * - * Secure Processing Environment (SPE) expected to boot first. Once all - * the initializations are done, Nonsecure Processing Environment (NSPE) - * should be booted. - * - * @note The function must be implemented by target specific code. - */ -void spm_hal_start_nspe(void); - - -/** - * Configure memory protection mechanism. - * - * Apply memory protection schemes to ensure secure memory can only be accessed - * from secure-state. - * - * @note The function must be implemented by target specific code. - * - */ -void spm_hal_memory_protection_init(void); - -#endif // defined(COMPONENT_SPE) - -#ifdef __cplusplus -} -#endif - -#endif // __SPM_API_H__ - -/** @}*/ diff --git a/platform/source/mbed_retarget.cpp b/platform/source/mbed_retarget.cpp index 9efc1558bc1..5938cbe1cb3 100644 --- a/platform/source/mbed_retarget.cpp +++ b/platform/source/mbed_retarget.cpp @@ -1077,7 +1077,7 @@ extern "C" long PREFIX(_flen)(FILEHANDLE fh) } // Do not compile this code for TFM secure target -#if !defined(COMPONENT_SPE) || !defined(TARGET_TFM) +#if !defined(TARGET_TFM) #if !defined(__MICROLIB) __asm(".global __use_two_region_memory\n\t"); @@ -1138,7 +1138,7 @@ MBED_USED extern "C" __value_in_regs struct __initial_stackheap __user_setup_sta return _mbed_user_setup_stackheap(R0, R1, R2, R3); } -#endif // !defined(COMPONENT_SPE) || !defined(TARGET_TFM) +#endif // !defined(TARGET_TFM) #endif diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Config/RTE_Device.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Config/RTE_Device.h deleted file mode 100644 index 183fa7ecf4c..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Config/RTE_Device.h +++ /dev/null @@ -1,124 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- - -#ifndef __RTE_DEVICE_H -#define __RTE_DEVICE_H - -// MPC (Memory Protection Controller) [Driver_ISRAM0_MPC] -// Configuration settings for Driver_ISRAM0_MPC in component ::Drivers:MPC -#define RTE_ISRAM0_MPC 1 -// MPC (Memory Protection Controller) [Driver_ISRAM0_MPC] - -// MPC (Memory Protection Controller) [Driver_ISRAM1_MPC] -// Configuration settings for Driver_SRAM1_MPC in component ::Drivers:MPC -#define RTE_ISRAM1_MPC 1 -// MPC (Memory Protection Controller) [Driver_ISRAM1_MPC] - -// MPC (Memory Protection Controller) [Driver_ISRAM2_MPC] -// Configuration settings for Driver_ISRAM2_MPC in component ::Drivers:MPC -#define RTE_ISRAM2_MPC 1 -// MPC (Memory Protection Controller) [Driver_ISRAM2_MPC] - -// MPC (Memory Protection Controller) [Driver_ISRAM3_MPC] -// Configuration settings for Driver_SRAM2_MPC in component ::Drivers:MPC -#define RTE_ISRAM3_MPC 1 -// MPC (Memory Protection Controller) [Driver_SRAM3_MPC] - -// MPC (Memory Protection Controller) [Driver_CODE_SRAM_MPC] -// Configuration settings for Driver_CODE_SRAM_MPC in component ::Drivers:MPC -#define RTE_CODE_SRAM_MPC 1 -// MPC (Memory Protection Controller) [Driver_CODE_SRAM_MPC] - -// MPC (Memory Protection Controller) [Driver_QSPI_MPC] -// Configuration settings for Driver_QSPI_MPC in component ::Drivers:MPC -#define RTE_QSPI_MPC 1 -// MPC (Memory Protection Controller) [Driver_QSPI_MPC] - -// USART (Universal synchronous - asynchronous receiver transmitter) [Driver_USART0] -// Configuration settings for Driver_USART0 in component ::Drivers:USART -#define RTE_USART0 1 -// USART (Universal synchronous - asynchronous receiver transmitter) [Driver_USART0] - -// USART (Universal synchronous - asynchronous receiver transmitter) [Driver_USART1] -// Configuration settings for Driver_USART1 in component ::Drivers:USART -#define RTE_USART1 1 -// USART (Universal synchronous - asynchronous receiver transmitter) [Driver_USART1] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPC0] -// Configuration settings for Driver_AHB_PPC0 in component ::Drivers:PPC -#define RTE_AHB_PPC0 1 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPC0] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP0] -// Configuration settings for Driver_AHB_PPCEXP0 in component ::Drivers:PPC -#define RTE_AHB_PPCEXP0 0 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP0] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP1] -// Configuration settings for Driver_AHB_PPCEXP1 in component ::Drivers:PPC -#define RTE_AHB_PPCEXP1 0 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP1] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP2] -// Configuration settings for Driver_AHB_PPCEXP2 in component ::Drivers:PPC -#define RTE_AHB_PPCEXP2 0 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP2] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP3] -// Configuration settings for Driver_AHB_PPCEXP3 in component ::Drivers:PPC -#define RTE_AHB_PPCEXP3 0 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP3] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPC0] -// Configuration settings for Driver_APB_PPC0 in component ::Drivers:PPC -#define RTE_APB_PPC0 1 -// PPC (Peripheral Protection Controller) [Driver_APB_PPC0] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPC1] -// Configuration settings for Driver_APB_PPC1 in component ::Drivers:PPC -#define RTE_APB_PPC1 1 -// PPC (Peripheral Protection Controller) [Driver_APB_PPC1] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP0] -// Configuration settings for Driver_APB_PPCEXP0 in component ::Drivers:PPC -#define RTE_APB_PPCEXP0 0 -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP0] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP1] -// Configuration settings for Driver_APB_PPCEXP1 in component ::Drivers:PPC -#define RTE_APB_PPCEXP1 0 -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP1] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP2] -// Configuration settings for Driver_APB_PPCEXP2 in component ::Drivers:PPC -#define RTE_APB_PPCEXP2 0 -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP2] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP3] -// Configuration settings for Driver_APB_PPCEXP3 in component ::Drivers:PPC -#define RTE_APB_PPCEXP3 0 -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP3] - -// FLASH (Flash Memory) [Driver_FLASH0] -// Configuration settings for Driver_FLASH0 in component ::Drivers:FLASH -#define RTE_FLASH0 1 -// FLASH (Flash Memory) [Driver_FLASH0] - -#endif /* __RTE_DEVICE_H */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Config/cmsis_driver_config.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Config/cmsis_driver_config.h deleted file mode 100644 index e50850a4077..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Config/cmsis_driver_config.h +++ /dev/null @@ -1,54 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_DRIVER_CONFIG_H__ -#define __CMSIS_DRIVER_CONFIG_H__ - -#include "device_cfg.h" -#include "platform_retarget_dev.h" -#include "platform_retarget_pins.h" -#include "RTE_Device.h" -#include "target_cfg.h" - -#define UART0_DEV UART0_PL011_DEV_NS -#define UART1_DEV UART1_PL011_DEV_NS - -#define FLASH0_DEV MT25QL_DEV_NS - -#define MPC_ISRAM0_DEV MPC_ISRAM0_DEV_S -#define MPC_ISRAM1_DEV MPC_ISRAM1_DEV_S -#define MPC_ISRAM2_DEV MPC_ISRAM2_DEV_S -#define MPC_ISRAM3_DEV MPC_ISRAM3_DEV_S -#define MPC_CODE_SRAM_DEV MPC_CODE_SRAM_DEV_S -#define MPC_QSPI_DEV MPC_QSPI_DEV_S - -#define AHB_PPC0_DEV AHB_PPC0_DEV_S -#define AHB_PPCEXP0_DEV AHB_PPCEXP0_DEV_S -#define AHB_PPCEXP1_DEV AHB_PPCEXP1_DEV_S -#define AHB_PPCEXP2_DEV AHB_PPCEXP2_DEV_S -#define AHB_PPCEXP3_DEV AHB_PPCEXP3_DEV_S -#define APB_PPC0_DEV APB_PPC0_DEV_S -#define APB_PPC1_DEV APB_PPC1_DEV_S -#define APB_PPCEXP0_DEV APB_PPCEXP0_DEV_S -#define APB_PPCEXP1_DEV APB_PPCEXP1_DEV_S -#define APB_PPCEXP2_DEV APB_PPCEXP2_DEV_S -#define APB_PPCEXP3_DEV APB_PPCEXP3_DEV_S - -#define MUSCA_A1_SCC_DEV MUSCA_A1_SCC_DEV_S - -#endif /* __CMSIS_DRIVER_CONFIG_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_Common.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_Common.h deleted file mode 100644 index cdf44b3325c..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_Common.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (c) 2013-2016 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Jan 2014 - * $Revision: V2.00 - * - * Project: Common Driver definitions - */ - -/* History: - * Version 2.00 - * Changed prefix ARM_DRV -> ARM_DRIVER - * Added General return codes definitions - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_COMMON_H -#define __DRIVER_COMMON_H - -#include -#include -#include - -#define ARM_DRIVER_VERSION_MAJOR_MINOR(major,minor) (((major) << 8) | (minor)) - -/** -\brief Driver Version -*/ -typedef struct _ARM_DRIVER_VERSION { - uint16_t api; ///< API version - uint16_t drv; ///< Driver version -} ARM_DRIVER_VERSION; - -/* General return codes */ -#define ARM_DRIVER_OK 0 ///< Operation succeeded -#define ARM_DRIVER_ERROR -1 ///< Unspecified error -#define ARM_DRIVER_ERROR_BUSY -2 ///< Driver is busy -#define ARM_DRIVER_ERROR_TIMEOUT -3 ///< Timeout occurred -#define ARM_DRIVER_ERROR_UNSUPPORTED -4 ///< Operation not supported -#define ARM_DRIVER_ERROR_PARAMETER -5 ///< Parameter error -#define ARM_DRIVER_ERROR_SPECIFIC -6 ///< Start of driver specific errors - -/** -\brief General power states -*/ -typedef enum _ARM_POWER_STATE { - ARM_POWER_OFF, ///< Power off: no operation possible - ARM_POWER_LOW, ///< Low Power mode: retain state, detect and signal wake-up events - ARM_POWER_FULL ///< Power on: full operation at maximum performance -} ARM_POWER_STATE; - -#endif /* __DRIVER_COMMON_H */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_MPC.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_MPC.c deleted file mode 100644 index f143bec58e7..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_MPC.c +++ /dev/null @@ -1,1169 +0,0 @@ -/* - * Copyright (c) 2016-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "Driver_MPC.h" - -#include "cmsis.h" -#include "cmsis_driver_config.h" -#include "RTE_Device.h" - -/* driver version */ -#define ARM_MPC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_MPC_API_VERSION, - ARM_MPC_DRV_VERSION -}; - -static ARM_DRIVER_VERSION ARM_MPC_GetVersion(void) -{ - return DriverVersion; -} - -/* - * \brief Translates error codes from native API to CMSIS API. - * - * \param[in] err Error code to translate (\ref mpc_sie200_error_t). - * - * \return Returns CMSIS error code. - */ -static int32_t error_trans(enum mpc_sie200_error_t err) -{ - switch(err) { - case MPC_SIE200_ERR_NONE: - return ARM_DRIVER_OK; - case MPC_SIE200_INVALID_ARG: - return ARM_DRIVER_ERROR_PARAMETER; - case MPC_SIE200_NOT_INIT: - return ARM_MPC_ERR_NOT_INIT; - case MPC_SIE200_ERR_NOT_IN_RANGE: - return ARM_MPC_ERR_NOT_IN_RANGE; - case MPC_SIE200_ERR_NOT_ALIGNED: - return ARM_MPC_ERR_NOT_ALIGNED; - case MPC_SIE200_ERR_INVALID_RANGE: - return ARM_MPC_ERR_INVALID_RANGE; - case MPC_SIE200_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE: - return ARM_MPC_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE; - default: - return ARM_MPC_ERR_UNSPECIFIED; - } -} - -#if (RTE_ISRAM0_MPC) -/* Ranges controlled by this ISRAM0_MPC */ -static const struct mpc_sie200_memory_range_t MPC_ISRAM0_RANGE_S = { - .base = MPC_ISRAM0_RANGE_BASE_S, - .limit = MPC_ISRAM0_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_SECURE -}; - -static const struct mpc_sie200_memory_range_t MPC_ISRAM0_RANGE_NS = { - .base = MPC_ISRAM0_RANGE_BASE_NS, - .limit = MPC_ISRAM0_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_NONSECURE -}; - -#define MPC_ISRAM0_RANGE_LIST_LEN 2u -static const struct mpc_sie200_memory_range_t* MPC_ISRAM0_RANGE_LIST[MPC_ISRAM0_RANGE_LIST_LEN]= - {&MPC_ISRAM0_RANGE_S, &MPC_ISRAM0_RANGE_NS}; - -/* ISRAM0_MPC Driver wrapper functions */ -static int32_t ISRAM0_MPC_Initialize(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_init(&MPC_ISRAM0_DEV, - MPC_ISRAM0_RANGE_LIST, - MPC_ISRAM0_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t ISRAM0_MPC_GetBlockSize(uint32_t* blk_size) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_block_size(&MPC_ISRAM0_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_GetCtrlConfig(uint32_t* ctrl_val) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_ctrl(&MPC_ISRAM0_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_set_ctrl(&MPC_ISRAM0_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR* attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_region_config(&MPC_ISRAM0_DEV, base, limit, - (enum mpc_sie200_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_config_region(&MPC_ISRAM0_DEV, base, limit, - (enum mpc_sie200_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_EnableInterrupt(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_irq_enable(&MPC_ISRAM0_DEV); - - return error_trans(ret); -} - -static void ISRAM0_MPC_DisableInterrupt(void) -{ - mpc_sie200_irq_disable(&MPC_ISRAM0_DEV); -} - - -static void ISRAM0_MPC_ClearInterrupt(void) -{ - mpc_sie200_clear_irq(&MPC_ISRAM0_DEV); -} - -static uint32_t ISRAM0_MPC_InterruptState(void) -{ - return mpc_sie200_irq_state(&MPC_ISRAM0_DEV); -} - -static int32_t ISRAM0_MPC_LockDown(void) -{ - return mpc_sie200_lock_down(&MPC_ISRAM0_DEV); -} - -/* ISRAM0_MPC Driver CMSIS access structure */ -extern ARM_DRIVER_MPC Driver_ISRAM0_MPC; -ARM_DRIVER_MPC Driver_ISRAM0_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = ISRAM0_MPC_Initialize, - .Uninitialize = ISRAM0_MPC_Uninitialize, - .GetBlockSize = ISRAM0_MPC_GetBlockSize, - .GetCtrlConfig = ISRAM0_MPC_GetCtrlConfig, - .SetCtrlConfig = ISRAM0_MPC_SetCtrlConfig, - .ConfigRegion = ISRAM0_MPC_ConfigRegion, - .GetRegionConfig = ISRAM0_MPC_GetRegionConfig, - .EnableInterrupt = ISRAM0_MPC_EnableInterrupt, - .DisableInterrupt = ISRAM0_MPC_DisableInterrupt, - .ClearInterrupt = ISRAM0_MPC_ClearInterrupt, - .InterruptState = ISRAM0_MPC_InterruptState, - .LockDown = ISRAM0_MPC_LockDown, -}; -#endif /* RTE_ISRAM0_MPC */ - -#if (RTE_ISRAM1_MPC) -/* Ranges controlled by this ISRAM1_MPC */ -static const struct mpc_sie200_memory_range_t MPC_ISRAM1_RANGE_S = { - .base = MPC_ISRAM1_RANGE_BASE_S, - .limit = MPC_ISRAM1_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_SECURE -}; - -static const struct mpc_sie200_memory_range_t MPC_ISRAM1_RANGE_NS = { - .base = MPC_ISRAM1_RANGE_BASE_NS, - .limit = MPC_ISRAM1_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_NONSECURE -}; - -#define MPC_ISRAM1_RANGE_LIST_LEN 2u -static const struct mpc_sie200_memory_range_t* MPC_ISRAM1_RANGE_LIST[MPC_ISRAM1_RANGE_LIST_LEN]= - {&MPC_ISRAM1_RANGE_S, &MPC_ISRAM1_RANGE_NS}; - -/* ISRAM1_MPC Driver wrapper functions */ -static int32_t ISRAM1_MPC_Initialize(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_init(&MPC_ISRAM1_DEV, - MPC_ISRAM1_RANGE_LIST, - MPC_ISRAM1_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t ISRAM1_MPC_GetBlockSize(uint32_t* blk_size) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_block_size(&MPC_ISRAM1_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_GetCtrlConfig(uint32_t* ctrl_val) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_ctrl(&MPC_ISRAM1_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_set_ctrl(&MPC_ISRAM1_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR* attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_region_config(&MPC_ISRAM1_DEV, base, limit, - (enum mpc_sie200_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_config_region(&MPC_ISRAM1_DEV, base, limit, - (enum mpc_sie200_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_EnableInterrupt(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_irq_enable(&MPC_ISRAM1_DEV); - - return error_trans(ret); -} - -static void ISRAM1_MPC_DisableInterrupt(void) -{ - mpc_sie200_irq_disable(&MPC_ISRAM1_DEV); -} - - -static void ISRAM1_MPC_ClearInterrupt(void) -{ - mpc_sie200_clear_irq(&MPC_ISRAM1_DEV); -} - -static uint32_t ISRAM1_MPC_InterruptState(void) -{ - return mpc_sie200_irq_state(&MPC_ISRAM1_DEV); -} - -static int32_t ISRAM1_MPC_LockDown(void) -{ - return mpc_sie200_lock_down(&MPC_ISRAM1_DEV); -} - -/* ISRAM1_MPC Driver CMSIS access structure */ -extern ARM_DRIVER_MPC Driver_ISRAM1_MPC; -ARM_DRIVER_MPC Driver_ISRAM1_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = ISRAM1_MPC_Initialize, - .Uninitialize = ISRAM1_MPC_Uninitialize, - .GetBlockSize = ISRAM1_MPC_GetBlockSize, - .GetCtrlConfig = ISRAM1_MPC_GetCtrlConfig, - .SetCtrlConfig = ISRAM1_MPC_SetCtrlConfig, - .ConfigRegion = ISRAM1_MPC_ConfigRegion, - .GetRegionConfig = ISRAM1_MPC_GetRegionConfig, - .EnableInterrupt = ISRAM1_MPC_EnableInterrupt, - .DisableInterrupt = ISRAM1_MPC_DisableInterrupt, - .ClearInterrupt = ISRAM1_MPC_ClearInterrupt, - .InterruptState = ISRAM1_MPC_InterruptState, - .LockDown = ISRAM1_MPC_LockDown, -}; -#endif /* RTE_ISRAM1_MPC */ - -#if (RTE_ISRAM2_MPC) -/* Ranges controlled by this ISRAM2_MPC */ -static const struct mpc_sie200_memory_range_t MPC_ISRAM2_RANGE_S = { - .base = MPC_ISRAM2_RANGE_BASE_S, - .limit = MPC_ISRAM2_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_SECURE -}; - -static const struct mpc_sie200_memory_range_t MPC_ISRAM2_RANGE_NS = { - .base = MPC_ISRAM2_RANGE_BASE_NS, - .limit = MPC_ISRAM2_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_NONSECURE -}; - -#define MPC_ISRAM2_RANGE_LIST_LEN 2u -static const struct mpc_sie200_memory_range_t* MPC_ISRAM2_RANGE_LIST[MPC_ISRAM2_RANGE_LIST_LEN]= - {&MPC_ISRAM2_RANGE_S, &MPC_ISRAM2_RANGE_NS}; - -/* ISRAM2_MPC Driver wrapper functions */ -static int32_t ISRAM2_MPC_Initialize(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_init(&MPC_ISRAM2_DEV, - MPC_ISRAM2_RANGE_LIST, - MPC_ISRAM2_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t ISRAM2_MPC_GetBlockSize(uint32_t* blk_size) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_block_size(&MPC_ISRAM2_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_GetCtrlConfig(uint32_t* ctrl_val) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_ctrl(&MPC_ISRAM2_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_set_ctrl(&MPC_ISRAM2_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR* attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_region_config(&MPC_ISRAM2_DEV, base, limit, - (enum mpc_sie200_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_config_region(&MPC_ISRAM2_DEV, base, limit, - (enum mpc_sie200_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_EnableInterrupt(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_irq_enable(&MPC_ISRAM2_DEV); - - return error_trans(ret); -} - -static void ISRAM2_MPC_DisableInterrupt(void) -{ - mpc_sie200_irq_disable(&MPC_ISRAM2_DEV); -} - -static void ISRAM2_MPC_ClearInterrupt(void) -{ - mpc_sie200_clear_irq(&MPC_ISRAM2_DEV); -} - -static uint32_t ISRAM2_MPC_InterruptState(void) -{ - return mpc_sie200_irq_state(&MPC_ISRAM2_DEV); -} - -static int32_t ISRAM2_MPC_LockDown(void) -{ - return mpc_sie200_lock_down(&MPC_ISRAM2_DEV); -} - -/* ISRAM2_MPC Driver CMSIS access structure */ -extern ARM_DRIVER_MPC Driver_ISRAM2_MPC; -ARM_DRIVER_MPC Driver_ISRAM2_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = ISRAM2_MPC_Initialize, - .Uninitialize = ISRAM2_MPC_Uninitialize, - .GetBlockSize = ISRAM2_MPC_GetBlockSize, - .GetCtrlConfig = ISRAM2_MPC_GetCtrlConfig, - .SetCtrlConfig = ISRAM2_MPC_SetCtrlConfig, - .ConfigRegion = ISRAM2_MPC_ConfigRegion, - .GetRegionConfig = ISRAM2_MPC_GetRegionConfig, - .EnableInterrupt = ISRAM2_MPC_EnableInterrupt, - .DisableInterrupt = ISRAM2_MPC_DisableInterrupt, - .ClearInterrupt = ISRAM2_MPC_ClearInterrupt, - .InterruptState = ISRAM2_MPC_InterruptState, - .LockDown = ISRAM2_MPC_LockDown, -}; -#endif /* RTE_ISRAM2_MPC */ - -#if (RTE_ISRAM3_MPC) -/* Ranges controlled by this ISRAM3_MPC */ -static const struct mpc_sie200_memory_range_t MPC_ISRAM3_RANGE_S = { - .base = MPC_ISRAM3_RANGE_BASE_S, - .limit = MPC_ISRAM3_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_SECURE -}; - -static const struct mpc_sie200_memory_range_t MPC_ISRAM3_RANGE_NS = { - .base = MPC_ISRAM3_RANGE_BASE_NS, - .limit = MPC_ISRAM3_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_NONSECURE -}; - -#define MPC_ISRAM3_RANGE_LIST_LEN 2u -static const struct mpc_sie200_memory_range_t* MPC_ISRAM3_RANGE_LIST[MPC_ISRAM3_RANGE_LIST_LEN]= - {&MPC_ISRAM3_RANGE_S, &MPC_ISRAM3_RANGE_NS}; - -/* ISRAM3_MPC Driver wrapper functions */ -static int32_t ISRAM3_MPC_Initialize(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_init(&MPC_ISRAM3_DEV, - MPC_ISRAM3_RANGE_LIST, - MPC_ISRAM3_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t ISRAM3_MPC_GetBlockSize(uint32_t* blk_size) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_block_size(&MPC_ISRAM3_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_GetCtrlConfig(uint32_t* ctrl_val) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_ctrl(&MPC_ISRAM3_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_set_ctrl(&MPC_ISRAM3_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR* attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_region_config(&MPC_ISRAM3_DEV, base, limit, - (enum mpc_sie200_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_config_region(&MPC_ISRAM3_DEV, base, limit, - (enum mpc_sie200_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_EnableInterrupt(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_irq_enable(&MPC_ISRAM3_DEV); - - return error_trans(ret); -} - -static void ISRAM3_MPC_DisableInterrupt(void) -{ - mpc_sie200_irq_disable(&MPC_ISRAM3_DEV); -} - - -static void ISRAM3_MPC_ClearInterrupt(void) -{ - mpc_sie200_clear_irq(&MPC_ISRAM3_DEV); -} - -static uint32_t ISRAM3_MPC_InterruptState(void) -{ - return mpc_sie200_irq_state(&MPC_ISRAM3_DEV); -} - -static int32_t ISRAM3_MPC_LockDown(void) -{ - return mpc_sie200_lock_down(&MPC_ISRAM3_DEV); -} - -/* ISRAM3_MPC Driver CMSIS access structure */ -extern ARM_DRIVER_MPC Driver_ISRAM3_MPC; -ARM_DRIVER_MPC Driver_ISRAM3_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = ISRAM3_MPC_Initialize, - .Uninitialize = ISRAM3_MPC_Uninitialize, - .GetBlockSize = ISRAM3_MPC_GetBlockSize, - .GetCtrlConfig = ISRAM3_MPC_GetCtrlConfig, - .SetCtrlConfig = ISRAM3_MPC_SetCtrlConfig, - .ConfigRegion = ISRAM3_MPC_ConfigRegion, - .GetRegionConfig = ISRAM3_MPC_GetRegionConfig, - .EnableInterrupt = ISRAM3_MPC_EnableInterrupt, - .DisableInterrupt = ISRAM3_MPC_DisableInterrupt, - .ClearInterrupt = ISRAM3_MPC_ClearInterrupt, - .InterruptState = ISRAM3_MPC_InterruptState, - .LockDown = ISRAM3_MPC_LockDown, -}; -#endif /* RTE_ISRAM3_MPC */ - -#if (RTE_CODE_SRAM_MPC) -/* Ranges controlled by this CODE_SRAM_MPC */ -static const struct mpc_sie200_memory_range_t MPC_CODE_SRAM_RANGE_S = { - .base = MPC_CODE_SRAM_RANGE_BASE_S, - .limit = MPC_CODE_SRAM_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_SECURE -}; - -static const struct mpc_sie200_memory_range_t MPC_CODE_SRAM_RANGE_NS = { - .base = MPC_CODE_SRAM_RANGE_BASE_NS, - .limit = MPC_CODE_SRAM_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_NONSECURE -}; - -#define MPC_CODE_SRAM_RANGE_LIST_LEN 2u -static const struct mpc_sie200_memory_range_t* MPC_CODE_SRAM_RANGE_LIST[MPC_CODE_SRAM_RANGE_LIST_LEN]= - {&MPC_CODE_SRAM_RANGE_S, &MPC_CODE_SRAM_RANGE_NS}; - -/* CODE_SRAM_MPC Driver wrapper functions */ -static int32_t CODE_SRAM_MPC_Initialize(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_init(&MPC_CODE_SRAM_DEV, - MPC_CODE_SRAM_RANGE_LIST, - MPC_CODE_SRAM_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t CODE_SRAM_MPC_GetBlockSize(uint32_t* blk_size) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_block_size(&MPC_CODE_SRAM_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_GetCtrlConfig(uint32_t* ctrl_val) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_ctrl(&MPC_CODE_SRAM_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_set_ctrl(&MPC_CODE_SRAM_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR* attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_region_config(&MPC_CODE_SRAM_DEV, base, limit, - (enum mpc_sie200_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_config_region(&MPC_CODE_SRAM_DEV, base, limit, - (enum mpc_sie200_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_EnableInterrupt(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_irq_enable(&MPC_CODE_SRAM_DEV); - - return error_trans(ret); -} - -static void CODE_SRAM_MPC_DisableInterrupt(void) -{ - mpc_sie200_irq_disable(&MPC_CODE_SRAM_DEV); -} - - -static void CODE_SRAM_MPC_ClearInterrupt(void) -{ - mpc_sie200_clear_irq(&MPC_CODE_SRAM_DEV); -} - -static uint32_t CODE_SRAM_MPC_InterruptState(void) -{ - return mpc_sie200_irq_state(&MPC_CODE_SRAM_DEV); -} - -static int32_t CODE_SRAM_MPC_LockDown(void) -{ - return mpc_sie200_lock_down(&MPC_CODE_SRAM_DEV); -} - -/* CODE_SRAM_MPC Driver CMSIS access structure */ -extern ARM_DRIVER_MPC Driver_CODE_SRAM_MPC; -ARM_DRIVER_MPC Driver_CODE_SRAM_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = CODE_SRAM_MPC_Initialize, - .Uninitialize = CODE_SRAM_MPC_Uninitialize, - .GetBlockSize = CODE_SRAM_MPC_GetBlockSize, - .GetCtrlConfig = CODE_SRAM_MPC_GetCtrlConfig, - .SetCtrlConfig = CODE_SRAM_MPC_SetCtrlConfig, - .ConfigRegion = CODE_SRAM_MPC_ConfigRegion, - .GetRegionConfig = CODE_SRAM_MPC_GetRegionConfig, - .EnableInterrupt = CODE_SRAM_MPC_EnableInterrupt, - .DisableInterrupt = CODE_SRAM_MPC_DisableInterrupt, - .ClearInterrupt = CODE_SRAM_MPC_ClearInterrupt, - .InterruptState = CODE_SRAM_MPC_InterruptState, - .LockDown = CODE_SRAM_MPC_LockDown, -}; -#endif /* RTE_CODE_SRAM_MPC */ - -#if (RTE_SSRAM2_MPC) -/* Ranges controlled by this SSRAM2_MPC */ -static const struct mpc_sie200_memory_range_t MPC_SSRAM2_RANGE_S = { - .base = MPC_SSRAM2_RANGE_BASE_S, - .limit = MPC_SSRAM2_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_SECURE -}; - -static const struct mpc_sie200_memory_range_t MPC_SSRAM2_RANGE_NS = { - .base = MPC_SSRAM2_RANGE_BASE_NS, - .limit = MPC_SSRAM2_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_NONSECURE -}; - -#define MPC_SSRAM2_RANGE_LIST_LEN 2u -static const struct mpc_sie200_memory_range_t* MPC_SSRAM2_RANGE_LIST[MPC_SSRAM2_RANGE_LIST_LEN]= - {&MPC_SSRAM2_RANGE_S, &MPC_SSRAM2_RANGE_NS}; - -/* SSRAM2_MPC Driver wrapper functions */ -static int32_t SSRAM2_MPC_Initialize(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_init(&MPC_SSRAM2_DEV, - MPC_SSRAM2_RANGE_LIST, - MPC_SSRAM2_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t SSRAM2_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t SSRAM2_MPC_GetBlockSize(uint32_t* blk_size) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_block_size(&MPC_SSRAM2_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t SSRAM2_MPC_GetCtrlConfig(uint32_t* ctrl_val) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_ctrl(&MPC_SSRAM2_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t SSRAM2_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_set_ctrl(&MPC_SSRAM2_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t SSRAM2_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR* attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_region_config(&MPC_SSRAM2_DEV, base, limit, - (enum mpc_sie200_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t SSRAM2_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_config_region(&MPC_SSRAM2_DEV, base, limit, - (enum mpc_sie200_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t SSRAM2_MPC_EnableInterrupt(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_irq_enable(&MPC_SSRAM2_DEV); - - return error_trans(ret); -} - -static void SSRAM2_MPC_DisableInterrupt(void) -{ - mpc_sie200_irq_disable(&MPC_SSRAM2_DEV); -} - - -static void SSRAM2_MPC_ClearInterrupt(void) -{ - mpc_sie200_clear_irq(&MPC_SSRAM2_DEV); -} - -static uint32_t SSRAM2_MPC_InterruptState(void) -{ - return mpc_sie200_irq_state(&MPC_SSRAM2_DEV); -} - -static int32_t SSRAM2_MPC_LockDown(void) -{ - return mpc_sie200_lock_down(&MPC_SSRAM2_DEV); -} - -/* SSRAM2_MPC Driver CMSIS access structure */ -extern ARM_DRIVER_MPC Driver_SRAM2_MPC; -ARM_DRIVER_MPC Driver_SRAM2_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = SSRAM2_MPC_Initialize, - .Uninitialize = SSRAM2_MPC_Uninitialize, - .GetBlockSize = SSRAM2_MPC_GetBlockSize, - .GetCtrlConfig = SSRAM2_MPC_GetCtrlConfig, - .SetCtrlConfig = SSRAM2_MPC_SetCtrlConfig, - .ConfigRegion = SSRAM2_MPC_ConfigRegion, - .GetRegionConfig = SSRAM2_MPC_GetRegionConfig, - .EnableInterrupt = SSRAM2_MPC_EnableInterrupt, - .DisableInterrupt = SSRAM2_MPC_DisableInterrupt, - .ClearInterrupt = SSRAM2_MPC_ClearInterrupt, - .InterruptState = SSRAM2_MPC_InterruptState, - .LockDown = SSRAM2_MPC_LockDown, -}; -#endif /* RTE_SSRAM2_MPC */ - -#if (RTE_SSRAM3_MPC) -/* Ranges controlled by this SSRAM3_MPC */ -static const struct mpc_sie200_memory_range_t MPC_SSRAM3_RANGE_S = { - .base = MPC_SSRAM3_RANGE_BASE_S, - .limit = MPC_SSRAM3_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_SECURE -}; - -static const struct mpc_sie200_memory_range_t MPC_SSRAM3_RANGE_NS = { - .base = MPC_SSRAM3_RANGE_BASE_NS, - .limit = MPC_SSRAM3_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_NONSECURE -}; - -#define MPC_SSRAM3_RANGE_LIST_LEN 2u -static const struct mpc_sie200_memory_range_t* MPC_SSRAM3_RANGE_LIST[MPC_SSRAM3_RANGE_LIST_LEN]= - {&MPC_SSRAM3_RANGE_S, &MPC_SSRAM3_RANGE_NS}; - -/* SSRAM3_MPC Driver wrapper functions */ -static int32_t SSRAM3_MPC_Initialize(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_init(&MPC_SSRAM3_DEV, - MPC_SSRAM3_RANGE_LIST, - MPC_SSRAM3_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t SSRAM3_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t SSRAM3_MPC_GetBlockSize(uint32_t* blk_size) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_block_size(&MPC_SSRAM3_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t SSRAM3_MPC_GetCtrlConfig(uint32_t* ctrl_val) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_ctrl(&MPC_SSRAM3_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t SSRAM3_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_set_ctrl(&MPC_SSRAM3_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t SSRAM3_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR* attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_region_config(&MPC_SSRAM3_DEV, base, limit, - (enum mpc_sie200_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t SSRAM3_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_config_region(&MPC_SSRAM3_DEV, base, limit, - (enum mpc_sie200_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t SSRAM3_MPC_EnableInterrupt(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_irq_enable(&MPC_SSRAM3_DEV); - - return error_trans(ret); -} - -static void SSRAM3_MPC_DisableInterrupt(void) -{ - mpc_sie200_irq_disable(&MPC_SSRAM3_DEV); -} - - -static void SSRAM3_MPC_ClearInterrupt(void) -{ - mpc_sie200_clear_irq(&MPC_SSRAM3_DEV); -} - -static uint32_t SSRAM3_MPC_InterruptState(void) -{ - return mpc_sie200_irq_state(&MPC_SSRAM3_DEV); -} - -static int32_t SSRAM3_MPC_LockDown(void) -{ - return mpc_sie200_lock_down(&MPC_SSRAM3_DEV); -} - -/* SSRAM3_MPC Driver CMSIS access structure */ -extern ARM_DRIVER_MPC Driver_SSRAM3_MPC; -ARM_DRIVER_MPC Driver_SSRAM3_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = SSRAM3_MPC_Initialize, - .Uninitialize = SSRAM3_MPC_Uninitialize, - .GetBlockSize = SSRAM3_MPC_GetBlockSize, - .GetCtrlConfig = SSRAM3_MPC_GetCtrlConfig, - .SetCtrlConfig = SSRAM3_MPC_SetCtrlConfig, - .ConfigRegion = SSRAM3_MPC_ConfigRegion, - .GetRegionConfig = SSRAM3_MPC_GetRegionConfig, - .EnableInterrupt = SSRAM3_MPC_EnableInterrupt, - .DisableInterrupt = SSRAM3_MPC_DisableInterrupt, - .ClearInterrupt = SSRAM3_MPC_ClearInterrupt, - .InterruptState = SSRAM3_MPC_InterruptState, - .LockDown = SSRAM3_MPC_LockDown, -}; -#endif /* RTE_SSRAM3_MPC */ - - -#if (RTE_QSPI_MPC) -/* Ranges controlled by this QSPI_MPC */ -static const struct mpc_sie200_memory_range_t MPC_QSPI_RANGE_S = { - .base = MPC_QSPI_RANGE_BASE_S, - .limit = MPC_QSPI_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_SECURE -}; - -static const struct mpc_sie200_memory_range_t MPC_QSPI_RANGE_NS = { - .base = MPC_QSPI_RANGE_BASE_NS, - .limit = MPC_QSPI_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE200_SEC_ATTR_NONSECURE -}; - -#define MPC_QSPI_RANGE_LIST_LEN 2u -static const struct mpc_sie200_memory_range_t* MPC_QSPI_RANGE_LIST[MPC_QSPI_RANGE_LIST_LEN]= - {&MPC_QSPI_RANGE_S, &MPC_QSPI_RANGE_NS}; - -/* QSPI_MPC Driver wrapper functions */ -static int32_t QSPI_MPC_Initialize(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_init(&MPC_QSPI_DEV, - MPC_QSPI_RANGE_LIST, - MPC_QSPI_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t QSPI_MPC_GetBlockSize(uint32_t* blk_size) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_block_size(&MPC_QSPI_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_GetCtrlConfig(uint32_t* ctrl_val) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_ctrl(&MPC_QSPI_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_set_ctrl(&MPC_QSPI_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR* attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_get_region_config(&MPC_QSPI_DEV, base, limit, - (enum mpc_sie200_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_config_region(&MPC_QSPI_DEV, base, limit, - (enum mpc_sie200_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_EnableInterrupt(void) -{ - enum mpc_sie200_error_t ret; - - ret = mpc_sie200_irq_enable(&MPC_QSPI_DEV); - - return error_trans(ret); -} - -static void QSPI_MPC_DisableInterrupt(void) -{ - mpc_sie200_irq_disable(&MPC_QSPI_DEV); -} - - -static void QSPI_MPC_ClearInterrupt(void) -{ - mpc_sie200_clear_irq(&MPC_QSPI_DEV); -} - -static uint32_t QSPI_MPC_InterruptState(void) -{ - return mpc_sie200_irq_state(&MPC_QSPI_DEV); -} - -static int32_t QSPI_MPC_LockDown(void) -{ - return mpc_sie200_lock_down(&MPC_QSPI_DEV); -} - -/* QSPI1_MPC Driver CMSIS access structure */ -extern ARM_DRIVER_MPC Driver_QSPI_MPC; -ARM_DRIVER_MPC Driver_QSPI_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = QSPI_MPC_Initialize, - .Uninitialize = QSPI_MPC_Uninitialize, - .GetBlockSize = QSPI_MPC_GetBlockSize, - .GetCtrlConfig = QSPI_MPC_GetCtrlConfig, - .SetCtrlConfig = QSPI_MPC_SetCtrlConfig, - .ConfigRegion = QSPI_MPC_ConfigRegion, - .GetRegionConfig = QSPI_MPC_GetRegionConfig, - .EnableInterrupt = QSPI_MPC_EnableInterrupt, - .DisableInterrupt = QSPI_MPC_DisableInterrupt, - .ClearInterrupt = QSPI_MPC_ClearInterrupt, - .InterruptState = QSPI_MPC_InterruptState, - .LockDown = QSPI_MPC_LockDown, -}; -#endif /* RTE_QSPI_MPC */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_MPC.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_MPC.h deleted file mode 100644 index 9ed84ba7457..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_MPC.h +++ /dev/null @@ -1,153 +0,0 @@ -/* - * Copyright (c) 2016-2018 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef __DRIVER_MPC_H -#define __DRIVER_MPC_H - -#include "Driver_Common.h" - -/* API version */ -#define ARM_MPC_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) - -/* Error code returned by the driver functions */ -#define ARM_MPC_ERR_NOT_INIT (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< MPC not initialized */ -#define ARM_MPC_ERR_NOT_IN_RANGE (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Address does not belong to a range controlled by the MPC */ -#define ARM_MPC_ERR_NOT_ALIGNED (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Address is not aligned on the block size of this MPC */ -#define ARM_MPC_ERR_INVALID_RANGE (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< The given address range to configure is invalid -#define ARM_MPC_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< The given range cannot be accessed with the wanted security attributes */ -#define ARM_MPC_ERR_UNSPECIFIED (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Unspecified error */ - -/* Security attribute used in various place of the API */ -typedef enum _ARM_MPC_SEC_ATTR { - ARM_MPC_ATTR_SECURE, ///< Secure attribute - ARM_MPC_ATTR_NONSECURE, ///< Non-secure attribute - /* Used when getting the configuration of a memory range and some blocks are - * secure whereas some other are non secure */ - ARM_MPC_ATTR_MIXED, ///< Mixed attribute -} ARM_MPC_SEC_ATTR; - -/* Function documentation */ -/** - \fn ARM_DRIVER_VERSION ARM_MPC_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - - \fn int32_t ARM_MPC_Initialize (void) - \brief Initialize MPC Interface. - \return Returns error code. - - \fn int32_t ARM_MPC_Uninitialize (void) - \brief De-initialize MPC Interface. The controlled memory region - should not be accessed after a call to this function, as - it is allowed to configure everything to be secure (to - prevent information leak for example). - \return Returns error code. - - \fn int32_t ARM_MPC_GetBlockSize (uint32_t* blk_size) - \brief Get the block size of the MPC. All regions must be aligned - on this block size (base address and limit+1 address). - \param[out] blk_size: The block size in bytes. - \return Returns error code. - - \fn int32_t ARM_MPC_GetCtrlConfig (uint32_t* ctrl_val) - \brief Get some information on how the MPC IP is configured. - \param[out] ctrl_val: MPC control configuration - \return Returns error code. - - \fn int32_t ARM_MPC_SetCtrlConfig (uint32_t ctrl) - \brief Set new control configuration for the MPC IP. - \param[in] ctrl: New control configuration. - \return Returns error code. - - \fn int32_t ARM_MPC_ConfigRegion (uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) - \brief Configure a memory region (base and limit included). - Both base and limit addresses must belong to the same - memory range, and this range must be managed by this MPC. - Also, some ranges are only allowed to be configured as - secure/non-secure, because of hardware requirements - (security aliases), and only a relevant security attribute - is therefore allowed for such ranges. - \param[in] base: Base address of the region to configure. This - bound is included in the configured region. - This must be aligned on the block size of this MPC. - \param[in] limit: Limit address of the region to configure. This - bound is included in the configured region. - Limit+1 must be aligned on the block size of this MPC. - \param[in] attr: Wanted security attribute of the region. - \return Returns error code. - - \fn int32_t ARM_MPC_GetRegionConfig (uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) - \brief Gets a memory region (base and limit included). - \param[in] base: Base address of the region to poll. This - bound is included. It does not need to be aligned - in any way. - \param[in] limit: Limit address of the region to poll. This - bound is included. (limit+1) does not need to be aligned - in any way. - \param[out] attr: Security attribute of the region. - If the region has mixed secure/non-secure, - a special value is returned (\ref ARM_MPC_SEC_ATTR). - - In case base and limit+1 addresses are not aligned on - the block size, the enclosing region with base and - limit+1 aligned on block size will be queried. - In case of early termination of the function (error), the - security attribute will be set to ARM_MPC_ATTR_MIXED. - \return Returns error code. - - \fn int32_t ARM_MPC_EnableInterrupt (void) - \brief Enable MPC interrupt. - \return Returns error code. - - \fn void ARM_MPC_DisableInterrupt (void) - \brief Disable MPC interrupt. - - \fn void ARM_MPC_ClearInterrupt (void) - \brief Clear MPC interrupt. - - \fn uint32_t ARM_MPC_InterruptState (void) - \brief MPC interrupt state. - \return Returns 1 if the interrupt is active, 0 otherwise. - - \fn int32_t ARM_MPC_LockDown (void) - \brief Lock down the MPC configuration. - \return Returns error code. -*/ - -/** - * \brief Access structure of the MPC Driver. - */ -typedef struct _ARM_DRIVER_MPC { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_MPC_GetVersion : Get driver version. - int32_t (*Initialize) (void); ///< Pointer to \ref ARM_MPC_Initialize : Initialize the MPC Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_MPC_Uninitialize : De-initialize the MPC Interface. - int32_t (*GetBlockSize) (uint32_t* blk_size); ///< Pointer to \ref ARM_MPC_GetBlockSize : Get MPC block size - int32_t (*GetCtrlConfig) (uint32_t* ctrl_val); ///< Pointer to \ref ARM_MPC_GetCtrlConfig : Get the MPC control configuration flags. - int32_t (*SetCtrlConfig) (uint32_t ctrl); ///< Pointer to \ref ARM_MPC_SetCtrlConfig : Set the MPC control configuration flags. - int32_t (*ConfigRegion) (uintptr_t base, uintptr_t limit, ARM_MPC_SEC_ATTR attr); ///< Pointer to \ref ARM_MPC_ConfigRegion : Configure a region using the driver for the specific MPC. - int32_t (*GetRegionConfig) (uintptr_t base, uintptr_t limit, ARM_MPC_SEC_ATTR *attr); ///< Pointer to \ref ARM_MPC_GetRegionConfig : Get the configuration of a specific region on this MPC. - int32_t (*EnableInterrupt) (void); ///< Pointer to \ref ARM_MPC_EnableInterrupt : Enable MPC interrupt. - void (*DisableInterrupt) (void); ///< Pointer to \ref ARM_MPC_DisableInterrupt : Disable MPC interrupt. - void (*ClearInterrupt) (void); ///< Pointer to \ref ARM_MPC_ClearInterrupt : Clear MPC interrupt. - uint32_t (*InterruptState) (void); ///< Pointer to \ref ARM_MPC_InterruptState : MPC interrupt State. - int32_t (*LockDown) (void); ///< Pointer to \ref ARM_MPC_LockDown : Lock down the MPC configuration. -} const ARM_DRIVER_MPC; - -#endif /* __DRIVER_MPC_H */ - diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_PPC.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_PPC.c deleted file mode 100644 index 0c9f18514cc..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_PPC.c +++ /dev/null @@ -1,969 +0,0 @@ -/* - * Copyright (c) 2016-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_PPC.h" - -#include "cmsis.h" -#include "cmsis_driver_config.h" -#include "RTE_Device.h" - -/* Driver version */ -#define ARM_PPC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_PPC_API_VERSION, - ARM_PPC_DRV_VERSION -}; - -static ARM_DRIVER_VERSION ARM_PPC_GetVersion(void) -{ - return DriverVersion; -} - -#if (RTE_AHB_PPC0) -/* AHB PPC0 Driver wrapper functions */ -static int32_t AHB_PPC0_Initialize(void) -{ - ppc_sse200_init(&AHB_PPC0_DEV, AHB_PPC0); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPC0_Uninitialize(void) -{ - /* Nothing to be done*/ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPC0_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPC0_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPC0_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPC0_DEV, periph); -} - -static uint32_t AHB_PPC0_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPC0_DEV, periph); -} - -static int32_t AHB_PPC0_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPC0_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPC0_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPC0_DEV); -} - -static void AHB_PPC0_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPC0_DEV); -} - -static uint32_t AHB_PPC0_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPC0_DEV); -} - -/* AHB PPC0 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPC0; -ARM_DRIVER_PPC Driver_AHB_PPC0 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPC0_Initialize, - .Uninitialize = AHB_PPC0_Uninitialize, - .ConfigPeriph = AHB_PPC0_ConfigPeriph, - .IsPeriphSecure = AHB_PPC0_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPC0_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPC0_EnableInterrupt, - .DisableInterrupt = AHB_PPC0_DisableInterrupt, - .ClearInterrupt = AHB_PPC0_ClearInterrupt, - .InterruptState = AHB_PPC0_InterruptState -}; -#endif /* RTE_AHB_PPC0 */ - -#if (RTE_AHB_PPCEXP0) -/* AHB PPCEXP0 Driver wrapper functions */ -static int32_t AHB_PPCEXP0_Initialize(void) -{ - ppc_sse200_init(&AHB_PPCEXP0_DEV, AHB_PPC_EXP0); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP0_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP0_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPCEXP0_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPCEXP0_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPCEXP0_DEV, periph); -} - -static uint32_t AHB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP0_DEV, periph); -} - -static int32_t AHB_PPCEXP0_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPCEXP0_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPCEXP0_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPCEXP0_DEV); -} - -static void AHB_PPCEXP0_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPCEXP0_DEV); -} - -static uint32_t AHB_PPCEXP0_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPCEXP0_DEV); -} - -/* AHB PPCEXP0 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPCEXP0; -ARM_DRIVER_PPC Driver_AHB_PPCEXP0 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPCEXP0_Initialize, - .Uninitialize = AHB_PPCEXP0_Uninitialize, - .ConfigPeriph = AHB_PPCEXP0_ConfigPeriph, - .IsPeriphSecure = AHB_PPCEXP0_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPCEXP0_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPCEXP0_EnableInterrupt, - .DisableInterrupt = AHB_PPCEXP0_DisableInterrupt, - .ClearInterrupt = AHB_PPCEXP0_ClearInterrupt, - .InterruptState = AHB_PPCEXP0_InterruptState -}; -#endif /* RTE_AHB_PPCEXP0 */ - -#if (RTE_AHB_PPCEXP1) -/* AHB PPCEXP1 Driver wrapper functions */ -static int32_t AHB_PPCEXP1_Initialize(void) -{ - ppc_sse200_init(&AHB_PPCEXP1_DEV, AHB_PPC_EXP1); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP1_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP1_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPCEXP1_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPCEXP1_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPCEXP1_DEV, periph); -} - -static uint32_t AHB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP1_DEV, periph); -} - -static int32_t AHB_PPCEXP1_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPCEXP1_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPCEXP1_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPCEXP1_DEV); -} - -static void AHB_PPCEXP1_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPCEXP1_DEV); -} - -static uint32_t AHB_PPCEXP1_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPCEXP1_DEV); -} - -/* AHB PPCEXP1 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPCEXP1; -ARM_DRIVER_PPC Driver_AHB_PPCEXP1 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPCEXP1_Initialize, - .Uninitialize = AHB_PPCEXP1_Uninitialize, - .ConfigPeriph = AHB_PPCEXP1_ConfigPeriph, - .IsPeriphSecure = AHB_PPCEXP1_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPCEXP1_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPCEXP1_EnableInterrupt, - .DisableInterrupt = AHB_PPCEXP1_DisableInterrupt, - .ClearInterrupt = AHB_PPCEXP1_ClearInterrupt, - .InterruptState = AHB_PPCEXP1_InterruptState -}; -#endif /* RTE_AHB_PPCEXP1 */ - -#if (RTE_AHB_PPCEXP2) -/* AHB PPCEXP2 Driver wrapper functions */ -static int32_t AHB_PPCEXP2_Initialize(void) -{ - ppc_sse200_init(&AHB_PPCEXP2_DEV, AHB_PPC_EXP2); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP2_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP2_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPCEXP2_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPCEXP2_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPCEXP2_DEV, periph); -} - -static uint32_t AHB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP2_DEV, periph); -} - -static int32_t AHB_PPCEXP2_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPCEXP2_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPCEXP2_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPCEXP2_DEV); -} - -static void AHB_PPCEXP2_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPCEXP2_DEV); -} - -static uint32_t AHB_PPCEXP2_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPCEXP2_DEV); -} - -/* AHB PPCEXP2 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPCEXP2; -ARM_DRIVER_PPC Driver_AHB_PPCEXP2 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPCEXP2_Initialize, - .Uninitialize = AHB_PPCEXP2_Uninitialize, - .ConfigPeriph = AHB_PPCEXP2_ConfigPeriph, - .IsPeriphSecure = AHB_PPCEXP2_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPCEXP2_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPCEXP2_EnableInterrupt, - .DisableInterrupt = AHB_PPCEXP2_DisableInterrupt, - .ClearInterrupt = AHB_PPCEXP2_ClearInterrupt, - .InterruptState = AHB_PPCEXP2_InterruptState -}; -#endif /* RTE_AHB_PPCEXP2 */ - -#if (RTE_AHB_PPCEXP3) -/* AHB PPCEXP3 Driver wrapper functions */ -static int32_t AHB_PPCEXP3_Initialize(void) -{ - ppc_sse200_init(&AHB_PPCEXP3_DEV, AHB_PPC_EXP3); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP3_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP3_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPCEXP3_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPCEXP3_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPCEXP3_DEV, periph); -} - -static uint32_t AHB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP3_DEV, periph); -} - -static int32_t AHB_PPCEXP3_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPCEXP3_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPCEXP3_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPCEXP3_DEV); -} - -static void AHB_PPCEXP3_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPCEXP3_DEV); -} - -static uint32_t AHB_PPCEXP3_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPCEXP3_DEV); -} - -/* AHB PPCEXP3 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPCEXP3; -ARM_DRIVER_PPC Driver_AHB_PPCEXP3 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPCEXP3_Initialize, - .Uninitialize = AHB_PPCEXP3_Uninitialize, - .ConfigPeriph = AHB_PPCEXP3_ConfigPeriph, - .IsPeriphSecure = AHB_PPCEXP3_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPCEXP3_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPCEXP3_EnableInterrupt, - .DisableInterrupt = AHB_PPCEXP3_DisableInterrupt, - .ClearInterrupt = AHB_PPCEXP3_ClearInterrupt, - .InterruptState = AHB_PPCEXP3_InterruptState -}; -#endif /* RTE_AHB_PPCEXP3 */ - -#if (RTE_APB_PPC0) -/* APB PPC0 Driver wrapper functions */ -static int32_t APB_PPC0_Initialize(void) -{ - ppc_sse200_init(&APB_PPC0_DEV, APB_PPC0); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPC0_Uninitialize(void) -{ - /* Nothing to be done*/ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPC0_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPC0_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPC0_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPC0_DEV, periph); -} - -static uint32_t APB_PPC0_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPC0_DEV, periph); -} - -static int32_t APB_PPC0_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPC0_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPC0_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPC0_DEV); -} - -static void APB_PPC0_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPC0_DEV); -} - -static uint32_t APB_PPC0_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPC0_DEV); -} - -/* APB PPC0 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPC0; -ARM_DRIVER_PPC Driver_APB_PPC0 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPC0_Initialize, - .Uninitialize = APB_PPC0_Uninitialize, - .ConfigPeriph = APB_PPC0_ConfigPeriph, - .IsPeriphSecure = APB_PPC0_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPC0_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPC0_EnableInterrupt, - .DisableInterrupt = APB_PPC0_DisableInterrupt, - .ClearInterrupt = APB_PPC0_ClearInterrupt, - .InterruptState = APB_PPC0_InterruptState -}; -#endif /* RTE_APB_PPC0 */ - -#if (RTE_APB_PPC1) -/* APB PPC1 Driver wrapper functions */ -static int32_t APB_PPC1_Initialize(void) -{ - ppc_sse200_init(&APB_PPC1_DEV, APB_PPC1); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPC1_Uninitialize(void) -{ - /* Nothing to be done*/ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPC1_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPC1_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPC1_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPC1_DEV, periph); -} - -static uint32_t APB_PPC1_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPC1_DEV, periph); -} -static int32_t APB_PPC1_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPC1_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPC1_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPC1_DEV); -} - -static void APB_PPC1_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPC1_DEV); -} - -static uint32_t APB_PPC1_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPC1_DEV); -} - -/* APB PPC1 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPC1; -ARM_DRIVER_PPC Driver_APB_PPC1 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPC1_Initialize, - .Uninitialize = APB_PPC1_Uninitialize, - .ConfigPeriph = APB_PPC1_ConfigPeriph, - .IsPeriphSecure = APB_PPC1_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPC1_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPC1_EnableInterrupt, - .DisableInterrupt = APB_PPC1_DisableInterrupt, - .ClearInterrupt = APB_PPC1_ClearInterrupt, - .InterruptState = APB_PPC1_InterruptState -}; -#endif /* RTE_APB_PPC1 */ - -#if (RTE_APB_PPCEXP0) -/* APB PPCEXP0 Driver wrapper functions */ -static int32_t APB_PPCEXP0_Initialize(void) -{ - ppc_sse200_init(&APB_PPCEXP0_DEV, APB_PPC_EXP0); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP0_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP0_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPCEXP0_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPCEXP0_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPCEXP0_DEV, periph); -} - -static uint32_t APB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPCEXP0_DEV, periph); -} - -static int32_t APB_PPCEXP0_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPCEXP0_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPCEXP0_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPCEXP0_DEV); -} - -static void APB_PPCEXP0_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPCEXP0_DEV); -} - -static uint32_t APB_PPCEXP0_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPCEXP0_DEV); -} - -/* APB PPCEXP0 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPCEXP0; -ARM_DRIVER_PPC Driver_APB_PPCEXP0 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPCEXP0_Initialize, - .Uninitialize = APB_PPCEXP0_Uninitialize, - .ConfigPeriph = APB_PPCEXP0_ConfigPeriph, - .IsPeriphSecure = APB_PPCEXP0_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPCEXP0_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPCEXP0_EnableInterrupt, - .DisableInterrupt = APB_PPCEXP0_DisableInterrupt, - .ClearInterrupt = APB_PPCEXP0_ClearInterrupt, - .InterruptState = APB_PPCEXP0_InterruptState -}; -#endif /* RTE_APB_PPCEXP0 */ - -#if (RTE_APB_PPCEXP1) -/* APB PPCEXP1 Driver wrapper functions */ -static int32_t APB_PPCEXP1_Initialize(void) -{ - ppc_sse200_init(&APB_PPCEXP1_DEV, APB_PPC_EXP1); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP1_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP1_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPCEXP1_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPCEXP1_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPCEXP1_DEV, periph); -} - -static uint32_t APB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPCEXP1_DEV, periph); -} - -static int32_t APB_PPCEXP1_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPCEXP1_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPCEXP1_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPCEXP1_DEV); -} - -static void APB_PPCEXP1_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPCEXP1_DEV); -} - -static uint32_t APB_PPCEXP1_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPCEXP1_DEV); -} - -/* APB PPCEXP1 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPCEXP1; -ARM_DRIVER_PPC Driver_APB_PPCEXP1 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPCEXP1_Initialize, - .Uninitialize = APB_PPCEXP1_Uninitialize, - .ConfigPeriph = APB_PPCEXP1_ConfigPeriph, - .IsPeriphSecure = APB_PPCEXP1_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPCEXP1_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPCEXP1_EnableInterrupt, - .DisableInterrupt = APB_PPCEXP1_DisableInterrupt, - .ClearInterrupt = APB_PPCEXP1_ClearInterrupt, - .InterruptState = APB_PPCEXP1_InterruptState -}; -#endif /* RTE_APB_PPCEXP1 */ - -#if (RTE_APB_PPCEXP2) -/* APB PPCEXP2 Driver wrapper functions */ -static int32_t APB_PPCEXP2_Initialize(void) -{ - ppc_sse200_init(&APB_PPCEXP2_DEV, APB_PPC_EXP2); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP2_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP2_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPCEXP2_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPCEXP2_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPCEXP2_DEV, periph); -} - -static uint32_t APB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPCEXP2_DEV, periph); -} - -static int32_t APB_PPCEXP2_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPCEXP2_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPCEXP2_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPCEXP2_DEV); -} - -static void APB_PPCEXP2_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPCEXP2_DEV); -} - -static uint32_t APB_PPCEXP2_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPCEXP2_DEV); -} - -/* APB PPCEXP2 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPCEXP2; -ARM_DRIVER_PPC Driver_APB_PPCEXP2 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPCEXP2_Initialize, - .Uninitialize = APB_PPCEXP2_Uninitialize, - .ConfigPeriph = APB_PPCEXP2_ConfigPeriph, - .IsPeriphSecure = APB_PPCEXP2_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPCEXP2_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPCEXP2_EnableInterrupt, - .DisableInterrupt = APB_PPCEXP2_DisableInterrupt, - .ClearInterrupt = APB_PPCEXP2_ClearInterrupt, - .InterruptState = APB_PPCEXP2_InterruptState -}; -#endif /* RTE_APB_PPCEXP2 */ - -#if (RTE_APB_PPCEXP3) -/* APB PPCEXP3 Driver wrapper functions */ -static int32_t APB_PPCEXP3_Initialize(void) -{ - ppc_sse200_init(&APB_PPCEXP3_DEV, APB_PPC_EXP3); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP3_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP3_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPCEXP3_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPCEXP3_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPCEXP3_DEV, periph); -} - -static uint32_t APB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPCEXP3_DEV, periph); -} - -static int32_t APB_PPCEXP3_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPCEXP3_DEV); - - if( ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPCEXP3_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPCEXP3_DEV); -} - -static void APB_PPCEXP3_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPCEXP3_DEV); -} - -static uint32_t APB_PPCEXP3_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPCEXP3_DEV); -} - -/* APB PPCEXP3 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPCEXP3; -ARM_DRIVER_PPC Driver_APB_PPCEXP3 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPCEXP3_Initialize, - .Uninitialize = APB_PPCEXP3_Uninitialize, - .ConfigPeriph = APB_PPCEXP3_ConfigPeriph, - .IsPeriphSecure = APB_PPCEXP3_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPCEXP3_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPCEXP3_EnableInterrupt, - .DisableInterrupt = APB_PPCEXP3_DisableInterrupt, - .ClearInterrupt = APB_PPCEXP3_ClearInterrupt, - .InterruptState = APB_PPCEXP3_InterruptState -}; -#endif /* RTE_APB_PPCEXP3 */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_PPC.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_PPC.h deleted file mode 100644 index e689b2ebde7..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/CMSIS_Driver/Driver_PPC.h +++ /dev/null @@ -1,116 +0,0 @@ -/* - * Copyright (c) 2016 ARM Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_PPC_DRV_H__ -#define __CMSIS_PPC_DRV_H__ - -#include "Driver_Common.h" - -/* API version */ -#define ARM_PPC_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) - -/* Security attribute used to configure the peripheral */ -typedef enum _ARM_PPC_SecAttr { - ARM_PPC_SECURE_ONLY, ///< Secure access - ARM_PPC_NONSECURE_ONLY, ///< Non-secure access -} ARM_PPC_SecAttr; - -/* Privilege attribute used to configure the peripheral */ -typedef enum _ARM_PPC_PrivAttr { - ARM_PPC_PRIV_AND_NONPRIV, ///< Privilege and non-privilege access - ARM_PPC_PRIV_ONLY, ///< Privilege only access -} ARM_PPC_PrivAttr; - -/* Function documentation */ -/** - \fn ARM_DRIVER_VERSION ARM_PPC_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - - \fn int32_t ARM_PPC_Initialize (void) - \brief Initialize PPC Interface. - \return Returns ARM error code. - - \fn int32_t ARM_PPC_Uninitialize (void) - \brief De-initialize MPC Interface. - \return Returns ARM error code. - - \fn int32_t ARM_PPC_ConfigPeriph (uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) - \brief Configures a peripheral controlled by the given PPC. - \param[in] periph: Peripheral position in SPCTRL and NSPCTRL registers. - \param[in] sec_attr: Secure attribute value. - \param[in] priv_attr: Privilege attrivute value. - - Secure Privilege Control Block ( SPCTRL ) - Non-Secure Privilege Control Block ( NSPCTRL ) - - \return Returns ARM error code. - - \fn int32_t ARM_PPC_IsPeriphSecure (uint8_t periph) - \brief Check if the peripheral is configured to be secure. - \param[in] periph: Peripheral position in SPCTRL and NSPCTRL registers. - - Secure Privilege Control Block ( SPCTRL ) - Non-Secure Privilege Control Block ( NSPCTRL ) - - \return Returns 1 if the peripheral is configured as secure, - 0 for non-secure. - - \fn uint32_t ARM_PPC_IsPeriphPrivOnly (uint8_t periph) - \brief Check if the peripheral is configured to be privilege only. - \param[in] periph: Peripheral position in SPCTRL and NSPCTRL registers. - - Secure Privilege Control Block ( SPCTRL ) - Non-Secure Privilege Control Block ( NSPCTRL ) - - \return Returns 1 if the peripheral is configured as privilege access - only, 0 for privilege and unprivilege access mode. - - \fn int32_t ARM_PPC_EnableInterrupt (void) - \brief Enable PPC interrupt. - \return Returns ARM error code. - - \fn void ARM_PPC_DisableInterrupt (void) - \brief Disable PPC interrupt. - - \fn void ARM_PPC_ClearInterrupt (void) - \brief Clear PPC interrupt. - - \fn int32_t ARM_PPC_InterruptState (void) - \brief PPC interrupt state. - \return Returns 1 if the interrupt is active, 0 otherwise. -*/ - -/** - * \brief Access structure of the MPC Driver. - */ -typedef struct _ARM_DRIVER_PPC { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_PPC_GetVersion : Get driver version. - int32_t (*Initialize) (void); ///< Pointer to \ref ARM_PPC_Initialize : Initialize the PPC Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_PPC_Uninitialize : De-initialize the PPC Interface. - int32_t (*ConfigPeriph) (uint8_t periph, ARM_PPC_SecAttr sec_attr, ARM_PPC_PrivAttr priv_attr); ///< Pointer to \ref ARM_PPC_ConfigPeriph : Configure a peripheral controlled by the PPC. - uint32_t (*IsPeriphSecure) (uint8_t periph); ///< Pointer to \ref IsPeriphSecure : Check if the peripheral is configured to be secure. - uint32_t (*IsPeriphPrivOnly) (uint8_t periph); ///< Pointer to \ref IsPeriphPrivOnly : Check if the peripheral is configured to be privilege only. - int32_t (*EnableInterrupt) (void); ///< Pointer to \ref ARM_PPC_EnableInterrupt : Enable PPC interrupt. - void (*DisableInterrupt) (void); ///< Pointer to \ref ARM_PPC_DisableInterrupt : Disable PPC interrupt. - void (*ClearInterrupt) (void); ///< Pointer to \ref ARM_PPC_ClearInterrupt : Clear PPC interrupt. - uint32_t (*InterruptState) (void); ///< Pointer to \ref ARM_PPC_InterruptState : PPC interrupt State. -} const ARM_DRIVER_PPC; - -#endif /* __CMSIS_PPC_DRV_H__ */ - diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/Libraries/mt25ql_flash_lib.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/Libraries/mt25ql_flash_lib.c deleted file mode 100644 index ed82c329970..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/Libraries/mt25ql_flash_lib.c +++ /dev/null @@ -1,944 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -/* Use memcpy function */ -#include - -#include "mt25ql_flash_lib.h" - -/** Setter bit manipulation macro */ -#define SET_BIT(WORD, BIT_INDEX) ((WORD) |= (1U << (BIT_INDEX))) -/** Clearing bit manipulation macro */ -#define CLR_BIT(WORD, BIT_INDEX) ((WORD) &= ~(1U << (BIT_INDEX))) -/** Getter bit manipulation macro */ -#define GET_BIT(WORD, BIT_INDEX) (bool)(((WORD) & (1U << (BIT_INDEX)))) - -#define BITS_PER_WORD 32U -#define BYTES_PER_WORD 4U - -#define ARG_NOT_USED 0 -#define ARG_PTR_NOT_USED NULL - -/** MT25QL used command */ -#define WRITE_ENABLE_CMD 0x06U -#define READ_ENHANCED_VOLATILE_CFG_REG_CMD 0x65U -#define WRITE_ENHANCED_VOLATILE_CFG_REG_CMD 0x61U -#define READ_VOLATILE_CFG_REG_CMD 0x85U -#define WRITE_VOLATILE_CFG_REG_CMD 0x81U -#define READ_FLAG_STATUS_REG_CMD 0x70U -#define SUBSECTOR_ERASE_32KB_CMD 0x52U -#define SUBSECTOR_ERASE_4KB_CMD 0x20U -#define SECTOR_ERASE_CMD 0xD8U -#define BULK_ERASE_CMD 0xC7U -/* - * The baud rate divisor in \ref mt25ql_dev_t needs to be configured adequately - * to handle those commands. - */ -#define QUAD_OUTPUT_FAST_READ_CMD 0x6BU -#define FAST_READ_CMD 0x0BU -#define READ_CMD 0x03U -#define QUAD_INPUT_FAST_PROGRAM_CMD 0x32U -#define PAGE_PROGRAM_CMD 0x02U - -/** MT25QL Enhanced Volatile Configuration Register access */ -#define ENHANCED_VOLATILE_CFG_REG_LEN 1U -#define ENHANCED_VOLATILE_CFG_REG_QSPI_POS 7U -#define ENHANCED_VOLATILE_CFG_REG_DSPI_POS 6U - -/** MT25QL Volatile Configuration Register access */ -#define VOLATILE_CFG_REG_LEN 1U -#define VOLATILE_CFG_REG_DUMMY_CYCLES_POS 4U -#define VOLATILE_CFG_REG_DUMMY_CYCLES_BITS 4U - -/** MT25QL Flag Status Register access */ -#define FLAG_STATUS_REG_LEN 1U -#define FLAG_STATUS_REG_READY_POS 7U - -/* - * 8 is the minimal number of dummy clock cycles needed to reach the maximal - * frequency of the Quad Output Fast Read Command. - */ -#define QUAD_OUTPUT_FAST_READ_DUMMY_CYCLES 8U -#define FAST_READ_DUMMY_CYCLES 8U -#define DEFAULT_READ_DUMMY_CYCLES 0U -#define QUAD_INPUT_FAST_PROGRAM_DUMMY_CYCLES 0U -#define PAGE_PROGRAM_DUMMY_CYCLES 0U - -/* Only up to 8 bytes can be read or written using the Flash commands. */ -#define CMD_DATA_MAX_SIZE 8U - -/** - * \brief Change specific bits in a 32 bits word. - * - * \param[in,out] word Pointer of the word to change - * \param[in] bits bits_length bits to put at bits_pos in the word - * pointed - * \param[in] bits_length Number of bits to change - * \param[in] bits_pos Position of the bits to change - * - * \note This function will do nothing if the parameters given are incorrect: - * * word is NULL - * * bits_length + bits_pos > 32 - * * bits_length is 0 - */ -static void change_bits_in_word(volatile uint32_t *word, - uint32_t bits, - uint32_t bits_length, - uint32_t bits_pos) -{ - uint32_t mask; - - if ((word == NULL) || - ((bits_length + bits_pos) > BITS_PER_WORD) || - (bits_length == 0U)) { - /* Silently fail */ - return; - } - - /* Change all the bits */ - if (bits_length == BITS_PER_WORD) { - *word = bits; - return; - } - - mask = ((1U << bits_length) - 1); - /* - * We change the bits in three steps: - * - clear bits_length bits with zeroes at bits_pos in the word - * - mask bits in case it contains more than bits_length bits - * - set the new bits in the cleared word - * Because the data pointed by word is only read once, the data will still - * be coherent after an interruption that changes it. - */ - *word = ((*word & ~(mask << bits_pos)) | ((bits & mask) << bits_pos)); -} - -/** - * \brief Send the Write Enable command, needed before any write. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - */ -static void send_write_enable(struct mt25ql_dev_t* dev) -{ - qspi_ip6514e_send_simple_cmd(dev->controller, WRITE_ENABLE_CMD); -} - -/** - * \brief Set SPI mode on the flash device and on the controller. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] spi_mode SPI mode to be set on flash device and controller - * \ref qspi_ip6514e_spi_mode_t - * - * \return Return error code as specified in \ref mt25ql_error_t - */ -static enum mt25ql_error_t set_spi_mode(struct mt25ql_dev_t* dev, - enum qspi_ip6514e_spi_mode_t spi_mode) -{ - uint8_t enhanced_volatile_cfg_reg = 0; - enum qspi_ip6514e_error_t controller_error; - - /* Read the Enhanced Volatile Configuration Register, modify it according - * to the requested SPI mode then write back the modified value to the - * register. This will activate the SPI mode on the flash side. - */ - controller_error = qspi_ip6514e_send_read_cmd( - dev->controller, - READ_ENHANCED_VOLATILE_CFG_REG_CMD, - &enhanced_volatile_cfg_reg, - ENHANCED_VOLATILE_CFG_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles needed for - this command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - switch(spi_mode) { - case QSPI_IP6514E_SPI_MODE: - /* Disable the Dual- and Quad-SPI modes. - * Clearing the bit enables the mode, setting it disables it. - */ - SET_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_DSPI_POS); - SET_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_QSPI_POS); - break; - case QSPI_IP6514E_DSPI_MODE: - /* Disable the Quad-SPI mode and activate DSPI mode. - * Clearing the bit enables the mode, setting it disables it. - */ - CLR_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_DSPI_POS); - SET_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_QSPI_POS); - break; - case QSPI_IP6514E_QSPI_MODE: - /* Disable the Dual-SPI mode and activate QSPI mode. - * Clearing the bit enables the mode, setting it disables it. - */ - SET_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_DSPI_POS); - CLR_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_QSPI_POS); - break; - default: - return MT25QL_ERR_WRONG_ARGUMENT; - } - - send_write_enable(dev); - - controller_error = qspi_ip6514e_send_write_cmd( - dev->controller, - WRITE_ENHANCED_VOLATILE_CFG_REG_CMD, - &enhanced_volatile_cfg_reg, - ENHANCED_VOLATILE_CFG_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles needed for - this command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Activate the requested SPI mode on the controller side as well. */ - controller_error = qspi_ip6514e_set_spi_mode(dev->controller, - spi_mode, - spi_mode, - spi_mode); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - return MT25QL_ERR_NONE; -} - -/** - * \brief Change the number of dummy clock cycles subsequent to all FAST READ - * commands. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] dummy_cycles Dummy clock cycles to set - * - * \return Return error code as specified in \ref mt25ql_error_t - */ -static enum mt25ql_error_t change_dummy_cycles(struct mt25ql_dev_t* dev, - uint32_t dummy_cycles) -{ - uint32_t volatile_cfg_reg = 0; - enum qspi_ip6514e_error_t controller_error; - - /* - * Changes the number of dummy cycles in the Volatile Configuration - * Register. - */ - controller_error = qspi_ip6514e_send_read_cmd(dev->controller, - READ_VOLATILE_CFG_REG_CMD, - &volatile_cfg_reg, - VOLATILE_CFG_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles needed - for this command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - change_bits_in_word(&volatile_cfg_reg, - dummy_cycles, - VOLATILE_CFG_REG_DUMMY_CYCLES_BITS, - VOLATILE_CFG_REG_DUMMY_CYCLES_POS); - - send_write_enable(dev); - - controller_error = qspi_ip6514e_send_write_cmd(dev->controller, - WRITE_VOLATILE_CFG_REG_CMD, - &volatile_cfg_reg, - VOLATILE_CFG_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles needed - for this command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - return MT25QL_ERR_NONE; -} - -/** - * \brief Wait until the current program/erase is finished. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * - * \return Return error code as specified in \ref mt25ql_error_t - */ -static enum mt25ql_error_t wait_program_or_erase_complete( - struct mt25ql_dev_t* dev) -{ - enum qspi_ip6514e_error_t controller_error; - uint8_t flag_status_reg = 0; - - /* Wait until the ready bit of the Flag Status Register is set */ - while (!GET_BIT(flag_status_reg, FLAG_STATUS_REG_READY_POS)) { - controller_error = qspi_ip6514e_send_read_cmd(dev->controller, - READ_FLAG_STATUS_REG_CMD, - &flag_status_reg, - FLAG_STATUS_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles - needed for this - command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - } - - return MT25QL_ERR_NONE; -} - -/** - * \brief Execute a program command that crosses the page size boundary. - * - * \param[in] dev Pointer to MT25QL device structure - * \ref mt25ql_dev_t - * \param[in] opcode Opcode for the command. - * \param[in] write_data Pointer to a memory zone where the write_len - * number of bytes are located to write for this - * command. - * \param[in] write_len Number of bytes to write for the command. - * Between 1 and 8 bytes (both included) can be - * written. - * \param[in] addr Address used for the command - * \param[in] addr_bytes_number Number of address bytes for this command. - * If an address is not needed for the command, - * use 0 for argument, otherwise between 1 and - * 4 bytes (both included) can be used. - * \param[in] dummy_cycles Number of dummy cycles required for the - * command, between 0 and 31 (both included). - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will execute two commands: one to program the bytes up to - * the page boundary and another one to program the rest. It will wait - * that bytes are programmed from first command before triggering the - * second one. - * \note This function does not send a write enable command before the first - * command and does not check that bytes were programmed after the second - * command. - */ -static enum mt25ql_error_t send_boundary_cross_write_cmd( - struct mt25ql_dev_t* dev, - uint8_t opcode, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles) -{ - enum qspi_ip6514e_error_t controller_error; - enum mt25ql_error_t library_error; - /* - * Remaining bytes between the current address and the end of the current - * page. - */ - uint32_t page_remainder = FLASH_PAGE_SIZE - (addr % FLASH_PAGE_SIZE); - - /* First write up to the end of the current page. */ - controller_error = qspi_ip6514e_send_write_cmd(dev->controller, - opcode, - write_data, - page_remainder, - addr, - addr_bytes_number, - dummy_cycles); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - write_data = (void *)((uint32_t)write_data + page_remainder); - addr += page_remainder; - - /* Wait for the page to be written before sending new commands. */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* Then write the remaining data of the write_len bytes. */ - send_write_enable(dev); - controller_error = qspi_ip6514e_send_write_cmd(dev->controller, - opcode, - write_data, - write_len - page_remainder, - addr, - addr_bytes_number, - dummy_cycles); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_config_mode(struct mt25ql_dev_t* dev, - enum mt25ql_functional_state_t config) -{ - enum qspi_ip6514e_spi_mode_t spi_mode; - enum qspi_ip6514e_error_t controller_error; - enum mt25ql_error_t library_error; - uint8_t opcode_read; - uint8_t opcode_write; - uint32_t dummy_cycles_read; - uint32_t dummy_cycles_write; - - switch(config) { - case MT25QL_FUNC_STATE_DEFAULT: - spi_mode = QSPI_IP6514E_SPI_MODE; - opcode_read = READ_CMD; - dummy_cycles_read = DEFAULT_READ_DUMMY_CYCLES; - opcode_write = PAGE_PROGRAM_CMD; - dummy_cycles_write = PAGE_PROGRAM_DUMMY_CYCLES; - break; - case MT25QL_FUNC_STATE_FAST: - spi_mode = QSPI_IP6514E_SPI_MODE; - opcode_read = FAST_READ_CMD; - dummy_cycles_read = FAST_READ_DUMMY_CYCLES; - opcode_write = PAGE_PROGRAM_CMD; - dummy_cycles_write = PAGE_PROGRAM_DUMMY_CYCLES; - break; - case MT25QL_FUNC_STATE_QUAD_FAST: - spi_mode = QSPI_IP6514E_QSPI_MODE; - opcode_read = QUAD_OUTPUT_FAST_READ_CMD; - dummy_cycles_read = QUAD_OUTPUT_FAST_READ_DUMMY_CYCLES; - opcode_write = QUAD_INPUT_FAST_PROGRAM_CMD; - dummy_cycles_write = QUAD_INPUT_FAST_PROGRAM_DUMMY_CYCLES; - break; - default: - return MT25QL_ERR_WRONG_ARGUMENT; - } - - /* This function will first set the Flash memory SPI mode and then set - * the controller's SPI mode. It will fail if the two sides do not have - * the same mode when this function is called. - */ - library_error = set_spi_mode(dev, spi_mode); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* Set the number of dummy cycles for read commands. */ - library_error = change_dummy_cycles(dev, dummy_cycles_read); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* The rest of the configuration needs the controller to be disabled */ - while(!qspi_ip6514e_is_idle(dev->controller)); - qspi_ip6514e_disable(dev->controller); - - /* Set the baud rate divisor as configured in the device structure. */ - controller_error = qspi_ip6514e_set_baud_rate_div(dev->controller, - dev->baud_rate_div); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Set opcode and dummy cycles needed for read commands. */ - controller_error = qspi_ip6514e_cfg_reads(dev->controller, - opcode_read, - dummy_cycles_read); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Set opcode and dummy cycles needed for write commands. */ - controller_error = qspi_ip6514e_cfg_writes(dev->controller, - opcode_write, - dummy_cycles_write); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Set Flash memory constants: bytes per page and address bytes. */ - controller_error = qspi_ip6514e_cfg_page_size(dev->controller, - FLASH_PAGE_SIZE); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - controller_error = qspi_ip6514e_cfg_addr_bytes(dev->controller, - ADDR_BYTES); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - qspi_ip6514e_enable(dev->controller); - - dev->func_state = config; - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_restore_default_state(struct mt25ql_dev_t* dev) -{ - enum mt25ql_error_t library_error; - - /* - * This function will first change the Flash memory mode to single SPI and - * then change the controller to single SPI. It will fail if the two sides - * do not have the same mode when this function is called. - */ - library_error = set_spi_mode(dev, QSPI_IP6514E_SPI_MODE); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* Set the default number of dummy cycles for read commands. */ - library_error = change_dummy_cycles(dev, DEFAULT_READ_DUMMY_CYCLES); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* The rest of the configuration needs the controller to be disabled */ - while(!qspi_ip6514e_is_idle(dev->controller)); - qspi_ip6514e_disable(dev->controller); - - /* Restore the default value of the QSPI controller registers. */ - qspi_ip6514e_reset_regs(dev->controller); - - qspi_ip6514e_enable(dev->controller); - - dev->func_state = MT25QL_FUNC_STATE_DEFAULT; - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_direct_read(struct mt25ql_dev_t* dev, - uint32_t addr, - void *data, - uint32_t len) -{ - /* - * The direct access window size is the size of the memory that can be - * accessed with a direct access. - */ - uint32_t direct_access_window_size = dev->controller->cfg->addr_mask + 1; - /* - * The window number is the number of times it will be needed to remap the - * address with the remap register. We move this Direct Access window first - * window_number times starting at the beginning address to read full - * windows of direct_access_window_size bytes. Then we read the remainder - * bytes. - */ - uint32_t window_number = len / direct_access_window_size; - - if (data == NULL || len == 0) { - return MT25QL_ERR_WRONG_ARGUMENT; - } - - if ((addr + len) >= dev->size) { - return MT25QL_ERR_ADDR_TOO_BIG; - } - - /* - * There is no limitation reading through a Flash page boundary hence we - * do not add the same logic here than in the write function. - */ - - /* Transfer the bytes for the window_number windows first. */ - for (uint32_t window = 0; window < window_number; window++) { - qspi_ip6514e_remap_addr(dev->controller, addr); - - /* - * The AHB address to access the Flash memory does not change but it - * will be translated differently thanks to the remap function. - */ - memcpy(data, - (void *)dev->direct_access_start_addr, - direct_access_window_size); - - len -= direct_access_window_size; - data = (void *)((uint32_t)data + direct_access_window_size); - addr += direct_access_window_size; - } - - if (len) { - /* Transfer the reminder bytes */ - qspi_ip6514e_remap_addr(dev->controller, addr); - - memcpy(data, (void *)dev->direct_access_start_addr, len); - } - - /* Disable remapping for direct accesses outside of this function. */ - qspi_ip6514e_disable_remap(dev->controller); - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_direct_write(struct mt25ql_dev_t* dev, - uint32_t addr, - const void *data, - uint32_t len) -{ - enum mt25ql_error_t library_error; - /* - * The direct access window size is the size of the memory that can be - * accessed with a direct access. - */ - uint32_t direct_access_window_size = dev->controller->cfg->addr_mask + 1; - uint32_t window_number; - /* Offset between address and the previous 32 bits aligned word */ - uint32_t word_offset; - - if (data == NULL || len == 0) { - return MT25QL_ERR_WRONG_ARGUMENT; - } - - if ((addr + len) >= dev->size) { - return MT25QL_ERR_ADDR_TOO_BIG; - } - - /* - * If the remapping address is not aligned on a 32 bits boundary, a direct - * access of one word could cross a Flash page boundary. If that happens, - * the bytes of that word that are over the page boundary will instead be - * written at the beginning of the same page. - * To counter this problem, we align the remapping address and add the word - * offset to the address of the direct access for the first window only. - */ - word_offset = addr % BYTES_PER_WORD; - /* Make address aligned on a 32 bits alignment. */ - addr -= word_offset; - /* - * Only direct_access_window_size address locations are available by direct - * access. We calculate the number of windows that we will need to transfer - * len bytes. We have to add in the window the offset that we add in the - * beginning. - */ - window_number = (len + word_offset) / direct_access_window_size; - - /* - * This function assumes that the flash has already been erased. - * Transfer the bytes for the window_number windows first. - */ - for (uint32_t window = 0; window < window_number; window++) { - /* The controller needs to be disabled while remapping is done. */ - qspi_ip6514e_remap_addr(dev->controller, addr); - - /* - * The AHB address to access the Flash memory does not change but it - * will be translated differently thanks to the remap function. - */ - memcpy((void *)(dev->direct_access_start_addr + word_offset), - data, - direct_access_window_size - word_offset); - - len -= (direct_access_window_size - word_offset); - data = (void *)((uint32_t)data + - (direct_access_window_size - word_offset)); - addr += direct_access_window_size; - - /* - * The address is now aligned, there is no need to add an offset for the - * remaining windows. - */ - word_offset = 0; - - /* - * Wait until the last program operation is complete before changing - * the remap address. - */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } - - if (len) { - /* Transfer the reminder bytes */ - qspi_ip6514e_remap_addr(dev->controller, addr); - - memcpy((void *)(dev->direct_access_start_addr + word_offset), - data, - len); - - /* Wait until the last program operation is complete */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } - - /* - * Disable the default remap address for direct accesses outside of this - * function. - */ - qspi_ip6514e_disable_remap(dev->controller); - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_command_read(struct mt25ql_dev_t* dev, - uint32_t addr, - void *data, - uint32_t len) -{ - /* With one single command only 8 bytes can be read. */ - uint32_t cmd_number = len / CMD_DATA_MAX_SIZE; - enum qspi_ip6514e_error_t controller_error; - uint8_t opcode; - uint32_t dummy_cycles; - - switch (dev->func_state) { - case MT25QL_FUNC_STATE_QUAD_FAST: - opcode = QUAD_OUTPUT_FAST_READ_CMD; - dummy_cycles = QUAD_OUTPUT_FAST_READ_DUMMY_CYCLES; - break; - case MT25QL_FUNC_STATE_FAST: - opcode = FAST_READ_CMD; - dummy_cycles = FAST_READ_DUMMY_CYCLES; - break; - case MT25QL_FUNC_STATE_DEFAULT: - default: - opcode = READ_CMD; - dummy_cycles = DEFAULT_READ_DUMMY_CYCLES; - break; - } - - for (uint32_t cmd_index = 0; cmd_index < cmd_number; cmd_index++) { - controller_error = qspi_ip6514e_send_read_cmd( - dev->controller, - opcode, - data, - CMD_DATA_MAX_SIZE, - addr, - ADDR_BYTES, - dummy_cycles); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - data = (void *)((uint32_t)data + CMD_DATA_MAX_SIZE); - addr += CMD_DATA_MAX_SIZE; - len -= CMD_DATA_MAX_SIZE; - } - - if (len) { - /* Read the remainder. */ - controller_error = qspi_ip6514e_send_read_cmd( - dev->controller, - opcode, - data, - len, - addr, - ADDR_BYTES, - dummy_cycles); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - } - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_command_write(struct mt25ql_dev_t* dev, - uint32_t addr, - const void *data, - uint32_t len) -{ - /* With one single command only 8 bytes can be written. */ - uint32_t cmd_number = len / CMD_DATA_MAX_SIZE; - enum qspi_ip6514e_error_t controller_error; - enum mt25ql_error_t library_error; - uint8_t opcode; - uint32_t dummy_cycles; - - switch (dev->func_state) { - case MT25QL_FUNC_STATE_QUAD_FAST: - opcode = QUAD_INPUT_FAST_PROGRAM_CMD; - dummy_cycles = QUAD_INPUT_FAST_PROGRAM_DUMMY_CYCLES; - break; - case MT25QL_FUNC_STATE_FAST: - case MT25QL_FUNC_STATE_DEFAULT: - default: - opcode = PAGE_PROGRAM_CMD; - dummy_cycles = PAGE_PROGRAM_DUMMY_CYCLES; - break; - } - - for (uint32_t cmd_index = 0; cmd_index < cmd_number; cmd_index++) { - send_write_enable(dev); - - /* - * Check if this command is not writing over a page boundary: first and - * last bytes are in the same page. - */ - if ((addr / FLASH_PAGE_SIZE) != - ((addr + CMD_DATA_MAX_SIZE - 1) / FLASH_PAGE_SIZE)) { - /* The CMD_DATA_MAX_SIZE bytes written are crossing the boundary. */ - library_error = send_boundary_cross_write_cmd( - dev, - opcode, - data, - CMD_DATA_MAX_SIZE, - addr, - ADDR_BYTES, - dummy_cycles); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } else { - /* Normal case: not crossing the boundary. */ - controller_error = qspi_ip6514e_send_write_cmd( - dev->controller, - opcode, - data, - CMD_DATA_MAX_SIZE, - addr, - ADDR_BYTES, - dummy_cycles); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - } - - /* Wait until the write operation is complete. */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - data = (void *)((uint32_t)data + CMD_DATA_MAX_SIZE); - addr += CMD_DATA_MAX_SIZE; - len -= CMD_DATA_MAX_SIZE; - } - - if (len) { - /* Write the remainder. */ - send_write_enable(dev); - /* - * Check if this command is not writing over a page boundary: first and - * last bytes are in the same page. - */ - if ((addr / FLASH_PAGE_SIZE) != ((addr + len - 1) / FLASH_PAGE_SIZE)) { - /* The CMD_DATA_MAX_SIZE bytes written are crossing the boundary. */ - library_error = send_boundary_cross_write_cmd( - dev, - opcode, - data, - len, - addr, - ADDR_BYTES, - dummy_cycles); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } else { - /* Normal case: not crossing the boundary. */ - controller_error = qspi_ip6514e_send_write_cmd( - dev->controller, - opcode, - data, - len, - addr, - ADDR_BYTES, - dummy_cycles); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - } - - /* Wait until the write operation is complete. */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } - - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_erase(struct mt25ql_dev_t* dev, - uint32_t addr, - enum mt25ql_erase_t erase_type) -{ - enum qspi_ip6514e_error_t controller_error; - enum mt25ql_error_t library_error; - uint8_t erase_cmd; - uint32_t addr_bytes; - - send_write_enable(dev); - - switch (erase_type) { - case MT25QL_ERASE_ALL_FLASH: - if (addr != 0) { - return MT25QL_ERR_ADDR_NOT_ALIGNED; - } - erase_cmd = BULK_ERASE_CMD; - addr_bytes = ARG_NOT_USED; - break; - case MT25QL_ERASE_SECTOR_64K: - erase_cmd = SECTOR_ERASE_CMD; - addr_bytes = ADDR_BYTES; - if ((addr % SECTOR_64KB) != 0) { - return MT25QL_ERR_ADDR_NOT_ALIGNED; - } - break; - case MT25QL_ERASE_SUBSECTOR_32K: - erase_cmd = SUBSECTOR_ERASE_32KB_CMD; - addr_bytes = ADDR_BYTES; - if ((addr % SUBSECTOR_32KB) != 0) { - return MT25QL_ERR_ADDR_NOT_ALIGNED; - } - break; - case MT25QL_ERASE_SUBSECTOR_4K: - erase_cmd = SUBSECTOR_ERASE_4KB_CMD; - addr_bytes = ADDR_BYTES; - if ((addr % SUBSECTOR_4KB) != 0) { - return MT25QL_ERR_ADDR_NOT_ALIGNED; - } - break; - default: - return MT25QL_ERR_WRONG_ARGUMENT; - } - - if (addr >= dev->size) { - return MT25QL_ERR_ADDR_TOO_BIG; - } - - controller_error = qspi_ip6514e_send_cmd(dev->controller, - erase_cmd, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - addr, - addr_bytes, - 0); /* No dummy cycles needed for - any erase command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Wait until the erase operation is complete */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - return MT25QL_ERR_NONE; -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/Libraries/mt25ql_flash_lib.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/Libraries/mt25ql_flash_lib.h deleted file mode 100644 index f62424ccfe5..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/Libraries/mt25ql_flash_lib.h +++ /dev/null @@ -1,252 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* - * This library provides functions to control the MT25QL256ABA-1EW7-OSIT flash - * memory from Micron and should work for similar devices from the same vendor. - */ - -#ifndef __MT25QL_H__ -#define __MT25QL_H__ - -#include "qspi_ip6514e_drv.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * \brief MT25QL Flash Memory documentation defined values. - */ -#define FLASH_PAGE_SIZE (256U) /* 256B */ -#define SUBSECTOR_4KB (0x00001000U) /* 4KB */ -#define SUBSECTOR_32KB (0x00008000U) /* 32KB */ -#define SECTOR_64KB (0x00010000U) /* 64KB */ -#define ADDR_BYTES (3U) - -enum mt25ql_error_t { - MT25QL_ERR_NONE = QSPI_IP6514E_ERR_NONE, - MT25QL_ERR_WRONG_ARGUMENT = QSPI_IP6514E_ERR_WRONG_ARGUMENT, - MT25QL_ERR_CTRL_NOT_DISABLED = QSPI_IP6514E_ERR_CONTROLLER_NOT_DISABLED, - MT25QL_ERR_READ_IN_PROGRESS = QSPI_IP6514E_ERR_READ_IN_PROGRESS, - MT25QL_ERR_WRITE_IN_PROGRESS = QSPI_IP6514E_ERR_WRITE_IN_PROGRESS, - MT25QL_ERR_ADDR_NOT_ALIGNED, - MT25QL_ERR_ADDR_TOO_BIG, -}; - -enum mt25ql_erase_t { - MT25QL_ERASE_ALL_FLASH = 0U, /*!< Erase all flash */ - MT25QL_ERASE_SUBSECTOR_4K = SUBSECTOR_4KB, /*!< Erase a 4 KB subsector */ - MT25QL_ERASE_SUBSECTOR_32K = SUBSECTOR_32KB, /*!< Erase a 32 KB subsector */ - MT25QL_ERASE_SECTOR_64K = SECTOR_64KB, /*!< Erase a sector (64 KB) */ -}; - -enum mt25ql_functional_state_t { - MT25QL_FUNC_STATE_DEFAULT = 0U, - /*!< The QSPI Flash controller and memory is in default state, - * in the same state as after reset. - */ - MT25QL_FUNC_STATE_FAST = 1U, - /*!< The QSPI Flash controller and memory is configured to operate in - * single SPI mode and fast Flash commands could be used for read and - * program operations. - */ - MT25QL_FUNC_STATE_QUAD_FAST = 2U, - /*!< The QSPI Flash controller and memory is configured to operate in - * Quad SPI mode and fast Flash commands could be used for read and - * program operations. - */ -}; - -struct mt25ql_dev_t { - struct qspi_ip6514e_dev_t *controller; - /*!< QSPI Flash controller. */ - uint32_t direct_access_start_addr; - /*!< AHB address to directly access the contents of the Flash memory - * through the QSPI Controller. - */ - uint32_t baud_rate_div; - /*!< Clock divisor that will be used to configure the QSPI Flash - * Controller to access the Flash memory. The clock which frequency is - * divived is the one linked to the QSPI Flash controller. It can only - * be an even number between 2 and 32 (both included). It needs to be - * high enough to support the Quad Output Fast Read command with 8 - * dummy cycles and the Quad Input Fast Program with 0 dummy cycles. - */ - uint32_t size; /*!< Total size of the MT25QL Flash memory */ - enum mt25ql_functional_state_t func_state; - /*!< Functional state (operational parameter settings) of the - * QSPI Flash controller and memory. - */ -}; - -/** - * \brief Change configuration of the QSPI Flash controller and MT25QL memory - * - * Changes the configuration of the QSPI Flash controller and MT25QL - * Flash memory to operate in the specified SPI mode and to use the - * appropriate Flash commands for read and program operations. - * It also sets: - * + The number of dummy cycles for each operation - * + The bytes per page constant to 256 (MT25QL Flash specific) - * + The number of address bytes to 3 - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] config Operational configuration to be set on flash controller - * and device \ref mt25ql_functional_state_t - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function assumes that the Flash memory device and the QSPI Flash - * controller operates with the same SPI protocol. This function will fail - * if the Flash device is in a different configuration. - */ -enum mt25ql_error_t mt25ql_config_mode(struct mt25ql_dev_t* dev, - enum mt25ql_functional_state_t config); - -/** - * \brief Restore the QSPI Flash controller and MT25QL to default state. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function assumes that the Flash memory device and the QSPI Flash - * controller operates with the same SPI protocol. This function will fail - * if the Flash device is in a different configuration. - */ -enum mt25ql_error_t mt25ql_restore_default_state(struct mt25ql_dev_t* dev); - -/** - * \brief Read bytes from the flash memory (direct access) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Flash memory address for the read operation - * \param[out] data Pointer where len bytes read from the flash memory will be - * written to - * \param[in] len Number of bytes to read - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will use direct access to read from the Flash memory. It - * can be used to access above the direct accessible memory zone if - * not all the AHB address wires are connected. - * \note The address given should be the address of the data inside the flash - * memory. To read the first byte inside the memory, use 0x00000000. - */ -enum mt25ql_error_t mt25ql_direct_read(struct mt25ql_dev_t* dev, - uint32_t addr, - void *data, - uint32_t len); - -/** - * \brief Write bytes in the flash memory, at a location where data has already - * been erased (direct access) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Flash memory address for the write operation - * \param[in] data Pointer to the len bytes that will be written to the flash - * memory - * \param[in] len Number of bytes to write - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will use direct access to write to the Flash memory. It - * can be used to access outside of the direct accessible memory zone if - * not all the AHB address wires are connected. - * \note The address given should be the address of the data inside the flash - * memory. To write the first byte inside the memory, use 0x00000000. - * \note Writing bytes in the flash memory clear them from 1 to 0, for that - * matter the location where data is written needs to be erased - * beforehand. - */ -enum mt25ql_error_t mt25ql_direct_write(struct mt25ql_dev_t* dev, - uint32_t addr, - const void *data, - uint32_t len); - -/** - * \brief Read bytes from the flash memory (using Flash commands) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Flash memory address for the read operation - * \param[out] data Pointer where len bytes read from the flash memory will be - * written to - * \param[in] len Number of bytes to read - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will use the Software Triggered Instruction Generator to - * read from the Flash memory using Flash commands. - * \note The address given should be the address of the data inside the flash - * memory. To read the first byte inside the memory, use 0x00000000. - */ -enum mt25ql_error_t mt25ql_command_read(struct mt25ql_dev_t* dev, - uint32_t addr, - void *data, - uint32_t len); - -/** - * \brief Write bytes in the flash memory, at a location where data has already - * been erased (using Flash commands) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Flash memory address for the write operation - * \param[in] data Pointer to the len bytes that will be written to the flash - * memory - * \param[in] len Number of bytes to write - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will use the Software Triggered Instruction Generator to - * write to the Flash memory using Flash commands. - * \note The address given should be the address of the data inside the flash - * memory. To write the first byte inside the memory, use 0x00000000. - * \note Writing bytes in the flash memory clear them from 1 to 0, for that - * matter the location where data is written needs to be erased - * beforehand. - */ -enum mt25ql_error_t mt25ql_command_write(struct mt25ql_dev_t* dev, - uint32_t addr, - const void *data, - uint32_t len); - -/** - * \brief Erase all flash memory, a sector (64 KiB) or a subsector - * (32 KiB or 4 KiB) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Address where to erase in the flash memory - * \param[in] erase_type Type of what to erase at the specified address: - * * whole flash memory - * * a subsector (4 KiB or 32 KiB) - * * a sector (64 KiB) - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note The address need to be aligned with the size of what is erased or 0 if - * all flash memory is to be erased. - */ -enum mt25ql_error_t mt25ql_erase(struct mt25ql_dev_t* dev, - uint32_t addr, - enum mt25ql_erase_t erase_type); - -#ifdef __cplusplus -} -#endif - -#endif /* __MT25QL_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_ARMC6/musca_s.sct b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_ARMC6/musca_s.sct deleted file mode 100644 index 245773f38f1..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_ARMC6/musca_s.sct +++ /dev/null @@ -1,153 +0,0 @@ -#! armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -xc - -/* - * Copyright (c) 2018-2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "../../../partition/region_defs.h" - -#if !defined(TFM_LVL) - #define TFM_LVL 1 -#endif - -#if !defined(MBED_ROM_START) - #define MBED_ROM_START S_CODE_START // 0x10020400 -#endif - -#if !defined(MBED_ROM_SIZE) - #define MBED_ROM_SIZE IMAGE_CODE_SIZE // 0x7f800 -#endif - -#if !defined(MBED_RAM_START) - #define MBED_RAM_START S_DATA_START // 0x30000000 -#endif - -#if !defined(MBED_RAM_SIZE) - #define MBED_RAM_SIZE S_DATA_SIZE // 0x11000 -#endif - -LR_CODE MBED_ROM_START MBED_ROM_SIZE { - - /**** This initial section contains common code for TEE */ - ER_TFM_CODE MBED_ROM_START S_CODE_SIZE { - *.o (RESET +First) - .ANY (+RO) - } - -#if TFM_LVL == 1 - - /* Shared area between BL2 and runtime to exchange data */ - TFM_SHARED_DATA MBED_RAM_START ALIGN 32 OVERLAY EMPTY BOOT_TFM_SHARED_DATA_SIZE { - } - - /* MSP */ - ARM_LIB_STACK_MSP MBED_RAM_START ALIGN 32 OVERLAY EMPTY S_MSP_STACK_SIZE { - } - - /* PSP */ - ARM_LIB_STACK +0 ALIGN 32 EMPTY S_PSP_STACK_SIZE { - } - - ARM_LIB_HEAP +0 ALIGN 8 EMPTY S_HEAP_SIZE { - } - - ER_TFM_DATA +0 { - .ANY (+RW +ZI) - } - - TFM_SECURE_STACK +0 ALIGN 128 EMPTY 0x1000 { - } - - TFM_UNPRIV_SCRATCH +0 ALIGN 32 EMPTY 0x400 { - } - -#else /* TFM_LVL == 1 */ - - /**** Unprivileged Secure code start here */ - TFM_UNPRIV_CODE +0 ALIGN 32 { - tfm_spm_services.o (+RO) - platform_retarget_dev.o (+RO) - *(SFN) - *armlib* - } - - TFM_SP_PLATFORM +0 ALIGN 32 { - *tfm_platform* (+RO) - *(TFM_SP_PLATFORM_ATTR_FN) - } - - /* Shared area between BL2 and runtime to exchange data */ - TFM_SHARED_DATA MBED_RAM_START ALIGN 32 OVERLAY EMPTY BOOT_TFM_SHARED_DATA_SIZE { - } - - /* MSP */ - ARM_LIB_STACK_MSP MBED_RAM_START ALIGN 32 OVERLAY EMPTY S_MSP_STACK_SIZE { - } - - /* PSP */ - ARM_LIB_STACK +0 ALIGN 32 EMPTY S_PSP_STACK_SIZE { - } - - ARM_LIB_HEAP +0 ALIGN 8 EMPTY S_HEAP_SIZE { - } - - ER_TFM_DATA +0 { - .ANY (+RW +ZI) - } - - TFM_UNPRIV_RO_DATA +0 ALIGN 32 { - tfm_spm_services.o (+RW +ZI) - platform_retarget_dev.o (+RW +ZI) - } - - TFM_UNPRIV_SCRATCH +0 ALIGN 32 EMPTY 0x400 { - } - - TFM_SP_PLATFORM_DATA +0 ALIGN 32 { - *tfm_platform* (+RW +ZI) - } - - TFM_SP_PLATFORM_STACK +0 ALIGN 128 EMPTY 0x0400 { - } - -#endif /* TFM_LVL == 1 */ - - /* This empty, zero long execution region is here to mark the limit address - * of the last execution region that is allocated in SRAM. - */ - SRAM_WATERMARK +0 EMPTY 0x0 { - } - - ER_CODE_CMSE_VENEER CMSE_VENEER_REGION_START FIXED PADVALUE 0xFFFFFFFF CMSE_VENEER_REGION_SIZE { - *(Veneer$$CMSE) - } - - /* Make sure that the sections allocated in the SRAM does not exceed the - * size of the SRAM available. - */ - ScatterAssert(ImageLimit(SRAM_WATERMARK) <= MBED_RAM_START + MBED_RAM_SIZE) -} - - -LR_NS_PARTITION NS_PARTITION_START { - /* Reserved place for NS application. - * No code will be placed here, just address of this region is used in the - * secure code to configure certain HW components. - */ - ER_NS_PARTITION NS_PARTITION_START EMPTY NS_PARTITION_SIZE { - } -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_s.S b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_s.S deleted file mode 100644 index a5803aa9968..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_s.S +++ /dev/null @@ -1,254 +0,0 @@ -;/* -; * Copyright (c) 2017-2019 ARM Limited -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the "License"); -; * you may not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * http://www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an "AS IS" BASIS, -; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ -; -; This file is derivative of CMSIS V5.01 startup_ARMv8MML.s -; Git SHA: 8a1d9d6ee18b143ae5befefa14d89fb5b3f99c75 - -;/* -;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -;*/ - - -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - - IMPORT |Image$$ARM_LIB_STACK_MSP$$ZI$$Limit| - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors ;Core Interrupts - DCD |Image$$ARM_LIB_STACK_MSP$$ZI$$Limit| ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD SecureFault_Handler ; Secure Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - ;SSE-200 Interrupts - DCD NS_WATCHDOG_RESET_IRQHandler ; 0: Non-Secure Watchdog Reset Request Interrupt - DCD NS_WATCHDOG_IRQHandler ; 1: Non-Secure Watchdog Interrupt - DCD S32K_TIMER_IRQHandler ; 2: S32K Timer Interrupt - DCD TIMER0_IRQHandler ; 3: CMSDK Timer 0 Interrupt - DCD TIMER1_IRQHandler ; 4: CMSDK Timer 1 Interrupt - DCD DUALTIMER_IRQHandler ; 5: CMSDK Dual Timer Interrupt - DCD MHU0_IRQHandler ; 6: Message Handling Unit 0 Interrupt - DCD MHU1_IRQHandler ; 7: Message Handling Unit 1 Interrupt - DCD CRYPTOCELL_IRQHandler ; 8: CryptoCell-312 Interrupt - DCD MPC_Handler ; 9: Secure Combined MPC Interrupt - DCD PPC_Handler ; 10: Secure Combined PPC Interrupt - DCD S_MSC_COMBINED_IRQHandler ; 11: Secure Combined MSC Interrupt - DCD S_BRIDGE_ERR_IRQHandler ; 12: Secure Bridge Error Combined Interrupt - DCD I_CACHE_INV_ERR_IRQHandler ; 13: Intsruction Cache Invalidation Interrupt - DCD 0 ; 14: Reserved - DCD SYS_PPU_IRQHandler ; 15: System PPU Interrupt - DCD CPU0_PPU_IRQHandler ; 16: CPU0 PPU Interrupt - DCD CPU1_PPU_IRQHandler ; 17: CPU1 PPU Interrupt - DCD CPU0_DGB_PPU_IRQHandler ; 18: CPU0 Debug PPU Interrupt - DCD CPU1_DGB_PPU_IRQHandler ; 19: CPU1 Debug PPU Interrupt - DCD CRYPTOCELL_PPU_IRQHandler ; 20: CryptoCell PPU Interrupt - DCD 0 ; 21: Reserved - DCD RAM0_PPU_IRQHandler ; 22: RAM 0 PPU Interrupt - DCD RAM1_PPU_IRQHandler ; 23: RAM 1 PPU Interrupt - DCD RAM2_PPU_IRQHandler ; 24: RAM 2 PPU Interrupt - DCD RAM3_PPU_IRQHandler ; 25: RAM 3 PPU Interrupt - DCD DEBUG_PPU_IRQHandler ; 26: Debug PPU Interrupt - DCD 0 ; 27: Reserved - DCD CPU0_CTI_IRQHandler ; 28: CPU0 CTI Interrupt - DCD CPU1_CTI_IRQHandler ; 29: CPU1 CTI Interrupt - DCD 0 ; 30: Reserved - DCD 0 ; 31: Reserved - ;Expansion Interrupts - DCD 0 ; 32: Reserved - DCD GpTimer_IRQHandler ; 33: General Purpose Timer - DCD I2C0_IRQHandler ; 34: I2C0 - DCD I2C1_IRQHandler ; 35: I2C1 - DCD I2S_IRQHandler ; 36: I2S - DCD SPI_IRQHandler ; 37: SPI - DCD QSPI_IRQHandler ; 38: QSPI - DCD UARTRX0_Handler ; 39: UART0 receive FIFO interrupt - DCD UARTTX0_Handler ; 40: UART0 transmit FIFO interrupt - DCD UART0_RxTimeout_IRQHandler ; 41: UART0 receive timeout interrupt - DCD UART0_ModemStatus_IRQHandler ; 42: UART0 modem status interrupt - DCD UART0_Error_IRQHandler ; 43: UART0 error interrupt - DCD UART0_IRQHandler ; 44: UART0 interrupt - DCD UARTRX1_Handler ; 45: UART0 receive FIFO interrupt - DCD UARTTX1_Handler ; 46: UART0 transmit FIFO interrupt - DCD UART1_RxTimeout_IRQHandler ; 47: UART0 receive timeout interrupt - DCD UART1_ModemStatus_IRQHandler ; 48: UART0 modem status interrupt - DCD UART1_Error_IRQHandler ; 49: UART0 error interrupt - DCD UART1_IRQHandler ; 50: UART0 interrupt - DCD GPIO_0_IRQHandler ; 51: GPIO 0 interrupt - DCD GPIO_1_IRQHandler ; 52: GPIO 1 interrupt - DCD GPIO_2_IRQHandler ; 53: GPIO 2 interrupt - DCD GPIO_3_IRQHandler ; 54: GPIO 3 interrupt - DCD GPIO_4_IRQHandler ; 55: GPIO 4 interrupt - DCD GPIO_5_IRQHandler ; 56: GPIO 5 interrupt - DCD GPIO_6_IRQHandler ; 57: GPIO 6 interrupt - DCD GPIO_7_IRQHandler ; 58: GPIO 7 interrupt - DCD GPIO_8_IRQHandler ; 59: GPIO 8 interrupt - DCD GPIO_9_IRQHandler ; 60: GPIO 9 interrupt - DCD GPIO_10_IRQHandler ; 61: GPIO 10 interrupt - DCD GPIO_11_IRQHandler ; 62: GPIO 11 interrupt - DCD GPIO_12_IRQHandler ; 63: GPIO 12 interrupt - DCD GPIO_13_IRQHandler ; 64: GPIO 13 interrupt - DCD GPIO_14_IRQHandler ; 65: GPIO 14 interrupt - DCD GPIO_15_IRQHandler ; 66: GPIO 15 interrupt - DCD Combined_IRQHandler ; 67: Combined interrupt - DCD PVT_IRQHandler ; 68: PVT sensor interrupt - DCD 0 ; 69: Reserved - DCD PWM_0_IRQHandler ; 70: PWM0 interrupt - DCD RTC_IRQHandler ; 71: RTC interrupt - DCD GpTimer0_IRQHandler ; 72: General Purpose Timer0 - DCD GpTimer1_IRQHandler ; 73: General Purpose Timer1 - DCD PWM_1_IRQHandler ; 74: PWM1 interrupt - DCD PWM_2_IRQHandler ; 75: PWM2 interrupt - DCD IOMUX_IRQHandler ; 76: IOMUX interrupt - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - -; Reset Handler - AREA |.text|, CODE, READONLY -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT SystemInit - IMPORT __main - CPSID i ; Disable IRQs - LDR R0, =SystemInit - BLX R0 - MRS R0, control ; Get control value - ORR R0, R0, #2 ; Select switch to PSP - MSR control, R0 - LDR R0, =__main - BX R0 - ENDP -End_Of_Main - B . - - -; Dummy Exception Handlers (infinite loops which can be modified) - MACRO - Default_Handler $handler_name -$handler_name PROC - EXPORT $handler_name [WEAK] - B . - ENDP - MEND - - Default_Handler NMI_Handler - Default_Handler HardFault_Handler - Default_Handler MemManage_Handler - Default_Handler BusFault_Handler - Default_Handler UsageFault_Handler - Default_Handler SecureFault_Handler - Default_Handler SVC_Handler - Default_Handler DebugMon_Handler - Default_Handler PendSV_Handler - Default_Handler SysTick_Handler - - Default_Handler NS_WATCHDOG_RESET_IRQHandler - Default_Handler NS_WATCHDOG_IRQHandler - Default_Handler S32K_TIMER_IRQHandler - Default_Handler TIMER0_IRQHandler - Default_Handler TIMER1_IRQHandler - Default_Handler DUALTIMER_IRQHandler - Default_Handler MHU0_IRQHandler - Default_Handler MHU1_IRQHandler - Default_Handler CRYPTOCELL_IRQHandler - Default_Handler MPC_Handler - Default_Handler PPC_Handler - Default_Handler S_MSC_COMBINED_IRQHandler - Default_Handler S_BRIDGE_ERR_IRQHandler - Default_Handler I_CACHE_INV_ERR_IRQHandler - Default_Handler SYS_PPU_IRQHandler - Default_Handler CPU0_PPU_IRQHandler - Default_Handler CPU1_PPU_IRQHandler - Default_Handler CPU0_DGB_PPU_IRQHandler - Default_Handler CPU1_DGB_PPU_IRQHandler - Default_Handler CRYPTOCELL_PPU_IRQHandler - Default_Handler RAM0_PPU_IRQHandler - Default_Handler RAM1_PPU_IRQHandler - Default_Handler RAM2_PPU_IRQHandler - Default_Handler RAM3_PPU_IRQHandler - Default_Handler DEBUG_PPU_IRQHandler - Default_Handler CPU0_CTI_IRQHandler - Default_Handler CPU1_CTI_IRQHandler - - Default_Handler GpTimer_IRQHandler - Default_Handler I2C0_IRQHandler - Default_Handler I2C1_IRQHandler - Default_Handler I2S_IRQHandler - Default_Handler SPI_IRQHandler - Default_Handler QSPI_IRQHandler - Default_Handler UARTRX0_Handler - Default_Handler UARTTX0_Handler - Default_Handler UART0_RxTimeout_IRQHandler - Default_Handler UART0_ModemStatus_IRQHandler - Default_Handler UART0_Error_IRQHandler - Default_Handler UART0_IRQHandler - Default_Handler UARTRX1_Handler - Default_Handler UARTTX1_Handler - Default_Handler UART1_RxTimeout_IRQHandler - Default_Handler UART1_ModemStatus_IRQHandler - Default_Handler UART1_Error_IRQHandler - Default_Handler UART1_IRQHandler - Default_Handler GPIO_0_IRQHandler - Default_Handler GPIO_1_IRQHandler - Default_Handler GPIO_2_IRQHandler - Default_Handler GPIO_3_IRQHandler - Default_Handler GPIO_4_IRQHandler - Default_Handler GPIO_5_IRQHandler - Default_Handler GPIO_6_IRQHandler - Default_Handler GPIO_7_IRQHandler - Default_Handler GPIO_8_IRQHandler - Default_Handler GPIO_9_IRQHandler - Default_Handler GPIO_10_IRQHandler - Default_Handler GPIO_11_IRQHandler - Default_Handler GPIO_12_IRQHandler - Default_Handler GPIO_13_IRQHandler - Default_Handler GPIO_14_IRQHandler - Default_Handler GPIO_15_IRQHandler - Default_Handler Combined_IRQHandler - Default_Handler PVT_IRQHandler - Default_Handler PWM_0_IRQHandler - Default_Handler RTC_IRQHandler - Default_Handler GpTimer0_IRQHandler - Default_Handler GpTimer1_IRQHandler - Default_Handler PWM_1_IRQHandler - Default_Handler PWM_2_IRQHandler - Default_Handler IOMUX_IRQHandler - - ALIGN - - END diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_GCC_ARM/musca_s.ld b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_GCC_ARM/musca_s.ld deleted file mode 100644 index 30cc8ecab1c..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_GCC_ARM/musca_s.ld +++ /dev/null @@ -1,366 +0,0 @@ -;/* -; * Copyright (c) 2018-2019 ARM Limited -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the "License"); -; * you may not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * http://www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an "AS IS" BASIS, -; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; * -; * -; * This file is derivative of CMSIS V5.00 gcc_arm.ld -; */ - -/*********** WARNING: This is an auto-generated file. Do not edit! ***********/ - -/* Linker script to configure memory regions. */ -/* This file will be run trough the pre-processor. */ - -#include "../../../partition/region_defs.h" - -#if !defined(TFM_LVL) - #define TFM_LVL 1 -#endif - -MEMORY -{ - FLASH (rx) : ORIGIN = S_CODE_START, LENGTH = S_CODE_SIZE - RAM (rwx) : ORIGIN = S_DATA_START, LENGTH = S_DATA_SIZE - VENEERS (rx) : ORIGIN = CMSE_VENEER_REGION_START, LENGTH = CMSE_VENEER_REGION_SIZE -} - -HEAP_SIZE = S_HEAP_SIZE; -__heap_size__ = S_HEAP_SIZE; -__psp_stack_size__ = S_PSP_STACK_SIZE; -__msp_init_stack_size__ = S_MSP_STACK_SIZE; - -/* Library configurations */ -GROUP(libgcc.a libc.a libm.a libnosys.a libc_nano.a) - -ENTRY(Reset_Handler) - -SECTIONS -{ - .TFM_VECTORS : ALIGN(4) - { - __vectors_start__ = .; - KEEP(*(.vectors)) - *startup*(.text*) - . = ALIGN(4); - __vectors_end__ = .; - } > FLASH - -#if TFM_LVL == 1 - .copy.table : ALIGN(4) - { - __copy_table_start__ = .; - LONG (LOADADDR(.TFM_DATA)) - LONG (ADDR(.TFM_DATA)) - LONG (SIZEOF(.TFM_DATA)) - __copy_table_end__ = .; - } > FLASH - - .zero.table : ALIGN(4) - { - __zero_table_start__ = .; - LONG (ADDR(.TFM_BSS)) - LONG (SIZEOF(.TFM_BSS)) - LONG (ADDR(.TFM_SECURE_STACK)) - LONG (SIZEOF(.TFM_SECURE_STACK)) - LONG (ADDR(.TFM_UNPRIV_SCRATCH)) - LONG (SIZEOF(.TFM_UNPRIV_SCRATCH)) - __zero_table_end__ = .; - } > FLASH - -#else /* TFM_LVL == 1 */ - .copy.table : ALIGN(4) - { - __copy_table_start__ = .; - LONG (LOADADDR(.TFM_DATA)) - LONG (ADDR(.TFM_DATA)) - LONG (SIZEOF(.TFM_DATA)) - LONG (LOADADDR(.TFM_UNPRIV_RO_DATA)) - LONG (ADDR(.TFM_UNPRIV_RO_DATA)) - LONG (SIZEOF(.TFM_UNPRIV_RO_DATA)) - LONG (LOADADDR(.TFM_SP_PLATFORM_DATA)) - LONG (ADDR(.TFM_SP_PLATFORM_DATA)) - LONG (SIZEOF(.TFM_SP_PLATFORM_DATA)) - __copy_table_end__ = .; - } > FLASH - - .zero.table : ALIGN(4) - { - __zero_table_start__ = .; - LONG (ADDR(.TFM_BSS)) - LONG (SIZEOF(.TFM_BSS)) - LONG (ADDR(.TFM_UNPRIV_RO_BSS)) - LONG (SIZEOF(.TFM_UNPRIV_RO_BSS)) - LONG (ADDR(.TFM_SP_PLATFORM_BSS)) - LONG (SIZEOF(.TFM_SP_PLATFORM_BSS)) - LONG (ADDR(.TFM_SP_PLATFORM_STACK)) - LONG (SIZEOF(.TFM_SP_PLATFORM_STACK)) - LONG (ADDR(.TFM_UNPRIV_SCRATCH)) - LONG (SIZEOF(.TFM_UNPRIV_SCRATCH)) - __zero_table_end__ = .; - } > FLASH - - .TFM_UNPRIV_CODE : ALIGN(32) - { - *libc_nano*:*(.text*) - *libc_nano*:*(.rodata*) - *tfm_spm_services.o(.text*) - *tfm_spm_services.o(.rodata*) - *platform_retarget_dev.o(.text*) - *platform_retarget_dev.o(.rodata*) - *(SFN) - *libgcc*:*(.text*) - *libgcc*:*(.rodata*) - . = ALIGN(32); - } > FLASH - Image$$TFM_UNPRIV_CODE$$RO$$Base = ADDR(.TFM_UNPRIV_CODE); - Image$$TFM_UNPRIV_CODE$$RO$$Limit = ADDR(.TFM_UNPRIV_CODE) + SIZEOF(.TFM_UNPRIV_CODE); - - .TFM_SP_PLATFORM : ALIGN(32) - { - *tfm_platform*:*(.text*) - *tfm_platform*:*(.rodata*) - *(TFM_SP_PLATFORM_ATTR_FN) - . = ALIGN(32); - } > FLASH - Image$$TFM_SP_PLATFORM$$RO$$Base = ADDR(.TFM_SP_PLATFORM); - Image$$TFM_SP_PLATFORM$$RO$$Limit = ADDR(.TFM_SP_PLATFORM) + SIZEOF(.TFM_SP_PLATFORM); - Image$$TFM_SP_PLATFORM$$Base = ADDR(.TFM_SP_PLATFORM); - Image$$TFM_SP_PLATFORM$$Limit = ADDR(.TFM_SP_PLATFORM) + SIZEOF(.TFM_SP_PLATFORM); - - - .ARM.extab : - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - -#endif /* TFM_LVL == 1 */ - - .ER_TFM_CODE : - { - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - OVERLAY S_DATA_START : - { - /* shared_data and msp_stack are overlapping on purpose when - * msp_stack is extended until the beginning of RAM, when shared_date - * was read out by partitions - */ - .tfm_bl2_shared_data - { - . = ALIGN(32); - . += BOOT_TFM_SHARED_DATA_SIZE; - } - - .msp_stack - { - . = ALIGN(32); - . += S_MSP_STACK_SIZE; - } - } > RAM - - Image$$ARM_LIB_STACK_MSP$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack); - - .psp_stack : - { - . = ALIGN(32); - . += S_PSP_STACK_SIZE; - } > RAM - Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.psp_stack); - Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.psp_stack) + SIZEOF(.psp_stack); - -#if TFM_LVL == 1 - - .heap : - { - . = ALIGN(8); - __end__ = .; - PROVIDE(end = .); - __HeapBase = .; - . += S_HEAP_SIZE; - __HeapLimit = .; - __heap_limit = .; /* Add for _sbrk */ - } > RAM - Image$$ARM_LIB_HEAP$$ZI$$Base = ADDR(.heap); - Image$$ARM_LIB_HEAP$$ZI$$Limit = ADDR(.heap) + SIZEOF(.heap); - - .TFM_SECURE_STACK : - { - . = ALIGN(128); - . += 0x1000; - } > RAM - Image$$TFM_SECURE_STACK$$ZI$$Base = ADDR(.TFM_SECURE_STACK); - Image$$TFM_SECURE_STACK$$ZI$$Limit = ADDR(.TFM_SECURE_STACK) + SIZEOF(.TFM_SECURE_STACK); - - .TFM_UNPRIV_SCRATCH : - { - . = ALIGN(32); - . += 0x400; - } > RAM - Image$$TFM_UNPRIV_SCRATCH$$ZI$$Base = ADDR(.TFM_UNPRIV_SCRATCH); - Image$$TFM_UNPRIV_SCRATCH$$ZI$$Limit = ADDR(.TFM_UNPRIV_SCRATCH) + SIZEOF(.TFM_UNPRIV_SCRATCH); -#else /* TFM_LVL == 1 */ - .TFM_UNPRIV_RO_DATA : - { - */tfm_spm_services.o(.data*) - */platform_retarget_dev.o(.data*) - . = ALIGN(32); - } > RAM AT> FLASH - Image$$TFM_UNPRIV_RO_DATA$$RW$$Base = ADDR(.TFM_UNPRIV_RO_DATA); - Image$$TFM_UNPRIV_RO_DATA$$RW$$Limit = ADDR(.TFM_UNPRIV_RO_DATA) + SIZEOF(.TFM_UNPRIV_RO_DATA); - - .TFM_UNPRIV_RO_BSS : ALIGN(32) - { - */tfm_spm_services.o(.bss*) - */platform_retarget_dev.o(.bss*) - */tfm_spm_services.o(COMMON) - */platform_retarget_dev.o(COMMON) - . = ALIGN(32); - } > RAM AT> FLASH - Image$$TFM_UNPRIV_RO_DATA$$ZI$$Base = ADDR(.TFM_UNPRIV_RO_BSS); - Image$$TFM_UNPRIV_RO_DATA$$ZI$$Limit = ADDR(.TFM_UNPRIV_RO_BSS) + SIZEOF(.TFM_UNPRIV_RO_BSS); - - .TFM_UNPRIV_SCRATCH : ALIGN(32) - { - . += 0x400; - } > RAM AT> FLASH - Image$$TFM_UNPRIV_SCRATCH$$ZI$$Base = ADDR(.TFM_UNPRIV_SCRATCH); - Image$$TFM_UNPRIV_SCRATCH$$ZI$$Limit = ADDR(.TFM_UNPRIV_SCRATCH) + SIZEOF(.TFM_UNPRIV_SCRATCH); - - .TFM_SP_PLATFORM_DATA : ALIGN(32) - { - *tfm_platform*:*(.data*) - . = ALIGN(32); - } > RAM AT> FLASH - Image$$TFM_SP_PLATFORM_DATA$$RW$$Base = ADDR(.TFM_SP_PLATFORM_DATA); - Image$$TFM_SP_PLATFORM_DATA$$RW$$Limit = ADDR(.TFM_SP_PLATFORM_DATA) + SIZEOF(.TFM_SP_PLATFORM_DATA); - - .TFM_SP_PLATFORM_BSS : ALIGN(32) - { - *tfm_platform*:*(.bss*) - *tfm_platform*:*(COMMON) - . = ALIGN(32); - } > RAM AT> FLASH - Image$$TFM_SP_PLATFORM_DATA$$ZI$$Base = ADDR(.TFM_SP_PLATFORM_BSS); - Image$$TFM_SP_PLATFORM_DATA$$ZI$$Limit = ADDR(.TFM_SP_PLATFORM_BSS) + SIZEOF(.TFM_SP_PLATFORM_BSS); - - .TFM_SP_PLATFORM_STACK : ALIGN(128) - { - . += 0x0400; - } > RAM AT> FLASH - Image$$TFM_SP_PLATFORM_STACK$$ZI$$Base = ADDR(.TFM_SP_PLATFORM_STACK); - Image$$TFM_SP_PLATFORM_STACK$$ZI$$Limit = ADDR(.TFM_SP_PLATFORM_STACK) + SIZEOF(.TFM_SP_PLATFORM_STACK); - -#endif /* TFM_LVL == 1 */ - - .TFM_DATA : - { - *(.data*) - - . = ALIGN(4); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(4); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(4); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(4); - - } > RAM AT> FLASH - Image$$ER_TFM_DATA$$RW$$Base = ADDR(.TFM_DATA); - Image$$ER_TFM_DATA$$RW$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA); - - .TFM_BSS : - { - . = ALIGN(4); - __bss_start__ = .; - *(.bss*) - *(COMMON) - . = ALIGN(4); - __bss_end__ = .; - } > RAM - Image$$ER_TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); - Image$$ER_TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); - - Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); - Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); - - ASSERT(Image$$ER_TFM_DATA$$Limit <= S_DATA_START + S_DATA_SIZE, "Exceeding secure RAM") - - /* - * Place the CMSE Veneers (containing the SG instruction) after the code, in a - * separate 32 bytes aligned region so that the SAU can programmed to just set - * this region as Non-Secure Callable. - */ - .gnu.sgstubs : ALIGN(32) - { - *(.gnu.sgstubs*) - . = ALIGN(32); - } > VENEERS AT> VENEERS - Image$$ER_CODE_CMSE_VENEER$$Base = ADDR(.gnu.sgstubs); - Image$$ER_CODE_CMSE_VENEER$$Limit = ADDR(.gnu.sgstubs) + SIZEOF(.gnu.sgstubs); - - Load$$LR$$LR_NS_PARTITION$$Base = NS_PARTITION_START; - - Load$$LR$$LR_SECONDARY_PARTITION$$Base = SECONDARY_PARTITION_START; - - PROVIDE(__stack = Image$$ARM_LIB_STACK$$ZI$$Limit); - PROVIDE(__StackTop = __stack); - PROVIDE(__StackLimit = __StackTop - SIZEOF(.psp_stack)); -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_s.S b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_s.S deleted file mode 100644 index 0c12d4591b1..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_s.S +++ /dev/null @@ -1,365 +0,0 @@ -;/* -; * Copyright (c) 2009-2019 ARM Limited -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the "License"); -; * you may not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * http://www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an "AS IS" BASIS, -; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; * -; * -; * This file is derivative of CMSIS V5.00 startup_ARMCM33.S -; */ - - .syntax unified - .arch armv8-m.main - - .section .vectors - .align 2 - .globl __Vectors -__Vectors: - .long Image$$ARM_LIB_STACK_MSP$$ZI$$Limit /* Top of Stack */ - .long Reset_Handler /* Reset Handler */ - .long NMI_Handler /* NMI Handler */ - .long HardFault_Handler /* Hard Fault Handler */ - .long MemManage_Handler /* MPU Fault Handler */ - .long BusFault_Handler /* Bus Fault Handler */ - .long UsageFault_Handler /* Usage Fault Handler */ - .long SecureFault_Handler /* Secure Fault Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long SVC_Handler /* SVCall Handler */ - .long DebugMon_Handler /* Debug Monitor Handler */ - .long 0 /* Reserved */ - .long PendSV_Handler /* PendSV Handler */ - .long SysTick_Handler /* SysTick Handler */ - - /* Core interrupts */ - .long NS_WATCHDOG_RESET_IRQHandler /* 0: Non-Secure Watchdog Reset Request Interrupt */ - .long NS_WATCHDOG_IRQHandler /* 1: Non-Secure Watchdog Interrupt */ - .long S32K_TIMER_IRQHandler /* 2: S32K Timer Interrupt */ - .long TIMER0_IRQHandler /* 3: CMSDK Timer 0 Interrupt */ - .long TIMER1_IRQHandler /* 4: CMSDK Timer 1 Interrupt */ - .long DUALTIMER_IRQHandler /* 5: CMSDK Dual Timer Interrupt */ - .long MHU0_IRQHandler /* 6: Message Handling Unit 0 Interrupt */ - .long MHU1_IRQHandler /* 7: Message Handling Unit 1 Interrupt */ - .long CRYPTOCELL_IRQHandler /* 8: CryptoCell-312 Interrupt */ - .long MPC_Handler /* 9: Secure Combined MPC Interrupt */ - .long PPC_Handler /* 10: Secure Combined PPC Interrupt */ - .long S_MSC_COMBINED_IRQHandler /* 11: Secure Combined MSC Interrupt */ - .long S_BRIDGE_ERR_IRQHandler /* 12: Secure Bridge Error Combined Interrupt */ - .long I_CACHE_INV_ERR_IRQHandler /* 13: Intsruction Cache Invalidation Interrupt */ - .long 0 /* 14: Reserved */ - .long SYS_PPU_IRQHandler /* 15: System PPU Interrupt */ - .long CPU0_PPU_IRQHandler /* 16: CPU0 PPU Interrupt */ - .long CPU1_PPU_IRQHandler /* 17: CPU1 PPU Interrupt */ - .long CPU0_DGB_PPU_IRQHandler /* 18: CPU0 Debug PPU Interrupt */ - .long CPU1_DGB_PPU_IRQHandler /* 19: CPU1 Debug PPU Interrupt */ - .long CRYPTOCELL_PPU_IRQHandler /* 20: CryptoCell PPU Interrupt */ - .long 0 /* 21: Reserved */ - .long RAM0_PPU_IRQHandler /* 22: RAM 0 PPU Interrupt */ - .long RAM1_PPU_IRQHandler /* 23: RAM 1 PPU Interrupt */ - .long RAM2_PPU_IRQHandler /* 24: RAM 2 PPU Interrupt */ - .long RAM3_PPU_IRQHandler /* 25: RAM 3 PPU Interrupt */ - .long DEBUG_PPU_IRQHandler /* 26: Debug PPU Interrupt */ - .long 0 /* 27: Reserved */ - .long CPU0_CTI_IRQHandler /* 28: CPU0 CTI Interrupt */ - .long CPU1_CTI_IRQHandler /* 29: CPU1 CTI Interrupt */ - .long 0 /* 30: Reserved */ - .long 0 /* 31: Reserved */ - - /* External interrupts */ - .long 0 /* 32: Reserved */ - .long GpTimer_IRQHandler /* 33: General Purpose Timer */ - .long I2C0_IRQHandler /* 34: I2C0 */ - .long I2C1_IRQHandler /* 35: I2C1 */ - .long I2S_IRQHandler /* 36: I2S */ - .long SPI_IRQHandler /* 37: SPI */ - .long QSPI_IRQHandler /* 38: QSPI */ - .long UARTRX0_Handler /* 39: UART0 receive FIFO interrupt */ - .long UARTTX0_Handler /* 40: UART0 transmit FIFO interrupt */ - .long UART0_RxTimeout_IRQHandler /* 41: UART0 receive timeout interrupt */ - .long UART0_ModemStatus_IRQHandler /* 42: UART0 modem status interrupt */ - .long UART0_Error_IRQHandler /* 43: UART0 error interrupt */ - .long UART0_IRQHandler /* 44: UART0 interrupt */ - .long UARTRX1_Handler /* 45: UART0 receive FIFO interrupt */ - .long UARTTX1_Handler /* 46: UART0 transmit FIFO interrupt */ - .long UART1_RxTimeout_IRQHandler /* 47: UART0 receive timeout interrupt */ - .long UART1_ModemStatus_IRQHandler /* 48: UART0 modem status interrupt */ - .long UART1_Error_IRQHandler /* 49: UART0 error interrupt */ - .long UART1_IRQHandler /* 50: UART0 interrupt */ - .long GPIO_0_IRQHandler /* 51: GPIO 0 interrupt */ - .long GPIO_1_IRQHandler /* 52: GPIO 1 interrupt */ - .long GPIO_2_IRQHandler /* 53: GPIO 2 interrupt */ - .long GPIO_3_IRQHandler /* 54: GPIO 3 interrupt */ - .long GPIO_4_IRQHandler /* 55: GPIO 4 interrupt */ - .long GPIO_5_IRQHandler /* 56: GPIO 5 interrupt */ - .long GPIO_6_IRQHandler /* 57: GPIO 6 interrupt */ - .long GPIO_7_IRQHandler /* 58: GPIO 7 interrupt */ - .long GPIO_8_IRQHandler /* 59: GPIO 8 interrupt */ - .long GPIO_9_IRQHandler /* 60: GPIO 9 interrupt */ - .long GPIO_10_IRQHandler /* 61: GPIO 10 interrupt */ - .long GPIO_11_IRQHandler /* 62: GPIO 11 interrupt */ - .long GPIO_12_IRQHandler /* 63: GPIO 12 interrupt */ - .long GPIO_13_IRQHandler /* 64: GPIO 13 interrupt */ - .long GPIO_14_IRQHandler /* 65: GPIO 14 interrupt */ - .long GPIO_15_IRQHandler /* 66: GPIO 15 interrupt */ - .long Combined_IRQHandler /* 67: Combined interrupt */ - .long PVT_IRQHandler /* 68: PVT sensor interrupt */ - .long 0 /* 69: Reserved */ - .long PWM_0_IRQHandler /* 70: PWM0 interrupt */ - .long RTC_IRQHandler /* 71: RTC interrupt */ - .long GpTimer0_IRQHandler /* 72: General Purpose Timer0 */ - .long GpTimer1_IRQHandler /* 73: General Purpose Timer1 */ - .long PWM_1_IRQHandler /* 74: PWM1 interrupt */ - .long PWM_2_IRQHandler /* 75: PWM2 interrupt */ - .long IOMUX_IRQHandler /* 76: IOMUX interrupt */ - - .size __Vectors, . - __Vectors - - .text - .thumb - .thumb_func - .align 2 - .globl Reset_Handler - .type Reset_Handler, %function -Reset_Handler: -/* Firstly it copies data from read only memory to RAM. There are two schemes - * to copy. One can copy more than one sections. Another can only copy - * one section. The former scheme needs more instructions and read-only - * data to implement than the latter. - * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */ - -#ifdef __STARTUP_COPY_MULTIPLE -/* Multiple sections scheme. - * - * Between symbol address __copy_table_start__ and __copy_table_end__, - * there are array of triplets, each of which specify: - * offset 0: LMA of start of a section to copy from - * offset 4: VMA of start of a section to copy to - * offset 8: size of the section to copy. Must be multiply of 4 - * - * All addresses must be aligned to 4 bytes boundary. - */ - ldr r4, =__copy_table_start__ - ldr r5, =__copy_table_end__ - -.L_loop0: - cmp r4, r5 - bge .L_loop0_done - ldr r1, [r4] - ldr r2, [r4, #4] - ldr r3, [r4, #8] - -.L_loop0_0: - subs r3, #4 - ittt ge - ldrge r0, [r1, r3] - strge r0, [r2, r3] - bge .L_loop0_0 - - adds r4, #12 - b .L_loop0 - -.L_loop0_done: -#else -/* Single section scheme. - * - * The ranges of copy from/to are specified by following symbols - * __etext: LMA of start of the section to copy from. Usually end of text - * __data_start__: VMA of start of the section to copy to - * __data_end__: VMA of end of the section to copy to - * - * All addresses must be aligned to 4 bytes boundary. - */ - ldr r1, =__etext - ldr r2, =__data_start__ - ldr r3, =__data_end__ - -.L_loop1: - cmp r2, r3 - ittt lt - ldrlt r0, [r1], #4 - strlt r0, [r2], #4 - blt .L_loop1 -#endif /*__STARTUP_COPY_MULTIPLE */ - -/* This part of work usually is done in C library startup code. Otherwise, - * define this macro to enable it in this startup. - * - * There are two schemes too. One can clear multiple BSS sections. Another - * can only clear one section. The former is more size expensive than the - * latter. - * - * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former. - * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later. - */ -#ifdef __STARTUP_CLEAR_BSS_MULTIPLE -/* Multiple sections scheme. - * - * Between symbol address __copy_table_start__ and __copy_table_end__, - * there are array of tuples specifying: - * offset 0: Start of a BSS section - * offset 4: Size of this BSS section. Must be multiply of 4 - */ - ldr r3, =__zero_table_start__ - ldr r4, =__zero_table_end__ - -.L_loop2: - cmp r3, r4 - bge .L_loop2_done - ldr r1, [r3] - ldr r2, [r3, #4] - movs r0, 0 - -.L_loop2_0: - subs r2, #4 - itt ge - strge r0, [r1, r2] - bge .L_loop2_0 - - adds r3, #8 - b .L_loop2 -.L_loop2_done: -#elif defined (__STARTUP_CLEAR_BSS) -/* Single BSS section scheme. - * - * The BSS section is specified by following symbols - * __bss_start__: start of the BSS section. - * __bss_end__: end of the BSS section. - * - * Both addresses must be aligned to 4 bytes boundary. - */ - ldr r1, =__bss_start__ - ldr r2, =__bss_end__ - - movs r0, 0 -.L_loop3: - cmp r1, r2 - itt lt - strlt r0, [r1], #4 - blt .L_loop3 -#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */ - - cpsid i /* Disable IRQs */ - bl SystemInit - - mrs r0, control /* Get control value */ - orr r0, r0, #2 /* Select switch to PSP */ - msr control, r0 - ldr r0, =Image$$ARM_LIB_STACK$$ZI$$Limit - msr psp, r0 - -#ifndef __START -#define __START _start -#endif - bl __START - - .pool - .size Reset_Handler, . - Reset_Handler - - -/* Macro to define default handlers. */ - .macro def_irq_handler handler_name - .align 1 - .thumb_func - .weak \handler_name - \handler_name: - b \handler_name - .endm - - def_irq_handler NMI_Handler - def_irq_handler HardFault_Handler - def_irq_handler MemManage_Handler - def_irq_handler BusFault_Handler - def_irq_handler UsageFault_Handler - def_irq_handler SecureFault_Handler - def_irq_handler SVC_Handler - def_irq_handler DebugMon_Handler - def_irq_handler PendSV_Handler - def_irq_handler SysTick_Handler - - /* Core interrupts */ - def_irq_handler NS_WATCHDOG_RESET_IRQHandler /* 0: Non-Secure Watchdog Reset Request Interrupt */ - def_irq_handler NS_WATCHDOG_IRQHandler /* 1: Non-Secure Watchdog Interrupt */ - def_irq_handler S32K_TIMER_IRQHandler /* 2: S32K Timer Interrupt */ - def_irq_handler TIMER0_IRQHandler /* 3: CMSDK Timer 0 Interrupt */ - def_irq_handler TIMER1_IRQHandler /* 4: CMSDK Timer 1 Interrupt */ - def_irq_handler DUALTIMER_IRQHandler /* 5: CMSDK Dual Timer Interrupt */ - def_irq_handler MHU0_IRQHandler /* 6: Message Handling Unit 0 Interrupt */ - def_irq_handler MHU1_IRQHandler /* 7: Message Handling Unit 1 Interrupt */ - def_irq_handler CRYPTOCELL_IRQHandler /* 8: CryptoCell-312 Interrupt */ - def_irq_handler MPC_Handler /* 9: Secure Combined MPC Interrupt */ - def_irq_handler PPC_Handler /* 10: Secure Combined PPC Interrupt */ - def_irq_handler S_MSC_COMBINED_IRQHandler /* 11: Secure Combined MSC Interrupt */ - def_irq_handler S_BRIDGE_ERR_IRQHandler /* 12: Secure Bridge Error Combined Interrupt */ - def_irq_handler I_CACHE_INV_ERR_IRQHandler /* 13: Intsruction Cache Invalidation Interrupt */ - def_irq_handler SYS_PPU_IRQHandler /* 15: System PPU Interrupt */ - def_irq_handler CPU0_PPU_IRQHandler /* 16: CPU0 PPU Interrupt */ - def_irq_handler CPU1_PPU_IRQHandler /* 17: CPU1 PPU Interrupt */ - def_irq_handler CPU0_DGB_PPU_IRQHandler /* 18: CPU0 Debug PPU Interrupt */ - def_irq_handler CPU1_DGB_PPU_IRQHandler /* 19: CPU1 Debug PPU Interrupt */ - def_irq_handler CRYPTOCELL_PPU_IRQHandler /* 20: CryptoCell PPU Interrupt */ - def_irq_handler RAM0_PPU_IRQHandler /* 22: RAM 0 PPU Interrupt */ - def_irq_handler RAM1_PPU_IRQHandler /* 23: RAM 1 PPU Interrupt */ - def_irq_handler RAM2_PPU_IRQHandler /* 24: RAM 2 PPU Interrupt */ - def_irq_handler RAM3_PPU_IRQHandler /* 25: RAM 3 PPU Interrupt */ - def_irq_handler DEBUG_PPU_IRQHandler /* 26: Debug PPU Interrupt */ - def_irq_handler CPU0_CTI_IRQHandler /* 28: CPU0 CTI Interrupt */ - def_irq_handler CPU1_CTI_IRQHandler /* 29: CPU1 CTI Interrupt */ - - /* External interrupts */ - def_irq_handler GpTimer_IRQHandler /* 33: General Purpose Timer */ - def_irq_handler I2C0_IRQHandler /* 34: I2C0 */ - def_irq_handler I2C1_IRQHandler /* 35: I2C1 */ - def_irq_handler I2S_IRQHandler /* 36: I2S */ - def_irq_handler SPI_IRQHandler /* 37: SPI */ - def_irq_handler QSPI_IRQHandler /* 38: QSPI */ - def_irq_handler UARTRX0_Handler /* 39: UART0 receive FIFO interrupt */ - def_irq_handler UARTTX0_Handler /* 40: UART0 transmit FIFO interrupt */ - def_irq_handler UART0_RxTimeout_IRQHandler /* 41: UART0 receive timeout interrupt */ - def_irq_handler UART0_ModemStatus_IRQHandler /* 42: UART0 modem status interrupt */ - def_irq_handler UART0_Error_IRQHandler /* 43: UART0 error interrupt */ - def_irq_handler UART0_IRQHandler /* 44: UART0 interrupt */ - def_irq_handler UARTRX1_Handler /* 45: UART0 receive FIFO interrupt */ - def_irq_handler UARTTX1_Handler /* 46: UART0 transmit FIFO interrupt */ - def_irq_handler UART1_RxTimeout_IRQHandler /* 47: UART0 receive timeout interrupt */ - def_irq_handler UART1_ModemStatus_IRQHandler /* 48: UART0 modem status interrupt */ - def_irq_handler UART1_Error_IRQHandler /* 49: UART0 error interrupt */ - def_irq_handler UART1_IRQHandler /* 50: UART0 interrupt */ - def_irq_handler GPIO_0_IRQHandler /* 51: GPIO 0 interrupt */ - def_irq_handler GPIO_1_IRQHandler /* 52: GPIO 1 interrupt */ - def_irq_handler GPIO_2_IRQHandler /* 53: GPIO 2 interrupt */ - def_irq_handler GPIO_3_IRQHandler /* 54: GPIO 3 interrupt */ - def_irq_handler GPIO_4_IRQHandler /* 55: GPIO 4 interrupt */ - def_irq_handler GPIO_5_IRQHandler /* 56: GPIO 5 interrupt */ - def_irq_handler GPIO_6_IRQHandler /* 57: GPIO 6 interrupt */ - def_irq_handler GPIO_7_IRQHandler /* 58: GPIO 7 interrupt */ - def_irq_handler GPIO_8_IRQHandler /* 59: GPIO 8 interrupt */ - def_irq_handler GPIO_9_IRQHandler /* 60: GPIO 9 interrupt */ - def_irq_handler GPIO_10_IRQHandler /* 61: GPIO 10 interrupt */ - def_irq_handler GPIO_11_IRQHandler /* 62: GPIO 11 interrupt */ - def_irq_handler GPIO_12_IRQHandler /* 63: GPIO 12 interrupt */ - def_irq_handler GPIO_13_IRQHandler /* 64: GPIO 13 interrupt */ - def_irq_handler GPIO_14_IRQHandler /* 65: GPIO 14 interrupt */ - def_irq_handler GPIO_15_IRQHandler /* 66: GPIO 15 interrupt */ - def_irq_handler Combined_IRQHandler /* 67: Combined interrupt */ - def_irq_handler PVT_IRQHandler /* 68: PVT sensor interrupt */ - def_irq_handler PWM_0_IRQHandler /* 70: PWM0 interrupt */ - def_irq_handler RTC_IRQHandler /* 71: RTC interrupt */ - def_irq_handler GpTimer0_IRQHandler /* 72: General Purpose Timer0 */ - def_irq_handler GpTimer1_IRQHandler /* 73: General Purpose Timer1 */ - def_irq_handler PWM_1_IRQHandler /* 74: PWM1 interrupt */ - def_irq_handler PWM_2_IRQHandler /* 75: PWM2 interrupt */ - def_irq_handler IOMUX_IRQHandler /* 76: IOMUX interrupt */ - - .end diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpc_sie200_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpc_sie200_drv.c deleted file mode 100644 index 5bb9e9fd4bd..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpc_sie200_drv.c +++ /dev/null @@ -1,652 +0,0 @@ -/* - * Copyright (c) 2016-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "mpc_sie200_drv.h" - -#include - -#include "cmsis.h" - -#define MPC_SIE200_BLK_CFG_OFFSET 5U - -#define MPC_SIE200_CTRL_SEC_RESP (1UL << 4UL) /* MPC fault triggers a - * bus error */ -#define MPC_SIE200_CTRL_AUTOINCREMENT (1UL << 8UL) /* BLK_IDX auto increment */ -#define MPC_SIE200_CTRL_SEC_LOCK_DOWN (1UL << 31UL) /* MPC Security lock down */ - -/* ARM MPC interrupt */ -#define MPC_SIE200_INT_EN 1UL -#define MPC_SIE200_INT_STAT 1UL - -/* ARM MPC state definitions */ -#define MPC_SIE200_INITIALIZED (1 << 0) - -/* Error code returned by the internal driver functions */ -enum mpc_sie200_intern_error_t{ - MPC_SIE200_INTERN_ERR_NONE = MPC_SIE200_ERR_NONE, - MPC_SIE200_INTERN_ERR_NOT_IN_RANGE = MPC_SIE200_ERR_NOT_IN_RANGE, - MPC_SIE200_INTERN_ERR_NOT_ALIGNED = MPC_SIE200_ERR_NOT_ALIGNED, - MPC_SIE200_INTERN_ERR_INVALID_RANGE = MPC_SIE200_ERR_INVALID_RANGE, - MPC_INTERN_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE = - MPC_SIE200_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE, - /* Calculated block index - is higher than the maximum allowed by the MPC. It should never - happen unless the controlled ranges of the MPC are misconfigured - in the driver or if the IP has not enough LUTs to cover the - range, due to wrong reported block size for example. - */ - MPC_SIE200_INTERN_ERR_BLK_IDX_TOO_HIGH = -1, - -}; - -/* ARM MPC memory mapped register access structure */ -struct mpc_sie200_reg_map_t { - volatile uint32_t ctrl; /* (R/W) MPC Control */ - volatile uint32_t reserved[3];/* Reserved */ - volatile uint32_t blk_max; /* (R/ ) Maximum value of block based index */ - volatile uint32_t blk_cfg; /* (R/ ) Block configuration */ - volatile uint32_t blk_idx; /* (R/W) Index value for accessing block - * based look up table */ - volatile uint32_t blk_lutn; /* (R/W) Block based gating - * Look Up Table (LUT) */ - volatile uint32_t int_stat; /* (R/ ) Interrupt state */ - volatile uint32_t int_clear; /* ( /W) Interrupt clear */ - volatile uint32_t int_en; /* (R/W) Interrupt enable */ - volatile uint32_t int_info1; /* (R/ ) Interrupt information 1 */ - volatile uint32_t int_info2; /* (R/ ) Interrupt information 2 */ - volatile uint32_t int_set; /* ( /W) Interrupt set. Debug purpose only */ - volatile uint32_t reserved2[997]; /* Reserved */ - volatile uint32_t pidr4; /* (R/ ) Peripheral ID 4 */ - volatile uint32_t pidr5; /* (R/ ) Peripheral ID 5 */ - volatile uint32_t pidr6; /* (R/ ) Peripheral ID 6 */ - volatile uint32_t pidr7; /* (R/ ) Peripheral ID 7 */ - volatile uint32_t pidr0; /* (R/ ) Peripheral ID 0 */ - volatile uint32_t pidr1; /* (R/ ) Peripheral ID 1 */ - volatile uint32_t pidr2; /* (R/ ) Peripheral ID 2 */ - volatile uint32_t pidr3; /* (R/ ) Peripheral ID 3 */ - volatile uint32_t cidr0; /* (R/ ) Component ID 0 */ - volatile uint32_t cidr1; /* (R/ ) Component ID 1 */ - volatile uint32_t cidr2; /* (R/ ) Component ID 2 */ - volatile uint32_t cidr3; /* (R/ ) Component ID 3 */ -}; - -/* - * Checks if the address is controlled by the MPC and returns - * the range index in which it is contained. - * - * \param[in] dev MPC device to initalize \ref mpc_sie200_dev_t - * \param[in] addr Address to check if it is controlled by MPC. - * \param[out] addr_range Range index in which it is contained. - * - * \return True if the base is controller by the range list, false otherwise. - */ -static uint32_t is_ctrl_by_range_list(struct mpc_sie200_dev_t* dev, uint32_t addr, - const struct mpc_sie200_memory_range_t** addr_range) -{ - uint32_t i; - const struct mpc_sie200_memory_range_t* range; - - for(i = 0; i < dev->data->nbr_of_ranges; i++) { - range = dev->data->range_list[i]; - if(addr >= range->base && addr <= range->limit) { - *addr_range = range; - return 1; - } - } - return 0; -} - -/* - * Gets the masks selecting the bits in the LUT of the MPC corresponding - * to the base address (included) up to the limit address (included) - * - * \param[in] mpc_dev The MPC device. - * \param[in] base Address in a range controlled by this MPC - * (included), aligned on block size. - * \param[in] limit Address in a range controlled by this MPC - * (included), aligned on block size. - * \param[out] range Memory range in which the base address and - * limit are. - * \param[out] first_word_idx Index of the first touched word in the LUT. - * \param[out] nr_words Number of words used in the LUT. If 1, only - * first_word_mask is valid and limit_word_mask - * must not be used. - * \param[out] first_word_mask First word mask in the LUT will be stored here. - * \param[out] limit_word_mask Limit word mask in the LUT will be stored here. - * - * \return Returns error code as specified in \ref mpc_sie200_intern_error_t - */ -static enum mpc_sie200_intern_error_t get_lut_masks( - struct mpc_sie200_dev_t* dev, - const uint32_t base, const uint32_t limit, - const struct mpc_sie200_memory_range_t** range, - uint32_t *first_word_idx, - uint32_t *nr_words, - uint32_t *first_word_mask, - uint32_t *limit_word_mask) -{ - const struct mpc_sie200_memory_range_t* base_range; - uint32_t block_size; - uint32_t base_block_idx; - uint32_t base_word_idx; - uint32_t blk_max; - const struct mpc_sie200_memory_range_t* limit_range; - uint32_t limit_block_idx; - uint32_t limit_word_idx; - uint32_t mask; - uint32_t norm_base; - uint32_t norm_limit; - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - /* - * Check that the addresses are within the controlled regions - * of this MPC - */ - if(!is_ctrl_by_range_list(dev, base, &base_range) || - !is_ctrl_by_range_list(dev, limit, &limit_range)) { - return MPC_SIE200_INTERN_ERR_NOT_IN_RANGE; - } - - /* Base and limit should be part of the same range */ - if(base_range != limit_range) { - return MPC_SIE200_INTERN_ERR_INVALID_RANGE; - } - *range = base_range; - - block_size = (1 << (p_mpc->blk_cfg + MPC_SIE200_BLK_CFG_OFFSET)); - - /* Base and limit+1 addresses must be aligned on the MPC block size */ - if(base % block_size || (limit+1) % block_size) { - return MPC_SIE200_INTERN_ERR_NOT_ALIGNED; - } - - /* - * Get a normalized address that is an offset from the beginning - * of the lowest range controlled by the MPC - */ - norm_base = (base - base_range->base) + base_range->range_offset; - norm_limit = (limit - base_range->base) + base_range->range_offset; - - /* - * Calculate block index and to which 32 bits word it belongs - */ - limit_block_idx = norm_limit/block_size; - limit_word_idx = limit_block_idx/32; - - base_block_idx = norm_base/block_size; - base_word_idx = base_block_idx/32; - - if(base_block_idx > limit_block_idx) { - return MPC_SIE200_INTERN_ERR_INVALID_RANGE; - } - - /* Transmit the information to the caller */ - *nr_words = limit_word_idx - base_word_idx + 1; - *first_word_idx = base_word_idx; - - /* Limit to the highest block that can be configured */ - blk_max = p_mpc->blk_max; - - if((limit_word_idx > blk_max) || (base_word_idx > blk_max)) { - return MPC_SIE200_INTERN_ERR_BLK_IDX_TOO_HIGH; - } - - /* - * Create the mask for the first word to only select the limit N bits - */ - *first_word_mask = ~((1 << (base_block_idx % 32)) - 1); - - /* - * Create the mask for the limit word to select only the first M bits. - */ - *limit_word_mask = (1 << ((limit_block_idx+1) % 32)) - 1; - /* - * If limit_word_mask is 0, it means that the limit touched block index is - * the limit in its word, so the limit word mask has all its bits selected - */ - if(*limit_word_mask == 0) { - *limit_word_mask = 0xFFFFFFFF; - } - - /* - * If the blocks to configure are all packed in one word, only - * touch this word. - * Code using the computed masks should test if this mask - * is non-zero, and if so, only use this one instead of the limit_word_mask - * and first_word_mask. - * As the only bits that are the same in both masks are the 1 that we want - * to select, just use XOR to extract them. - */ - if(base_word_idx == limit_word_idx) { - mask = ~(*first_word_mask ^ *limit_word_mask); - *first_word_mask = mask; - *limit_word_mask = mask; - } - - return MPC_SIE200_INTERN_ERR_NONE; -} - -enum mpc_sie200_error_t mpc_sie200_init(struct mpc_sie200_dev_t* dev, - const struct mpc_sie200_memory_range_t** range_list, - uint8_t nbr_of_ranges) -{ - if((range_list == NULL) || (nbr_of_ranges == 0)) { - return MPC_SIE200_INVALID_ARG; - } - - dev->data->range_list = range_list; - dev->data->nbr_of_ranges = nbr_of_ranges; - dev->data->state = MPC_SIE200_INITIALIZED; - - return MPC_SIE200_ERR_NONE; -} - -enum mpc_sie200_error_t mpc_sie200_get_block_size(struct mpc_sie200_dev_t* dev, - uint32_t* blk_size) -{ - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - if(!(dev->data->state & MPC_SIE200_INITIALIZED)) { - return MPC_SIE200_NOT_INIT; - } - - if(blk_size == 0) { - return MPC_SIE200_INVALID_ARG; - } - - /* Calculate the block size in byte according to the manual */ - *blk_size = (1 << (p_mpc->blk_cfg + MPC_SIE200_BLK_CFG_OFFSET)); - - return MPC_SIE200_ERR_NONE; -} - -enum mpc_sie200_error_t mpc_sie200_config_region(struct mpc_sie200_dev_t* dev, - const uint32_t base, - const uint32_t limit, - enum mpc_sie200_sec_attr_t attr) -{ - enum mpc_sie200_intern_error_t error; - uint32_t first_word_idx; - uint32_t first_word_mask; - uint32_t i; - uint32_t limit_word_mask; - uint32_t limit_word_idx; - uint32_t nr_words; - const struct mpc_sie200_memory_range_t* range; - uint32_t word_value; - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - if(!(dev->data->state & MPC_SIE200_INITIALIZED)) { - return MPC_SIE200_NOT_INIT; - } - - /* Get the bitmasks used to select the bits in the LUT */ - error = get_lut_masks(dev, base, limit, &range, &first_word_idx, &nr_words, - &first_word_mask, &limit_word_mask); - - limit_word_idx = first_word_idx + nr_words - 1; - - if(error != MPC_SIE200_INTERN_ERR_NONE) { - /* Map internal error code lower than 0 to a generic errpr */ - if(error < 0) { - return MPC_SIE200_ERR_INVALID_RANGE; - } - return (enum mpc_sie200_error_t)error; - } - - /* - * The memory range should allow accesses in with the wanted security - * attribute if it requires special attribute for successfull accesses - */ - if(range->attr != attr) { - return MPC_SIE200_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE; - } - - /* - * Starts changing actual configuration so issue DMB to ensure every - * transaction has completed by now - */ - __DMB(); - - /* Set the block index to the first word that will be updated */ - p_mpc->blk_idx = first_word_idx; - - /* If only one word needs to be touched in the LUT */ - if(nr_words == 1) { - word_value = p_mpc->blk_lutn; - if(attr == MPC_SIE200_SEC_ATTR_NONSECURE) { - word_value |= first_word_mask; - } else { - word_value &= ~first_word_mask; - } - - /* - * Set the index again because full word read or write could have - * incremented it - */ - p_mpc->blk_idx = first_word_idx; - p_mpc->blk_lutn = word_value; - - /* Commit the configuration change */ - __DSB(); - __ISB(); - - return MPC_SIE200_ERR_NONE; - } - - /* First word */ - word_value = p_mpc->blk_lutn; - if(attr == MPC_SIE200_SEC_ATTR_NONSECURE) { - word_value |= first_word_mask; - } else { - word_value &= ~first_word_mask; - } - /* - * Set the index again because full word read or write could have - * incremented it - */ - p_mpc->blk_idx = first_word_idx; - /* Partially configure the first word */ - p_mpc->blk_lutn = word_value; - - /* Fully configure the intermediate words if there are any */ - for(i=first_word_idx+1; iblk_idx = i; - if(attr == MPC_SIE200_SEC_ATTR_NONSECURE) { - p_mpc->blk_lutn = 0xFFFFFFFF; - } else { - p_mpc->blk_lutn = 0x00000000; - } - } - - /* Partially configure the limit word */ - p_mpc->blk_idx = limit_word_idx; - word_value = p_mpc->blk_lutn; - if(attr == MPC_SIE200_SEC_ATTR_NONSECURE) { - word_value |= limit_word_mask; - } else { - word_value &= ~limit_word_mask; - } - p_mpc->blk_idx = limit_word_idx; - p_mpc->blk_lutn = word_value; - - /* Commit the configuration change */ - __DSB(); - __ISB(); - - return MPC_SIE200_ERR_NONE; -} - -enum mpc_sie200_error_t mpc_sie200_get_region_config( - struct mpc_sie200_dev_t* dev, - uint32_t base, uint32_t limit, - enum mpc_sie200_sec_attr_t* attr) -{ - enum mpc_sie200_sec_attr_t attr_prev; - uint32_t block_size; - uint32_t block_size_mask; - enum mpc_sie200_intern_error_t error; - uint32_t first_word_idx; - uint32_t first_word_mask; - uint32_t i; - uint32_t limit_word_idx; - uint32_t limit_word_mask; - uint32_t nr_words; - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - const struct mpc_sie200_memory_range_t* range; - uint32_t word_value; - - if(!(dev->data->state & MPC_SIE200_INITIALIZED)) { - return MPC_SIE200_NOT_INIT; - } - - if(attr == 0) { - return MPC_SIE200_INVALID_ARG; - } - - /* - * Initialize the security attribute to mixed in case of early - * termination of this function. A caller that does not check the - * returned error will act as if it does not know anything about the - * region queried, which is the safest bet - */ - *attr = MPC_SIE200_SEC_ATTR_MIXED; - - /* - * If the base and limit are not aligned, align them and make sure - * that the resulting region fully includes the original region - */ - block_size = (1 << (p_mpc->blk_cfg + MPC_SIE200_BLK_CFG_OFFSET)); - - block_size_mask = block_size - 1; - base &= ~(block_size_mask); - limit &= ~(block_size_mask); - limit += block_size - 1; /* Round to the upper block address, - * and then remove one to get the preceding - * address. - */ - - /* Get the bitmasks used to select the bits in the LUT */ - error = get_lut_masks(dev, base, limit, &range, &first_word_idx, &nr_words, - &first_word_mask, &limit_word_mask); - - limit_word_idx = first_word_idx+nr_words - 1; - - if(error != MPC_SIE200_INTERN_ERR_NONE) { - /* Map internal error code lower than 0 to generic error */ - if(error < 0) { - return MPC_SIE200_ERR_INVALID_RANGE; - } - return (enum mpc_sie200_error_t)error; - } - - /* Set the block index to the first word that will be updated */ - p_mpc->blk_idx = first_word_idx; - - /* If only one word needs to be touched in the LUT */ - if(nr_words == 1) { - word_value = p_mpc->blk_lutn; - word_value &= first_word_mask; - if(word_value == 0) { - *attr = MPC_SIE200_SEC_ATTR_SECURE; - /* - * If there are differences between the mask and the word value, - * it means that the security attributes of blocks are mixed - */ - } else if(word_value ^ first_word_mask) { - *attr = MPC_SIE200_SEC_ATTR_MIXED; - } else { - *attr = MPC_SIE200_SEC_ATTR_NONSECURE; - } - return MPC_SIE200_ERR_NONE; - } - - /* Get the partial configuration of the first word */ - word_value = p_mpc->blk_lutn & first_word_mask; - if(word_value == 0x00000000) { - *attr = MPC_SIE200_SEC_ATTR_SECURE; - } else if(word_value ^ first_word_mask) { - *attr = MPC_SIE200_SEC_ATTR_MIXED; - /* - * Bail out as the security attribute will be the same regardless - * of the configuration of other blocks - */ - return MPC_SIE200_ERR_NONE; - } else { - *attr = MPC_SIE200_SEC_ATTR_NONSECURE; - } - /* - * Store the current found attribute, to check that all the blocks indeed - * have the same security attribute. - */ - attr_prev = *attr; - - /* Get the configuration of the intermediate words if there are any */ - for(i=first_word_idx+1; iblk_idx = i; - word_value = p_mpc->blk_lutn; - if(word_value == 0x00000000) { - *attr = MPC_SIE200_SEC_ATTR_SECURE; - } else if(word_value == 0xFFFFFFFF) { - *attr = MPC_SIE200_SEC_ATTR_NONSECURE; - } else { - *attr = MPC_SIE200_SEC_ATTR_MIXED; - return MPC_SIE200_ERR_NONE; - } - - /* If the attribute is different than the one found before, bail out */ - if(*attr != attr_prev) { - *attr = MPC_SIE200_SEC_ATTR_MIXED; - return MPC_SIE200_ERR_NONE; - } - attr_prev = *attr; - } - - /* Get the partial configuration of the limit word */ - p_mpc->blk_idx = limit_word_idx; - word_value = p_mpc->blk_lutn & limit_word_mask; - if(word_value == 0x00000000) { - *attr = MPC_SIE200_SEC_ATTR_SECURE; - } else if(word_value ^ first_word_mask) { - *attr = MPC_SIE200_SEC_ATTR_MIXED; - return MPC_SIE200_ERR_NONE; - } else { - *attr = MPC_SIE200_SEC_ATTR_NONSECURE; - } - - if(*attr != attr_prev) { - *attr = MPC_SIE200_SEC_ATTR_MIXED; - return MPC_SIE200_ERR_NONE; - } - - return MPC_SIE200_ERR_NONE; -} - -enum mpc_sie200_error_t mpc_sie200_get_ctrl(struct mpc_sie200_dev_t* dev, - uint32_t* ctrl_val) -{ - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - if(!(dev->data->state & MPC_SIE200_INITIALIZED)) { - return MPC_SIE200_NOT_INIT; - } - - if(ctrl_val == 0) { - return MPC_SIE200_INVALID_ARG; - } - - *ctrl_val = p_mpc->ctrl; - - return MPC_SIE200_ERR_NONE; -} - -enum mpc_sie200_error_t mpc_sie200_set_ctrl(struct mpc_sie200_dev_t* dev, - uint32_t mpc_ctrl) -{ - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - if(!(dev->data->state & MPC_SIE200_INITIALIZED)) { - return MPC_SIE200_NOT_INIT; - } - - p_mpc->ctrl = mpc_ctrl; - - return MPC_SIE200_ERR_NONE; -} - -enum mpc_sie200_error_t mpc_sie200_get_sec_resp(struct mpc_sie200_dev_t* dev, - enum mpc_sie200_sec_resp_t* sec_rep) -{ - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - if(!(dev->data->state & MPC_SIE200_INITIALIZED)) { - return MPC_SIE200_NOT_INIT; - } - - if(sec_rep == 0) { - return MPC_SIE200_INVALID_ARG; - } - - if(p_mpc->ctrl & MPC_SIE200_CTRL_SEC_RESP) { - *sec_rep = MPC_SIE200_RESP_BUS_ERROR; - return MPC_SIE200_ERR_NONE; - } - - *sec_rep = MPC_SIE200_RESP_RAZ_WI; - - return MPC_SIE200_ERR_NONE; -} - -enum mpc_sie200_error_t mpc_sie200_irq_enable(struct mpc_sie200_dev_t* dev) -{ - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - if(!(dev->data->state & MPC_SIE200_INITIALIZED)) { - return MPC_SIE200_NOT_INIT; - } - - p_mpc->int_en |= MPC_SIE200_INT_EN; - - return MPC_SIE200_ERR_NONE; -} - -void mpc_sie200_irq_disable(struct mpc_sie200_dev_t* dev) -{ - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - p_mpc->int_en &= ~MPC_SIE200_INT_EN; -} - -void mpc_sie200_clear_irq(struct mpc_sie200_dev_t* dev) -{ - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - p_mpc->int_clear = MPC_SIE200_INT_EN; -} - -uint32_t mpc_sie200_irq_state(struct mpc_sie200_dev_t* dev) -{ - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - return (p_mpc->int_stat & MPC_SIE200_INT_STAT); -} - -enum mpc_sie200_error_t mpc_sie200_lock_down(struct mpc_sie200_dev_t* dev) -{ - struct mpc_sie200_reg_map_t* p_mpc = - (struct mpc_sie200_reg_map_t*)dev->cfg->base; - - if(!(dev->data->state & MPC_SIE200_INITIALIZED)) { - return MPC_SIE200_NOT_INIT; - } - - p_mpc->ctrl |= (MPC_SIE200_CTRL_AUTOINCREMENT - | MPC_SIE200_CTRL_SEC_LOCK_DOWN); - - return MPC_SIE200_ERR_NONE; -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpc_sie200_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpc_sie200_drv.h deleted file mode 100644 index 27a1c792900..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpc_sie200_drv.h +++ /dev/null @@ -1,282 +0,0 @@ -/* - * Copyright (c) 2016-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - * \file mpc_sie200_drv.h - * \brief Generic driver for ARM SIE 200 Memory Protection - * Controllers (MPC). - */ - -#ifndef __MPC_SIE_200_DRV_H__ -#define __MPC_SIE_200_DRV_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* Error code returned by the driver functions */ -enum mpc_sie200_error_t { - MPC_SIE200_ERR_NONE, /*!< No error */ - MPC_SIE200_INVALID_ARG, /*!< MPC invalid input arguments */ - MPC_SIE200_NOT_INIT, /*!< MPC not initialized */ - MPC_SIE200_ERR_NOT_IN_RANGE, /*!< Address does not belong to a range - * controlled by the MPC */ - MPC_SIE200_ERR_NOT_ALIGNED, /*!< Address is not aligned on the block size - * of this MPC */ - MPC_SIE200_ERR_INVALID_RANGE, /*!< The given address range to configure - * is invalid. This could be because: - * - The base and limit swapped - * - The base and limit addresses - * are in different ranges */ - MPC_SIE200_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE, /*!< The given range cannot be - * accessed with the wanted - * security attributes */ -}; - -/* Security attribute used in various place of the API */ -enum mpc_sie200_sec_attr_t { - MPC_SIE200_SEC_ATTR_SECURE, /*!< Secure attribute */ - MPC_SIE200_SEC_ATTR_NONSECURE, /*!< Non-secure attribute */ - /*!< Used when getting the configuration of a memory range and some blocks - * are secure whereas some other are non secure */ - MPC_SIE200_SEC_ATTR_MIXED, -}; - -/* What can happen when trying to do an illegal memory access */ -enum mpc_sie200_sec_resp_t { - MPC_SIE200_RESP_RAZ_WI, /*!< Read As Zero, Write Ignored */ - MPC_SIE200_RESP_BUS_ERROR /*!< Bus error */ -}; - -/* Description of a memory range controlled by the MPC */ -struct mpc_sie200_memory_range_t { - const uint32_t base; /*!< Base address (included in the range) */ - const uint32_t limit; /*!< Limit address (included in the range) */ - const uint32_t range_offset; /*!< Offset of current range area to the 0 - point of the whole area (the sum of the - sizes of the previous memory ranges - covered by the same MPC) */ - const enum mpc_sie200_sec_attr_t attr; /*!< Optional security attribute - needed to be matched when - accessing this range. - For example, the non-secure - alias of a memory region can not - be accessed using secure access, - and configuring the MPC to - secure using that range will not - be permitted by the driver. */ -}; - -/* ARM MPC SIE 200 device configuration structure */ -struct mpc_sie200_dev_cfg_t { - const uint32_t base; /*!< MPC base address */ -}; - -/* ARM MPC SIE 200 device data structure */ -struct mpc_sie200_dev_data_t { - const struct mpc_sie200_memory_range_t** range_list; /*!< Array of pointers - to memory ranges - controlled by - the MPC */ - uint8_t nbr_of_ranges; /*!< Number of memory ranges in the list */ - uint8_t state; /*!< Indicates if the MPC driver - is initialized and enabled */ - uint16_t reserved; /*!< 32 bits alignment */ -}; - -/* ARM MPC SIE 200 device structure */ -struct mpc_sie200_dev_t { - const struct mpc_sie200_dev_cfg_t* const cfg; /*!< MPC configuration */ - struct mpc_sie200_dev_data_t* const data; /*!< MPC data */ -}; - -/** - * \brief Initializes a MPC device. - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * \param[in] range_list List of memory ranges controller by the MPC - * (\ref mpc_sie200_memory_range_t). This list can not - * freed after the initializations. - * \param[in] nbr_of_ranges Number of memory ranges - * - * \return Returns error code as specified in \ref mpc_sie200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie200_error_t mpc_sie200_init(struct mpc_sie200_dev_t* dev, - const struct mpc_sie200_memory_range_t** range_list, - uint8_t nbr_of_ranges); - -/** - * \brief Gets MPC block size. All regions must be aligned on this block - * size (base address and limit+1 address). - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * \param[out] blk_size MPC block size - * - * \return Returns error code as specified in \ref mpc_sie200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie200_error_t mpc_sie200_get_block_size(struct mpc_sie200_dev_t* dev, - uint32_t* blk_size); - -/** - * \brief Configures a memory region (base and limit included). - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * \param[in] base Base address of the region to poll. This bound is - * included. It does not need to be aligned in any way. - * - * \param[in] limit Limit address of the region to poll. This bound is - * included. (limit+1) does not need to be aligned - * in any way. - * \param[in] attr Security attribute of the region. If the region has mixed - * secure/non-secure, a special value is returned - * (\ref mpc_sie200_sec_attr_t). - * - * In case base and limit+1 addresses are not aligned on - * the block size, the enclosing region with base and - * limit+1 aligned on block size will be queried. - * In case of early termination of the function (error), the - * security attribute will be set to MPC_SIE200_ATTR_MIXED. - * - * \return Returns error code as specified in \ref mpc_sie200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie200_error_t mpc_sie200_config_region(struct mpc_sie200_dev_t* dev, - const uint32_t base, - const uint32_t limit, - enum mpc_sie200_sec_attr_t attr); - -/** - * \brief Gets a memory region configuration(base and limit included). - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * \param[in] base Base address of the region to get the configuration. - * \param[in] limit Limit address of the region to get the configuration. - * \param[out] attr Security attribute of the region - * \ref mpc_sie200_sec_attr_t - * - * \return Returns error code as specified in \ref mpc_sie200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie200_error_t mpc_sie200_get_region_config( - struct mpc_sie200_dev_t* dev, - uint32_t base, - uint32_t limit, - enum mpc_sie200_sec_attr_t* attr); - -/** - * \brief Gets the MPC control value. - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * \param[out] ctrl_val Current MPC control value. - * - * \return Returns error code as specified in \ref mpc_sie200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie200_error_t mpc_sie200_get_ctrl(struct mpc_sie200_dev_t* dev, - uint32_t* ctrl_val); - -/** - * \brief Sets the MPC control value. - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * \param[in] mpc_ctrl New MPC control value - * - * \return Returns error code as specified in \ref mpc_sie200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie200_error_t mpc_sie200_set_ctrl(struct mpc_sie200_dev_t* dev, - uint32_t mpc_ctrl); - -/** - * \brief Gets the configured secure response. - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * \param[out] sec_rep Configured secure response (\ref mpc_sie200_sec_resp_t). - * - * \return Returns error code as specified in \ref mpc_sie200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie200_error_t mpc_sie200_get_sec_resp(struct mpc_sie200_dev_t* dev, - enum mpc_sie200_sec_resp_t* sec_rep); - -/** - * \brief Enables MPC interrupt. - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * - * \return Returns error code as specified in \ref mpc_sie200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie200_error_t mpc_sie200_irq_enable(struct mpc_sie200_dev_t* dev); - -/** - * \brief Disables MPC interrupt - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void mpc_sie200_irq_disable(struct mpc_sie200_dev_t* dev); - -/** - * \brief Clears MPC interrupt. - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void mpc_sie200_clear_irq(struct mpc_sie200_dev_t* dev); - -/** - * \brief Returns the MPC interrupt state. - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * - * \return Returns 1 if the interrupt is active, 0 otherwise. - * - * \note This function doesn't check if dev is NULL. - */ -uint32_t mpc_sie200_irq_state(struct mpc_sie200_dev_t* dev); - -/** - * \brief Locks down the MPC configuration. - * - * \param[in] dev MPC device \ref mpc_sie200_dev_t - * - * \return Returns error code as specified in \ref mpc_sie200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie200_error_t mpc_sie200_lock_down(struct mpc_sie200_dev_t* dev); - -#ifdef __cplusplus -} -#endif -#endif /* __MPC_SIE_200_DRV_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpu_armv8m_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpu_armv8m_drv.c deleted file mode 100644 index 4aa70c7f16e..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpu_armv8m_drv.c +++ /dev/null @@ -1,138 +0,0 @@ -/* - * Copyright (c) 2017-2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include "mpu_armv8m_drv.h" -#include "cmsis_cpu.h" - -/* - * FixMe: - * This is a beta quality driver for MPU in v8M. To be finalized. - */ - -enum mpu_armv8m_error_t mpu_armv8m_enable(struct mpu_armv8m_dev_t *dev, - uint32_t privdef_en, - uint32_t hfnmi_en) -{ - /*No error checking*/ - - MPU_Type *mpu = (MPU_Type *)dev->base; - - mpu->CTRL = - (privdef_en ? MPU_CTRL_PRIVDEFENA_Msk : 0) | - (hfnmi_en ? MPU_CTRL_HFNMIENA_Msk : 0); - - /*Ensure all configuration is written before enable*/ - - mpu->CTRL |= MPU_CTRL_ENABLE_Msk; - - /* Enable MPU before next instruction */ - __asm("DSB"); - __asm("ISB"); - return MPU_ARMV8M_OK; -} - -enum mpu_armv8m_error_t mpu_armv8m_disable(struct mpu_armv8m_dev_t *dev) -{ - MPU_Type *mpu = (MPU_Type *)dev->base; - - /* Reset all fields as enable does full setup */ - mpu->CTRL = 0; - - return MPU_ARMV8M_OK; -} - - -enum mpu_armv8m_error_t mpu_armv8m_region_enable( - struct mpu_armv8m_dev_t *dev, - struct mpu_armv8m_region_cfg_t *region_cfg) -{ - MPU_Type *mpu = (MPU_Type *)dev->base; - - enum mpu_armv8m_error_t ret_val = MPU_ARMV8M_OK; - uint32_t ctrl_before; - uint32_t base_cfg; - uint32_t limit_cfg; - - /*FIXME : Add complete error checking*/ - if ((region_cfg->region_base & ~MPU_RBAR_BASE_Msk) != 0) { - return MPU_ARMV8M_ERROR; - } - /* region_limit doesn't need to be aligned but the scatter - * file needs to be setup to ensure that partitions do not overlap. - */ - - ctrl_before = mpu->CTRL; - mpu->CTRL = 0; - - mpu->RNR = region_cfg->region_nr & MPU_RNR_REGION_Msk; - - /* This 0s the lower bits of the base address */ - base_cfg = region_cfg->region_base & MPU_RBAR_BASE_Msk; - base_cfg |= (region_cfg->attr_sh << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk; - base_cfg |= (region_cfg->attr_access << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk; - base_cfg |= (region_cfg->attr_exec << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk; - - mpu->RBAR = base_cfg; - - /*This 0s the lower bits of base address but they are treated as 1 */ - limit_cfg = (region_cfg->region_limit-1) & MPU_RLAR_LIMIT_Msk; - - /*FIXME: Enable the memory attr setting */ - limit_cfg |= MPU_RLAR_EN_Msk; - - mpu->RLAR = limit_cfg; - - /*Restore main MPU control*/ - mpu->CTRL = ctrl_before; - - /* Enable MPU before the next instruction */ - __asm("DSB"); - __asm("ISB"); - - return ret_val; -} - - -enum mpu_armv8m_error_t mpu_armv8m_region_disable( - struct mpu_armv8m_dev_t *dev, - uint32_t region_nr) -{ - - MPU_Type *mpu = (MPU_Type *)dev->base; - - enum mpu_armv8m_error_t ret_val = MPU_ARMV8M_OK; - uint32_t ctrl_before; - - /*FIXME : Add complete error checking*/ - - ctrl_before = mpu->CTRL; - mpu->CTRL = 0; - - mpu->RNR = region_nr & MPU_RNR_REGION_Msk; - - mpu->RBAR = 0; - mpu->RLAR = 0; - - /*Restore main MPU control*/ - mpu->CTRL = ctrl_before; - - return ret_val; -} - -enum mpu_armv8m_error_t mpu_armv8m_clean(struct mpu_armv8m_dev_t *dev) -{ - MPU_Type *mpu = (MPU_Type *)dev->base; - uint32_t i = (mpu->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos; - - while (i > 0) { - mpu_armv8m_region_disable(dev, i-1); - i--; - } - - return MPU_ARMV8M_OK; - -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpu_armv8m_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpu_armv8m_drv.h deleted file mode 100644 index 0abf7fd33f1..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/mpu_armv8m_drv.h +++ /dev/null @@ -1,128 +0,0 @@ -/* - * Copyright (c) 2017-2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __MPU_ARMV8M_DRV_H__ -#define __MPU_ARMV8M_DRV_H__ - -#include - -#include "cmsis.h" - -#define PRIVILEGED_DEFAULT_ENABLE 1 -#define HARDFAULT_NMI_ENABLE 1 - -struct mpu_armv8m_dev_t { - const uint32_t base; -}; - -enum mpu_armv8m_error_t { - MPU_ARMV8M_OK, - MPU_ARMV8M_ERROR -}; - -enum mpu_armv8m_attr_exec_t { - MPU_ARMV8M_XN_EXEC_OK, - MPU_ARMV8M_XN_EXEC_NEVER -}; - -enum mpu_armv8m_attr_access_t { - MPU_ARMV8M_AP_RW_PRIV_ONLY, - MPU_ARMV8M_AP_RW_PRIV_UNPRIV, - MPU_ARMV8M_AP_RO_PRIV_ONLY, - MPU_ARMV8M_AP_RO_PRIV_UNPRIV -}; - -enum mpu_armv8m_attr_shared_t { - MPU_ARMV8M_SH_NONE, - MPU_ARMV8M_SH_UNUSED, - MPU_ARMV8M_SH_OUTER, - MPU_ARMV8M_SH_INNER -}; - -struct mpu_armv8m_region_cfg_t { - uint32_t region_nr; - uint32_t region_base; - uint32_t region_limit; - enum mpu_armv8m_attr_exec_t attr_exec; - enum mpu_armv8m_attr_access_t attr_access; - enum mpu_armv8m_attr_shared_t attr_sh; -}; - -struct mpu_armv8m_region_cfg_raw_t { - uint32_t region_nr; - uint32_t region_base; - uint32_t region_limit; -}; - - -/** - * \brief Enable MPU - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * \param[in] privdef_en privilege default region 1:enable 0:disable - * \param[in] hfnmi_en mpu for hard fault & nmi 1:enable 0:disable - * - * \return Error code \ref mpu_armv8m_error_t - * - * \note This function doesn't check if dev is NULL. - */ - -enum mpu_armv8m_error_t mpu_armv8m_enable(struct mpu_armv8m_dev_t *dev, - uint32_t privdef_en, - uint32_t hfnmi_en); - -/** - * \brief Disable MPU - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * - * \return Error code \ref arm_mpu_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpu_armv8m_error_t mpu_armv8m_disable(struct mpu_armv8m_dev_t *dev); - -/** - * \brief Disable MPU and clean all regions - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * - * \return Error code \ref arm_mpu_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpu_armv8m_error_t mpu_armv8m_clean(struct mpu_armv8m_dev_t *dev); - -/** - * \brief Enable MPU Region - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * \param[in] region_cfg MPU region config \ref mpu_armv8m_region_cfg_t - * - * \return Error code \ref arm_mpu_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpu_armv8m_error_t mpu_armv8m_region_enable( - struct mpu_armv8m_dev_t *dev, - struct mpu_armv8m_region_cfg_t *region_cfg); - -/** - * \brief Disable MPU Region - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * \param[in] region_nr Region number - * - * \return Error code \ref arm_mpu_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpu_armv8m_error_t mpu_armv8m_region_disable( - struct mpu_armv8m_dev_t *dev, - uint32_t region_nr); - -#endif /* __MPU_ARMV8M_DRV_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/ppc_sse200_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/ppc_sse200_drv.c deleted file mode 100644 index 2ea46b8043a..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/ppc_sse200_drv.c +++ /dev/null @@ -1,325 +0,0 @@ -/* - * Copyright (c) 2017-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ppc_sse200_drv.h" - -/* SPCTRL PPCs control memory mapped registers access structure */ -struct arm_spctrl_ppc_sse200_t { - volatile uint32_t reserved[8]; - volatile uint32_t secppcintstat; /* Secure PPC Interrupt Status */ - volatile uint32_t secppcintclr; /* Secure PPC Interrupt Clear */ - volatile uint32_t secppcinten; /* Secure PPC Interrupt Enable */ - volatile uint32_t reserved1[9]; - volatile uint32_t ahbnsppc0; /* Non-Secure Access AHB slave Peripheral - Protection Control #0 */ - volatile uint32_t reserved2[3]; /* Reserved for Future Non-secure Access - AHB Slave Peripheral Protection - Control */ - volatile uint32_t ahbnsppcexp0; /* Expansion 0 Non_Secure Access AHB - slave Peripheral Protection Control */ - volatile uint32_t ahbnsppcexp1; /* Expansion 1 Non_Secure Access AHB - slave Peripheral Protection Control */ - volatile uint32_t ahbnsppcexp2; /* Expansion 2 Non_Secure Access AHB - slave Peripheral Protection Control */ - volatile uint32_t ahbnsppcexp3; /* Expansion 3 Non_Secure Access AHB - slave Peripheral Protection Control */ - volatile uint32_t apbnsppc0; /* Non-Secure Access APB slave Peripheral - Protection Control 0 */ - volatile uint32_t apbnsppc1; /* Non-Secure Access APB slave Peripheral - Protection Control 1 */ - volatile uint32_t reserved3[2]; /* Non-Secure Access APB slave Peripheral - Protection Control [3:1] */ - volatile uint32_t apbnsppcexp0; /* Expansion 0 Non_Secure Access APB - slave Peripheral Protection Control */ - volatile uint32_t apbnsppcexp1; /* Expansion 1 Non_Secure Access APB - slave Peripheral Protection Control */ - volatile uint32_t apbnsppcexp2; /* Expansion 2 Non_Secure Access APB - slave Peripheral Protection Control */ - volatile uint32_t apbnsppcexp3; /* Expansion 3 Non_Secure Access APB - slave Peripheral Protection Control */ - volatile uint32_t ahbspppc0; /* Secure Unprivileged Access AHB slave - Peripheral Protection Control 0 */ - volatile uint32_t reserved4[3]; /* Reserved for Future Secure Unprivileged - Access AHB slave Peripheral Protection - Control */ - volatile uint32_t ahbspppcexp0; /* Expansion 0 Secure Unprivileged Access - AHB slave Peripheral Protection - Control */ - volatile uint32_t ahbspppcexp1; /* Expansion 1 Secure Unprivileged Access - AHB slave Peripheral Protection - Control */ - volatile uint32_t ahbspppcexp2; /* Expansion 2 Secure Unprivileged Access - AHB slave Peripheral Protection - Control */ - volatile uint32_t ahbspppcexp3; /* Expansion 3 Secure Unprivileged Access - AHB slave Peripheral Protection - Control */ - volatile uint32_t apbspppc0; /* Secure Unprivileged Access APB slave - Peripheral 0 */ - volatile uint32_t apbspppc1; /* Secure Unprivileged Access APB slave - Peripheral 1 */ - volatile uint32_t reserved5[2]; /* Reserved for Future Secure Unprivileged - Access APB slave Peripheral Protection - Control */ - volatile uint32_t apbspppcexp0; /* Expansion 0 Secure Unprivileged Access - APB slave Peripheral Protection - Control */ - volatile uint32_t apbspppcexp1; /* Expansion 1 Secure Unprivileged Access - APB slave Peripheral Protection - Control */ - volatile uint32_t apbspppcexp2; /* Expansion 2 Secure Unprivileged Access - APB slave Peripheral Protection - Control */ - volatile uint32_t apbspppcexp3; /* Expansion 3 Secure Unprivileged Access - APB slave Peripheral Protection - Control */ -}; - -/* NSPCTRL PPCs memory mapped register access structure */ -struct arm_nspctrl_ppc_sse200_t { - volatile uint32_t reserved[36]; - volatile uint32_t ahbnspppc0; - volatile uint32_t reserved1[3]; - volatile uint32_t ahbnspppcexp0; - volatile uint32_t ahbnspppcexp1; - volatile uint32_t ahbnspppcexp2; - volatile uint32_t ahbnspppcexp3; - volatile uint32_t apbnspppc0; - volatile uint32_t apbnspppc1; - volatile uint32_t reserved2[2]; - volatile uint32_t apbnspppcexp0; - volatile uint32_t apbnspppcexp1; - volatile uint32_t apbnspppcexp2; - volatile uint32_t apbnspppcexp3; -}; - -/* PPC interrupt position mask */ -#define APB_PPC0_INT_POS_MASK (1UL << 0) -#define APB_PPC1_INT_POS_MASK (1UL << 1) -/* Reseved bits 2:3 */ -#define APB_PPCEXP0_INT_POS_MASK (1UL << 4) -#define APB_PPCEXP1_INT_POS_MASK (1UL << 5) -#define APB_PPCEXP2_INT_POS_MASK (1UL << 6) -#define APB_PPCEXP3_INT_POS_MASK (1UL << 7) -/* Reseved bits 8:15 */ -#define AHB_PPC0_INT_POS_MASK (1UL << 16) -/* Reseved bits 17:19 */ -#define AHB_PPCEXP0_INT_POS_MASK (1UL << 20) -#define AHB_PPCEXP1_INT_POS_MASK (1UL << 21) -#define AHB_PPCEXP2_INT_POS_MASK (1UL << 22) -#define AHB_PPCEXP3_INT_POS_MASK (1UL << 23) -/* Reseved bits 24:31 */ - -/* ARM PPC state definitions */ -#define PPC_SSE200_INITIALIZED (1 << 0) - -/* Default peripheral states */ -#define SECURE_AS_DEFAULT_PERIPHERAL_STATE 1 -#define PRIVILEGE_ONLY_AS_DEFAULT_PERIPHERAL_STATE 1 - -void ppc_sse200_init(struct ppc_sse200_dev_t* dev, - enum ppc_sse200_name_t ppc_name) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - struct arm_nspctrl_ppc_sse200_t* p_nspctrl = - (struct arm_nspctrl_ppc_sse200_t*)dev->cfg->nspctrl_base; - - switch(ppc_name) { - case AHB_PPC0: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppc0; - dev->data->p_sp_ppc = &p_spctrl->ahbspppc0; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppc0; - dev->data->int_bit_mask = AHB_PPC0_INT_POS_MASK; - break; - case AHB_PPC_EXP0: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppcexp0; - dev->data->p_sp_ppc = &p_spctrl->ahbspppcexp0; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppcexp0; - dev->data->int_bit_mask = AHB_PPCEXP0_INT_POS_MASK; - break; - case AHB_PPC_EXP1: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppcexp1; - dev->data->p_sp_ppc = &p_spctrl->ahbspppcexp1; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppcexp1; - dev->data->int_bit_mask = AHB_PPCEXP1_INT_POS_MASK; - break; - case AHB_PPC_EXP2: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppcexp2; - dev->data->p_sp_ppc = &p_spctrl->ahbspppcexp2; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppcexp2; - dev->data->int_bit_mask = AHB_PPCEXP2_INT_POS_MASK; - break; - case AHB_PPC_EXP3: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppcexp3; - dev->data->p_sp_ppc = &p_spctrl->ahbspppcexp3; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppcexp3; - dev->data->int_bit_mask = AHB_PPCEXP3_INT_POS_MASK; - break; - case APB_PPC0: - dev->data->p_ns_ppc = &p_spctrl->apbnsppc0; - dev->data->p_sp_ppc = &p_spctrl->apbspppc0; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppc0; - dev->data->int_bit_mask = APB_PPC0_INT_POS_MASK; - break; - case APB_PPC1: - dev->data->p_ns_ppc = &p_spctrl->apbnsppc1; - dev->data->p_sp_ppc = &p_spctrl->apbspppc1; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppc1; - dev->data->int_bit_mask = APB_PPC1_INT_POS_MASK; - break; - case APB_PPC_EXP0: - dev->data->p_ns_ppc = &p_spctrl->apbnsppcexp0; - dev->data->p_sp_ppc = &p_spctrl->apbspppcexp0; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppcexp0; - dev->data->int_bit_mask = APB_PPCEXP0_INT_POS_MASK; - break; - case APB_PPC_EXP1: - dev->data->p_ns_ppc = &p_spctrl->apbnsppcexp1; - dev->data->p_sp_ppc = &p_spctrl->apbspppcexp1; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppcexp1; - dev->data->int_bit_mask = APB_PPCEXP1_INT_POS_MASK; - break; - case APB_PPC_EXP2: - dev->data->p_ns_ppc = &p_spctrl->apbnsppcexp2; - dev->data->p_sp_ppc = &p_spctrl->apbspppcexp2; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppcexp2; - dev->data->int_bit_mask = APB_PPCEXP2_INT_POS_MASK; - break; - case APB_PPC_EXP3: - dev->data->p_ns_ppc = &p_spctrl->apbnsppcexp3; - dev->data->p_sp_ppc = &p_spctrl->apbspppcexp3; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppcexp3; - dev->data->int_bit_mask = APB_PPCEXP3_INT_POS_MASK; - break; - /* default: The default is not defined intentionally to force the - * compiler to check that all enumeration values are - * covered in the switch.*/ - } - - dev->data->state = PPC_SSE200_INITIALIZED; -} - -enum ppc_sse200_error_t ppc_sse200_config_peripheral( - struct ppc_sse200_dev_t* dev, - uint8_t periph, - enum ppc_sse200_sec_attr_t sec_attr, - enum ppc_sse200_priv_attr_t priv_attr) -{ - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return PPC_SSE200_NOT_INIT; - } - - if(sec_attr == PPC_SSE200_SECURE_ONLY) { - /* Sets secure attribute */ - *(dev->data->p_ns_ppc) &= ~(1U << periph); - - /* Uses secure unprivileged access address (SPCTRL) to set privilege - * attribute */ - if(priv_attr == PPC_SSE200_PRIV_ONLY) { - *(dev->data->p_sp_ppc) &= ~(1U << periph); - } else { - *(dev->data->p_sp_ppc) |= (1U << periph); - } - } else { - /* Sets secure attribute */ - *(dev->data->p_ns_ppc) |= (1U << periph); - - /* Uses non-secure unprivileged access address (NSPCTRL) to set - * privilege attribute */ - if(priv_attr == PPC_SSE200_PRIV_ONLY) { - *(dev->data->p_nsp_ppc) &= ~(1U << periph); - } else { - *(dev->data->p_nsp_ppc) |= (1U << periph); - } - } - - return PPC_SSE200_ERR_NONE; -} - -uint32_t ppc_sse200_is_periph_secure(struct ppc_sse200_dev_t* dev, - uint8_t periph) -{ - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return SECURE_AS_DEFAULT_PERIPHERAL_STATE; - } - - return ((*(dev->data->p_ns_ppc) & (1U << periph)) == 0); -} - -uint32_t ppc_sse200_is_periph_priv_only(struct ppc_sse200_dev_t* dev, - uint8_t periph) -{ - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return PRIVILEGE_ONLY_AS_DEFAULT_PERIPHERAL_STATE; - } - - if ((*(dev->data->p_ns_ppc) & (1U << periph)) == 0) { - /* Returns secure unprivileged access address (SPCTRL) */ - return ((*(dev->data->p_sp_ppc) & (1U << periph)) == 0); - } else { - /* Returns non-secure unprivileged access address (NSPCTRL) */ - return ((*(dev->data->p_nsp_ppc) & (1U << periph)) == 0); - } -} - -enum ppc_sse200_error_t ppc_sse200_irq_enable(struct ppc_sse200_dev_t* dev) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return PPC_SSE200_NOT_INIT; - } - - p_spctrl->secppcinten |= dev->data->int_bit_mask; - - return PPC_SSE200_ERR_NONE; -} - -void ppc_sse200_irq_disable(struct ppc_sse200_dev_t* dev) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - - if(dev->data->state == PPC_SSE200_INITIALIZED) { - p_spctrl->secppcinten &= ~(dev->data->int_bit_mask); - } -} - -void ppc_sse200_clear_irq(struct ppc_sse200_dev_t* dev) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - - if(dev->data->state == PPC_SSE200_INITIALIZED) { - p_spctrl->secppcintclr = dev->data->int_bit_mask; - } -} - -uint32_t ppc_sse200_irq_state(struct ppc_sse200_dev_t* dev) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return 0; - } - - return ((p_spctrl->secppcintstat & dev->data->int_bit_mask) != 0); -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/ppc_sse200_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/ppc_sse200_drv.h deleted file mode 100644 index de567d427ba..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/ppc_sse200_drv.h +++ /dev/null @@ -1,192 +0,0 @@ -/* - * Copyright (c) 2017-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - * \file ppc_sse200_drv.h - * \brief Generic driver for ARM SEE 200 Peripheral Protection - * Controllers (PPC). - */ - -#ifndef __PPC_SSE_200_DRV_H__ -#define __PPC_SSE_200_DRV_H__ - -#include - -/* Secure Privilege Control Block aka SPCTRL */ -/* Non-Secure Privilege Control Block aka NSPCTRL */ - -/* ARM TrustZone PPC device configuration structure */ -struct ppc_sse200_dev_cfg_t { - uint32_t const spctrl_base; /*!< SPCTRL base address */ - uint32_t const nspctrl_base; /*!< NSPCTRL base address */ -}; - -/* ARM TrustZone PPC device data structure */ -struct ppc_sse200_dev_data_t { - volatile uint32_t* p_ns_ppc; /*!< Pointer to non-secure register */ - volatile uint32_t* p_sp_ppc; /*!< Pointer to secure unprivileged - register */ - volatile uint32_t* p_nsp_ppc; /*!< Pointer to non-secure unprivileged - register */ - uint32_t int_bit_mask; /*!< Interrupt bit mask */ - uint8_t state; /*!< Indicates if the PPC driver - is initialized */ - uint8_t reserved[3]; /*!< 32 bits alignment */ -}; - -/* ARM PPC device structure */ -struct ppc_sse200_dev_t { - const struct ppc_sse200_dev_cfg_t* const cfg; /*!< PPC configuration */ - struct ppc_sse200_dev_data_t* const data; /*!< PPC data */ -}; - -/* Security attribute used to configure the peripheral */ -enum ppc_sse200_sec_attr_t { - PPC_SSE200_SECURE_ONLY, /*! Secure access */ - PPC_SSE200_NONSECURE_ONLY, /*! Non-secure access */ -}; - -/* Privilege attribute used to configure the peripheral */ -enum ppc_sse200_priv_attr_t { - PPC_SSE200_PRIV_AND_NONPRIV, /*! Privilege and non-Privilege access */ - PPC_SSE200_PRIV_ONLY, /*! Privilege only access */ -}; - -/* ARM PPC error codes */ -enum ppc_sse200_error_t { - PPC_SSE200_ERR_NONE = 0, /*!< No error */ - PPC_SSE200_NOT_INIT, /*!< PPC not initialized */ -}; - -/* ARM PPC names */ -enum ppc_sse200_name_t { - AHB_PPC0 = 0, /*!< AHB PPC0 */ - AHB_PPC_EXP0, /*!< Expansion 0 AHB PPC */ - AHB_PPC_EXP1, /*!< Expansion 1 AHB PPC */ - AHB_PPC_EXP2, /*!< Expansion 2 AHB PPC */ - AHB_PPC_EXP3, /*!< Expansion 3 AHB PPC */ - APB_PPC0, /*!< APB PPC0 */ - APB_PPC1, /*!< APB PPC1 */ - APB_PPC_EXP0, /*!< Expansion 0 APB PPC */ - APB_PPC_EXP1, /*!< Expansion 1 APB PPC */ - APB_PPC_EXP2, /*!< Expansion 2 APB PPC */ - APB_PPC_EXP3 /*!< Expansion 3 APB PPC */ -}; - -/** - * \brief Initialize the PPC device. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * \param[in] ppc_name PPC name \ref ppc_sse200_name_t - * - * \note This function doesn't check if dev is NULL. - */ -void ppc_sse200_init(struct ppc_sse200_dev_t* dev, - enum ppc_sse200_name_t ppc_name); - -/** - * \brief Configures the PPC device. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * \param[in] periph Peripheral position in the PPC. - * \param[in] sec_attr Secure attribute value. - * \param[in] priv_attr Privilege attribute value. - * - * \return Returns error code as specified in \ref ppc_sse200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum ppc_sse200_error_t ppc_sse200_config_peripheral( - struct ppc_sse200_dev_t* dev, - uint8_t periph, - enum ppc_sse200_sec_attr_t sec_attr, - enum ppc_sse200_priv_attr_t priv_attr); -/** - * \brief Checks if the peripheral is configured as secure or non-secure. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * \param[in] periph Peripheral position in the PPC. - * - * \return Returns 1 for secure and 0 for non-secure. - * If the driver is not initalized the return value is 1 (secure) as - * it is the default system configuration. - * - * \note This function doesn't check if dev is NULL. - */ -uint32_t ppc_sse200_is_periph_secure(struct ppc_sse200_dev_t* dev, - uint8_t periph); - -/** - * \brief Checks if the peripheral is configured as Privilege only or - * Privilege and non-Privilege access mode. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * \param[in] periph Peripheral position in the PPC. - * - * \return Returns 1 for Privilege only configuration and 0 for Privilege and - * non-Privilege access. - * If the driver is not initalized the return of this function is - * 1 (Privilege only) as it is the default system configuration. - * - * \note This function doesn't check if dev is NULL. - */ -uint32_t ppc_sse200_is_periph_priv_only(struct ppc_sse200_dev_t* dev, - uint8_t periph); -/** - * \brief Enables PPC interrupt. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * - * \return Returns error code as specified in \ref ppc_sse200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum ppc_sse200_error_t ppc_sse200_irq_enable(struct ppc_sse200_dev_t* dev); - -/** - * \brief Disables PPC interrupt. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void ppc_sse200_irq_disable(struct ppc_sse200_dev_t* dev); - -/** - * \brief Clears PPC interrupt. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void ppc_sse200_clear_irq(struct ppc_sse200_dev_t* dev); - -/** - * \brief Returns the PPC interrupt state. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * - * \return Returns 1 if the interrupt is active and otherwise 0. - * If the driver is not initalized the return of this function is - * 0 (not active) as it is the default system configuration. - * - * \note This function doesn't check if dev is NULL. - */ -uint32_t ppc_sse200_irq_state(struct ppc_sse200_dev_t* dev); - -#endif /* __PPC_SSE_200_DRV_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/qspi_ip6514e_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/qspi_ip6514e_drv.c deleted file mode 100644 index c213d700ea6..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/qspi_ip6514e_drv.c +++ /dev/null @@ -1,757 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include -#include -/* Use memcpy */ -#include - -#include "qspi_ip6514e_drv.h" - -/** Setter bit manipulation macro */ -#define SET_BIT(WORD, BIT_INDEX) ((WORD) |= (1U << (BIT_INDEX))) -/** Clearing bit manipulation macro */ -#define CLR_BIT(WORD, BIT_INDEX) ((WORD) &= ~(1U << (BIT_INDEX))) -/** Getter bit manipulation macro */ -#define GET_BIT(WORD, BIT_INDEX) (bool)(((WORD) & (1U << (BIT_INDEX)))) - -#define WORD_ALIGN_4B_MASK 0x3U /* Mask the first 2 bits */ -#define IS_ADDR_ALIGNED(ADDR) (((uint32_t)(ADDR) & (WORD_ALIGN_4B_MASK)) == 0U) - -#define BITS_PER_BYTE 8U -#define BITS_PER_WORD 32U - -#define CFG_READS true -#define CFG_WRITES false - -#define ARG_NOT_USED 0 -#define ARG_PTR_NOT_USED NULL - -#define DATA_REG_NUMBER 2U -#define DATA_REG_LOWER 0U -#define DATA_REG_UPPER 1U - -#define ERROR_VALUE 0xFFFFFFFFU - -/** - * \brief QSPI IP6514E register map structure - */ -struct _qspi_ip6514e_reg_map_t { - volatile uint32_t qspi_cfg; /*!< 0x00 (R/W) */ - volatile uint32_t device_read_inst; /*!< 0x04 (R/W) */ - volatile uint32_t device_write_inst; /*!< 0x08 (R/W) */ - volatile uint32_t hidden1[2]; - volatile uint32_t device_size; /*!< 0x14 (R/W) */ - volatile uint32_t hidden2[3]; - volatile uint32_t remap_addr; /*!< 0x24 (R/W) */ - volatile uint32_t hidden3[26]; - volatile uint32_t flash_cmd_ctrl; /*!< 0x90 (R/W) */ - volatile uint32_t flash_cmd_addr; /*!< 0x94 (R/W) */ - volatile uint32_t hidden4[2]; - volatile uint32_t flash_cmd_read_data_lower; /*!< 0xA0 (R/ ) */ - volatile uint32_t flash_cmd_read_data_upper; /*!< 0xA4 (R/ ) */ - volatile uint32_t flash_cmd_write_data_lower; /*!< 0xA8 (R/W) */ - volatile uint32_t flash_cmd_write_data_upper; /*!< 0xAC (R/W) */ - volatile uint32_t hidden5[2]; -}; - -/** QSPI Configuration register description (offset 0x00) */ -#define QSPI_CFG_ENABLE_POS 0U -#define QSPI_CFG_ENABLE_ADDR_REMAP_POS 16U -#define QSPI_CFG_BAUD_DIV_POS 19U - #define QSPI_CFG_BAUD_DIV_MIN 2U - #define QSPI_CFG_BAUD_DIV_MAX 32U - #define QSPI_CFG_BAUD_DIV_BITS 4U -#define QSPI_CFG_IDLE_POS 31U - -/** - * Device Read/Write Instruction registers description (offset 0x04 and 0x08). - * These values are the same for the Device Read Instruction register at offset - * 0x04 and the Device Write Instruction register at offset 0x08. - */ -#define DEVICE_READ_WRITE_INST_OPCODE_POS 0U -#define DEVICE_READ_INST_INST_TYPE_POS 8U /* Only applies to the Read - * register. */ -#define DEVICE_READ_WRITE_INST_ADDR_TYPE_POS 12U -#define DEVICE_READ_WRITE_INST_DATA_TYPE_POS 16U - #define DEVICE_READ_WRITE_INST_MODE_QSPI 2U - #define DEVICE_READ_WRITE_INST_MODE_DSPI 1U - #define DEVICE_READ_WRITE_INST_MODE_SPI 0U - #define DEVICE_READ_WRITE_INST_MODE_BITS 2U -#define DEVICE_READ_WRITE_INST_DUMMY_CYCLES_POS 24U - #define DEVICE_READ_WRITE_INST_DUMMY_CYCLES_BITS 5U - #define DEVICE_READ_WRITE_INST_DUMMY_CYCLES_MAX 31U - -/** Device Size Configuration register description (offset 0x14) */ -#define DEVICE_SIZE_ADDR_BYTES_POS 0U - #define DEVICE_SIZE_ADDR_BYTES_MIN 1U - #define DEVICE_SIZE_ADDR_BYTES_MAX 16U - #define DEVICE_SIZE_ADDR_BYTES_BITS 4U -#define DEVICE_SIZE_PAGE_BYTES_POS 4U - #define DEVICE_SIZE_PAGE_BYTES_MAX 4095U - #define DEVICE_SIZE_PAGE_BYTES_BITS 12U - -/** Flash Command Control register description (offset 0x90) */ -#define FLASH_CMD_CTRL_EXECUTE_POS 0U -#define FLASH_CMD_CTRL_BUSY_POS 1U -#define FLASH_CMD_CTRL_DUMMY_CYCLES_POS 7U - #define FLASH_CMD_CTRL_DUMMY_CYCLES_MAX 31U - #define FLASH_CMD_CTRL_DUMMY_CYCLES_BITS 5U -#define FLASH_CMD_CTRL_WRITE_BYTES_POS 12U - #define FLASH_CMD_CTRL_WRITE_BYTES_MAX 8U - #define FLASH_CMD_CTRL_WRITE_BYTES_BITS 3U -#define FLASH_CMD_CTRL_WRITE_ENABLE_POS 15U -#define FLASH_CMD_CTRL_ADDR_BYTES_POS 16U - #define FLASH_CMD_CTRL_ADDR_BYTES_MAX 4U - #define FLASH_CMD_CTRL_ADDR_BYTES_BITS 2U -#define FLASH_CMD_CTRL_ADDR_ENABLE_POS 19U -#define FLASH_CMD_CTRL_READ_BYTES_POS 20U - #define FLASH_CMD_CTRL_READ_BYTES_MAX 8U - #define FLASH_CMD_CTRL_READ_BYTES_BITS 3U -#define FLASH_CMD_CTRL_READ_ENABLE_POS 23U -#define FLASH_CMD_CTRL_OPCODE_POS 24U - -/** Default register values of the QSPI Flash controller */ -#define QSPI_CFG_REG_RESET_VALUE (0x80780081U) -#define DEVICE_READ_INSTR_REG_RESET_VALUE (0x00000003U) -#define DEVICE_WRITE_INSTR_REG_RESET_VALUE (0x00000002U) -#define DEVICE_SIZE_CFG_REG_RESET_VALUE (0x00101002U) -#define REMAP_ADDR_REG_RESET_VALUE (0x00000000U) -#define FLASH_CMD_CONTROL_REG_RESET_VALUE (0x00000000U) -#define FLASH_CMD_ADDRESS_REG_RESET_VALUE (0x00000000U) -#define FLASH_CMD_WRITE_DATA_REG_RESET_VALUE (0x00000000U) - -/** - * \brief Change specific bits in a 32 bits word. - * - * \param[in,out] word Pointer of the word to change - * \param[in] bits bits_length bits to put at bits_pos in the word - * pointed - * \param[in] bits_length Number of bits to change - * \param[in] bits_pos Position of the bits to change - * - * \note This function will do nothing if the parameters given are incorret: - * * word is NULL - * * bits_length + bits_pos > 32 - * * bits_length is 0 - */ -static void change_bits_in_word(volatile uint32_t *word, - uint32_t bits, - uint32_t bits_length, - uint32_t bits_pos) -{ - uint32_t mask; - - if ((word == NULL) || - ((bits_length + bits_pos) > BITS_PER_WORD) || - (bits_length == 0U)) { - /* Silently fail */ - return; - } - - /* Change all the bits */ - if (bits_length == BITS_PER_WORD) { - *word = bits; - return; - } - - mask = ((1U << bits_length) - 1); - /* - * We change the bits in three steps: - * - clear bits_length bits with zeroes at bits_pos in the word - * - mask bits in case it contains more than bits_length bits - * - set the new bits in the cleared word - * Because the data pointed by word is only read once, the data will still - * be coherent after an interruption that changes it. - */ - *word = ((*word & ~(mask << bits_pos)) | ((bits & mask) << bits_pos)); -} - -/** - * \brief Configure reads or writes commands for direct operations. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] opcode Read/write opcode that will be used for every - * direct read/write - * \param[in] dummy_cycles Number of dummy cycles to wait before triggering - * the command, this value must be between 0 and 31 - * (both included) - * \param[in] is_reads_cfg true to configure direct reads, false to configure - * direct writes - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - */ -static enum qspi_ip6514e_error_t qspi_ip6514e_cfg_reads_writes( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles, - bool is_reads_cfg) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - /* - * Select the good register address if we want to configure reads or writes. - */ - volatile uint32_t *device_read_write_inst_reg = is_reads_cfg ? - &(reg_map->device_read_inst) : - &(reg_map->device_write_inst); - uint32_t device_read_write_inst_reg_copy = *device_read_write_inst_reg; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - if (dummy_cycles > DEVICE_READ_WRITE_INST_DUMMY_CYCLES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - change_bits_in_word(&device_read_write_inst_reg_copy, - (uint32_t)opcode, - BITS_PER_BYTE, - DEVICE_READ_WRITE_INST_OPCODE_POS); - change_bits_in_word(&device_read_write_inst_reg_copy, - dummy_cycles, - DEVICE_READ_WRITE_INST_DUMMY_CYCLES_BITS, - DEVICE_READ_WRITE_INST_DUMMY_CYCLES_POS); - - *device_read_write_inst_reg = device_read_write_inst_reg_copy; - - return QSPI_IP6514E_ERR_NONE; -} - -/** - * \brief Given the public SPI mode enumeration, returns the private value it - * maps to in the register field. - * - * \param[in] spi_mode Read/write opcode that will be used for every direct - * read/write - * - * \return Return the correct DEVICE_READ_WRITE_INST_MODE value. - */ -static uint32_t spi_mode_field_value(enum qspi_ip6514e_spi_mode_t spi_mode) -{ - switch (spi_mode) { - case QSPI_IP6514E_SPI_MODE: - return DEVICE_READ_WRITE_INST_MODE_SPI; - case QSPI_IP6514E_DSPI_MODE: - return DEVICE_READ_WRITE_INST_MODE_DSPI; - case QSPI_IP6514E_QSPI_MODE: - return DEVICE_READ_WRITE_INST_MODE_QSPI; - default: - return ERROR_VALUE; - } -} - -bool qspi_ip6514e_is_idle(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - return GET_BIT(reg_map->qspi_cfg, QSPI_CFG_IDLE_POS); -} - -bool qspi_ip6514e_is_enabled(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - return GET_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_POS); -} - -void qspi_ip6514e_disable(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - CLR_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_POS); -} - -void qspi_ip6514e_enable(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - SET_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_POS); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_set_baud_rate_div( - struct qspi_ip6514e_dev_t* dev, - uint32_t div) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - /* div should be an even number. */ - if (((div & 1U) == 1) || - (div < QSPI_CFG_BAUD_DIV_MIN) || - (div > QSPI_CFG_BAUD_DIV_MAX)) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - /* - * The div value (between 2 and 32) needs to be stored in the register on a - * 4 bits field. - */ - change_bits_in_word(&(reg_map->qspi_cfg), - (div / 2) - 1, - QSPI_CFG_BAUD_DIV_BITS, - QSPI_CFG_BAUD_DIV_POS); - - return QSPI_IP6514E_ERR_NONE; -} - -enum qspi_ip6514e_error_t qspi_ip6514e_set_spi_mode( - struct qspi_ip6514e_dev_t* dev, - enum qspi_ip6514e_spi_mode_t inst_type, - enum qspi_ip6514e_spi_mode_t addr_type, - enum qspi_ip6514e_spi_mode_t data_type) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - uint32_t inst_spi_mode, addr_spi_mode, data_spi_mode; - /* - * A local copy of the Device Read Instruction and Device Write Instruction - * registers is used to limit APB accesses. - */ - uint32_t device_read_inst_cpy = reg_map->device_read_inst; - uint32_t device_write_inst_cpy = reg_map->device_write_inst; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - /* - * First check that the instruction mode is not SPI. If that is the case, - * the address and data mode register fields become DO NOT CARE. - */ - inst_spi_mode = spi_mode_field_value(inst_type); - if (inst_spi_mode == ERROR_VALUE) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - if (inst_type != QSPI_IP6514E_SPI_MODE) { - change_bits_in_word(&(reg_map->device_read_inst), - inst_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_INST_INST_TYPE_POS); - return QSPI_IP6514E_ERR_NONE; - } - - /* Now check and set address and data modes. */ - addr_spi_mode = spi_mode_field_value(addr_type); - data_spi_mode = spi_mode_field_value(data_type); - if ((addr_spi_mode == ERROR_VALUE) || (data_spi_mode == ERROR_VALUE)) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - /* Change the Device Read Instruction register. */ - change_bits_in_word(&device_read_inst_cpy, - inst_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_INST_INST_TYPE_POS); - change_bits_in_word(&device_read_inst_cpy, - addr_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_WRITE_INST_ADDR_TYPE_POS); - change_bits_in_word(&device_read_inst_cpy, - data_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_WRITE_INST_DATA_TYPE_POS); - - /* Change the Device Write Instruction register. */ - change_bits_in_word(&device_write_inst_cpy, - addr_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_WRITE_INST_ADDR_TYPE_POS); - change_bits_in_word(&device_write_inst_cpy, - data_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_WRITE_INST_DATA_TYPE_POS); - - /* Save the changes. */ - reg_map->device_read_inst = device_read_inst_cpy; - reg_map->device_write_inst = device_write_inst_cpy; - - return QSPI_IP6514E_ERR_NONE; -} - -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_reads(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles) -{ - return qspi_ip6514e_cfg_reads_writes(dev, opcode, dummy_cycles, CFG_READS); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_writes( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles) -{ - return qspi_ip6514e_cfg_reads_writes(dev, opcode, dummy_cycles, CFG_WRITES); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_page_size( - struct qspi_ip6514e_dev_t* dev, - uint32_t page_size) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - if (page_size > DEVICE_SIZE_PAGE_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - change_bits_in_word(&(reg_map->device_size), - page_size, - DEVICE_SIZE_PAGE_BYTES_BITS, - DEVICE_SIZE_PAGE_BYTES_POS); - - return QSPI_IP6514E_ERR_NONE; -} - -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_addr_bytes( - struct qspi_ip6514e_dev_t* dev, - uint32_t bytes_number) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - if (bytes_number < DEVICE_SIZE_ADDR_BYTES_MIN || - bytes_number > DEVICE_SIZE_ADDR_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - change_bits_in_word(&(reg_map->device_size), - bytes_number - 1, - DEVICE_SIZE_ADDR_BYTES_BITS, - DEVICE_SIZE_ADDR_BYTES_POS); - - - return QSPI_IP6514E_ERR_NONE; -} - -void qspi_ip6514e_remap_addr(struct qspi_ip6514e_dev_t* dev, uint32_t offset) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - /* Save the enable state to restore it after. */ - bool is_enabled = qspi_ip6514e_is_enabled(dev); - - if (is_enabled) { - qspi_ip6514e_disable(dev); - } - - reg_map->remap_addr = offset; - SET_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_ADDR_REMAP_POS); - - if (is_enabled) { - qspi_ip6514e_enable(dev); - } -} - -void qspi_ip6514e_disable_remap(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - /* Save the enable state to restore it after. */ - bool is_enabled = qspi_ip6514e_is_enabled(dev); - - if (is_enabled) { - qspi_ip6514e_disable(dev); - } - - CLR_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_ADDR_REMAP_POS); - - if (is_enabled) { - qspi_ip6514e_enable(dev); - } -} - -void qspi_ip6514e_reset_regs(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - /* Restore the default value of the QSPI Configuration register. */ - reg_map->qspi_cfg = QSPI_CFG_REG_RESET_VALUE; - - /* Restore the default value of the Device R/W Instruction registers. */ - reg_map->device_read_inst = DEVICE_READ_INSTR_REG_RESET_VALUE; - reg_map->device_write_inst = DEVICE_WRITE_INSTR_REG_RESET_VALUE; - - /* Restore the default value of the Device Size Configuration register. */ - reg_map->device_size = DEVICE_SIZE_CFG_REG_RESET_VALUE; - - /* Restore the default value of the Remap Address register. */ - reg_map->remap_addr = REMAP_ADDR_REG_RESET_VALUE; - - /* Restore the default value of the Flash Command Control register. */ - reg_map->flash_cmd_ctrl = FLASH_CMD_CONTROL_REG_RESET_VALUE; - /* Restore the default value of the Flash Command Address register. */ - reg_map->flash_cmd_addr = FLASH_CMD_ADDRESS_REG_RESET_VALUE; - - /* Restore the default value of the Flash Command Write Data registers. */ - reg_map->flash_cmd_write_data_lower = FLASH_CMD_WRITE_DATA_REG_RESET_VALUE; - reg_map->flash_cmd_write_data_upper = FLASH_CMD_WRITE_DATA_REG_RESET_VALUE; - - /* - * This function does not affect the Flash Command Read Data registers - * which are completely Read-Only. - */ -} - -enum qspi_ip6514e_error_t qspi_ip6514e_send_cmd(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - void *read_data, - uint32_t read_len, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - /* To limit APB accesses, we set this reg up locally before */ - uint32_t flash_cmd_ctrl = 0U; - bool read_requested = ((read_data != NULL) && (read_len != 0)); - bool write_requested = ((write_data != NULL) && (write_len != 0)); - bool addr_requested = (addr_bytes_number != 0); - /* - * To prevent unaligned and byte or halfbyte accesses to the APB registers, - * a word aligned buffer is used to temporary transfer the data before doing - * word accesses on these registers from that buffer. - */ - uint32_t data_regs[DATA_REG_NUMBER] = {0}; - - if (read_len > FLASH_CMD_CTRL_READ_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - if (write_len > FLASH_CMD_CTRL_WRITE_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - if (addr_bytes_number > FLASH_CMD_CTRL_ADDR_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - if (dummy_cycles > FLASH_CMD_CTRL_DUMMY_CYCLES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - if (read_requested && write_requested) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - change_bits_in_word(&flash_cmd_ctrl, - (uint32_t)opcode, - BITS_PER_BYTE, - FLASH_CMD_CTRL_OPCODE_POS); - - /* Enable read if requested */ - if (read_requested) { - SET_BIT(flash_cmd_ctrl, FLASH_CMD_CTRL_READ_ENABLE_POS); - change_bits_in_word(&flash_cmd_ctrl, - read_len - 1, - FLASH_CMD_CTRL_READ_BYTES_BITS, - FLASH_CMD_CTRL_READ_BYTES_POS); - } - - /* Enable write if requested */ - if (write_requested) { - SET_BIT(flash_cmd_ctrl, FLASH_CMD_CTRL_WRITE_ENABLE_POS); - change_bits_in_word(&flash_cmd_ctrl, - write_len - 1, - FLASH_CMD_CTRL_WRITE_BYTES_BITS, - FLASH_CMD_CTRL_WRITE_BYTES_POS); - - if (IS_ADDR_ALIGNED(write_data) && IS_ADDR_ALIGNED(write_len)) { - /* - * Optimised case when write_data is word aligned and write_len is - * 4 or 8. - */ - reg_map->flash_cmd_write_data_lower = *(uint32_t *)write_data; - if (write_len == FLASH_CMD_CTRL_WRITE_BYTES_MAX) { - reg_map->flash_cmd_write_data_upper = - *((uint32_t *)write_data + 1); - } - } else { - /* - * data_regs is used as a buffer to only do unaligned access on the - * AHB bus and word aligned accesses to the APB registers. - */ - memcpy((void *)data_regs, write_data, write_len); - /* - * Only write_len bytes will be written even if both data registers - * are written. - */ - reg_map->flash_cmd_write_data_lower = data_regs[DATA_REG_LOWER]; - reg_map->flash_cmd_write_data_upper = data_regs[DATA_REG_UPPER]; - } - } - - /* Enable the address if requested */ - if (addr_requested) { - SET_BIT(flash_cmd_ctrl, FLASH_CMD_CTRL_ADDR_ENABLE_POS); - reg_map->flash_cmd_addr = addr; - change_bits_in_word(&flash_cmd_ctrl, - addr_bytes_number - 1, - FLASH_CMD_CTRL_ADDR_BYTES_BITS, - FLASH_CMD_CTRL_ADDR_BYTES_POS); - } - - /* Put dummy cycles number */ - change_bits_in_word(&flash_cmd_ctrl, - dummy_cycles, - FLASH_CMD_CTRL_DUMMY_CYCLES_BITS, - FLASH_CMD_CTRL_DUMMY_CYCLES_POS); - - /* Copy the Flash Command Control register and execute the command */ - reg_map->flash_cmd_ctrl = flash_cmd_ctrl; - SET_BIT(reg_map->flash_cmd_ctrl, FLASH_CMD_CTRL_EXECUTE_POS); - - /* Wait for termination */ - while (GET_BIT(reg_map->flash_cmd_ctrl, FLASH_CMD_CTRL_BUSY_POS)); - - /* - * Recolt the read data if it was requested. read_len validity has already - * been verified at this point. - */ - if (read_requested) { - if (IS_ADDR_ALIGNED(read_data) && IS_ADDR_ALIGNED(read_len)) { - /* - * Optimised case when read_data is word aligned and read_len is - * 4 or 8. - */ - *(uint32_t *)read_data = reg_map->flash_cmd_read_data_lower; - if (read_len == FLASH_CMD_CTRL_READ_BYTES_MAX) { - *((uint32_t *)read_data + 1) = - reg_map->flash_cmd_read_data_upper; - } - } else { - /* - * Only read_len bytes have been written even if both data registers - * are written. - */ - data_regs[DATA_REG_LOWER] = reg_map->flash_cmd_read_data_lower; - data_regs[DATA_REG_UPPER] = reg_map->flash_cmd_read_data_upper; - /* - * data_regs is used as a buffer to only do unaligned access on the - * AHB bus and word aligned accesses to the APB registers. - */ - memcpy(read_data, (void *)data_regs, read_len); - } - } - - return QSPI_IP6514E_ERR_NONE; -} - -void qspi_ip6514e_send_simple_cmd(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode) -{ - /* - * No read/write data, no address, no dummy cycles. - * Given the arguments, this function can not fail. - */ - (void)qspi_ip6514e_send_cmd(dev, - opcode, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - ARG_NOT_USED, - ARG_NOT_USED, - 0); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_send_read_cmd( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - void *read_data, - uint32_t read_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles) -{ - /* Read arguments are expected */ - if (read_data == ARG_PTR_NOT_USED || read_len == ARG_NOT_USED) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - /* No write data */ - return qspi_ip6514e_send_cmd(dev, - opcode, - read_data, - read_len, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - addr, - addr_bytes_number, - dummy_cycles); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_send_write_cmd( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles) -{ - /* Write arguments are expected */ - if (write_data == ARG_PTR_NOT_USED || write_len == ARG_NOT_USED) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - /* No read data, no dummy cycles */ - return qspi_ip6514e_send_cmd(dev, - opcode, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - write_data, - write_len, - addr, - addr_bytes_number, - dummy_cycles); -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/qspi_ip6514e_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/qspi_ip6514e_drv.h deleted file mode 100644 index e5d4adeb7ef..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/device/drivers/qspi_ip6514e_drv.h +++ /dev/null @@ -1,418 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - * \file qspi_ip6514e_drv.h - * \brief Driver for Cadence QSPI Flash Controller IP. - * There are two ways to communicate with the flash memory device: - * - issue AHB requests for direct read and writes in the Flash memory - * mapped address zone. The commands used for those can be configured - * by the driver - * - send a command to the device to access his internal registers and - * do other operations like erasing a sector - * At reset, the QSPI controller will work in a default mode which will - * allow to do basic commands. It should be configured with the - * flash memory device specifications for optimal use for commands and - * direct reads/writes. Here is an example of configuration: - * - send command to activate QSPI mode on the flash memory device - * - send command to change dummy cycles on the flash memory device - * - check if any operation is ungoing - * - disable the QSPI controller - * - change the baud rate divisor - * - activate the QSPI mode on the controller - * - change the dummy cycles number and opcode for reads/writes - * - change the number of bytes per page - * - change the number of address bytes - * - activate the QSPI controller - * - * Warning: none of the functions declared here check if the dev - * argument points to NULL. - */ - -#ifndef __QSPI_IP6514E_DRV_H__ -#define __QSPI_IP6514E_DRV_H__ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * \brief Cadence QSPI IP6514E error enumeration types - */ -enum qspi_ip6514e_error_t { - QSPI_IP6514E_ERR_NONE, - QSPI_IP6514E_ERR_WRONG_ARGUMENT, - QSPI_IP6514E_ERR_CONTROLLER_NOT_DISABLED, - QSPI_IP6514E_ERR_READ_IN_PROGRESS, - QSPI_IP6514E_ERR_WRITE_IN_PROGRESS, - /* Any new error should be added to the enumeration type error of - * the corresponding Flash device library as well. - */ -}; - -/** - * \brief Cadence QSPI IP6514E SPI modes - */ -enum qspi_ip6514e_spi_mode_t { - QSPI_IP6514E_SPI_MODE, - /*!< Use 1 line for Instruction, Address and Data */ - QSPI_IP6514E_DSPI_MODE, - /*!< Use 2 lines for Instruction, Address and Data */ - QSPI_IP6514E_QSPI_MODE, - /*!< Use 4 lines for Instruction, Address and Data */ -}; - -/** - * \brief Cadence QSPI IP6514E device configuration structure - */ -struct qspi_ip6514e_dev_cfg_t { - const uint32_t base; /*!< QSPI IP6514E base address */ - /* - * If not all the AHB wires are connected to the QSPI Flash Controller the - * driver can still access all of the Flash memory. The bits of this value - * should be put to 1 for every wire that is connected. Set it to - * 0xFFFFFFFFU if all AHB address wires are connected to the - * QSPI Flash Controller. - */ - uint32_t addr_mask; -}; - -/** - * \brief Cadence QSPI IP6514E device structure - */ -struct qspi_ip6514e_dev_t { - const struct qspi_ip6514e_dev_cfg_t* const cfg; - /*!< QSPI IP6514E configuration */ -}; - -/** - * \brief Check if the controller is idle. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * - * \return true if the controller is idle, false otherwise. - */ -bool qspi_ip6514e_is_idle(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Check if the controller is enabled. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * - * \return true if the controller is enabled, false otherwise. - */ -bool qspi_ip6514e_is_enabled(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Disable the QSPI controller. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - */ -void qspi_ip6514e_disable(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Enable the QSPI controller. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - */ -void qspi_ip6514e_enable(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Change the baud rate divisor. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] div Baud rate divisor value. It can only be an even number - * between 2 and 32 (both included). - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI frequency is calculated dividing the QSPI controller clock by - * this divisor. Please check Flash memory device specifications to know - * the maximal frequency that can be used. - * \note The QSPI controller should be disabled before calling this function. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_set_baud_rate_div( - struct qspi_ip6514e_dev_t* dev, - uint32_t div); - -/** - * \brief Set SPI mode for instruction, address and data. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] inst_type SPI mode to use for the instruction part of the command - * \param[in] addr_type SPI mode to use for the address part of the command - * \param[in] data_type SPI mode to use for the data part of the command - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - * \note Changing this setting will affect commands and direct operations. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_set_spi_mode( - struct qspi_ip6514e_dev_t* dev, - enum qspi_ip6514e_spi_mode_t inst_type, - enum qspi_ip6514e_spi_mode_t addr_type, - enum qspi_ip6514e_spi_mode_t data_type); - -/** - * \brief Configure read commands for direct reads. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] opcode Read opcode that will be used for every direct read - * \param[in] dummy_cycles Number of dummy cycles to wait before triggering the - * command, this value must be between 0 and 31 - * (both included) - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_reads(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles); - -/** - * \brief Configure write commands for direct writes. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] opcode Write opcode that will be used for every direct write - * \param[in] dummy_cycles Number of dummy cycles to wait before triggering the - * command, this value must be between 0 and 31 - * (both included) - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_writes( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles); - -/** - * \brief Change the number of bytes per device page. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] page_size Number of bytes per device page, must be between 0 - * and 4095 (both included) - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - * \note This function will affect direct reads/writes. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_page_size( - struct qspi_ip6514e_dev_t* dev, - uint32_t page_size); - -/** - * \brief Change the number of device address bytes. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] bytes_number Number of device address bytes, must be between 1 - * and 16 (both included) - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - * \note This function will affect direct reads/writes. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_addr_bytes( - struct qspi_ip6514e_dev_t* dev, - uint32_t bytes_number); - -/** - * \brief Remap the incoming AHB address with an offset for direct accesses. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] offset Offset that will be added to the incoming AHB address to - * access the Flash memory - * - * \note This function will only affect direct reads/writes. - * \note This function does not check if the resulting address is out of memory - * bounds. - */ -void qspi_ip6514e_remap_addr(struct qspi_ip6514e_dev_t* dev, uint32_t offset); - -/** - * \brief Disable AHB address remapping for direct accesses. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * - * \note This function will disable the controller if it is not already - * disabled and enable it again (if it was). - * \note This function will only affect direct reads/writes. - */ -void qspi_ip6514e_disable_remap(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Restore the default value of the QSPI controller registers. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * - * \note The QSPI controller should be disabled before calling this function. - */ -void qspi_ip6514e_reset_regs(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Send a command to the flash memory device using the Software Triggered - * Instruction Generator (STIG). - * - * \param[in] dev QSPI IP6514E device struct - * \ref qspi_ip6514e_dev_t - * \param[in] opcode Opcode for the command. - * \param[out] read_data Pointer to a memory zone where the read_len - * bytes read will be written to. If no data is to - * be read for the command, - * this argument should be NULL. - * \param[in] read_len Number of bytes to read for the command. If - * no bytes are to be read, use 0 for argument - * otherwise between 1 and 8 bytes (both - * included) can be read. - * \param[in] write_data Pointer to a memory zone where are - * located the write_len bytes to write for - * this command. If no bytes are to be written, - * use NULL as argument. - * \param[in] write_len Number of bytes to write for the command. If - * no bytes are to be written, use 0 for - * argument otherwise between 1 and 8 bytes - * (both included) can be written. - * \param[in] addr Address used for the command - * \param[in] addr_bytes_number Number of address bytes for this command. - * If an address is not needed for the command, - * use 0 for argument, otherwise between 1 and - * 4 bytes (both included) can be used. - * \param[in] dummy_cycles Number of dummy cycles required for the - * command, between 0 and 31 (both included). - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note Check the flash memory device specifications for the possible opcodes - * that can be used and the other informations needed for this function. - * \note The SPI mode used for this command is the one set with the - * \ref qspi_ip6514e_activate_qspi_mode function or the default one. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_send_cmd(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - void *read_data, - uint32_t read_len, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles); - -/** - * \brief Send a simple command to the flash memory device using the Software - * Triggered Instruction Generator (STIG) with no data arguments. - * This command can be used for example to send the WRITE ENABLE command. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] opcode Opcode for the command. - * - * \note Check the flash memory device specifications for the possible opcodes - * that can be used and the other informations needed for this function. - * \note The SPI mode used for this command is the one set with the - * \ref qspi_ip6514e_activate_qspi_mode function or the default one. - */ -void qspi_ip6514e_send_simple_cmd(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode); - -/** - * \brief Send a read command to the flash memory device using the Software - * Triggered Instruction Generator (STIG). This command can be used to - * read Flash memory data or registers. - * - * \param[in] dev QSPI IP6514E device struct - * \ref qspi_ip6514e_dev_t - * \param[in] opcode Opcode for the command. - * \param[out] read_data Pointer to a memory zone where the - * read_len bytes read will be written to. - * \param[in] read_len Number of bytes to read for the command. - * Between 1 and 8 bytes (both included) can be - * read. - * \param[in] addr Address used for the command - * \param[in] addr_bytes_number Number of address bytes for this command. - * If an address is not needed for the command, - * use 0 for argument, otherwise between 1 and - * 4 bytes (both included) can be used. - * \param[in] dummy_cycles Number of dummy cycles required for the - * command, between 0 and 31 (both included). - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note Check the flash memory device specifications for the possible opcodes - * that can be used and the other informations needed for this function. - * \note The SPI mode used for this command is the one set with the - * \ref qspi_ip6514e_activate_qspi_mode function or the default one. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_send_read_cmd( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - void *read_data, - uint32_t read_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles); - -/** - * \brief Send a write command to the flash memory device using the Software - * Triggered Instruction Generator (STIG). This command can be used to - * write Flash memory or registers. - * - * \param[in] dev QSPI IP6514E device struct - * \ref qspi_ip6514e_dev_t - * \param[in] opcode Opcode for the command. - * \param[in] write_data Pointer to a memory zone where are - * located the write_len bytes to write for - * this command. - * \param[in] write_len Number of bytes to write for the command. - * Between 1 and 8 bytes (both included) can be - * written. - * \param[in] addr Address used for the command - * \param[in] addr_bytes_number Number of address bytes for this command. - * If an address is not needed for the command, - * use 0 for argument, otherwise between 1 and - * 4 bytes (both included) can be used. - * \param[in] dummy_cycles Number of dummy cycles required for the - * command, between 0 and 31 (both included). - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note Check the flash memory device specifications for the possible opcodes - * that can be used and the other informations needed for this function. - * \note The SPI mode used for this command is the one set with the - * \ref qspi_ip6514e_activate_qspi_mode function or the default one. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_send_write_cmd( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles); - -#ifdef __cplusplus -} -#endif - -#endif /* __QSPI_IP6514E_DRV_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/flash_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/flash_api.c deleted file mode 100644 index 3293db6523f..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/flash_api.c +++ /dev/null @@ -1,132 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "device.h" -#include "flash_layout.h" -#include "flash_api.h" - -#if DEVICE_FLASH - -#define FLASH_DEV MT25QL_DEV_NS - -int32_t flash_init(flash_t *obj) -{ - (void)(obj); - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - qspi_ip6514e_enable(FLASH_DEV.controller); - - /* Configure QSPI Flash controller to operate in single SPI mode and - * to use fast Flash commands */ - err = mt25ql_config_mode(&FLASH_DEV, MT25QL_FUNC_STATE_FAST); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -int32_t flash_free(flash_t *obj) -{ - (void)(obj); - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - /* Restores the QSPI Flash controller and MT25QL to default state */ - err = mt25ql_restore_default_state(&FLASH_DEV); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -int32_t flash_erase_sector(flash_t *obj, uint32_t address) -{ - (void)(obj); - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - err = mt25ql_erase(&FLASH_DEV, address, MT25QL_ERASE_SUBSECTOR_4K); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -int32_t flash_read(flash_t *obj, uint32_t address, - uint8_t *data, uint32_t size) -{ - (void)obj; - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - err = mt25ql_command_read(&FLASH_DEV, address, data, size); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size) -{ - (void)(obj); - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - err = mt25ql_command_write(&FLASH_DEV, address, data, size); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address) -{ - (void)(obj); - if ((address >= NS_QSPI_ALIAS_BASE) && (address < NS_QSPI_ALIAS_BASE + FLASH_TOTAL_SIZE)) { - return SUBSECTOR_4KB; - } - - return MBED_FLASH_INVALID_SIZE; -} - -uint32_t flash_get_page_size(const flash_t *obj) -{ - (void)(obj); - return FLASH_PAGE_SIZE; -} - -uint32_t flash_get_start_address(const flash_t *obj) -{ - (void)(obj); - return NS_QSPI_ALIAS_BASE; -} - -uint32_t flash_get_size(const flash_t *obj) -{ - (void)(obj); - return FLASH_TOTAL_SIZE; -} - -uint8_t flash_get_erase_value(const flash_t *obj) -{ - (void)obj; - return 0xFF; -} - -#endif // DEVICE_FLASH diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/spm_hal.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/spm_hal.c deleted file mode 100644 index a3fef1f553d..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/spm_hal.c +++ /dev/null @@ -1,324 +0,0 @@ -/* - * Copyright (c) 2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include "platform/include/tfm_spm_hal.h" -#include "spm_api.h" -#include "spm_db.h" -#include "tfm_platform_core_api.h" -#include "target_cfg.h" -#include "Driver_MPC.h" -#include "mpu_armv8m_drv.h" -#include "region_defs.h" -#include "secure_utilities.h" - -/* Import MPC driver */ -extern ARM_DRIVER_MPC Driver_CODE_SRAM_MPC; - -/* Get address of memory regions to configure MPU */ -extern const struct memory_region_limits memory_regions; - -struct mpu_armv8m_dev_t dev_mpu_s = { MPU_BASE }; - -void tfm_spm_hal_init_isolation_hw(void) -{ - /* Configures non-secure memory spaces in the target */ - sau_and_idau_cfg(); - mpc_init_cfg(); - ppc_init_cfg(); -} - -void tfm_spm_hal_configure_default_isolation( - const struct tfm_spm_partition_platform_data_t *platform_data) -{ - if (platform_data) { - if (platform_data->periph_ppc_bank != PPC_SP_DO_NOT_CONFIGURE) { - ppc_configure_to_secure(platform_data->periph_ppc_bank, - platform_data->periph_ppc_loc); - } - } -} - -#if TFM_LVL != 1 - -#define MPU_REGION_VENEERS 0 -#define MPU_REGION_TFM_UNPRIV_CODE 1 -#define MPU_REGION_TFM_UNPRIV_DATA 2 -#define MPU_REGION_NS_DATA 3 -#define PARTITION_REGION_RO 4 -#define PARTITION_REGION_RW_STACK 5 -#define PARTITION_REGION_PERIPH 6 -#define PARTITION_REGION_SHARE 7 - -REGION_DECLARE(Image$$, TFM_UNPRIV_CODE, $$RO$$Base); -REGION_DECLARE(Image$$, TFM_UNPRIV_CODE, $$RO$$Limit); -REGION_DECLARE(Image$$, TFM_UNPRIV_RO_DATA, $$RW$$Base); -REGION_DECLARE(Image$$, TFM_UNPRIV_RO_DATA, $$ZI$$Limit); -REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base); -REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit); - -static enum spm_err_t tfm_spm_mpu_init(void) -{ - struct mpu_armv8m_region_cfg_t region_cfg; - - mpu_armv8m_clean(&dev_mpu_s); - - /* Veneer region */ - region_cfg.region_nr = MPU_REGION_VENEERS; - region_cfg.region_base = memory_regions.veneer_base; - region_cfg.region_limit = memory_regions.veneer_limit; - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_OK; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - /* TFM Core unprivileged code region */ - region_cfg.region_nr = MPU_REGION_TFM_UNPRIV_CODE; - region_cfg.region_base = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_CODE, $$RO$$Base); - region_cfg.region_limit = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_CODE, $$RO$$Limit); - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_OK; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - /* TFM Core unprivileged data region */ - region_cfg.region_nr = MPU_REGION_TFM_UNPRIV_DATA; - region_cfg.region_base = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_RO_DATA, $$RW$$Base); - region_cfg.region_limit = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_RO_DATA, $$ZI$$Limit); - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - /* TFM Core unprivileged non-secure data region */ - region_cfg.region_nr = MPU_REGION_NS_DATA; - region_cfg.region_base = NS_DATA_START; - region_cfg.region_limit = NS_DATA_LIMIT; - region_cfg.attr_access = MPU_ARMV8M_AP_RW_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - mpu_armv8m_enable(&dev_mpu_s, PRIVILEGED_DEFAULT_ENABLE, - HARDFAULT_NMI_ENABLE); - - return SPM_ERR_OK; -} - -enum spm_err_t tfm_spm_hal_partition_sandbox_config( - const struct tfm_spm_partition_memory_data_t *memory_data, - const struct tfm_spm_partition_platform_data_t *platform_data) -{ - /* This function takes a partition id and enables the - * SPM partition for that partition - */ - - struct mpu_armv8m_region_cfg_t region_cfg; - - mpu_armv8m_disable(&dev_mpu_s); - - /* Configure Regions */ - if (memory_data->ro_start) { - /* RO region */ - region_cfg.region_nr = PARTITION_REGION_RO; - region_cfg.region_base = memory_data->ro_start; - region_cfg.region_limit = memory_data->ro_limit; - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_OK; - - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) - != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - } - - /* RW, ZI and stack as one region */ - region_cfg.region_nr = PARTITION_REGION_RW_STACK; - region_cfg.region_base = memory_data->rw_start; - region_cfg.region_limit = memory_data->stack_top; - region_cfg.attr_access = MPU_ARMV8M_AP_RW_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - if (platform_data) { - /* Peripheral */ - region_cfg.region_nr = PARTITION_REGION_PERIPH; - region_cfg.region_base = platform_data->periph_start; - region_cfg.region_limit = platform_data->periph_limit; - region_cfg.attr_access = MPU_ARMV8M_AP_RW_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) - != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - ppc_en_secure_unpriv(platform_data->periph_ppc_bank, - platform_data->periph_ppc_loc); - } - - mpu_armv8m_enable(&dev_mpu_s, PRIVILEGED_DEFAULT_ENABLE, - HARDFAULT_NMI_ENABLE); - - return SPM_ERR_OK; -} - -enum spm_err_t tfm_spm_hal_partition_sandbox_deconfig( - const struct tfm_spm_partition_memory_data_t *memory_data, - const struct tfm_spm_partition_platform_data_t *platform_data) -{ - /* This function takes a partition id and disables the - * SPM partition for that partition - */ - - if (platform_data) { - /* Peripheral */ - ppc_clr_secure_unpriv(platform_data->periph_ppc_bank, - platform_data->periph_ppc_loc); - } - - mpu_armv8m_disable(&dev_mpu_s); - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_RO); - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_RW_STACK); - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_PERIPH); - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_SHARE); - mpu_armv8m_enable(&dev_mpu_s, PRIVILEGED_DEFAULT_ENABLE, - HARDFAULT_NMI_ENABLE); - - return SPM_ERR_OK; -} - -/** - * Set share region to which the partition needs access - */ -enum spm_err_t tfm_spm_hal_set_share_region( - enum tfm_buffer_share_region_e share) -{ - struct mpu_armv8m_region_cfg_t region_cfg; - enum spm_err_t res = SPM_ERR_INVALID_CONFIG; - uint32_t scratch_base = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base); - uint32_t scratch_limit = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit); - - mpu_armv8m_disable(&dev_mpu_s); - - if (share == TFM_BUFFER_SHARE_DISABLE) { - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_SHARE); - } else { - - region_cfg.region_nr = PARTITION_REGION_SHARE; - region_cfg.attr_access = MPU_ARMV8M_AP_RW_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - switch (share) { - case TFM_BUFFER_SHARE_SCRATCH: - /* Use scratch area for SP-to-SP data sharing */ - region_cfg.region_base = scratch_base; - region_cfg.region_limit = scratch_limit; - res = SPM_ERR_OK; - break; - case TFM_BUFFER_SHARE_NS_CODE: - region_cfg.region_base = memory_regions.non_secure_partition_base; - region_cfg.region_limit = memory_regions.non_secure_partition_limit; - /* Only allow read access to NS code region and keep - * exec.never attribute - */ - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - res = SPM_ERR_OK; - break; - default: - /* Leave res to be set to SPM_ERR_INVALID_CONFIG */ - break; - } - if (res == SPM_ERR_OK) { - mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg); - } - } - mpu_armv8m_enable(&dev_mpu_s, PRIVILEGED_DEFAULT_ENABLE, - HARDFAULT_NMI_ENABLE); - - return res; -} - -#endif /* TFM_LVL != 1 */ - -void tfm_spm_hal_setup_isolation_hw(void) -{ -#if TFM_LVL != 1 - if (tfm_spm_mpu_init() != SPM_ERR_OK) { - ERROR_MSG("Failed to set up initial MPU configuration! Halting."); - while (1) { - ; - } - } -#endif -} - -void MPC_Handler(void) -{ - /* Clear MPC interrupt flag and pending MPC IRQ */ - Driver_CODE_SRAM_MPC.ClearInterrupt(); - NVIC_ClearPendingIRQ(S_MPC_COMBINED_IRQn); - - /* Print fault message and block execution */ - LOG_MSG("Oops... MPC fault!!!"); - - /* Inform TF-M core that isolation boundary has been violated */ - tfm_access_violation_handler(); -} - -void PPC_Handler(void) -{ - /* - * Due to an issue on the FVP, the PPC fault doesn't trigger a - * PPC IRQ which is handled by the PPC_handler. - * In the FVP execution, this code is not execute. - */ - - /* Clear PPC interrupt flag and pending PPC IRQ */ - ppc_clear_irq(); - NVIC_ClearPendingIRQ(S_PPC_COMBINED_IRQn); - - /* Print fault message*/ - LOG_MSG("Oops... PPC fault!!!"); - - /* Inform TF-M core that isolation boundary has been violated */ - tfm_access_violation_handler(); -} - -uint32_t tfm_spm_hal_get_ns_VTOR(void) -{ - return memory_regions.non_secure_code_start; -} - -uint32_t tfm_spm_hal_get_ns_MSP(void) -{ - return *((uint32_t *)memory_regions.non_secure_code_start); -} - -uint32_t tfm_spm_hal_get_ns_entry_point(void) -{ - return *((uint32_t *)(memory_regions.non_secure_code_start+ 4)); -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/target_cfg.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/target_cfg.c deleted file mode 100644 index b2a1ed60b4b..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/target_cfg.c +++ /dev/null @@ -1,370 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "cmsis.h" -#include "target_cfg.h" -#include "Driver_MPC.h" -#include "platform_retarget_dev.h" -#include "region_defs.h" -#include "tfm_secure_api.h" - -/* Macros to pick linker symbols */ -#define REGION(a, b, c) a##b##c -#define REGION_NAME(a, b, c) REGION(a, b, c) -#define REGION_DECLARE(a, b, c) extern uint32_t REGION_NAME(a, b, c) - -/* The section names come from the scatter file */ -REGION_DECLARE(Load$$LR$$, LR_NS_PARTITION, $$Base); -REGION_DECLARE(Load$$LR$$, LR_SECONDARY_PARTITION, $$Base); - -REGION_DECLARE(Image$$, ER_CODE_CMSE_VENEER, $$Base); -REGION_DECLARE(Image$$, ER_CODE_CMSE_VENEER, $$Limit); - -const struct memory_region_limits memory_regions = { - .non_secure_code_start = - (uint32_t)®ION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base) + - BL2_HEADER_SIZE, - - .non_secure_partition_base = - (uint32_t)®ION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base), - - .non_secure_partition_limit = - (uint32_t)®ION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base) + - NS_PARTITION_SIZE - 1, - - .veneer_base = - (uint32_t)®ION_NAME(Image$$, ER_CODE_CMSE_VENEER, $$Base), - - .veneer_limit = - (uint32_t)®ION_NAME(Image$$, ER_CODE_CMSE_VENEER, $$Limit), -}; - -/* Allows software, via SAU, to define the code region as a NSC */ -#define NSCCFG_CODENSC 1 - -/* Import MPC driver */ -extern ARM_DRIVER_MPC Driver_CODE_SRAM_MPC, Driver_QSPI_MPC; -extern ARM_DRIVER_MPC Driver_ISRAM0_MPC, Driver_ISRAM1_MPC; -extern ARM_DRIVER_MPC Driver_ISRAM2_MPC, Driver_ISRAM3_MPC; - -/* Define Peripherals NS address range for the platform */ -#define PERIPHERALS_BASE_NS_START (0x40000000) -#define PERIPHERALS_BASE_NS_END (0x4FFFFFFF) - -/* Enable system reset request for CPU 0 */ -#define ENABLE_CPU0_SYSTEM_RESET_REQUEST (1U << 4U) - -/* To write into AIRCR register, 0x5FA value must be write to the VECTKEY field, - * otherwise the processor ignores the write. - */ -#define SCB_AIRCR_WRITE_MASK ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)) - -/* Debug configuration flags */ -#define SPNIDEN_SEL_STATUS (0x01u << 7) -#define SPNIDEN_STATUS (0x01u << 6) -#define SPIDEN_SEL_STATUS (0x01u << 5) -#define SPIDEN_STATUS (0x01u << 4) -#define NIDEN_SEL_STATUS (0x01u << 3) -#define NIDEN_STATUS (0x01u << 2) -#define DBGEN_SEL_STATUS (0x01u << 1) -#define DBGEN_STATUS (0x01u << 0) - -#define All_SEL_STATUS (SPNIDEN_SEL_STATUS | SPIDEN_SEL_STATUS | \ - NIDEN_SEL_STATUS | DBGEN_SEL_STATUS) - -struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart = { - MUSCA_UART1_NS_BASE, - MUSCA_UART1_NS_BASE + 0xFFF, - PPC_SP_DO_NOT_CONFIGURE, - -1 -}; - -void enable_fault_handlers(void) -{ - /* Enables BUS, MEM, USG and Secure faults */ - SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk - | SCB_SHCSR_BUSFAULTENA_Msk - | SCB_SHCSR_MEMFAULTENA_Msk - | SCB_SHCSR_SECUREFAULTENA_Msk; -} - -void system_reset_cfg(void) -{ - struct sysctrl_t *sysctrl = (struct sysctrl_t *)CMSDK_SYSCTRL_BASE_S; - uint32_t reg_value = SCB->AIRCR; - - /* Enable system reset request for CPU 0, to be triggered via - * NVIC_SystemReset function. - */ - sysctrl->resetmask |= ENABLE_CPU0_SYSTEM_RESET_REQUEST; - - /* Clear SCB_AIRCR_VECTKEY value */ - reg_value &= ~(uint32_t)(SCB_AIRCR_VECTKEY_Msk); - - /* Enable system reset request only to the secure world */ - reg_value |= (uint32_t)(SCB_AIRCR_WRITE_MASK | SCB_AIRCR_SYSRESETREQS_Msk); - - SCB->AIRCR = reg_value; -} - -void tfm_spm_hal_init_debug(void) -{ - volatile struct sysctrl_t *sys_ctrl = - (struct sysctrl_t *)CMSDK_SYSCTRL_BASE_S; - -#if defined(DAUTH_NONE) - /* Set all the debug enable selector bits to 1 */ - sys_ctrl->secdbgset = All_SEL_STATUS; - /* Set all the debug enable bits to 0 */ - sys_ctrl->secdbgclr = - DBGEN_STATUS | NIDEN_STATUS | SPIDEN_STATUS | SPNIDEN_STATUS; -#elif defined(DAUTH_NS_ONLY) - /* Set all the debug enable selector bits to 1 */ - sys_ctrl->secdbgset = All_SEL_STATUS; - /* Set the debug enable bits to 1 for NS, and 0 for S mode */ - sys_ctrl->secdbgset = DBGEN_STATUS | NIDEN_STATUS; - sys_ctrl->secdbgclr = SPIDEN_STATUS | SPNIDEN_STATUS; -#elif defined(DAUTH_FULL) - /* Set all the debug enable selector bits to 1 */ - sys_ctrl->secdbgset = All_SEL_STATUS; - /* Set all the debug enable bits to 1 */ - sys_ctrl->secdbgset = - DBGEN_STATUS | NIDEN_STATUS | SPIDEN_STATUS | SPNIDEN_STATUS; -#else - -#if !defined(DAUTH_CHIP_DEFAULT) -#error "No debug authentication setting is provided." -#endif - - /* Set all the debug enable selector bits to 0 */ - sys_ctrl->secdbgclr = All_SEL_STATUS; - - /* No need to set any enable bits because the value depends on - * input signals. - */ -#endif -} - -/*----------------- NVIC interrupt target state to NS configuration ----------*/ -void nvic_interrupt_target_state_cfg() -{ - /* Target every interrupt to NS; unimplemented interrupts will be WI */ - for (uint8_t i=0; iITNS)/sizeof(NVIC->ITNS[0]); i++) { - NVIC->ITNS[i] = 0xFFFFFFFF; - } - - /* Make sure that MPC and PPC are targeted to S state */ - NVIC_ClearTargetState(S_MPC_COMBINED_IRQn); - NVIC_ClearTargetState(S_PPC_COMBINED_IRQn); -} - -/*----------------- NVIC interrupt enabling for S peripherals ----------------*/ -void nvic_interrupt_enable() -{ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - - /* MPC interrupt enabling */ - Driver_QSPI_MPC.EnableInterrupt(); - Driver_CODE_SRAM_MPC.EnableInterrupt(); - NVIC_EnableIRQ(S_MPC_COMBINED_IRQn); - - /* PPC interrupt enabling */ - /* Clear pending PPC interrupts */ - /* In the PPC configuration function, we have used the Non-Secure - * Privilege Control Block to grant unprivilged NS access to some - * peripherals used by NS. That triggers a PPC0 exception as that - * register is meant for NS privileged access only. Clear it here - */ - spctrl->secppcintclr = CMSDK_APB_PPC0_INT_POS_MASK; - - /* Enable PPC interrupts for APB PPC */ - spctrl->secppcinten |= CMSDK_APB_PPC0_INT_POS_MASK; - spctrl->secppcinten |= CMSDK_APB_PPC1_INT_POS_MASK; - spctrl->secppcinten |= CMSDK_APB_PPCEXP0_INT_POS_MASK; - spctrl->secppcinten |= CMSDK_APB_PPCEXP1_INT_POS_MASK; - spctrl->secppcinten |= CMSDK_APB_PPCEXP2_INT_POS_MASK; - spctrl->secppcinten |= CMSDK_APB_PPCEXP3_INT_POS_MASK; - NVIC_EnableIRQ(S_PPC_COMBINED_IRQn); -} - -/*------------------- SAU/IDAU configuration functions -----------------------*/ - -void sau_and_idau_cfg(void) -{ - /* Enables SAU */ - TZ_SAU_Enable(); - - /* Configures SAU regions to be non-secure */ - SAU->RNR = TFM_NS_REGION_CODE; - SAU->RBAR = (memory_regions.non_secure_partition_base - & SAU_RBAR_BADDR_Msk); - SAU->RLAR = (memory_regions.non_secure_partition_limit - & SAU_RLAR_LADDR_Msk) - | SAU_RLAR_ENABLE_Msk; - - SAU->RNR = TFM_NS_REGION_DATA; - SAU->RBAR = (NS_DATA_START & SAU_RBAR_BADDR_Msk); - SAU->RLAR = (NS_DATA_LIMIT & SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk; - - /* Configures veneers region to be non-secure callable */ - SAU->RNR = TFM_NS_REGION_VENEER; - SAU->RBAR = (memory_regions.veneer_base & SAU_RBAR_BADDR_Msk); - SAU->RLAR = (memory_regions.veneer_limit & SAU_RLAR_LADDR_Msk) - | SAU_RLAR_ENABLE_Msk - | SAU_RLAR_NSC_Msk; - - /* Configure the peripherals space */ - SAU->RNR = TFM_NS_REGION_PERIPH_1; - SAU->RBAR = (PERIPHERALS_BASE_NS_START & SAU_RBAR_BADDR_Msk); - SAU->RLAR = (PERIPHERALS_BASE_NS_END & SAU_RLAR_LADDR_Msk) - | SAU_RLAR_ENABLE_Msk; - - /* FIXME: Secondary image partition info comes from BL2. Configure SAU - * based on those limits. - */ - - /* Allows SAU to define the code region as a NSC */ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - spctrl->nsccfg |= NSCCFG_CODENSC; -} - -/*------------------- Memory configuration functions -------------------------*/ - -void mpc_init_cfg(void) -{ - ARM_DRIVER_MPC* mpc_data_region0 = &Driver_ISRAM0_MPC; - ARM_DRIVER_MPC* mpc_data_region1 = &Driver_ISRAM1_MPC; - ARM_DRIVER_MPC* mpc_data_region2 = &Driver_ISRAM2_MPC; - ARM_DRIVER_MPC* mpc_data_region3 = &Driver_ISRAM3_MPC; - - Driver_CODE_SRAM_MPC.Initialize(); - Driver_CODE_SRAM_MPC.ConfigRegion(memory_regions.non_secure_partition_base, - memory_regions.non_secure_partition_limit, - ARM_MPC_ATTR_NONSECURE); - - mpc_data_region0->Initialize(); - mpc_data_region0->ConfigRegion(MPC_ISRAM0_RANGE_BASE_S, - MPC_ISRAM0_RANGE_LIMIT_S, - ARM_MPC_ATTR_SECURE); - - mpc_data_region1->Initialize(); - mpc_data_region1->ConfigRegion(MPC_ISRAM1_RANGE_BASE_S, - MPC_ISRAM1_RANGE_LIMIT_S, - ARM_MPC_ATTR_SECURE); - - mpc_data_region2->Initialize(); - -#if defined(TEST_FRAMEWORK_S) || defined(TEST_FRAMEWORK_NS) - /* To run the regression tests on Musca A1, it is required to assign more - * RAM memory in the secure execution environment. - * So, the secure RAM memory size is 96KB and the non-secure one is 32 KB. - * When it is not required to run the regression tests, the RAM memory - * partition is the original one which is 64KB of the RAM memory for each - * execution environment. - */ - mpc_data_region2->ConfigRegion(MPC_ISRAM2_RANGE_BASE_S, - MPC_ISRAM2_RANGE_LIMIT_S, - ARM_MPC_ATTR_SECURE); -#else - mpc_data_region2->ConfigRegion(MPC_ISRAM2_RANGE_BASE_NS, - MPC_ISRAM2_RANGE_LIMIT_NS, - ARM_MPC_ATTR_NONSECURE); -#endif - - mpc_data_region3->Initialize(); - mpc_data_region3->ConfigRegion(MPC_ISRAM3_RANGE_BASE_NS, - MPC_ISRAM3_RANGE_LIMIT_NS, - ARM_MPC_ATTR_NONSECURE); - - /* Lock down the MPC configuration */ - Driver_CODE_SRAM_MPC.LockDown(); - mpc_data_region0->LockDown(); - mpc_data_region1->LockDown(); - mpc_data_region2->LockDown(); - mpc_data_region3->LockDown(); - - /* Add barriers to assure the MPC configuration is done before continue - * the execution. - */ - __DSB(); - __ISB(); -} - -/*---------------------- PPC configuration functions -------------------------*/ - -void ppc_init_cfg(void) -{ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - struct nspctrl_def* nspctrl = CMSDK_NSPCTRL; - - /* Grant non-secure access to peripherals in the PPC0 - * (timer0 and 1, dualtimer, watchdog, mhu 0 and 1) - */ - spctrl->apbnsppc0 |= (1U << CMSDK_TIMER0_APB_PPC_POS); - spctrl->apbnsppc0 |= (1U << CMSDK_TIMER1_APB_PPC_POS); - spctrl->apbnsppc0 |= (1U << CMSDK_DTIMER_APB_PPC_POS); - spctrl->apbnsppc0 |= (1U << CMSDK_MHU0_APB_PPC_POS); - spctrl->apbnsppc0 |= (1U << CMSDK_MHU1_APB_PPC_POS); - - /* Grant non-secure access to S32K Timer in PPC1*/ - spctrl->apbnsppc1 |= (1U << CMSDK_S32K_TIMER_PPC_POS); - - /* Grant non-secure access for AHB peripherals on EXP0 */ - spctrl->ahbnsppcexp0 = (1U << MUSCA_PERIPHS_AHB_PPC_POS); - - /* in NS, grant un-privileged for AHB peripherals on EXP0 */ - nspctrl->ahbnspppcexp0 = (1U << MUSCA_PERIPHS_AHB_PPC_POS); - - /* Configure the response to a security violation as a - * bus error instead of RAZ/WI - */ - spctrl->secrespcfg |= 1U; -} - -void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint16_t pos) -{ - /* Setting NS flag for peripheral to enable NS access */ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - ((uint32_t*)&(spctrl->ahbnsppc0))[bank] |= (1U << pos); -} - -void ppc_configure_to_secure(enum ppc_bank_e bank, uint16_t pos) -{ - /* Clear NS flag for peripheral to prevent NS access */ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - ((uint32_t*)&(spctrl->ahbnsppc0))[bank] &= ~(1U << pos); -} - -void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint16_t pos) -{ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - ((uint32_t*)&(spctrl->ahbspppc0))[bank] |= (1U << pos); -} - -void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint16_t pos) -{ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - ((uint32_t*)&(spctrl->ahbspppc0))[bank] &= ~(1U << pos); -} - -void ppc_clear_irq(void) -{ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - /* Clear APB PPC EXP2 IRQ */ - spctrl->secppcintclr = CMSDK_APB_PPCEXP2_INT_POS_MASK; -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/target_cfg.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/target_cfg.h deleted file mode 100644 index a98f2f39b0f..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/target_cfg.h +++ /dev/null @@ -1,112 +0,0 @@ -/* - * Copyright (c) 2018-2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __TARGET_CFG_H__ -#define __TARGET_CFG_H__ - -#include "tfm_peripherals_def.h" - -/** - * \brief Defines the word offsets of Slave Peripheral Protection Controller - * Registers - */ -enum ppc_bank_e -{ - PPC_SP_DO_NOT_CONFIGURE = -1, - PPC_SP_AHB_PPC0 = 0, - PPC_SP_RES0, - PPC_SP_RES1, - PPC_SP_RES2, - PPC_SP_AHB_PPC_EXP0, - PPC_SP_AHB_PPC_EXP1, - PPC_SP_AHB_PPC_EXP2, - PPC_SP_AHB_PPC_EXP3, - PPC_SP_APB_PPC0, - PPC_SP_APB_PPC1, - PPC_SP_RES3, - PPC_SP_RES4, - PPC_SP_APB_PPC_EXP0, - PPC_SP_APB_PPC_EXP1, - PPC_SP_APB_PPC_EXP2, - PPC_SP_APB_PPC_EXP3, -}; - -/** - * \brief Store the addresses of memory regions - */ -struct memory_region_limits { - uint32_t non_secure_code_start; - uint32_t non_secure_partition_base; - uint32_t non_secure_partition_limit; - uint32_t veneer_base; - uint32_t veneer_limit; -}; - -/** - * \brief Holds the data necessary to do isolation for a specific peripheral. - */ -struct tfm_spm_partition_platform_data_t -{ - uint32_t periph_start; - uint32_t periph_limit; - int16_t periph_ppc_bank; - int16_t periph_ppc_loc; -}; - -/** - * \brief Configures the Memory Protection Controller. - */ -void mpc_init_cfg(void); - -/** - * \brief Configures the Peripheral Protection Controller. - */ -void ppc_init_cfg(void); - -/** - * \brief Restict access to peripheral to secure - */ -void ppc_configure_to_secure(enum ppc_bank_e bank, uint16_t loc); - -/** - * \brief Allow non-secure access to peripheral - */ -void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint16_t loc); - -/** - * \brief Enable secure unprivileged access to peripheral - */ -void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint16_t pos); - -/** - * \brief Clear secure unprivileged access to peripheral - */ -void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint16_t pos); - -/** - * \brief Clears PPC interrupt. - */ -void ppc_clear_irq(void); - -/** - * \brief Configures SAU and IDAU. - */ -void sau_and_idau_cfg(void); - - -#endif /* __TARGET_CFG_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/tfm_peripherals_def.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/tfm_peripherals_def.h deleted file mode 100644 index ab5f174fddd..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_S/tfm_peripherals_def.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (c) 2018, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_PERIPHERALS_DEF_H__ -#define __TFM_PERIPHERALS_DEF_H__ - -struct tfm_spm_partition_platform_data_t; - -extern struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart; - -#define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart) - -#endif /* __TFM_PERIPHERALS_DEF_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_ARMC6/musca_ns.sct b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_ARMC6/musca_ns.sct similarity index 97% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_ARMC6/musca_ns.sct rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_ARMC6/musca_ns.sct index 72a013d54b3..095f304c72a 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_ARMC6/musca_ns.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_ARMC6/musca_ns.sct @@ -18,7 +18,7 @@ * limitations under the License. */ -#include "../../../partition/region_defs.h" +#include "../../partition/region_defs.h" #include "../cmsis_nvic.h" #if !defined(MBED_ROM_START) diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_ns.S b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_ns.S similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_ns.S rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_ns.S diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_GCC_ARM/musca_ns.ld b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld similarity index 99% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_GCC_ARM/musca_ns.ld rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld index b29140c9726..51383ceaa57 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_GCC_ARM/musca_ns.ld +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld @@ -22,7 +22,7 @@ /* Linker script to configure memory regions. */ /* This file will be run trough the pre-processor. */ -#include "../../../partition/region_defs.h" +#include "../../partition/region_defs.h" #include "../cmsis_nvic.h" /* Stack size is 1K for Mbed-OS */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_ns.S b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_ns.S similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_ns.S rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_ns.S diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_IAR/musca_ns.icf b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_IAR/musca_ns.icf similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_IAR/musca_ns.icf rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_IAR/musca_ns.icf diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_IAR/startup_cmsdk_musca_ns.S b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_IAR/startup_cmsdk_musca_ns.S similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/TOOLCHAIN_IAR/startup_cmsdk_musca_ns.S rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/TOOLCHAIN_IAR/startup_cmsdk_musca_ns.S diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/cmsis_nvic.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/cmsis_nvic.h similarity index 96% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/cmsis_nvic.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/cmsis_nvic.h index 5660c48e96f..8da1713e17a 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/cmsis_nvic.h +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/cmsis_nvic.h @@ -24,7 +24,7 @@ #ifndef MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H -#include "../../partition/region_defs.h" +#include "../partition/region_defs.h" #define NVIC_NUM_VECTORS (16 + 76) /** Location of vectors to move in RAM */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/cmsis_nvic_virtual.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/cmsis_nvic_virtual.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/cmsis_nvic_virtual.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/cmsis_nvic_virtual.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/cmsis_nvic_virtual.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/cmsis_nvic_virtual.h similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/cmsis_nvic_virtual.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/cmsis_nvic_virtual.h diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/device_cfg.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/device_cfg.h index 333b0a25b4b..6cd87fe0bc9 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/device_cfg.h +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/device_cfg.h @@ -30,91 +30,28 @@ */ /* ARM SCC */ -#if defined(TARGET_MUSCA_A1_S) -#define MUSCA_A1_SCC_S -#endif - -#if defined(TARGET_MUSCA_A1_NS) #define MUSCA_A1_SCC_NS #define MUSCA_A1_SCC_DEV MUSCA_A1_SCC_DEV_NS -#endif - -#if defined(TARGET_MUSCA_A1_S) - -/* ARM Memory Protection Controller (MPC) SIE 200 */ -#define MPC_ISRAM0_S -#define MPC_ISRAM1_S -#define MPC_ISRAM2_S -#define MPC_ISRAM3_S -#define MPC_CODE_SRAM_S -#define MPC_CODE_SRAM_NS -#define MPC_QSPI_S -#define MPC_QSPI_NS - -/* ARM Peripheral Protection Controllers (PPC) */ -#define AHB_PPC0_S -#define AHB_PPCEXP0_S -#define AHB_PPCEXP1_S -#define AHB_PPCEXP2_S -#define AHB_PPCEXP3_S - -#define APB_PPC0_S -#define APB_PPC1_S -#define APB_PPCEXP0_S -#define APB_PPCEXP1_S -#define APB_PPCEXP2_S -#define APB_PPCEXP3_S - -#endif // defined(TARGET_MUSCA_A1_S) /*ARM UART Controller PL011*/ -#if defined(TARGET_MUSCA_A1_NS) #define UART0_PL011_NS #define UART0_PL011_DEV UART0_PL011_DEV_NS #define uart0_tx_irq_handler UARTTX0_Handler #define uart0_rx_irq_handler UARTRX0_Handler #define uart0_rx_timeout_irq_handler UART0_RxTimeout_IRQHandler -#endif -#if defined(TARGET_MUSCA_A1_NS) #define UART1_PL011_NS #define UART1_PL011_DEV UART1_PL011_DEV_NS #define uart1_tx_irq_handler UARTTX1_Handler #define uart1_rx_irq_handler UARTRX1_Handler #define uart1_rx_timeout_irq_handler UART1_RxTimeout_IRQHandler -#endif /* CMSDK Timers */ -#if defined(TARGET_MUSCA_A1_S) -#define CMSDK_TIMER0_S -#endif - -#if defined(TARGET_MUSCA_A1_NS) #define CMSDK_TIMER0_NS #define CMSDK_TIMER0_DEV CMSDK_TIMER0_DEV_NS -#endif - -#if defined(TARGET_MUSCA_A1_S) -#define CMSDK_TIMER1_S -#endif -#if defined(TARGET_MUSCA_A1_NS) #define CMSDK_TIMER1_NS -#endif - -#if defined(TARGET_MUSCA_A1_S) - -/* Cadence QSPI Flash Controller */ -#define QSPI_IP6514E_S -#define QSPI_IP6514E_NS - -/* MT25QL Flash memory library */ -#define MT25QL_S -#define MT25QL_NS - -#endif // defined(TARGET_MUSCA_A1_S) -#if defined(TARGET_MUSCA_A1_NS) /* GP Timer */ #define GP_TIMER_NS #define GP_TIMER_DEV GP_TIMER_DEV_NS @@ -144,6 +81,5 @@ #define USEC_REPORTED_BITS (32 - USEC_REPORTED_SHIFT) #define UART_DEFAULT_BAUD_RATE 9600U -#endif // TARGET_MUSCA_A1_NS #endif /* __ARM_LTD_DEVICE_CFG_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/drivers/timer_gp_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/drivers/timer_gp_drv.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/drivers/timer_gp_drv.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/drivers/timer_gp_drv.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/drivers/timer_gp_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/drivers/timer_gp_drv.h similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/drivers/timer_gp_drv.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/drivers/timer_gp_drv.h diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/drivers/uart_pl011_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/drivers/uart_pl011_drv.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/drivers/uart_pl011_drv.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/drivers/uart_pl011_drv.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/drivers/uart_pl011_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/drivers/uart_pl011_drv.h similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/device/drivers/uart_pl011_drv.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/device/drivers/uart_pl011_drv.h diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/gpio_irq_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/gpio_irq_api.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/gpio_irq_api.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/gpio_irq_api.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/lp_ticker.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/lp_ticker.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/lp_ticker.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/lp_ticker.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/objects.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/objects.h index 5e0c4d14afa..e560930f60e 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/objects.h +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/objects.h @@ -30,7 +30,6 @@ extern "C" { #endif -#if TARGET_MUSCA_A1_NS struct serial_s { struct uart_pl011_dev_t *uart_dev; UARTName uart_index; /* UART device number */ @@ -38,7 +37,6 @@ struct serial_s { IRQn_Type rx_irq; IRQn_Type rx_timeout_irq; }; -#endif // TARGET_MUSCA_A1_NS #if DEVICE_FLASH struct flash_s { diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/LICENSE-permissive-binary-license-1.0.txt b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/LICENSE-permissive-binary-license-1.0.txt similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/LICENSE-permissive-binary-license-1.0.txt rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/LICENSE-permissive-binary-license-1.0.txt diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/README.md b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/README.md similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/README.md rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/README.md diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/cmse_lib.o b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/cmse_lib.o similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/cmse_lib.o rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/cmse_lib.o diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/crypto_access_control.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/crypto_access_control.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/crypto_access_control.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/crypto_access_control.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/mcuboot.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/mcuboot.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/mcuboot.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/mcuboot.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/spm_client.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/spm_client.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/spm_client.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/spm_client.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/spm_server.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/spm_server.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/spm_server.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/spm_server.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/spm_smoke.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/spm_smoke.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/spm_smoke.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/spm_smoke.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/tfm.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/tfm.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/tfm.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/tfm.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/serial_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/serial_api.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/serial_api.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/serial_api.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/sleep_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/sleep_api.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/sleep_api.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/sleep_api.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/us_ticker.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/us_ticker.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/us_ticker.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/us_ticker.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Config/RTE_Device.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Config/RTE_Device.h deleted file mode 100644 index 914ef46baad..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Config/RTE_Device.h +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Copyright (c) 2018-2020 Arm Limited. All rights reserved - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -//-------- <<< Use Configuration Wizard in Context Menu >>> -------------------- - -#ifndef __RTE_DEVICE_H__ -#define __RTE_DEVICE_H__ - -// MPC (Memory Protection Controller) [Driver_ISRAM0_MPC] -// Configuration settings for Driver_ISRAM0_MPC in component ::Drivers:MPC -#define RTE_ISRAM0_MPC 1 -// MPC (Memory Protection Controller) [Driver_ISRAM0_MPC] - -// MPC (Memory Protection Controller) [Driver_ISRAM1_MPC] -// Configuration settings for Driver_SRAM1_MPC in component ::Drivers:MPC -#define RTE_ISRAM1_MPC 1 -// MPC (Memory Protection Controller) [Driver_ISRAM1_MPC] - -// MPC (Memory Protection Controller) [Driver_ISRAM2_MPC] -// Configuration settings for Driver_ISRAM2_MPC in component ::Drivers:MPC -#define RTE_ISRAM2_MPC 1 -// MPC (Memory Protection Controller) [Driver_ISRAM2_MPC] - -// MPC (Memory Protection Controller) [Driver_ISRAM3_MPC] -// Configuration settings for Driver_SRAM2_MPC in component ::Drivers:MPC -#define RTE_ISRAM3_MPC 1 -// MPC (Memory Protection Controller) [Driver_SRAM3_MPC] - -// MPC (Memory Protection Controller) [Driver_CODE_SRAM_MPC] -// Configuration settings for Driver_CODE_SRAM_MPC in component ::Drivers:MPC -#define RTE_CODE_SRAM_MPC 1 -// MPC (Memory Protection Controller) [Driver_CODE_SRAM_MPC] - -// MPC (Memory Protection Controller) [Driver_QSPI_MPC] -// Configuration settings for Driver_QSPI_MPC in component ::Drivers:MPC -#define RTE_QSPI_MPC 1 -// MPC (Memory Protection Controller) [Driver_QSPI_MPC] - -// MPC (Memory Protection Controller) [Driver_EFLASH0_MPC] -// Configuration settings for Driver_EFLASH0_MPC in component ::Drivers:MPC -#define RTE_EFLASH0_MPC 1 -// MPC (Memory Protection Controller) [Driver_EFLASH0_MPC] - -// MPC (Memory Protection Controller) [Driver_EFLASH1_MPC] -// Configuration settings for Driver_EFLASH1_MPC in component ::Drivers:MPC -#define RTE_EFLASH1_MPC 0 -// MPC (Memory Protection Controller) [Driver_EFLASH1_MPC] - -// USART (Universal synchronous - asynchronous receiver transmitter) [Driver_USART0] -// Configuration settings for Driver_USART0 in component ::Drivers:USART -#define RTE_USART0 1 -// USART (Universal synchronous - asynchronous receiver transmitter) [Driver_USART0] - -// USART (Universal synchronous - asynchronous receiver transmitter) [Driver_USART1] -// Configuration settings for Driver_USART1 in component ::Drivers:USART -#define RTE_USART1 1 -// USART (Universal synchronous - asynchronous receiver transmitter) [Driver_USART1] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPC0] -// Configuration settings for Driver_AHB_PPC0 in component ::Drivers:PPC -#define RTE_AHB_PPC0 0 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPC0] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP0] -// Configuration settings for Driver_AHB_PPCEXP0 in component ::Drivers:PPC -#define RTE_AHB_PPCEXP0 1 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP0] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP1] -// Configuration settings for Driver_AHB_PPCEXP1 in component ::Drivers:PPC -#define RTE_AHB_PPCEXP1 0 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP1] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP2] -// Configuration settings for Driver_AHB_PPCEXP2 in component ::Drivers:PPC -#define RTE_AHB_PPCEXP2 0 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP2] - -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP3] -// Configuration settings for Driver_AHB_PPCEXP3 in component ::Drivers:PPC -#define RTE_AHB_PPCEXP3 0 -// PPC (Peripheral Protection Controller) [Driver_AHB_PPCEXP3] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPC0] -// Configuration settings for Driver_APB_PPC0 in component ::Drivers:PPC -#define RTE_APB_PPC0 1 -// PPC (Peripheral Protection Controller) [Driver_APB_PPC0] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPC1] -// Configuration settings for Driver_APB_PPC1 in component ::Drivers:PPC -#define RTE_APB_PPC1 1 -// PPC (Peripheral Protection Controller) [Driver_APB_PPC1] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP0] -// Configuration settings for Driver_APB_PPCEXP0 in component ::Drivers:PPC -#define RTE_APB_PPCEXP0 1 -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP0] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP1] -// Configuration settings for Driver_APB_PPCEXP1 in component ::Drivers:PPC -#define RTE_APB_PPCEXP1 1 -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP1] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP2] -// Configuration settings for Driver_APB_PPCEXP2 in component ::Drivers:PPC -#define RTE_APB_PPCEXP2 0 -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP2] - -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP3] -// Configuration settings for Driver_APB_PPCEXP3 in component ::Drivers:PPC -#define RTE_APB_PPCEXP3 0 -// PPC (Peripheral Protection Controller) [Driver_APB_PPCEXP3] - -// FLASH (Flash Memory) [Driver_FLASH0] -// Configuration settings for Driver_FLASH0 in component ::Drivers:FLASH -#define RTE_FLASH0 1 -// FLASH (Flash Memory) [Driver_FLASH0] - -#endif /* __RTE_DEVICE_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Config/cmsis_driver_config.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Config/cmsis_driver_config.h deleted file mode 100644 index 420e4d37668..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Config/cmsis_driver_config.h +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2018-2020 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_DRIVER_CONFIG_H__ -#define __CMSIS_DRIVER_CONFIG_H__ - -#include "device_cfg.h" -#include "platform_description.h" -#include "device_definition.h" - -#define MPC_ISRAM0_DEV MPC_ISRAM0_DEV_S -#define MPC_ISRAM1_DEV MPC_ISRAM1_DEV_S -#define MPC_ISRAM2_DEV MPC_ISRAM2_DEV_S -#define MPC_ISRAM3_DEV MPC_ISRAM3_DEV_S -#define MPC_CODE_SRAM_DEV MPC_CODE_SRAM_DEV_S -#define MPC_QSPI_DEV MPC_QSPI_DEV_S -#define MPC_EFLASH0_DEV MPC_EFLASH0_DEV_S - -#define AHB_PPC0_DEV AHB_PPC0_DEV_S -#define AHB_PPCEXP0_DEV AHB_PPCEXP0_DEV_S -#define AHB_PPCEXP1_DEV AHB_PPCEXP1_DEV_S -#define AHB_PPCEXP2_DEV AHB_PPCEXP2_DEV_S -#define AHB_PPCEXP3_DEV AHB_PPCEXP3_DEV_S -#define APB_PPC0_DEV APB_PPC0_DEV_S -#define APB_PPC1_DEV APB_PPC1_DEV_S -#define APB_PPCEXP0_DEV APB_PPCEXP0_DEV_S -#define APB_PPCEXP1_DEV APB_PPCEXP1_DEV_S -#define APB_PPCEXP2_DEV APB_PPCEXP2_DEV_S -#define APB_PPCEXP3_DEV APB_PPCEXP3_DEV_S - -#define MUSCA_B1_SCC_DEV MUSCA_B1_SCC_DEV_S - -#endif /* __CMSIS_DRIVER_CONFIG_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_Common.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_Common.h deleted file mode 100644 index cdf44b3325c..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_Common.h +++ /dev/null @@ -1,69 +0,0 @@ -/* - * Copyright (c) 2013-2016 ARM Limited. All rights reserved. - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the License); you may - * not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an AS IS BASIS, WITHOUT - * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - * - * $Date: 2. Jan 2014 - * $Revision: V2.00 - * - * Project: Common Driver definitions - */ - -/* History: - * Version 2.00 - * Changed prefix ARM_DRV -> ARM_DRIVER - * Added General return codes definitions - * Version 1.10 - * Namespace prefix ARM_ added - * Version 1.00 - * Initial release - */ - -#ifndef __DRIVER_COMMON_H -#define __DRIVER_COMMON_H - -#include -#include -#include - -#define ARM_DRIVER_VERSION_MAJOR_MINOR(major,minor) (((major) << 8) | (minor)) - -/** -\brief Driver Version -*/ -typedef struct _ARM_DRIVER_VERSION { - uint16_t api; ///< API version - uint16_t drv; ///< Driver version -} ARM_DRIVER_VERSION; - -/* General return codes */ -#define ARM_DRIVER_OK 0 ///< Operation succeeded -#define ARM_DRIVER_ERROR -1 ///< Unspecified error -#define ARM_DRIVER_ERROR_BUSY -2 ///< Driver is busy -#define ARM_DRIVER_ERROR_TIMEOUT -3 ///< Timeout occurred -#define ARM_DRIVER_ERROR_UNSUPPORTED -4 ///< Operation not supported -#define ARM_DRIVER_ERROR_PARAMETER -5 ///< Parameter error -#define ARM_DRIVER_ERROR_SPECIFIC -6 ///< Start of driver specific errors - -/** -\brief General power states -*/ -typedef enum _ARM_POWER_STATE { - ARM_POWER_OFF, ///< Power off: no operation possible - ARM_POWER_LOW, ///< Low Power mode: retain state, detect and signal wake-up events - ARM_POWER_FULL ///< Power on: full operation at maximum performance -} ARM_POWER_STATE; - -#endif /* __DRIVER_COMMON_H */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_MPC.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_MPC.h deleted file mode 100644 index 0a2503bbdf9..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_MPC.h +++ /dev/null @@ -1,152 +0,0 @@ -/* - * Copyright (c) 2016-2018 Arm Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#ifndef __DRIVER_MPC_H -#define __DRIVER_MPC_H - -#include "Driver_Common.h" - -/* API version */ -#define ARM_MPC_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) - -/* Error code returned by the driver functions */ -#define ARM_MPC_ERR_NOT_INIT (ARM_DRIVER_ERROR_SPECIFIC - 1) ///< MPC not initialized */ -#define ARM_MPC_ERR_NOT_IN_RANGE (ARM_DRIVER_ERROR_SPECIFIC - 2) ///< Address does not belong to a range controlled by the MPC */ -#define ARM_MPC_ERR_NOT_ALIGNED (ARM_DRIVER_ERROR_SPECIFIC - 3) ///< Address is not aligned on the block size of this MPC */ -#define ARM_MPC_ERR_INVALID_RANGE (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< The given address range to configure is invalid -#define ARM_MPC_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE (ARM_DRIVER_ERROR_SPECIFIC - 4) ///< The given range cannot be accessed with the wanted security attributes */ -#define ARM_MPC_ERR_UNSPECIFIED (ARM_DRIVER_ERROR_SPECIFIC - 5) ///< Unspecified error */ - -/* Security attribute used in various place of the API */ -typedef enum _ARM_MPC_SEC_ATTR { - ARM_MPC_ATTR_SECURE, ///< Secure attribute - ARM_MPC_ATTR_NONSECURE, ///< Non-secure attribute - /* Used when getting the configuration of a memory range and some blocks are - * secure whereas some other are non secure */ - ARM_MPC_ATTR_MIXED, ///< Mixed attribute -} ARM_MPC_SEC_ATTR; - -/* Function documentation */ -/** - \fn ARM_DRIVER_VERSION ARM_MPC_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - - \fn int32_t ARM_MPC_Initialize (void) - \brief Initialize MPC Interface. - \return Returns error code. - - \fn int32_t ARM_MPC_Uninitialize (void) - \brief De-initialize MPC Interface. The controlled memory region - should not be accessed after a call to this function, as - it is allowed to configure everything to be secure (to - prevent information leak for example). - \return Returns error code. - - \fn int32_t ARM_MPC_GetBlockSize (uint32_t* blk_size) - \brief Get the block size of the MPC. All regions must be aligned - on this block size (base address and limit+1 address). - \param[out] blk_size: The block size in bytes. - \return Returns error code. - - \fn int32_t ARM_MPC_GetCtrlConfig (uint32_t* ctrl_val) - \brief Get some information on how the MPC IP is configured. - \param[out] ctrl_val: MPC control configuration - \return Returns error code. - - \fn int32_t ARM_MPC_SetCtrlConfig (uint32_t ctrl) - \brief Set new control configuration for the MPC IP. - \param[in] ctrl: New control configuration. - \return Returns error code. - - \fn int32_t ARM_MPC_ConfigRegion (uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) - \brief Configure a memory region (base and limit included). - Both base and limit addresses must belong to the same - memory range, and this range must be managed by this MPC. - Also, some ranges are only allowed to be configured as - secure/non-secure, because of hardware requirements - (security aliases), and only a relevant security attribute - is therefore allowed for such ranges. - \param[in] base: Base address of the region to configure. This - bound is included in the configured region. - This must be aligned on the block size of this MPC. - \param[in] limit: Limit address of the region to configure. This - bound is included in the configured region. - Limit+1 must be aligned on the block size of this MPC. - \param[in] attr: Wanted security attribute of the region. - \return Returns error code. - - \fn int32_t ARM_MPC_GetRegionConfig (uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) - \brief Gets a memory region (base and limit included). - \param[in] base: Base address of the region to poll. This - bound is included. It does not need to be aligned - in any way. - \param[in] limit: Limit address of the region to poll. This - bound is included. (limit+1) does not need to be aligned - in any way. - \param[out] attr: Security attribute of the region. - If the region has mixed secure/non-secure, - a special value is returned (\ref ARM_MPC_SEC_ATTR). - - In case base and limit+1 addresses are not aligned on - the block size, the enclosing region with base and - limit+1 aligned on block size will be queried. - In case of early termination of the function (error), the - security attribute will be set to ARM_MPC_ATTR_MIXED. - \return Returns error code. - - \fn int32_t ARM_MPC_EnableInterrupt (void) - \brief Enable MPC interrupt. - \return Returns error code. - - \fn void ARM_MPC_DisableInterrupt (void) - \brief Disable MPC interrupt. - - \fn void ARM_MPC_ClearInterrupt (void) - \brief Clear MPC interrupt. - - \fn uint32_t ARM_MPC_InterruptState (void) - \brief MPC interrupt state. - \return Returns 1 if the interrupt is active, 0 otherwise. - - \fn int32_t ARM_MPC_LockDown (void) - \brief Lock down the MPC configuration. - \return Returns error code. -*/ - -/** - * \brief Access structure of the MPC Driver. - */ -typedef struct _ARM_DRIVER_MPC { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_MPC_GetVersion : Get driver version. - int32_t (*Initialize) (void); ///< Pointer to \ref ARM_MPC_Initialize : Initialize the MPC Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_MPC_Uninitialize : De-initialize the MPC Interface. - int32_t (*GetBlockSize) (uint32_t* blk_size); ///< Pointer to \ref ARM_MPC_GetBlockSize : Get MPC block size - int32_t (*GetCtrlConfig) (uint32_t* ctrl_val); ///< Pointer to \ref ARM_MPC_GetCtrlConfig : Get the MPC control configuration flags. - int32_t (*SetCtrlConfig) (uint32_t ctrl); ///< Pointer to \ref ARM_MPC_SetCtrlConfig : Set the MPC control configuration flags. - int32_t (*ConfigRegion) (uintptr_t base, uintptr_t limit, ARM_MPC_SEC_ATTR attr); ///< Pointer to \ref ARM_MPC_ConfigRegion : Configure a region using the driver for the specific MPC. - int32_t (*GetRegionConfig) (uintptr_t base, uintptr_t limit, ARM_MPC_SEC_ATTR *attr); ///< Pointer to \ref ARM_MPC_GetRegionConfig : Get the configuration of a specific region on this MPC. - int32_t (*EnableInterrupt) (void); ///< Pointer to \ref ARM_MPC_EnableInterrupt : Enable MPC interrupt. - void (*DisableInterrupt) (void); ///< Pointer to \ref ARM_MPC_DisableInterrupt : Disable MPC interrupt. - void (*ClearInterrupt) (void); ///< Pointer to \ref ARM_MPC_ClearInterrupt : Clear MPC interrupt. - uint32_t (*InterruptState) (void); ///< Pointer to \ref ARM_MPC_InterruptState : MPC interrupt State. - int32_t (*LockDown) (void); ///< Pointer to \ref ARM_MPC_LockDown : Lock down the MPC configuration. -} const ARM_DRIVER_MPC; - -#endif /* __DRIVER_MPC_H */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_Musca_B1_MPC.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_Musca_B1_MPC.c deleted file mode 100644 index 8c7bd636cfd..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_Musca_B1_MPC.c +++ /dev/null @@ -1,1184 +0,0 @@ -/* - * Copyright (c) 2016-2020 Arm Limited. All rights reserved. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_MPC.h" - -#include "mpc_sie_drv.h" -#include "cmsis_driver_config.h" -#include "RTE_Device.h" - -/* Driver version */ -#define ARM_MPC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(2, 0) - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_MPC_API_VERSION, - ARM_MPC_DRV_VERSION -}; - -static ARM_DRIVER_VERSION ARM_MPC_GetVersion(void) -{ - return DriverVersion; -} - -/* - * \brief Translates error codes from native API to CMSIS API. - * - * \param[in] err Error code to translate (\ref mpc_sie_error_t). - * - * \return Returns CMSIS error code. - */ -static int32_t error_trans(enum mpc_sie_error_t err) -{ - switch(err) { - case MPC_SIE_ERR_NONE: - return ARM_DRIVER_OK; - case MPC_SIE_INVALID_ARG: - return ARM_DRIVER_ERROR_PARAMETER; - case MPC_SIE_NOT_INIT: - return ARM_MPC_ERR_NOT_INIT; - case MPC_SIE_ERR_NOT_IN_RANGE: - return ARM_MPC_ERR_NOT_IN_RANGE; - case MPC_SIE_ERR_NOT_ALIGNED: - return ARM_MPC_ERR_NOT_ALIGNED; - case MPC_SIE_ERR_INVALID_RANGE: - return ARM_MPC_ERR_INVALID_RANGE; - case MPC_SIE_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE: - return ARM_MPC_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE; - default: - return ARM_MPC_ERR_UNSPECIFIED; - } -} - -#if (RTE_ISRAM0_MPC) -/* Ranges controlled by this ISRAM0_MPC */ -static const struct mpc_sie_memory_range_t MPC_ISRAM0_RANGE_S = { - .base = MPC_ISRAM0_RANGE_BASE_S, - .limit = MPC_ISRAM0_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE -}; - -static const struct mpc_sie_memory_range_t MPC_ISRAM0_RANGE_NS = { - .base = MPC_ISRAM0_RANGE_BASE_NS, - .limit = MPC_ISRAM0_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE -}; - -#define MPC_ISRAM0_RANGE_LIST_LEN 2u -static const struct mpc_sie_memory_range_t* - MPC_ISRAM0_RANGE_LIST[MPC_ISRAM0_RANGE_LIST_LEN] = { - &MPC_ISRAM0_RANGE_S, - &MPC_ISRAM0_RANGE_NS - }; - -/* ISRAM0_MPC Driver wrapper functions */ -static int32_t ISRAM0_MPC_Initialize(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_init(&MPC_ISRAM0_DEV, - MPC_ISRAM0_RANGE_LIST, - MPC_ISRAM0_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t ISRAM0_MPC_GetBlockSize(uint32_t *blk_size) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_block_size(&MPC_ISRAM0_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_GetCtrlConfig(uint32_t *ctrl_val) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_ctrl(&MPC_ISRAM0_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_set_ctrl(&MPC_ISRAM0_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_region_config(&MPC_ISRAM0_DEV, base, limit, - (enum mpc_sie_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_config_region(&MPC_ISRAM0_DEV, base, limit, - (enum mpc_sie_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t ISRAM0_MPC_EnableInterrupt(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_irq_enable(&MPC_ISRAM0_DEV); - - return error_trans(ret); -} - -static void ISRAM0_MPC_DisableInterrupt(void) -{ - mpc_sie_irq_disable(&MPC_ISRAM0_DEV); -} - - -static void ISRAM0_MPC_ClearInterrupt(void) -{ - mpc_sie_clear_irq(&MPC_ISRAM0_DEV); -} - -static uint32_t ISRAM0_MPC_InterruptState(void) -{ - return mpc_sie_irq_state(&MPC_ISRAM0_DEV); -} - -static int32_t ISRAM0_MPC_LockDown(void) -{ - return mpc_sie_lock_down(&MPC_ISRAM0_DEV); -} - -/* ISRAM0_MPC Driver CMSIS access structure */ -ARM_DRIVER_MPC Driver_ISRAM0_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = ISRAM0_MPC_Initialize, - .Uninitialize = ISRAM0_MPC_Uninitialize, - .GetBlockSize = ISRAM0_MPC_GetBlockSize, - .GetCtrlConfig = ISRAM0_MPC_GetCtrlConfig, - .SetCtrlConfig = ISRAM0_MPC_SetCtrlConfig, - .ConfigRegion = ISRAM0_MPC_ConfigRegion, - .GetRegionConfig = ISRAM0_MPC_GetRegionConfig, - .EnableInterrupt = ISRAM0_MPC_EnableInterrupt, - .DisableInterrupt = ISRAM0_MPC_DisableInterrupt, - .ClearInterrupt = ISRAM0_MPC_ClearInterrupt, - .InterruptState = ISRAM0_MPC_InterruptState, - .LockDown = ISRAM0_MPC_LockDown, -}; -#endif /* RTE_ISRAM0_MPC */ - -#if (RTE_ISRAM1_MPC) -/* Ranges controlled by this ISRAM1_MPC */ -static const struct mpc_sie_memory_range_t MPC_ISRAM1_RANGE_S = { - .base = MPC_ISRAM1_RANGE_BASE_S, - .limit = MPC_ISRAM1_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE -}; - -static const struct mpc_sie_memory_range_t MPC_ISRAM1_RANGE_NS = { - .base = MPC_ISRAM1_RANGE_BASE_NS, - .limit = MPC_ISRAM1_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE -}; - -#define MPC_ISRAM1_RANGE_LIST_LEN 2u -static const struct mpc_sie_memory_range_t* - MPC_ISRAM1_RANGE_LIST[MPC_ISRAM1_RANGE_LIST_LEN] = { - &MPC_ISRAM1_RANGE_S, - &MPC_ISRAM1_RANGE_NS - }; - -/* ISRAM1_MPC Driver wrapper functions */ -static int32_t ISRAM1_MPC_Initialize(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_init(&MPC_ISRAM1_DEV, - MPC_ISRAM1_RANGE_LIST, - MPC_ISRAM1_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t ISRAM1_MPC_GetBlockSize(uint32_t *blk_size) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_block_size(&MPC_ISRAM1_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_GetCtrlConfig(uint32_t *ctrl_val) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_ctrl(&MPC_ISRAM1_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_set_ctrl(&MPC_ISRAM1_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_region_config(&MPC_ISRAM1_DEV, base, limit, - (enum mpc_sie_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_config_region(&MPC_ISRAM1_DEV, base, limit, - (enum mpc_sie_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t ISRAM1_MPC_EnableInterrupt(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_irq_enable(&MPC_ISRAM1_DEV); - - return error_trans(ret); -} - -static void ISRAM1_MPC_DisableInterrupt(void) -{ - mpc_sie_irq_disable(&MPC_ISRAM1_DEV); -} - - -static void ISRAM1_MPC_ClearInterrupt(void) -{ - mpc_sie_clear_irq(&MPC_ISRAM1_DEV); -} - -static uint32_t ISRAM1_MPC_InterruptState(void) -{ - return mpc_sie_irq_state(&MPC_ISRAM1_DEV); -} - -static int32_t ISRAM1_MPC_LockDown(void) -{ - return mpc_sie_lock_down(&MPC_ISRAM1_DEV); -} - -/* ISRAM1_MPC Driver CMSIS access structure */ -ARM_DRIVER_MPC Driver_ISRAM1_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = ISRAM1_MPC_Initialize, - .Uninitialize = ISRAM1_MPC_Uninitialize, - .GetBlockSize = ISRAM1_MPC_GetBlockSize, - .GetCtrlConfig = ISRAM1_MPC_GetCtrlConfig, - .SetCtrlConfig = ISRAM1_MPC_SetCtrlConfig, - .ConfigRegion = ISRAM1_MPC_ConfigRegion, - .GetRegionConfig = ISRAM1_MPC_GetRegionConfig, - .EnableInterrupt = ISRAM1_MPC_EnableInterrupt, - .DisableInterrupt = ISRAM1_MPC_DisableInterrupt, - .ClearInterrupt = ISRAM1_MPC_ClearInterrupt, - .InterruptState = ISRAM1_MPC_InterruptState, - .LockDown = ISRAM1_MPC_LockDown, -}; -#endif /* RTE_ISRAM1_MPC */ - -#if (RTE_ISRAM2_MPC) -/* Ranges controlled by this ISRAM2_MPC */ -static const struct mpc_sie_memory_range_t MPC_ISRAM2_RANGE_S = { - .base = MPC_ISRAM2_RANGE_BASE_S, - .limit = MPC_ISRAM2_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE -}; - -static const struct mpc_sie_memory_range_t MPC_ISRAM2_RANGE_NS = { - .base = MPC_ISRAM2_RANGE_BASE_NS, - .limit = MPC_ISRAM2_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE -}; - -#define MPC_ISRAM2_RANGE_LIST_LEN 2u -static const struct mpc_sie_memory_range_t* - MPC_ISRAM2_RANGE_LIST[MPC_ISRAM2_RANGE_LIST_LEN] = { - &MPC_ISRAM2_RANGE_S, - &MPC_ISRAM2_RANGE_NS - }; - -/* ISRAM2_MPC Driver wrapper functions */ -static int32_t ISRAM2_MPC_Initialize(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_init(&MPC_ISRAM2_DEV, - MPC_ISRAM2_RANGE_LIST, - MPC_ISRAM2_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t ISRAM2_MPC_GetBlockSize(uint32_t *blk_size) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_block_size(&MPC_ISRAM2_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_GetCtrlConfig(uint32_t *ctrl_val) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_ctrl(&MPC_ISRAM2_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_set_ctrl(&MPC_ISRAM2_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_region_config(&MPC_ISRAM2_DEV, base, limit, - (enum mpc_sie_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_config_region(&MPC_ISRAM2_DEV, base, limit, - (enum mpc_sie_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t ISRAM2_MPC_EnableInterrupt(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_irq_enable(&MPC_ISRAM2_DEV); - - return error_trans(ret); -} - -static void ISRAM2_MPC_DisableInterrupt(void) -{ - mpc_sie_irq_disable(&MPC_ISRAM2_DEV); -} - - -static void ISRAM2_MPC_ClearInterrupt(void) -{ - mpc_sie_clear_irq(&MPC_ISRAM2_DEV); -} - -static uint32_t ISRAM2_MPC_InterruptState(void) -{ - return mpc_sie_irq_state(&MPC_ISRAM2_DEV); -} - -static int32_t ISRAM2_MPC_LockDown(void) -{ - return mpc_sie_lock_down(&MPC_ISRAM2_DEV); -} - -/* ISRAM2_MPC Driver CMSIS access structure */ -ARM_DRIVER_MPC Driver_ISRAM2_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = ISRAM2_MPC_Initialize, - .Uninitialize = ISRAM2_MPC_Uninitialize, - .GetBlockSize = ISRAM2_MPC_GetBlockSize, - .GetCtrlConfig = ISRAM2_MPC_GetCtrlConfig, - .SetCtrlConfig = ISRAM2_MPC_SetCtrlConfig, - .ConfigRegion = ISRAM2_MPC_ConfigRegion, - .GetRegionConfig = ISRAM2_MPC_GetRegionConfig, - .EnableInterrupt = ISRAM2_MPC_EnableInterrupt, - .DisableInterrupt = ISRAM2_MPC_DisableInterrupt, - .ClearInterrupt = ISRAM2_MPC_ClearInterrupt, - .InterruptState = ISRAM2_MPC_InterruptState, - .LockDown = ISRAM2_MPC_LockDown, -}; -#endif /* RTE_ISRAM2_MPC */ - -#if (RTE_ISRAM3_MPC) -/* Ranges controlled by this ISRAM3_MPC */ -static const struct mpc_sie_memory_range_t MPC_ISRAM3_RANGE_S = { - .base = MPC_ISRAM3_RANGE_BASE_S, - .limit = MPC_ISRAM3_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE -}; - -static const struct mpc_sie_memory_range_t MPC_ISRAM3_RANGE_NS = { - .base = MPC_ISRAM3_RANGE_BASE_NS, - .limit = MPC_ISRAM3_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE -}; - -#define MPC_ISRAM3_RANGE_LIST_LEN 2u -static const struct mpc_sie_memory_range_t* - MPC_ISRAM3_RANGE_LIST[MPC_ISRAM3_RANGE_LIST_LEN] = { - &MPC_ISRAM3_RANGE_S, - &MPC_ISRAM3_RANGE_NS - }; - -/* ISRAM3_MPC Driver wrapper functions */ -static int32_t ISRAM3_MPC_Initialize(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_init(&MPC_ISRAM3_DEV, - MPC_ISRAM3_RANGE_LIST, - MPC_ISRAM3_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t ISRAM3_MPC_GetBlockSize(uint32_t *blk_size) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_block_size(&MPC_ISRAM3_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_GetCtrlConfig(uint32_t *ctrl_val) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_ctrl(&MPC_ISRAM3_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_set_ctrl(&MPC_ISRAM3_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_region_config(&MPC_ISRAM3_DEV, base, limit, - (enum mpc_sie_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_config_region(&MPC_ISRAM3_DEV, base, limit, - (enum mpc_sie_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t ISRAM3_MPC_EnableInterrupt(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_irq_enable(&MPC_ISRAM3_DEV); - - return error_trans(ret); -} - -static void ISRAM3_MPC_DisableInterrupt(void) -{ - mpc_sie_irq_disable(&MPC_ISRAM3_DEV); -} - - -static void ISRAM3_MPC_ClearInterrupt(void) -{ - mpc_sie_clear_irq(&MPC_ISRAM3_DEV); -} - -static uint32_t ISRAM3_MPC_InterruptState(void) -{ - return mpc_sie_irq_state(&MPC_ISRAM3_DEV); -} - -static int32_t ISRAM3_MPC_LockDown(void) -{ - return mpc_sie_lock_down(&MPC_ISRAM3_DEV); -} - -/* ISRAM3_MPC Driver CMSIS access structure */ -ARM_DRIVER_MPC Driver_ISRAM3_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = ISRAM3_MPC_Initialize, - .Uninitialize = ISRAM3_MPC_Uninitialize, - .GetBlockSize = ISRAM3_MPC_GetBlockSize, - .GetCtrlConfig = ISRAM3_MPC_GetCtrlConfig, - .SetCtrlConfig = ISRAM3_MPC_SetCtrlConfig, - .ConfigRegion = ISRAM3_MPC_ConfigRegion, - .GetRegionConfig = ISRAM3_MPC_GetRegionConfig, - .EnableInterrupt = ISRAM3_MPC_EnableInterrupt, - .DisableInterrupt = ISRAM3_MPC_DisableInterrupt, - .ClearInterrupt = ISRAM3_MPC_ClearInterrupt, - .InterruptState = ISRAM3_MPC_InterruptState, - .LockDown = ISRAM3_MPC_LockDown, -}; -#endif /* RTE_ISRAM3_MPC */ - -#if (RTE_CODE_SRAM_MPC) -/* Ranges controlled by this CODE_SRAM_MPC */ -static const struct mpc_sie_memory_range_t MPC_CODE_SRAM_RANGE_S = { - .base = MPC_CODE_SRAM_RANGE_BASE_S, - .limit = MPC_CODE_SRAM_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE -}; - -static const struct mpc_sie_memory_range_t MPC_CODE_SRAM_RANGE_NS = { - .base = MPC_CODE_SRAM_RANGE_BASE_NS, - .limit = MPC_CODE_SRAM_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE -}; - -#define MPC_CODE_SRAM_RANGE_LIST_LEN 2u -static const struct mpc_sie_memory_range_t* - MPC_CODE_SRAM_RANGE_LIST[MPC_CODE_SRAM_RANGE_LIST_LEN] = { - &MPC_CODE_SRAM_RANGE_S, - &MPC_CODE_SRAM_RANGE_NS - }; - -/* CODE_SRAM_MPC Driver wrapper functions */ -static int32_t CODE_SRAM_MPC_Initialize(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_init(&MPC_CODE_SRAM_DEV, - MPC_CODE_SRAM_RANGE_LIST, - MPC_CODE_SRAM_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t CODE_SRAM_MPC_GetBlockSize(uint32_t *blk_size) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_block_size(&MPC_CODE_SRAM_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_GetCtrlConfig(uint32_t *ctrl_val) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_ctrl(&MPC_CODE_SRAM_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_set_ctrl(&MPC_CODE_SRAM_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_region_config(&MPC_CODE_SRAM_DEV, base, limit, - (enum mpc_sie_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_config_region(&MPC_CODE_SRAM_DEV, base, limit, - (enum mpc_sie_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t CODE_SRAM_MPC_EnableInterrupt(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_irq_enable(&MPC_CODE_SRAM_DEV); - - return error_trans(ret); -} - -static void CODE_SRAM_MPC_DisableInterrupt(void) -{ - mpc_sie_irq_disable(&MPC_CODE_SRAM_DEV); -} - - -static void CODE_SRAM_MPC_ClearInterrupt(void) -{ - mpc_sie_clear_irq(&MPC_CODE_SRAM_DEV); -} - -static uint32_t CODE_SRAM_MPC_InterruptState(void) -{ - return mpc_sie_irq_state(&MPC_CODE_SRAM_DEV); -} - -static int32_t CODE_SRAM_MPC_LockDown(void) -{ - return mpc_sie_lock_down(&MPC_CODE_SRAM_DEV); -} - -/* CODE_SRAM_MPC Driver CMSIS access structure */ -ARM_DRIVER_MPC Driver_CODE_SRAM_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = CODE_SRAM_MPC_Initialize, - .Uninitialize = CODE_SRAM_MPC_Uninitialize, - .GetBlockSize = CODE_SRAM_MPC_GetBlockSize, - .GetCtrlConfig = CODE_SRAM_MPC_GetCtrlConfig, - .SetCtrlConfig = CODE_SRAM_MPC_SetCtrlConfig, - .ConfigRegion = CODE_SRAM_MPC_ConfigRegion, - .GetRegionConfig = CODE_SRAM_MPC_GetRegionConfig, - .EnableInterrupt = CODE_SRAM_MPC_EnableInterrupt, - .DisableInterrupt = CODE_SRAM_MPC_DisableInterrupt, - .ClearInterrupt = CODE_SRAM_MPC_ClearInterrupt, - .InterruptState = CODE_SRAM_MPC_InterruptState, - .LockDown = CODE_SRAM_MPC_LockDown, -}; -#endif /* RTE_CODE_SRAM_MPC */ - -#if (RTE_QSPI_MPC) -/* Ranges controlled by this QSPI_MPC */ -static const struct mpc_sie_memory_range_t MPC_QSPI_RANGE_S = { - .base = MPC_QSPI_RANGE_BASE_S, - .limit = MPC_QSPI_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE -}; - -static const struct mpc_sie_memory_range_t MPC_QSPI_RANGE_NS = { - .base = MPC_QSPI_RANGE_BASE_NS, - .limit = MPC_QSPI_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE -}; - -#define MPC_QSPI_RANGE_LIST_LEN 2u -static const struct mpc_sie_memory_range_t* - MPC_QSPI_RANGE_LIST[MPC_QSPI_RANGE_LIST_LEN] = { - &MPC_QSPI_RANGE_S, - &MPC_QSPI_RANGE_NS - }; - -/* QSPI_MPC Driver wrapper functions */ -static int32_t QSPI_MPC_Initialize(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_init(&MPC_QSPI_DEV, - MPC_QSPI_RANGE_LIST, - MPC_QSPI_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t QSPI_MPC_GetBlockSize(uint32_t *blk_size) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_block_size(&MPC_QSPI_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_GetCtrlConfig(uint32_t *ctrl_val) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_ctrl(&MPC_QSPI_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_set_ctrl(&MPC_QSPI_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_region_config(&MPC_QSPI_DEV, base, limit, - (enum mpc_sie_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_config_region(&MPC_QSPI_DEV, base, limit, - (enum mpc_sie_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t QSPI_MPC_EnableInterrupt(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_irq_enable(&MPC_QSPI_DEV); - - return error_trans(ret); -} - -static void QSPI_MPC_DisableInterrupt(void) -{ - mpc_sie_irq_disable(&MPC_QSPI_DEV); -} - - -static void QSPI_MPC_ClearInterrupt(void) -{ - mpc_sie_clear_irq(&MPC_QSPI_DEV); -} - -static uint32_t QSPI_MPC_InterruptState(void) -{ - return mpc_sie_irq_state(&MPC_QSPI_DEV); -} - -static int32_t QSPI_MPC_LockDown(void) -{ - return mpc_sie_lock_down(&MPC_QSPI_DEV); -} - -/* QSPI_MPC Driver CMSIS access structure */ -ARM_DRIVER_MPC Driver_QSPI_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = QSPI_MPC_Initialize, - .Uninitialize = QSPI_MPC_Uninitialize, - .GetBlockSize = QSPI_MPC_GetBlockSize, - .GetCtrlConfig = QSPI_MPC_GetCtrlConfig, - .SetCtrlConfig = QSPI_MPC_SetCtrlConfig, - .ConfigRegion = QSPI_MPC_ConfigRegion, - .GetRegionConfig = QSPI_MPC_GetRegionConfig, - .EnableInterrupt = QSPI_MPC_EnableInterrupt, - .DisableInterrupt = QSPI_MPC_DisableInterrupt, - .ClearInterrupt = QSPI_MPC_ClearInterrupt, - .InterruptState = QSPI_MPC_InterruptState, - .LockDown = QSPI_MPC_LockDown, -}; -#endif /* RTE_QSPI_MPC */ - -#if (RTE_EFLASH0_MPC) -/* Ranges controlled by this EFLASH0_MPC */ -static const struct mpc_sie_memory_range_t MPC_EFLASH0_RANGE_S = { - .base = MPC_EFLASH0_RANGE_BASE_S, - .limit = MPC_EFLASH0_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE -}; - -static const struct mpc_sie_memory_range_t MPC_EFLASH0_RANGE_NS = { - .base = MPC_EFLASH0_RANGE_BASE_NS, - .limit = MPC_EFLASH0_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE -}; - -#define MPC_EFLASH0_RANGE_LIST_LEN 2u -static const struct mpc_sie_memory_range_t* - MPC_EFLASH0_RANGE_LIST[MPC_EFLASH0_RANGE_LIST_LEN] = { - &MPC_EFLASH0_RANGE_S, - &MPC_EFLASH0_RANGE_NS - }; - -/* EFLASH0_MPC Driver wrapper functions */ -static int32_t EFLASH0_MPC_Initialize(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_init(&MPC_EFLASH0_DEV, - MPC_EFLASH0_RANGE_LIST, - MPC_EFLASH0_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t EFLASH0_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t EFLASH0_MPC_GetBlockSize(uint32_t *blk_size) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_block_size(&MPC_EFLASH0_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t EFLASH0_MPC_GetCtrlConfig(uint32_t *ctrl_val) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_ctrl(&MPC_EFLASH0_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t EFLASH0_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_set_ctrl(&MPC_EFLASH0_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t EFLASH0_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_region_config(&MPC_EFLASH0_DEV, base, limit, - (enum mpc_sie_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t EFLASH0_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_config_region(&MPC_EFLASH0_DEV, base, limit, - (enum mpc_sie_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t EFLASH0_MPC_EnableInterrupt(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_irq_enable(&MPC_EFLASH0_DEV); - - return error_trans(ret); -} - -static void EFLASH0_MPC_DisableInterrupt(void) -{ - mpc_sie_irq_disable(&MPC_EFLASH0_DEV); -} - - -static void EFLASH0_MPC_ClearInterrupt(void) -{ - mpc_sie_clear_irq(&MPC_EFLASH0_DEV); -} - -static uint32_t EFLASH0_MPC_InterruptState(void) -{ - return mpc_sie_irq_state(&MPC_EFLASH0_DEV); -} - -static int32_t EFLASH0_MPC_LockDown(void) -{ - return mpc_sie_lock_down(&MPC_EFLASH0_DEV); -} - -/* EFLASH0_MPC Driver CMSIS access structure */ -ARM_DRIVER_MPC Driver_EFLASH0_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = EFLASH0_MPC_Initialize, - .Uninitialize = EFLASH0_MPC_Uninitialize, - .GetBlockSize = EFLASH0_MPC_GetBlockSize, - .GetCtrlConfig = EFLASH0_MPC_GetCtrlConfig, - .SetCtrlConfig = EFLASH0_MPC_SetCtrlConfig, - .ConfigRegion = EFLASH0_MPC_ConfigRegion, - .GetRegionConfig = EFLASH0_MPC_GetRegionConfig, - .EnableInterrupt = EFLASH0_MPC_EnableInterrupt, - .DisableInterrupt = EFLASH0_MPC_DisableInterrupt, - .ClearInterrupt = EFLASH0_MPC_ClearInterrupt, - .InterruptState = EFLASH0_MPC_InterruptState, - .LockDown = EFLASH0_MPC_LockDown, -}; -#endif /* RTE_EFLASH0_MPC */ - -#if (RTE_EFLASH1_MPC) -/* Ranges controlled by this EFLASH1_MPC */ -static const struct mpc_sie_memory_range_t MPC_EFLASH1_RANGE_S = { - .base = MPC_EFLASH1_RANGE_BASE_S, - .limit = MPC_EFLASH1_RANGE_LIMIT_S, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_SECURE -}; - -static const struct mpc_sie_memory_range_t MPC_EFLASH1_RANGE_NS = { - .base = MPC_EFLASH1_RANGE_BASE_NS, - .limit = MPC_EFLASH1_RANGE_LIMIT_NS, - .range_offset = 0, - .attr = MPC_SIE_SEC_ATTR_NONSECURE -}; - -#define MPC_EFLASH1_RANGE_LIST_LEN 2u -static const struct mpc_sie_memory_range_t* - MPC_EFLASH1_RANGE_LIST[MPC_EFLASH1_RANGE_LIST_LEN] = { - &MPC_EFLASH1_RANGE_S, - &MPC_EFLASH1_RANGE_NS - }; - -/* EFLASH1_MPC Driver wrapper functions */ -static int32_t EFLASH1_MPC_Initialize(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_init(&MPC_EFLASH1_DEV, - MPC_EFLASH1_RANGE_LIST, - MPC_EFLASH1_RANGE_LIST_LEN); - - return error_trans(ret); -} - -static int32_t EFLASH1_MPC_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t EFLASH1_MPC_GetBlockSize(uint32_t *blk_size) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_block_size(&MPC_EFLASH1_DEV, blk_size); - - return error_trans(ret); -} - -static int32_t EFLASH1_MPC_GetCtrlConfig(uint32_t *ctrl_val) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_ctrl(&MPC_EFLASH1_DEV, ctrl_val); - - return error_trans(ret); -} - -static int32_t EFLASH1_MPC_SetCtrlConfig(uint32_t ctrl) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_set_ctrl(&MPC_EFLASH1_DEV, ctrl); - - return error_trans(ret); -} - -static int32_t EFLASH1_MPC_GetRegionConfig(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR *attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_get_region_config(&MPC_EFLASH1_DEV, base, limit, - (enum mpc_sie_sec_attr_t*)attr); - - return error_trans(ret); -} - -static int32_t EFLASH1_MPC_ConfigRegion(uintptr_t base, - uintptr_t limit, - ARM_MPC_SEC_ATTR attr) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_config_region(&MPC_EFLASH1_DEV, base, limit, - (enum mpc_sie_sec_attr_t)attr); - - return error_trans(ret); -} - -static int32_t EFLASH1_MPC_EnableInterrupt(void) -{ - enum mpc_sie_error_t ret; - - ret = mpc_sie_irq_enable(&MPC_EFLASH1_DEV); - - return error_trans(ret); -} - -static void EFLASH1_MPC_DisableInterrupt(void) -{ - mpc_sie_irq_disable(&MPC_EFLASH1_DEV); -} - - -static void EFLASH1_MPC_ClearInterrupt(void) -{ - mpc_sie_clear_irq(&MPC_EFLASH1_DEV); -} - -static uint32_t EFLASH1_MPC_InterruptState(void) -{ - return mpc_sie_irq_state(&MPC_EFLASH1_DEV); -} - -static int32_t EFLASH1_MPC_LockDown(void) -{ - return mpc_sie_lock_down(&MPC_EFLASH1_DEV); -} - -/* EFLASH1_MPC Driver CMSIS access structure */ -ARM_DRIVER_MPC Driver_EFLASH1_MPC = { - .GetVersion = ARM_MPC_GetVersion, - .Initialize = EFLASH1_MPC_Initialize, - .Uninitialize = EFLASH1_MPC_Uninitialize, - .GetBlockSize = EFLASH1_MPC_GetBlockSize, - .GetCtrlConfig = EFLASH1_MPC_GetCtrlConfig, - .SetCtrlConfig = EFLASH1_MPC_SetCtrlConfig, - .ConfigRegion = EFLASH1_MPC_ConfigRegion, - .GetRegionConfig = EFLASH1_MPC_GetRegionConfig, - .EnableInterrupt = EFLASH1_MPC_EnableInterrupt, - .DisableInterrupt = EFLASH1_MPC_DisableInterrupt, - .ClearInterrupt = EFLASH1_MPC_ClearInterrupt, - .InterruptState = EFLASH1_MPC_InterruptState, - .LockDown = EFLASH1_MPC_LockDown, -}; -#endif /* RTE_EFLASH1_MPC */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_PPC.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_PPC.c deleted file mode 100644 index 2695a502535..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_PPC.c +++ /dev/null @@ -1,970 +0,0 @@ -/* - * Copyright (c) 2016-2019 Arm Limited. All rights reserved. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "Driver_PPC.h" - -#include "cmsis_driver_config.h" -#include "RTE_Device.h" - -/* Driver version */ -#define ARM_PPC_DRV_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1, 0) - -/* Driver Version */ -static const ARM_DRIVER_VERSION DriverVersion = { - ARM_PPC_API_VERSION, - ARM_PPC_DRV_VERSION -}; - -static ARM_DRIVER_VERSION ARM_PPC_GetVersion(void) -{ - return DriverVersion; -} - -#if (RTE_AHB_PPC0) -/* AHB PPC0 Driver wrapper functions */ -static int32_t AHB_PPC0_Initialize(void) -{ - ppc_sse200_init(&AHB_PPC0_DEV, AHB_PPC0); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPC0_Uninitialize(void) -{ - /* Nothing to be done*/ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPC0_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPC0_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPC0_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPC0_DEV, periph); -} - -static uint32_t AHB_PPC0_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPC0_DEV, periph); -} - -static int32_t AHB_PPC0_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPC0_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPC0_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPC0_DEV); -} - -static void AHB_PPC0_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPC0_DEV); -} - -static uint32_t AHB_PPC0_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPC0_DEV); -} - -/* AHB PPC0 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPC0; -ARM_DRIVER_PPC Driver_AHB_PPC0 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPC0_Initialize, - .Uninitialize = AHB_PPC0_Uninitialize, - .ConfigPeriph = AHB_PPC0_ConfigPeriph, - .IsPeriphSecure = AHB_PPC0_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPC0_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPC0_EnableInterrupt, - .DisableInterrupt = AHB_PPC0_DisableInterrupt, - .ClearInterrupt = AHB_PPC0_ClearInterrupt, - .InterruptState = AHB_PPC0_InterruptState -}; -#endif /* RTE_AHB_PPC0 */ - -#if (RTE_AHB_PPCEXP0) -/* AHB PPCEXP0 Driver wrapper functions */ -static int32_t AHB_PPCEXP0_Initialize(void) -{ - ppc_sse200_init(&AHB_PPCEXP0_DEV, AHB_PPC_EXP0); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP0_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP0_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPCEXP0_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPCEXP0_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPCEXP0_DEV, periph); -} - -static uint32_t AHB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP0_DEV, periph); -} - -static int32_t AHB_PPCEXP0_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPCEXP0_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPCEXP0_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPCEXP0_DEV); -} - -static void AHB_PPCEXP0_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPCEXP0_DEV); -} - -static uint32_t AHB_PPCEXP0_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPCEXP0_DEV); -} - -/* AHB PPCEXP0 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPCEXP0; -ARM_DRIVER_PPC Driver_AHB_PPCEXP0 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPCEXP0_Initialize, - .Uninitialize = AHB_PPCEXP0_Uninitialize, - .ConfigPeriph = AHB_PPCEXP0_ConfigPeriph, - .IsPeriphSecure = AHB_PPCEXP0_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPCEXP0_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPCEXP0_EnableInterrupt, - .DisableInterrupt = AHB_PPCEXP0_DisableInterrupt, - .ClearInterrupt = AHB_PPCEXP0_ClearInterrupt, - .InterruptState = AHB_PPCEXP0_InterruptState -}; -#endif /* RTE_AHB_PPCEXP0 */ - -#if (RTE_AHB_PPCEXP1) -/* AHB PPCEXP1 Driver wrapper functions */ -static int32_t AHB_PPCEXP1_Initialize(void) -{ - ppc_sse200_init(&AHB_PPCEXP1_DEV, AHB_PPC_EXP1); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP1_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP1_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPCEXP1_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPCEXP1_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPCEXP1_DEV, periph); -} - -static uint32_t AHB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP1_DEV, periph); -} - -static int32_t AHB_PPCEXP1_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPCEXP1_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPCEXP1_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPCEXP1_DEV); -} - -static void AHB_PPCEXP1_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPCEXP1_DEV); -} - -static uint32_t AHB_PPCEXP1_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPCEXP1_DEV); -} - -/* AHB PPCEXP1 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPCEXP1; -ARM_DRIVER_PPC Driver_AHB_PPCEXP1 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPCEXP1_Initialize, - .Uninitialize = AHB_PPCEXP1_Uninitialize, - .ConfigPeriph = AHB_PPCEXP1_ConfigPeriph, - .IsPeriphSecure = AHB_PPCEXP1_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPCEXP1_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPCEXP1_EnableInterrupt, - .DisableInterrupt = AHB_PPCEXP1_DisableInterrupt, - .ClearInterrupt = AHB_PPCEXP1_ClearInterrupt, - .InterruptState = AHB_PPCEXP1_InterruptState -}; -#endif /* RTE_AHB_PPCEXP1 */ - -#if (RTE_AHB_PPCEXP2) -/* AHB PPCEXP2 Driver wrapper functions */ -static int32_t AHB_PPCEXP2_Initialize(void) -{ - ppc_sse200_init(&AHB_PPCEXP2_DEV, AHB_PPC_EXP2); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP2_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP2_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPCEXP2_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPCEXP2_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPCEXP2_DEV, periph); -} - -static uint32_t AHB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP2_DEV, periph); -} - -static int32_t AHB_PPCEXP2_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPCEXP2_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPCEXP2_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPCEXP2_DEV); -} - -static void AHB_PPCEXP2_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPCEXP2_DEV); -} - -static uint32_t AHB_PPCEXP2_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPCEXP2_DEV); -} - -/* AHB PPCEXP2 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPCEXP2; -ARM_DRIVER_PPC Driver_AHB_PPCEXP2 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPCEXP2_Initialize, - .Uninitialize = AHB_PPCEXP2_Uninitialize, - .ConfigPeriph = AHB_PPCEXP2_ConfigPeriph, - .IsPeriphSecure = AHB_PPCEXP2_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPCEXP2_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPCEXP2_EnableInterrupt, - .DisableInterrupt = AHB_PPCEXP2_DisableInterrupt, - .ClearInterrupt = AHB_PPCEXP2_ClearInterrupt, - .InterruptState = AHB_PPCEXP2_InterruptState -}; -#endif /* RTE_AHB_PPCEXP2 */ - -#if (RTE_AHB_PPCEXP3) -/* AHB PPCEXP3 Driver wrapper functions */ -static int32_t AHB_PPCEXP3_Initialize(void) -{ - ppc_sse200_init(&AHB_PPCEXP3_DEV, AHB_PPC_EXP3); - - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP3_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t AHB_PPCEXP3_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&AHB_PPCEXP3_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t AHB_PPCEXP3_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&AHB_PPCEXP3_DEV, periph); -} - -static uint32_t AHB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&AHB_PPCEXP3_DEV, periph); -} - -static int32_t AHB_PPCEXP3_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&AHB_PPCEXP3_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void AHB_PPCEXP3_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&AHB_PPCEXP3_DEV); -} - -static void AHB_PPCEXP3_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&AHB_PPCEXP3_DEV); -} - -static uint32_t AHB_PPCEXP3_InterruptState(void) -{ - return ppc_sse200_irq_state(&AHB_PPCEXP3_DEV); -} - -/* AHB PPCEXP3 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_AHB_PPCEXP3; -ARM_DRIVER_PPC Driver_AHB_PPCEXP3 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = AHB_PPCEXP3_Initialize, - .Uninitialize = AHB_PPCEXP3_Uninitialize, - .ConfigPeriph = AHB_PPCEXP3_ConfigPeriph, - .IsPeriphSecure = AHB_PPCEXP3_IsPeriphSecure, - .IsPeriphPrivOnly = AHB_PPCEXP3_IsPeriphPrivOnly, - .EnableInterrupt = AHB_PPCEXP3_EnableInterrupt, - .DisableInterrupt = AHB_PPCEXP3_DisableInterrupt, - .ClearInterrupt = AHB_PPCEXP3_ClearInterrupt, - .InterruptState = AHB_PPCEXP3_InterruptState -}; -#endif /* RTE_AHB_PPCEXP3 */ - -#if (RTE_APB_PPC0) -/* APB PPC0 Driver wrapper functions */ -static int32_t APB_PPC0_Initialize(void) -{ - ppc_sse200_init(&APB_PPC0_DEV, APB_PPC0); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPC0_Uninitialize(void) -{ - /* Nothing to be done*/ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPC0_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPC0_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPC0_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPC0_DEV, periph); -} - -static uint32_t APB_PPC0_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPC0_DEV, periph); -} - -static int32_t APB_PPC0_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPC0_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPC0_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPC0_DEV); -} - -static void APB_PPC0_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPC0_DEV); -} - -static uint32_t APB_PPC0_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPC0_DEV); -} - -/* APB PPC0 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPC0; -ARM_DRIVER_PPC Driver_APB_PPC0 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPC0_Initialize, - .Uninitialize = APB_PPC0_Uninitialize, - .ConfigPeriph = APB_PPC0_ConfigPeriph, - .IsPeriphSecure = APB_PPC0_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPC0_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPC0_EnableInterrupt, - .DisableInterrupt = APB_PPC0_DisableInterrupt, - .ClearInterrupt = APB_PPC0_ClearInterrupt, - .InterruptState = APB_PPC0_InterruptState -}; -#endif /* RTE_APB_PPC0 */ - -#if (RTE_APB_PPC1) -/* APB PPC1 Driver wrapper functions */ -static int32_t APB_PPC1_Initialize(void) -{ - ppc_sse200_init(&APB_PPC1_DEV, APB_PPC1); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPC1_Uninitialize(void) -{ - /* Nothing to be done*/ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPC1_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPC1_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPC1_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPC1_DEV, periph); -} - -static uint32_t APB_PPC1_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPC1_DEV, periph); -} -static int32_t APB_PPC1_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPC1_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPC1_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPC1_DEV); -} - -static void APB_PPC1_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPC1_DEV); -} - -static uint32_t APB_PPC1_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPC1_DEV); -} - -/* APB PPC1 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPC1; -ARM_DRIVER_PPC Driver_APB_PPC1 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPC1_Initialize, - .Uninitialize = APB_PPC1_Uninitialize, - .ConfigPeriph = APB_PPC1_ConfigPeriph, - .IsPeriphSecure = APB_PPC1_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPC1_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPC1_EnableInterrupt, - .DisableInterrupt = APB_PPC1_DisableInterrupt, - .ClearInterrupt = APB_PPC1_ClearInterrupt, - .InterruptState = APB_PPC1_InterruptState -}; -#endif /* RTE_APB_PPC1 */ - -#if (RTE_APB_PPCEXP0) -/* APB PPCEXP0 Driver wrapper functions */ -static int32_t APB_PPCEXP0_Initialize(void) -{ - ppc_sse200_init(&APB_PPCEXP0_DEV, APB_PPC_EXP0); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP0_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP0_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPCEXP0_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPCEXP0_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPCEXP0_DEV, periph); -} - -static uint32_t APB_PPCEXP0_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPCEXP0_DEV, periph); -} - -static int32_t APB_PPCEXP0_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPCEXP0_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPCEXP0_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPCEXP0_DEV); -} - -static void APB_PPCEXP0_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPCEXP0_DEV); -} - -static uint32_t APB_PPCEXP0_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPCEXP0_DEV); -} - -/* APB PPCEXP0 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPCEXP0; -ARM_DRIVER_PPC Driver_APB_PPCEXP0 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPCEXP0_Initialize, - .Uninitialize = APB_PPCEXP0_Uninitialize, - .ConfigPeriph = APB_PPCEXP0_ConfigPeriph, - .IsPeriphSecure = APB_PPCEXP0_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPCEXP0_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPCEXP0_EnableInterrupt, - .DisableInterrupt = APB_PPCEXP0_DisableInterrupt, - .ClearInterrupt = APB_PPCEXP0_ClearInterrupt, - .InterruptState = APB_PPCEXP0_InterruptState -}; -#endif /* RTE_APB_PPCEXP0 */ - -#if (RTE_APB_PPCEXP1) -/* APB PPCEXP1 Driver wrapper functions */ -static int32_t APB_PPCEXP1_Initialize(void) -{ - ppc_sse200_init(&APB_PPCEXP1_DEV, APB_PPC_EXP1); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP1_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP1_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPCEXP1_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPCEXP1_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPCEXP1_DEV, periph); -} - -static uint32_t APB_PPCEXP1_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPCEXP1_DEV, periph); -} - -static int32_t APB_PPCEXP1_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPCEXP1_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPCEXP1_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPCEXP1_DEV); -} - -static void APB_PPCEXP1_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPCEXP1_DEV); -} - -static uint32_t APB_PPCEXP1_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPCEXP1_DEV); -} - -/* APB PPCEXP1 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPCEXP1; -ARM_DRIVER_PPC Driver_APB_PPCEXP1 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPCEXP1_Initialize, - .Uninitialize = APB_PPCEXP1_Uninitialize, - .ConfigPeriph = APB_PPCEXP1_ConfigPeriph, - .IsPeriphSecure = APB_PPCEXP1_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPCEXP1_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPCEXP1_EnableInterrupt, - .DisableInterrupt = APB_PPCEXP1_DisableInterrupt, - .ClearInterrupt = APB_PPCEXP1_ClearInterrupt, - .InterruptState = APB_PPCEXP1_InterruptState -}; -#endif /* RTE_APB_PPCEXP1 */ - -#if (RTE_APB_PPCEXP2) -/* APB PPCEXP2 Driver wrapper functions */ -static int32_t APB_PPCEXP2_Initialize(void) -{ - ppc_sse200_init(&APB_PPCEXP2_DEV, APB_PPC_EXP2); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP2_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP2_ConfigPeriph(uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPCEXP2_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPCEXP2_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPCEXP2_DEV, periph); -} - -static uint32_t APB_PPCEXP2_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPCEXP2_DEV, periph); -} - -static int32_t APB_PPCEXP2_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPCEXP2_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPCEXP2_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPCEXP2_DEV); -} - -static void APB_PPCEXP2_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPCEXP2_DEV); -} - -static uint32_t APB_PPCEXP2_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPCEXP2_DEV); -} - -/* APB PPCEXP2 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPCEXP2; -ARM_DRIVER_PPC Driver_APB_PPCEXP2 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPCEXP2_Initialize, - .Uninitialize = APB_PPCEXP2_Uninitialize, - .ConfigPeriph = APB_PPCEXP2_ConfigPeriph, - .IsPeriphSecure = APB_PPCEXP2_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPCEXP2_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPCEXP2_EnableInterrupt, - .DisableInterrupt = APB_PPCEXP2_DisableInterrupt, - .ClearInterrupt = APB_PPCEXP2_ClearInterrupt, - .InterruptState = APB_PPCEXP2_InterruptState -}; -#endif /* RTE_APB_PPCEXP2 */ - -#if (RTE_APB_PPCEXP3) -/* APB PPCEXP3 Driver wrapper functions */ -static int32_t APB_PPCEXP3_Initialize(void) -{ - ppc_sse200_init(&APB_PPCEXP3_DEV, APB_PPC_EXP3); - - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP3_Uninitialize(void) -{ - /* Nothing to be done */ - return ARM_DRIVER_OK; -} - -static int32_t APB_PPCEXP3_ConfigPeriph(uint8_t periph, ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_config_peripheral(&APB_PPCEXP3_DEV, periph, - (enum ppc_sse200_sec_attr_t)sec_attr, - (enum ppc_sse200_priv_attr_t)priv_attr); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static uint32_t APB_PPCEXP3_IsPeriphSecure(uint8_t periph) -{ - return ppc_sse200_is_periph_secure(&APB_PPCEXP3_DEV, periph); -} - -static uint32_t APB_PPCEXP3_IsPeriphPrivOnly(uint8_t periph) -{ - return ppc_sse200_is_periph_priv_only(&APB_PPCEXP3_DEV, periph); -} - -static int32_t APB_PPCEXP3_EnableInterrupt(void) -{ - enum ppc_sse200_error_t ret; - - ret = ppc_sse200_irq_enable(&APB_PPCEXP3_DEV); - - if (ret != PPC_SSE200_ERR_NONE) { - return ARM_DRIVER_ERROR; - } - - return ARM_DRIVER_OK; -} - -static void APB_PPCEXP3_DisableInterrupt(void) -{ - ppc_sse200_irq_disable(&APB_PPCEXP3_DEV); -} - -static void APB_PPCEXP3_ClearInterrupt(void) -{ - ppc_sse200_clear_irq(&APB_PPCEXP3_DEV); -} - -static uint32_t APB_PPCEXP3_InterruptState(void) -{ - return ppc_sse200_irq_state(&APB_PPCEXP3_DEV); -} - -/* APB PPCEXP3 Driver CMSIS access structure */ -extern ARM_DRIVER_PPC Driver_APB_PPCEXP3; -ARM_DRIVER_PPC Driver_APB_PPCEXP3 = { - .GetVersion = ARM_PPC_GetVersion, - .Initialize = APB_PPCEXP3_Initialize, - .Uninitialize = APB_PPCEXP3_Uninitialize, - .ConfigPeriph = APB_PPCEXP3_ConfigPeriph, - .IsPeriphSecure = APB_PPCEXP3_IsPeriphSecure, - .IsPeriphPrivOnly = APB_PPCEXP3_IsPeriphPrivOnly, - .EnableInterrupt = APB_PPCEXP3_EnableInterrupt, - .DisableInterrupt = APB_PPCEXP3_DisableInterrupt, - .ClearInterrupt = APB_PPCEXP3_ClearInterrupt, - .InterruptState = APB_PPCEXP3_InterruptState -}; -#endif /* RTE_APB_PPCEXP3 */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_PPC.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_PPC.h deleted file mode 100644 index 19722f2b2b9..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/CMSIS_Driver/Driver_PPC.h +++ /dev/null @@ -1,115 +0,0 @@ -/* - * Copyright (c) 2016-2018 Arm Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __CMSIS_PPC_DRV_H__ -#define __CMSIS_PPC_DRV_H__ - -#include "Driver_Common.h" - -/* API version */ -#define ARM_PPC_API_VERSION ARM_DRIVER_VERSION_MAJOR_MINOR(1,0) - -/* Security attribute used to configure the peripheral */ -typedef enum _ARM_PPC_SecAttr { - ARM_PPC_SECURE_ONLY, ///< Secure access - ARM_PPC_NONSECURE_ONLY, ///< Non-secure access -} ARM_PPC_SecAttr; - -/* Privilege attribute used to configure the peripheral */ -typedef enum _ARM_PPC_PrivAttr { - ARM_PPC_PRIV_AND_NONPRIV, ///< Privilege and non-privilege access - ARM_PPC_PRIV_ONLY, ///< Privilege only access -} ARM_PPC_PrivAttr; - -/* Function documentation */ -/** - \fn ARM_DRIVER_VERSION ARM_PPC_GetVersion (void) - \brief Get driver version. - \return \ref ARM_DRIVER_VERSION - - \fn int32_t ARM_PPC_Initialize (void) - \brief Initialize PPC Interface. - \return Returns ARM error code. - - \fn int32_t ARM_PPC_Uninitialize (void) - \brief De-initialize MPC Interface. - \return Returns ARM error code. - - \fn int32_t ARM_PPC_ConfigPeriph (uint8_t periph, - ARM_PPC_SecAttr sec_attr, - ARM_PPC_PrivAttr priv_attr) - \brief Configures a peripheral controlled by the given PPC. - \param[in] periph: Peripheral position in SPCTRL and NSPCTRL registers. - \param[in] sec_attr: Secure attribute value. - \param[in] priv_attr: Privilege attrivute value. - - Secure Privilege Control Block ( SPCTRL ) - Non-Secure Privilege Control Block ( NSPCTRL ) - - \return Returns ARM error code. - - \fn int32_t ARM_PPC_IsPeriphSecure (uint8_t periph) - \brief Check if the peripheral is configured to be secure. - \param[in] periph: Peripheral position in SPCTRL and NSPCTRL registers. - - Secure Privilege Control Block ( SPCTRL ) - Non-Secure Privilege Control Block ( NSPCTRL ) - - \return Returns 1 if the peripheral is configured as secure, - 0 for non-secure. - - \fn uint32_t ARM_PPC_IsPeriphPrivOnly (uint8_t periph) - \brief Check if the peripheral is configured to be privilege only. - \param[in] periph: Peripheral position in SPCTRL and NSPCTRL registers. - - Secure Privilege Control Block ( SPCTRL ) - Non-Secure Privilege Control Block ( NSPCTRL ) - - \return Returns 1 if the peripheral is configured as privilege access - only, 0 for privilege and unprivilege access mode. - - \fn int32_t ARM_PPC_EnableInterrupt (void) - \brief Enable PPC interrupt. - \return Returns ARM error code. - - \fn void ARM_PPC_DisableInterrupt (void) - \brief Disable PPC interrupt. - - \fn void ARM_PPC_ClearInterrupt (void) - \brief Clear PPC interrupt. - - \fn int32_t ARM_PPC_InterruptState (void) - \brief PPC interrupt state. - \return Returns 1 if the interrupt is active, 0 otherwise. -*/ - -/** - * \brief Access structure of the MPC Driver. - */ -typedef struct _ARM_DRIVER_PPC { - ARM_DRIVER_VERSION (*GetVersion) (void); ///< Pointer to \ref ARM_PPC_GetVersion : Get driver version. - int32_t (*Initialize) (void); ///< Pointer to \ref ARM_PPC_Initialize : Initialize the PPC Interface. - int32_t (*Uninitialize) (void); ///< Pointer to \ref ARM_PPC_Uninitialize : De-initialize the PPC Interface. - int32_t (*ConfigPeriph) (uint8_t periph, ARM_PPC_SecAttr sec_attr, ARM_PPC_PrivAttr priv_attr); ///< Pointer to \ref ARM_PPC_ConfigPeriph : Configure a peripheral controlled by the PPC. - uint32_t (*IsPeriphSecure) (uint8_t periph); ///< Pointer to \ref IsPeriphSecure : Check if the peripheral is configured to be secure. - uint32_t (*IsPeriphPrivOnly) (uint8_t periph); ///< Pointer to \ref IsPeriphPrivOnly : Check if the peripheral is configured to be privilege only. - int32_t (*EnableInterrupt) (void); ///< Pointer to \ref ARM_PPC_EnableInterrupt : Enable PPC interrupt. - void (*DisableInterrupt) (void); ///< Pointer to \ref ARM_PPC_DisableInterrupt : Disable PPC interrupt. - void (*ClearInterrupt) (void); ///< Pointer to \ref ARM_PPC_ClearInterrupt : Clear PPC interrupt. - uint32_t (*InterruptState) (void); ///< Pointer to \ref ARM_PPC_InterruptState : PPC interrupt State. -} const ARM_DRIVER_PPC; - -#endif /* __CMSIS_PPC_DRV_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/Libraries/mt25ql_flash_lib.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/Libraries/mt25ql_flash_lib.c deleted file mode 100644 index 578cc5b3769..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/Libraries/mt25ql_flash_lib.c +++ /dev/null @@ -1,901 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -/* Use memcpy function */ -#include - -#include "mt25ql_flash_lib.h" -#include "qspi_ip6514e_drv.h" - -/** Setter bit manipulation macro */ -#define SET_BIT(WORD, BIT_INDEX) ((WORD) |= (1U << (BIT_INDEX))) -/** Clearing bit manipulation macro */ -#define CLR_BIT(WORD, BIT_INDEX) ((WORD) &= ~(1U << (BIT_INDEX))) -/** Getter bit manipulation macro */ -#define GET_BIT(WORD, BIT_INDEX) (bool)(((WORD) & (1U << (BIT_INDEX)))) - -#define BITS_PER_WORD 32U -#define BYTES_PER_WORD 4U - -#define ARG_NOT_USED 0 -#define ARG_PTR_NOT_USED NULL - -/** MT25QL used command */ -#define WRITE_ENABLE_CMD 0x06U -#define READ_ENHANCED_VOLATILE_CFG_REG_CMD 0x65U -#define WRITE_ENHANCED_VOLATILE_CFG_REG_CMD 0x61U -#define READ_VOLATILE_CFG_REG_CMD 0x85U -#define WRITE_VOLATILE_CFG_REG_CMD 0x81U -#define READ_FLAG_STATUS_REG_CMD 0x70U -#define SUBSECTOR_ERASE_32KB_CMD 0x52U -#define SUBSECTOR_ERASE_4KB_CMD 0x20U -#define SECTOR_ERASE_CMD 0xD8U -#define BULK_ERASE_CMD 0xC7U -/* - * The baud rate divisor in \ref mt25ql_dev_t needs to be configured adequately - * to handle those commands. - */ -#define QUAD_OUTPUT_FAST_READ_CMD 0x6BU -#define FAST_READ_CMD 0x0BU -#define READ_CMD 0x03U -#define QUAD_INPUT_FAST_PROGRAM_CMD 0x32U -#define PAGE_PROGRAM_CMD 0x02U - -/** MT25QL Enhanced Volatile Configuration Register access */ -#define ENHANCED_VOLATILE_CFG_REG_LEN 1U -#define ENHANCED_VOLATILE_CFG_REG_QSPI_POS 7U -#define ENHANCED_VOLATILE_CFG_REG_DSPI_POS 6U - -/** MT25QL Volatile Configuration Register access */ -#define VOLATILE_CFG_REG_LEN 1U -#define VOLATILE_CFG_REG_DUMMY_CYCLES_POS 4U -#define VOLATILE_CFG_REG_DUMMY_CYCLES_BITS 4U - -/** MT25QL Flag Status Register access */ -#define FLAG_STATUS_REG_LEN 1U -#define FLAG_STATUS_REG_READY_POS 7U - -/* - * 10 is the minimal number of dummy clock cycles needed to reach the maximal - * frequency of the Quad Output Fast Read Command. - */ -#define QUAD_OUTPUT_FAST_READ_DUMMY_CYCLES 10U -#define FAST_READ_DUMMY_CYCLES 8U -#define RESET_STATE_DUMMY_CYCLES 8U -#define DEFAULT_READ_DUMMY_CYCLES 0U -#define QUAD_INPUT_FAST_PROGRAM_DUMMY_CYCLES 0U -#define PAGE_PROGRAM_DUMMY_CYCLES 0U - -/* Only up to 8 bytes can be read or written using the Flash commands. */ -#define CMD_DATA_MAX_SIZE 8U - -/** - * \brief Change specific bits in a 32 bits word. - * - * \param[in,out] word Pointer of the word to change - * \param[in] bits bits_length bits to put at bits_pos in the word - * pointed - * \param[in] bits_length Number of bits to change - * \param[in] bits_pos Position of the bits to change - * - * \note This function will do nothing if the parameters given are incorrect: - * * word is NULL - * * bits_length + bits_pos > 32 - * * bits_length is 0 - */ -static void change_bits_in_word(volatile uint32_t *word, - uint32_t bits, - uint32_t bits_length, - uint32_t bits_pos) -{ - uint32_t mask; - - if ((word == NULL) || - ((bits_length + bits_pos) > BITS_PER_WORD) || - (bits_length == 0U)) { - /* Silently fail */ - return; - } - - /* Change all the bits */ - if (bits_length == BITS_PER_WORD) { - *word = bits; - return; - } - - mask = ((1U << bits_length) - 1); - /* - * We change the bits in three steps: - * - clear bits_length bits with zeroes at bits_pos in the word - * - mask bits in case it contains more than bits_length bits - * - set the new bits in the cleared word - * Because the data pointed by word is only read once, the data will still - * be coherent after an interruption that changes it. - */ - *word = ((*word & ~(mask << bits_pos)) | ((bits & mask) << bits_pos)); -} - -/** - * \brief Send the Write Enable command, needed before any write. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - */ -static void send_write_enable(struct mt25ql_dev_t* dev) -{ - qspi_ip6514e_send_simple_cmd(dev->controller, WRITE_ENABLE_CMD); -} - -/** - * \brief Set SPI mode on the flash device and on the controller. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] spi_mode SPI mode to be set on flash device and controller - * \ref qspi_ip6514e_spi_mode_t - * - * \return Return error code as specified in \ref mt25ql_error_t - */ -static enum mt25ql_error_t set_spi_mode(struct mt25ql_dev_t* dev, - enum qspi_ip6514e_spi_mode_t spi_mode) -{ - uint8_t enhanced_volatile_cfg_reg = 0; - enum qspi_ip6514e_error_t controller_error; - - /* Read the Enhanced Volatile Configuration Register, modify it according - * to the requested SPI mode then write back the modified value to the - * register. This will activate the SPI mode on the flash side. - */ - controller_error = qspi_ip6514e_send_read_cmd( - dev->controller, - READ_ENHANCED_VOLATILE_CFG_REG_CMD, - &enhanced_volatile_cfg_reg, - ENHANCED_VOLATILE_CFG_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles needed for - this command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - switch(spi_mode) { - case QSPI_IP6514E_SPI_MODE: - /* Disable the Dual- and Quad-SPI modes. - * Clearing the bit enables the mode, setting it disables it. - */ - SET_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_DSPI_POS); - SET_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_QSPI_POS); - break; - case QSPI_IP6514E_DSPI_MODE: - /* Disable the Quad-SPI mode and activate DSPI mode. - * Clearing the bit enables the mode, setting it disables it. - */ - CLR_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_DSPI_POS); - SET_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_QSPI_POS); - break; - case QSPI_IP6514E_QSPI_MODE: - /* Disable the Dual-SPI mode and activate QSPI mode. - * Clearing the bit enables the mode, setting it disables it. - */ - SET_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_DSPI_POS); - CLR_BIT(enhanced_volatile_cfg_reg, ENHANCED_VOLATILE_CFG_REG_QSPI_POS); - break; - default: - return MT25QL_ERR_WRONG_ARGUMENT; - } - - send_write_enable(dev); - - controller_error = qspi_ip6514e_send_write_cmd( - dev->controller, - WRITE_ENHANCED_VOLATILE_CFG_REG_CMD, - &enhanced_volatile_cfg_reg, - ENHANCED_VOLATILE_CFG_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles needed for - this command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Activate the requested SPI mode on the controller side as well. */ - controller_error = qspi_ip6514e_set_spi_mode(dev->controller, - spi_mode, - spi_mode, - spi_mode); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - return MT25QL_ERR_NONE; -} - -/** - * \brief Change the number of dummy clock cycles subsequent to all FAST READ - * commands. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] dummy_cycles Dummy clock cycles to set - * - * \return Return error code as specified in \ref mt25ql_error_t - */ -static enum mt25ql_error_t change_dummy_cycles(struct mt25ql_dev_t* dev, - uint32_t dummy_cycles) -{ - uint32_t volatile_cfg_reg = 0; - enum qspi_ip6514e_error_t controller_error; - - /* - * Changes the number of dummy cycles in the Volatile Configuration - * Register. - */ - controller_error = qspi_ip6514e_send_read_cmd(dev->controller, - READ_VOLATILE_CFG_REG_CMD, - &volatile_cfg_reg, - VOLATILE_CFG_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles needed - for this command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - change_bits_in_word(&volatile_cfg_reg, - dummy_cycles, - VOLATILE_CFG_REG_DUMMY_CYCLES_BITS, - VOLATILE_CFG_REG_DUMMY_CYCLES_POS); - - send_write_enable(dev); - - controller_error = qspi_ip6514e_send_write_cmd(dev->controller, - WRITE_VOLATILE_CFG_REG_CMD, - &volatile_cfg_reg, - VOLATILE_CFG_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles needed - for this command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - return MT25QL_ERR_NONE; -} - -/** - * \brief Wait until the current program/erase is finished. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * - * \return Return error code as specified in \ref mt25ql_error_t - */ -static enum mt25ql_error_t wait_program_or_erase_complete( - struct mt25ql_dev_t* dev) -{ - enum qspi_ip6514e_error_t controller_error; - uint8_t flag_status_reg = 0; - - /* Wait until the ready bit of the Flag Status Register is set */ - while (!GET_BIT(flag_status_reg, FLAG_STATUS_REG_READY_POS)) { - controller_error = qspi_ip6514e_send_read_cmd(dev->controller, - READ_FLAG_STATUS_REG_CMD, - &flag_status_reg, - FLAG_STATUS_REG_LEN, - ARG_NOT_USED, - ARG_NOT_USED, - 0); /* No dummy cycles - needed for this - command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - } - - return MT25QL_ERR_NONE; -} - -/** - * \brief Execute a program command that crosses the page size boundary. - * - * \param[in] dev Pointer to MT25QL device structure - * \ref mt25ql_dev_t - * \param[in] opcode Opcode for the command. - * \param[in] write_data Pointer to a memory zone where the write_len - * number of bytes are located to write for this - * command. - * \param[in] write_len Number of bytes to write for the command. - * Between 1 and 8 bytes (both included) can be - * written. - * \param[in] addr Address used for the command - * \param[in] addr_bytes_number Number of address bytes for this command. - * If an address is not needed for the command, - * use 0 for argument, otherwise between 1 and - * 4 bytes (both included) can be used. - * \param[in] dummy_cycles Number of dummy cycles required for the - * command, between 0 and 31 (both included). - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will execute two commands: one to program the bytes up to - * the page boundary and another one to program the rest. It will wait - * that bytes are programmed from first command before triggering the - * second one. - * \note This function does not send a write enable command before the first - * command and does not check that bytes were programmed after the second - * command. - */ -static enum mt25ql_error_t send_boundary_cross_write_cmd( - struct mt25ql_dev_t* dev, - uint8_t opcode, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles) -{ - enum qspi_ip6514e_error_t controller_error; - enum mt25ql_error_t library_error; - /* - * Remaining bytes between the current address and the end of the current - * page. - */ - uint32_t page_remainder = FLASH_PAGE_SIZE - (addr % FLASH_PAGE_SIZE); - - /* First write up to the end of the current page. */ - controller_error = qspi_ip6514e_send_write_cmd(dev->controller, opcode, - write_data, page_remainder, - addr, addr_bytes_number, - dummy_cycles); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - write_data = (void *)((uint32_t)write_data + page_remainder); - addr += page_remainder; - - /* Wait for the page to be written before sending new commands. */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* Then write the remaining data of the write_len bytes. */ - send_write_enable(dev); - controller_error = qspi_ip6514e_send_write_cmd(dev->controller, opcode, - write_data, - write_len - page_remainder, - addr, addr_bytes_number, - dummy_cycles); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_config_mode(struct mt25ql_dev_t* dev, - enum mt25ql_functional_state_t f_state) -{ - enum qspi_ip6514e_error_t controller_error; - enum mt25ql_error_t library_error; - - switch(f_state) { - case MT25QL_FUNC_STATE_DEFAULT: - dev->config_state.spi_mode = QSPI_IP6514E_SPI_MODE; - dev->config_state.opcode_read = READ_CMD; - dev->config_state.dummy_cycles_read = DEFAULT_READ_DUMMY_CYCLES; - dev->config_state.opcode_write = PAGE_PROGRAM_CMD; - dev->config_state.dummy_cycles_write = PAGE_PROGRAM_DUMMY_CYCLES; - break; - case MT25QL_FUNC_STATE_FAST: - dev->config_state.spi_mode = QSPI_IP6514E_SPI_MODE; - dev->config_state.opcode_read = FAST_READ_CMD; - dev->config_state.dummy_cycles_read = FAST_READ_DUMMY_CYCLES; - dev->config_state.opcode_write = PAGE_PROGRAM_CMD; - dev->config_state.dummy_cycles_write = PAGE_PROGRAM_DUMMY_CYCLES; - break; - case MT25QL_FUNC_STATE_QUAD_FAST: - dev->config_state.spi_mode = QSPI_IP6514E_QSPI_MODE; - dev->config_state.opcode_read = QUAD_OUTPUT_FAST_READ_CMD; - dev->config_state.dummy_cycles_read = - QUAD_OUTPUT_FAST_READ_DUMMY_CYCLES; - dev->config_state.opcode_write = QUAD_INPUT_FAST_PROGRAM_CMD; - dev->config_state.dummy_cycles_write = - QUAD_INPUT_FAST_PROGRAM_DUMMY_CYCLES; - break; - default: - return MT25QL_ERR_WRONG_ARGUMENT; - } - - dev->config_state.func_state = f_state; - - /* This function will first set the Flash memory SPI mode and then set - * the controller's SPI mode. It will fail if the two sides do not have - * the same mode when this function is called. - */ - library_error = set_spi_mode(dev, dev->config_state.spi_mode); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* Set the number of dummy cycles for read commands. */ - library_error = change_dummy_cycles( - dev, dev->config_state.dummy_cycles_read); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* The rest of the configuration needs the controller to be disabled */ - while(!qspi_ip6514e_is_idle(dev->controller)); - qspi_ip6514e_disable(dev->controller); - - /* Set the baud rate divisor as configured in the device structure. */ - controller_error = qspi_ip6514e_set_baud_rate_div(dev->controller, - dev->baud_rate_div); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Set opcode and dummy cycles needed for read commands. */ - controller_error = qspi_ip6514e_cfg_reads( - dev->controller, dev->config_state.opcode_read, - dev->config_state.dummy_cycles_read); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Set opcode and dummy cycles needed for write commands. */ - controller_error = qspi_ip6514e_cfg_writes( - dev->controller, dev->config_state.opcode_write, - dev->config_state.dummy_cycles_write); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Set Flash memory constants: bytes per page and address bytes. */ - controller_error = qspi_ip6514e_cfg_page_size(dev->controller, - FLASH_PAGE_SIZE); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - controller_error = qspi_ip6514e_cfg_addr_bytes(dev->controller, - ADDR_BYTES); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - qspi_ip6514e_enable(dev->controller); - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_restore_reset_state(struct mt25ql_dev_t* dev) -{ - enum mt25ql_error_t library_error; - - /* - * This function will first change the Flash memory mode to single SPI and - * then change the controller to single SPI. It will fail if the two sides - * do not have the same mode when this function is called. - */ - library_error = set_spi_mode(dev, QSPI_IP6514E_SPI_MODE); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* Set the default number of dummy cycles for direct read commands. */ - library_error = change_dummy_cycles(dev, RESET_STATE_DUMMY_CYCLES); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - /* The rest of the configuration needs the controller to be disabled */ - while(!qspi_ip6514e_is_idle(dev->controller)); - qspi_ip6514e_disable(dev->controller); - - /* Restore the default value of the QSPI controller registers. */ - qspi_ip6514e_reset_regs(dev->controller); - - qspi_ip6514e_enable(dev->controller); - - dev->config_state = (struct mt25ql_config_state_t){ 0 }; - dev->config_state.func_state = MT25QL_FUNC_STATE_NOT_INITED; - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_direct_read(struct mt25ql_dev_t* dev, - uint32_t addr, - void *data, - uint32_t len) -{ - /* - * The direct access window size is the size of the memory that can be - * accessed with a direct access. - */ - uint32_t direct_access_window_size = dev->controller->cfg->addr_mask + 1; - /* - * The window number is the number of times it will be needed to remap the - * address with the remap register. We move this Direct Access window first - * window_number times starting at the beginning address to read full - * windows of direct_access_window_size bytes. Then we read the remainder - * bytes. - */ - uint32_t window_number = len / direct_access_window_size; - - if (data == NULL || len == 0) { - return MT25QL_ERR_WRONG_ARGUMENT; - } - - if ((addr + len) >= dev->size) { - return MT25QL_ERR_ADDR_TOO_BIG; - } - - /* - * There is no limitation reading through a Flash page boundary hence we - * do not add the same logic here than in the write function. - */ - - /* Transfer the bytes for the window_number windows first. */ - for (uint32_t window = 0; window < window_number; window++) { - qspi_ip6514e_remap_addr(dev->controller, addr); - - /* - * The AHB address to access the Flash memory does not change but it - * will be translated differently thanks to the remap function. - */ - memcpy(data, - (void *)dev->direct_access_start_addr, - direct_access_window_size); - - len -= direct_access_window_size; - data = (void *)((uint32_t)data + direct_access_window_size); - addr += direct_access_window_size; - } - - if (len) { - /* Transfer the reminder bytes */ - qspi_ip6514e_remap_addr(dev->controller, addr); - - memcpy(data, (void *)dev->direct_access_start_addr, len); - } - - /* Disable remapping for direct accesses outside of this function. */ - qspi_ip6514e_disable_remap(dev->controller); - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_direct_write(struct mt25ql_dev_t* dev, - uint32_t addr, - const void *data, - uint32_t len) -{ - enum mt25ql_error_t library_error; - /* - * The direct access window size is the size of the memory that can be - * accessed with a direct access. - */ - uint32_t direct_access_window_size = dev->controller->cfg->addr_mask + 1; - uint32_t window_number; - /* Offset between address and the previous 32 bits aligned word */ - uint32_t word_offset; - - if (data == NULL || len == 0) { - return MT25QL_ERR_WRONG_ARGUMENT; - } - - if ((addr + len) >= dev->size) { - return MT25QL_ERR_ADDR_TOO_BIG; - } - - /* - * If the remapping address is not aligned on a 32 bits boundary, a direct - * access of one word could cross a Flash page boundary. If that happens, - * the bytes of that word that are over the page boundary will instead be - * written at the beginning of the same page. - * To counter this problem, we align the remapping address and add the word - * offset to the address of the direct access for the first window only. - */ - word_offset = addr % BYTES_PER_WORD; - /* Make address aligned on a 32 bits alignment. */ - addr -= word_offset; - /* - * Only direct_access_window_size address locations are available by direct - * access. We calculate the number of windows that we will need to transfer - * len bytes. We have to add in the window the offset that we add in the - * beginning. - */ - window_number = (len + word_offset) / direct_access_window_size; - - /* - * This function assumes that the flash has already been erased. - * Transfer the bytes for the window_number windows first. - */ - for (uint32_t window = 0; window < window_number; window++) { - /* The controller needs to be disabled while remapping is done. */ - qspi_ip6514e_remap_addr(dev->controller, addr); - - /* - * The AHB address to access the Flash memory does not change but it - * will be translated differently thanks to the remap function. - */ - memcpy((void *)(dev->direct_access_start_addr + word_offset), - data, - direct_access_window_size - word_offset); - - len -= (direct_access_window_size - word_offset); - data = (void *)((uint32_t)data + - (direct_access_window_size - word_offset)); - addr += direct_access_window_size; - - /* - * The address is now aligned, there is no need to add an offset for the - * remaining windows. - */ - word_offset = 0; - - /* - * Wait until the last program operation is complete before changing - * the remap address. - */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } - - if (len) { - /* Transfer the reminder bytes */ - qspi_ip6514e_remap_addr(dev->controller, addr); - - memcpy((void *)(dev->direct_access_start_addr + word_offset), - data, - len); - - /* Wait until the last program operation is complete */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } - - /* - * Disable the default remap address for direct accesses outside of this - * function. - */ - qspi_ip6514e_disable_remap(dev->controller); - - return MT25QL_ERR_NONE; -} - -enum mt25ql_error_t mt25ql_command_read(struct mt25ql_dev_t* dev, - uint32_t addr, - void *data, - uint32_t len) -{ - /* With one single command only 8 bytes can be read. */ - uint32_t cmd_number = len / CMD_DATA_MAX_SIZE; - enum qspi_ip6514e_error_t controller_error; - - if (dev->config_state.func_state == MT25QL_FUNC_STATE_NOT_INITED) { - return MT25QL_ERR_NOT_INITED; - } - - for (uint32_t cmd_index = 0; cmd_index < cmd_number; cmd_index++) { - controller_error = qspi_ip6514e_send_read_cmd( - dev->controller, - dev->config_state.opcode_read, - data, CMD_DATA_MAX_SIZE, addr, - ADDR_BYTES, - dev->config_state.dummy_cycles_read); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - data = (void *)((uint32_t)data + CMD_DATA_MAX_SIZE); - addr += CMD_DATA_MAX_SIZE; - len -= CMD_DATA_MAX_SIZE; - } - - if (len) { - /* Read the remainder. */ - controller_error = qspi_ip6514e_send_read_cmd( - dev->controller, - dev->config_state.opcode_read, - data, len, addr, ADDR_BYTES, - dev->config_state.dummy_cycles_read); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - } - - return MT25QL_ERR_NONE; - -} - -enum mt25ql_error_t mt25ql_command_write(struct mt25ql_dev_t* dev, - uint32_t addr, - const void *data, - uint32_t len) -{ - /* With one single command only 8 bytes can be written. */ - uint32_t cmd_number = len / CMD_DATA_MAX_SIZE; - enum qspi_ip6514e_error_t controller_error; - enum mt25ql_error_t library_error; - - if (dev->config_state.func_state == MT25QL_FUNC_STATE_NOT_INITED) { - return MT25QL_ERR_NOT_INITED; - } - - for (uint32_t cmd_index = 0; cmd_index < cmd_number; cmd_index++) { - send_write_enable(dev); - - /* - * Check if this command is not writing over a page boundary: first and - * last bytes are in the same page. - */ - if ((addr / FLASH_PAGE_SIZE) != - ((addr + CMD_DATA_MAX_SIZE - 1) / FLASH_PAGE_SIZE)) { - /* The CMD_DATA_MAX_SIZE bytes written are crossing the boundary. */ - library_error = send_boundary_cross_write_cmd( - dev, dev->config_state.opcode_write, - data, CMD_DATA_MAX_SIZE, addr, - ADDR_BYTES, - dev->config_state.dummy_cycles_write); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } else { - /* Normal case: not crossing the boundary. */ - controller_error = qspi_ip6514e_send_write_cmd( - dev->controller, - dev->config_state.opcode_write, - data, CMD_DATA_MAX_SIZE, addr, - ADDR_BYTES, - dev->config_state.dummy_cycles_write); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - } - - /* Wait until the write operation is complete. */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - - data = (void *)((uint32_t)data + CMD_DATA_MAX_SIZE); - addr += CMD_DATA_MAX_SIZE; - len -= CMD_DATA_MAX_SIZE; - } - - if (len) { - /* Write the remainder. */ - send_write_enable(dev); - /* - * Check if this command is not writing over a page boundary: first and - * last bytes are in the same page. - */ - if ((addr / FLASH_PAGE_SIZE) != ((addr + len - 1) / FLASH_PAGE_SIZE)) { - /* The CMD_DATA_MAX_SIZE bytes written are crossing the boundary. */ - library_error = send_boundary_cross_write_cmd( - dev, dev->config_state.opcode_write, - data, len, addr, ADDR_BYTES, - dev->config_state.dummy_cycles_write); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } else { - /* Normal case: not crossing the boundary. */ - controller_error = qspi_ip6514e_send_write_cmd( - dev->controller, - dev->config_state.opcode_write, - data, len, addr, ADDR_BYTES, - dev->config_state.dummy_cycles_write); - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - } - - /* Wait until the write operation is complete. */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return library_error; - } - } - - return MT25QL_ERR_NONE; - -} - -enum mt25ql_error_t mt25ql_erase(struct mt25ql_dev_t* dev, - uint32_t addr, - enum mt25ql_erase_t erase_type) -{ - enum qspi_ip6514e_error_t controller_error; - enum mt25ql_error_t library_error; - uint8_t erase_cmd; - uint32_t addr_bytes; - - if (dev->config_state.func_state == MT25QL_FUNC_STATE_NOT_INITED) { - return MT25QL_ERR_NOT_INITED; - } - - send_write_enable(dev); - - switch (erase_type) { - case MT25QL_ERASE_ALL_FLASH: - if (addr != 0) { - return MT25QL_ERR_ADDR_NOT_ALIGNED; - } - erase_cmd = BULK_ERASE_CMD; - addr_bytes = ARG_NOT_USED; - break; - case MT25QL_ERASE_SECTOR_64K: - erase_cmd = SECTOR_ERASE_CMD; - addr_bytes = ADDR_BYTES; - if ((addr % SECTOR_64KB) != 0) { - return MT25QL_ERR_ADDR_NOT_ALIGNED; - } - break; - case MT25QL_ERASE_SUBSECTOR_32K: - erase_cmd = SUBSECTOR_ERASE_32KB_CMD; - addr_bytes = ADDR_BYTES; - if ((addr % SUBSECTOR_32KB) != 0) { - return MT25QL_ERR_ADDR_NOT_ALIGNED; - } - break; - case MT25QL_ERASE_SUBSECTOR_4K: - erase_cmd = SUBSECTOR_ERASE_4KB_CMD; - addr_bytes = ADDR_BYTES; - if ((addr % SUBSECTOR_4KB) != 0) { - return MT25QL_ERR_ADDR_NOT_ALIGNED; - } - break; - default: - return MT25QL_ERR_WRONG_ARGUMENT; - } - - if (addr >= dev->size) { - return MT25QL_ERR_ADDR_TOO_BIG; - } - - controller_error = qspi_ip6514e_send_cmd(dev->controller, - erase_cmd, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - addr, - addr_bytes, - 0); /* No dummy cycles needed for - any erase command. */ - if (controller_error != QSPI_IP6514E_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - /* Wait until the erase operation is complete */ - library_error = wait_program_or_erase_complete(dev); - if (library_error != MT25QL_ERR_NONE) { - return (enum mt25ql_error_t)controller_error; - } - - return MT25QL_ERR_NONE; -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/Libraries/mt25ql_flash_lib.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/Libraries/mt25ql_flash_lib.h deleted file mode 100644 index c2dac2ca215..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/Libraries/mt25ql_flash_lib.h +++ /dev/null @@ -1,271 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* - * This library provides functions to control the MT25QL256ABA-1EW7-OSIT flash - * memory from Micron and should work for similar devices from the same vendor. - */ - -#ifndef __MT25QL_H__ -#define __MT25QL_H__ - -#include "qspi_ip6514e_drv.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * \brief MT25QL Flash Memory documentation defined values. - */ -#define FLASH_PAGE_SIZE (256U) /* 256B */ -#define SUBSECTOR_4KB (0x00001000U) /* 4KB */ -#define SUBSECTOR_32KB (0x00008000U) /* 32KB */ -#define SECTOR_64KB (0x00010000U) /* 64KB */ -#define ADDR_BYTES (3U) - -enum mt25ql_error_t { - MT25QL_ERR_NONE = QSPI_IP6514E_ERR_NONE, - MT25QL_ERR_WRONG_ARGUMENT = QSPI_IP6514E_ERR_WRONG_ARGUMENT, - MT25QL_ERR_CTRL_NOT_DISABLED = QSPI_IP6514E_ERR_CONTROLLER_NOT_DISABLED, - MT25QL_ERR_READ_IN_PROGRESS = QSPI_IP6514E_ERR_READ_IN_PROGRESS, - MT25QL_ERR_WRITE_IN_PROGRESS = QSPI_IP6514E_ERR_WRITE_IN_PROGRESS, - MT25QL_ERR_ADDR_NOT_ALIGNED, - MT25QL_ERR_NOT_INITED, - MT25QL_ERR_ADDR_TOO_BIG, -}; - -enum mt25ql_erase_t { - MT25QL_ERASE_ALL_FLASH = 0U, /*!< Erase all flash */ - MT25QL_ERASE_SUBSECTOR_4K = SUBSECTOR_4KB, /*!< Erase a 4 KB subsector */ - MT25QL_ERASE_SUBSECTOR_32K = SUBSECTOR_32KB, /*!< Erase a 32 KB subsector */ - MT25QL_ERASE_SECTOR_64K = SECTOR_64KB, /*!< Erase a sector (64 KB) */ -}; - -enum mt25ql_functional_state_t { - MT25QL_FUNC_STATE_NOT_INITED = 0U, - /*!< QSPI Flash controller is not initialized, only direct read - * is guaranteed to be working - */ - MT25QL_FUNC_STATE_DEFAULT = 1U, - /*!< The QSPI Flash controller and memory is in default state, - * using basic read/write commands - */ - MT25QL_FUNC_STATE_FAST = 2U, - /*!< The QSPI Flash controller and memory is configured to operate in - * single SPI mode and fast Flash commands could be used for read and - * program operations. - */ - MT25QL_FUNC_STATE_QUAD_FAST = 3U, - /*!< The QSPI Flash controller and memory is configured to operate in - * Quad SPI mode and fast Flash commands could be used for read and - * program operations. - */ -}; - -struct mt25ql_config_state_t { - enum mt25ql_functional_state_t func_state; - /*!< Functional state id */ - enum qspi_ip6514e_spi_mode_t spi_mode; - /*!< SPI mode for the current functional state */ - uint8_t opcode_read; - /*!< Read opcode for the current functional state */ - uint8_t opcode_write; - /*!< Write opcode for the current functional state */ - uint32_t dummy_cycles_read; - /*!< Dummy cycles for the read command for the current functional state */ - uint32_t dummy_cycles_write; - /*!< Dummy cycles for the write command for the current functional state */ -}; - -struct mt25ql_dev_t { - struct qspi_ip6514e_dev_t *controller; - /*!< QSPI Flash controller. */ - uint32_t direct_access_start_addr; - /*!< AHB address to directly access the contents of the Flash memory - * through the QSPI Controller. - */ - uint32_t baud_rate_div; - /*!< Clock divisor that will be used to configure the QSPI Flash - * Controller to access the Flash memory. The clock which frequency is - * divived is the one linked to the QSPI Flash controller. It can only - * be an even number between 2 and 32 (both included). It needs to be - * high enough to support the Quad Output Fast Read command with 8 - * dummy cycles and the Quad Input Fast Program with 0 dummy cycles. - */ - uint32_t size; /*!< Total size of the MT25QL Flash memory */ - struct mt25ql_config_state_t config_state; - /*!< Configured functional state (with parameter settings) of the - * QSPI Flash controller and memory. - */ - -}; - -/** - * \brief Change configuration of the QSPI Flash controller and MT25QL memory - * - * Changes the configuration of the QSPI Flash controller and MT25QL - * Flash memory to operate in the specified SPI mode and to use the - * appropriate Flash commands for read and program operations. - * It also sets: - * + The number of dummy cycles for each operation - * + The bytes per page constant to 256 (MT25QL Flash specific) - * + The number of address bytes to 3 - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] f_state Functional state to be set on flash controller - * and device \ref mt25ql_functional_state_t - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function assumes that the Flash memory device and the QSPI Flash - * controller operates with the same SPI protocol. This function will fail - * if the Flash device is in a different configuration. - */ -enum mt25ql_error_t mt25ql_config_mode(struct mt25ql_dev_t* dev, - enum mt25ql_functional_state_t f_state); - -/** - * \brief Restore the QSPI Flash controller and MT25QL to reset state. - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function assumes that the Flash memory device and the QSPI Flash - * controller operates with the same SPI protocol. This function will fail - * if the Flash device is in a different configuration. - */ -enum mt25ql_error_t mt25ql_restore_reset_state(struct mt25ql_dev_t* dev); - -/** - * \brief Read bytes from the flash memory (direct access) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Flash memory address for the read operation - * \param[out] data Pointer where len bytes read from the flash memory will be - * written to - * \param[in] len Number of bytes to read - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will use direct access to read from the Flash memory. It - * can be used to access above the direct accessible memory zone if - * not all the AHB address wires are connected. - * \note The address given should be the address of the data inside the flash - * memory. To read the first byte inside the memory, use 0x00000000. - */ -enum mt25ql_error_t mt25ql_direct_read(struct mt25ql_dev_t* dev, - uint32_t addr, - void *data, - uint32_t len); - -/** - * \brief Write bytes in the flash memory, at a location where data has already - * been erased (direct access) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Flash memory address for the write operation - * \param[in] data Pointer to the len bytes that will be written to the flash - * memory - * \param[in] len Number of bytes to write - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will use direct access to write to the Flash memory. It - * can be used to access outside of the direct accessible memory zone if - * not all the AHB address wires are connected. - * \note The address given should be the address of the data inside the flash - * memory. To write the first byte inside the memory, use 0x00000000. - * \note Writing bytes in the flash memory clear them from 1 to 0, for that - * matter the location where data is written needs to be erased - * beforehand. - */ -enum mt25ql_error_t mt25ql_direct_write(struct mt25ql_dev_t* dev, - uint32_t addr, - const void *data, - uint32_t len); - -/** - * \brief Read bytes from the flash memory (using Flash commands) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Flash memory address for the read operation - * \param[out] data Pointer where len bytes read from the flash memory will be - * written to - * \param[in] len Number of bytes to read - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will use the Software Triggered Instruction Generator to - * read from the Flash memory using Flash commands. - * \note The address given should be the address of the data inside the flash - * memory. To read the first byte inside the memory, use 0x00000000. - */ -enum mt25ql_error_t mt25ql_command_read(struct mt25ql_dev_t* dev, - uint32_t addr, - void *data, - uint32_t len); - -/** - * \brief Write bytes in the flash memory, at a location where data has already - * been erased (using Flash commands) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Flash memory address for the write operation - * \param[in] data Pointer to the len bytes that will be written to the flash - * memory - * \param[in] len Number of bytes to write - * - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note This function will use the Software Triggered Instruction Generator to - * write to the Flash memory using Flash commands. - * \note The address given should be the address of the data inside the flash - * memory. To write the first byte inside the memory, use 0x00000000. - * \note Writing bytes in the flash memory clear them from 1 to 0, for that - * matter the location where data is written needs to be erased - * beforehand. - */ -enum mt25ql_error_t mt25ql_command_write(struct mt25ql_dev_t* dev, - uint32_t addr, - const void *data, - uint32_t len); - -/** - * \brief Erase all flash memory, a sector (64 KiB) or a subsector - * (32 KiB or 4 KiB) - * - * \param[in] dev Pointer to MT25QL device structure \ref mt25ql_dev_t - * \param[in] addr Address where to erase in the flash memory - * \param[in] erase_type Type of what to erase at the specified address: - * * whole flash memory - * * a subsector (4 KiB or 32 KiB) - * * a sector (64 KiB) - * \return Return error code as specified in \ref mt25ql_error_t - * - * \note The address need to be aligned with the size of what is erased or 0 if - * all flash memory is to be erased. - */ -enum mt25ql_error_t mt25ql_erase(struct mt25ql_dev_t* dev, - uint32_t addr, - enum mt25ql_erase_t erase_type); - -#ifdef __cplusplus -} -#endif - -#endif /* __MT25QL_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_ARMC6/musca_s.sct b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_ARMC6/musca_s.sct deleted file mode 100644 index 4094fe2bbfe..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_ARMC6/musca_s.sct +++ /dev/null @@ -1,153 +0,0 @@ -#! armclang --target=arm-arm-none-eabi -march=armv8-m.main -E -xc - -/* - * Copyright (c) 2018-2020 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "../../../partition/region_defs.h" - -#if !defined(TFM_LVL) - #define TFM_LVL 1 -#endif - -#if !defined(MBED_ROM_START) - #define MBED_ROM_START S_CODE_START // 0x1A020400 -#endif - -#if !defined(MBED_ROM_SIZE) - #define MBED_ROM_SIZE IMAGE_S_CODE_SIZE // 0x4f800 -#endif - -#if !defined(MBED_RAM_START) - #define MBED_RAM_START S_DATA_START // 0x30000000 -#endif - -#if !defined(MBED_RAM_SIZE) - #define MBED_RAM_SIZE S_DATA_SIZE // 0x40000 -#endif - -LR_CODE MBED_ROM_START MBED_ROM_SIZE { - - /**** This initial section contains common code for TEE */ - ER_TFM_CODE MBED_ROM_START S_CODE_SIZE { - *.o (RESET +First) - .ANY (+RO) - } - -#if TFM_LVL == 1 - - /* Shared area between BL2 and runtime to exchange data */ - TFM_SHARED_DATA MBED_RAM_START ALIGN 32 OVERLAY EMPTY BOOT_TFM_SHARED_DATA_SIZE { - } - - /* MSP */ - ARM_LIB_STACK_MSP MBED_RAM_START ALIGN 32 OVERLAY EMPTY S_MSP_STACK_SIZE { - } - - /* PSP */ - ARM_LIB_STACK +0 ALIGN 32 EMPTY S_PSP_STACK_SIZE { - } - - ARM_LIB_HEAP +0 ALIGN 8 EMPTY S_HEAP_SIZE { - } - - ER_TFM_DATA +0 { - .ANY (+RW +ZI) - } - - TFM_SECURE_STACK +0 ALIGN 128 EMPTY 0x1000 { - } - - TFM_UNPRIV_SCRATCH +0 ALIGN 32 EMPTY 0x400 { - } - -#else /* TFM_LVL == 1 */ - - /**** Unprivileged Secure code start here */ - TFM_UNPRIV_CODE +0 ALIGN 32 { - tfm_spm_services.o (+RO) - device_definition.o (+RO) - *(SFN) - *armlib* - } - - TFM_SP_PLATFORM +0 ALIGN 32 { - *tfm_platform* (+RO) - *(TFM_SP_PLATFORM_ATTR_FN) - } - - /* Shared area between BL2 and runtime to exchange data */ - TFM_SHARED_DATA MBED_RAM_START ALIGN 32 OVERLAY EMPTY BOOT_TFM_SHARED_DATA_SIZE { - } - - /* MSP */ - ARM_LIB_STACK_MSP MBED_RAM_START ALIGN 32 OVERLAY EMPTY S_MSP_STACK_SIZE { - } - - /* PSP */ - ARM_LIB_STACK +0 ALIGN 32 EMPTY S_PSP_STACK_SIZE { - } - - ARM_LIB_HEAP +0 ALIGN 8 EMPTY S_HEAP_SIZE { - } - - ER_TFM_DATA +0 { - .ANY (+RW +ZI) - } - - TFM_UNPRIV_RO_DATA +0 ALIGN 32 { - tfm_spm_services.o (+RW +ZI) - device_definition.o (+RW +ZI) - } - - TFM_UNPRIV_SCRATCH +0 ALIGN 32 EMPTY 0x400 { - } - - TFM_SP_PLATFORM_DATA +0 ALIGN 32 { - *tfm_platform* (+RW +ZI) - } - - TFM_SP_PLATFORM_STACK +0 ALIGN 128 EMPTY 0x0400 { - } - -#endif /* TFM_LVL == 1 */ - - /* This empty, zero long execution region is here to mark the limit address - * of the last execution region that is allocated in SRAM. - */ - SRAM_WATERMARK +0 EMPTY 0x0 { - } - - ER_CODE_CMSE_VENEER CMSE_VENEER_REGION_START FIXED PADVALUE 0xFFFFFFFF CMSE_VENEER_REGION_SIZE { - *(Veneer$$CMSE) - } - - /* Make sure that the sections allocated in the SRAM does not exceed the - * size of the SRAM available. - */ - ScatterAssert(ImageLimit(SRAM_WATERMARK) <= MBED_RAM_START + MBED_RAM_SIZE) -} - - -LR_NS_PARTITION NS_PARTITION_START { - /* Reserved place for NS application. - * No code will be placed here, just address of this region is used in the - * secure code to configure certain HW components. - */ - ER_NS_PARTITION NS_PARTITION_START EMPTY NS_PARTITION_SIZE { - } -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_s.S b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_s.S deleted file mode 100644 index 593704a582a..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_s.S +++ /dev/null @@ -1,291 +0,0 @@ -;/* -; * Copyright (c) 2017-2020 ARM Limited -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the "License"); -; * you may not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * http://www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an "AS IS" BASIS, -; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; */ -; -; This file is derivative of CMSIS V5.01 startup_ARMv8MML.s -; Git SHA: 8a1d9d6ee18b143ae5befefa14d89fb5b3f99c75 - -;/* -;//-------- <<< Use Configuration Wizard in Context Menu >>> ------------------ -;*/ - - -; Stack Configuration -; Stack Size (in Bytes) <0x0-0xFFFFFFFF:8> -; - - IMPORT |Image$$ARM_LIB_STACK_MSP$$ZI$$Limit| - -; Vector Table Mapped to Address 0 at Reset - - AREA RESET, DATA, READONLY - EXPORT __Vectors - EXPORT __Vectors_End - EXPORT __Vectors_Size - -__Vectors ;Core Interrupts - DCD |Image$$ARM_LIB_STACK_MSP$$ZI$$Limit| ; Top of Stack - DCD Reset_Handler ; Reset Handler - DCD NMI_Handler ; NMI Handler - DCD HardFault_Handler ; Hard Fault Handler - DCD MemManage_Handler ; MPU Fault Handler - DCD BusFault_Handler ; Bus Fault Handler - DCD UsageFault_Handler ; Usage Fault Handler - DCD SecureFault_Handler ; Secure Fault Handler - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD 0 ; Reserved - DCD SVC_Handler ; SVCall Handler - DCD DebugMon_Handler ; Debug Monitor Handler - DCD 0 ; Reserved - DCD PendSV_Handler ; PendSV Handler - DCD SysTick_Handler ; SysTick Handler - ;SSE-200 Interrupts - DCD NS_WATCHDOG_RESET_IRQHandler ; 0: Non-Secure Watchdog Reset Request Interrupt - DCD NS_WATCHDOG_IRQHandler ; 1: Non-Secure Watchdog Interrupt - DCD S32K_TIMER_IRQHandler ; 2: S32K Timer Interrupt - DCD TIMER0_IRQHandler ; 3: CMSDK Timer 0 Interrupt - DCD TIMER1_IRQHandler ; 4: CMSDK Timer 1 Interrupt - DCD DUALTIMER_IRQHandler ; 5: CMSDK Dual Timer Interrupt - DCD MHU0_IRQHandler ; 6: Message Handling Unit 0 Interrupt - DCD MHU1_IRQHandler ; 7: Message Handling Unit 1 Interrupt - DCD CRYPTOCELL_IRQHandler ; 8: CryptoCell-312 Interrupt - DCD MPC_Handler ; 9: Secure Combined MPC Interrupt - DCD PPC_Handler ; 10: Secure Combined PPC Interrupt - DCD S_MSC_COMBINED_IRQHandler ; 11: Secure Combined MSC Interrupt - DCD S_BRIDGE_ERR_IRQHandler ; 12: Secure Bridge Error Combined Interrupt - DCD I_CACHE_INV_ERR_IRQHandler ; 13: Intsruction Cache Invalidation Interrupt - DCD 0 ; 14: Reserved - DCD SYS_PPU_IRQHandler ; 15: System PPU Interrupt - DCD CPU0_PPU_IRQHandler ; 16: CPU0 PPU Interrupt - DCD CPU1_PPU_IRQHandler ; 17: CPU1 PPU Interrupt - DCD CPU0_DGB_PPU_IRQHandler ; 18: CPU0 Debug PPU Interrupt - DCD CPU1_DGB_PPU_IRQHandler ; 19: CPU1 Debug PPU Interrupt - DCD 0 ; 20: Reserved - DCD 0 ; 21: Reserved - DCD RAM0_PPU_IRQHandler ; 22: RAM 0 PPU Interrupt - DCD RAM1_PPU_IRQHandler ; 23: RAM 1 PPU Interrupt - DCD RAM2_PPU_IRQHandler ; 24: RAM 2 PPU Interrupt - DCD RAM3_PPU_IRQHandler ; 25: RAM 3 PPU Interrupt - DCD DEBUG_PPU_IRQHandler ; 26: Debug PPU Interrupt - DCD 0 ; 27: Reserved - DCD CPUn_CTI_0_IRQHandler ; 28: CPUn CTI Interrupt 0 - DCD CPUn_CTI_1_IRQHandler ; 29: CPUn CTI Interrupt 1 - DCD 0 ; 30: Reserved - DCD 0 ; 31: Reserved - ;Expansion Interrupts - DCD 0 ; 32: Reserved - DCD GpTimer_IRQHandler ; 33: General Purpose Timer - DCD I2C0_IRQHandler ; 34: I2C0 - DCD I2C1_IRQHandler ; 35: I2C1 - DCD I2S_IRQHandler ; 36: I2S - DCD SPI_IRQHandler ; 37: SPI - DCD QSPI_IRQHandler ; 38: QSPI - DCD UARTRX0_Handler ; 39: UART0 receive FIFO interrupt - DCD UARTTX0_Handler ; 40: UART0 transmit FIFO interrupt - DCD UART0_RxTimeout_IRQHandler ; 41: UART0 receive timeout interrupt - DCD UART0_ModemStatus_IRQHandler ; 42: UART0 modem status interrupt - DCD UART0_Error_IRQHandler ; 43: UART0 error interrupt - DCD UART0_IRQHandler ; 44: UART0 interrupt - DCD UARTRX1_Handler ; 45: UART0 receive FIFO interrupt - DCD UARTTX1_Handler ; 46: UART0 transmit FIFO interrupt - DCD UART1_RxTimeout_IRQHandler ; 47: UART0 receive timeout interrupt - DCD UART1_ModemStatus_IRQHandler ; 48: UART0 modem status interrupt - DCD UART1_Error_IRQHandler ; 49: UART0 error interrupt - DCD UART1_IRQHandler ; 50: UART0 interrupt - DCD GPIO_0_IRQHandler ; 51: GPIO 0 interrupt - DCD GPIO_1_IRQHandler ; 52: GPIO 1 interrupt - DCD GPIO_2_IRQHandler ; 53: GPIO 2 interrupt - DCD GPIO_3_IRQHandler ; 54: GPIO 3 interrupt - DCD GPIO_4_IRQHandler ; 55: GPIO 4 interrupt - DCD GPIO_5_IRQHandler ; 56: GPIO 5 interrupt - DCD GPIO_6_IRQHandler ; 57: GPIO 6 interrupt - DCD GPIO_7_IRQHandler ; 58: GPIO 7 interrupt - DCD GPIO_8_IRQHandler ; 59: GPIO 8 interrupt - DCD GPIO_9_IRQHandler ; 60: GPIO 9 interrupt - DCD GPIO_10_IRQHandler ; 61: GPIO 10 interrupt - DCD GPIO_11_IRQHandler ; 62: GPIO 11 interrupt - DCD GPIO_12_IRQHandler ; 63: GPIO 12 interrupt - DCD GPIO_13_IRQHandler ; 64: GPIO 13 interrupt - DCD GPIO_14_IRQHandler ; 65: GPIO 14 interrupt - DCD GPIO_15_IRQHandler ; 66: GPIO 15 interrupt - DCD GPIO_Combined_IRQHandler ; 67: GPIO Combined interrupt - DCD PVT_IRQHandler ; 68: PVT sensor interrupt - DCD 0 ; 69: Reserved - DCD PWM_0_IRQHandler ; 70: PWM0 interrupt - DCD RTC_IRQHandler ; 71: RTC interrupt - DCD GpTimer1_IRQHandler ; 72: General Purpose Timer1 - DCD GpTimer0_IRQHandler ; 73: General Purpose Timer0 - DCD PWM_1_IRQHandler ; 74: PWM1 interrupt - DCD PWM_2_IRQHandler ; 75: PWM2 interrupt - DCD GPIO_Combined_NS_IRQHandler ; 76: GPIO Combined Non-secure interrupt - DCD SDIO_IRQHandler ; 77: SDIO interrupt handler - DCD 0 ; 78: Reserved - DCD 0 ; 79: Reserved - DCD 0 ; 80: Reserved - DCD 0 ; 81: Reserved - DCD 0 ; 82: Reserved - DCD 0 ; 83: Reserved - DCD CryptoSS_Reset_Status_IRQHandler ; 84: Crypto SS reset status - DCD HostMHUS0_Int_Acc_NR2R_IRQHandler ; 85: MHU0 Sender IRQ not-ready to ready - DCD HostMHUS0_Int_Acc_R2NR_IRQHandler ; 86: MHU0 Sender IRQ ready to not ready - DCD HostMHUR0_IRQ_Reg0_IRQHandler ; 87: MHU0 Receiver IRQ Register 0 - DCD HostMHUR0_IRQ_Reg1_IRQHandler ; 88: MHU0 Receiver IRQ Register 1 - DCD HostMHUR0_IRQComb_IRQHandler ; 89: MHU0 Receiver IRQ combined - DCD HostMHUS1_Int_Acc_NR2R_IRQHandler ; 90: MHU1 Sender IRQ not-ready to ready - DCD HostMHUS1_Int_Acc_R2NR_IRQHandler ; 91: MHU1 Sender IRQ ready to not ready - DCD HostMHUR1_IRQ_Reg0_IRQHandler ; 92: MHU1 Receiver IRQ Register 0 - DCD HostMHUR1_IRQ_Reg1_IRQHandler ; 93: MHU1 Receiver IRQ Register 1 - DCD HostMHUR1_IRQComb_IRQHandler ; 94: MHU1 Receiver IRQ combined - DCD EFlash0_Controller_IRQHandler ; 95: GFC-100 EFlash 0 controller interrupt - DCD EFlash1_Controller_IRQHandler ; 96: GFC-100 EFlash 1 controller interrupt - DCD 0 ; 97:127 Reserved - - -__Vectors_End - -__Vectors_Size EQU __Vectors_End - __Vectors - -; Reset Handler - AREA |.text|, CODE, READONLY -Reset_Handler PROC - EXPORT Reset_Handler [WEAK] - IMPORT SystemInit - IMPORT __main - CPSID i ; Disable IRQs - LDR R0, =SystemInit - BLX R0 - MRS R0, control ; Get control value - ORR R0, R0, #2 ; Select switch to PSP - MSR control, R0 - LDR R0, =__main - BX R0 - ENDP -End_Of_Main - B . - - ALIGN 4 - -; Dummy Exception Handlers (infinite loops which can be modified) - MACRO - Default_Handler $handler_name -$handler_name PROC - EXPORT $handler_name [WEAK] - B . - ENDP - MEND - - Default_Handler NMI_Handler - Default_Handler HardFault_Handler - Default_Handler MemManage_Handler - Default_Handler BusFault_Handler - Default_Handler UsageFault_Handler - Default_Handler SecureFault_Handler - Default_Handler SVC_Handler - Default_Handler DebugMon_Handler - Default_Handler PendSV_Handler - Default_Handler SysTick_Handler - - Default_Handler NS_WATCHDOG_RESET_IRQHandler - Default_Handler NS_WATCHDOG_IRQHandler - Default_Handler S32K_TIMER_IRQHandler - Default_Handler TIMER0_IRQHandler - Default_Handler TIMER1_IRQHandler - Default_Handler DUALTIMER_IRQHandler - Default_Handler MHU0_IRQHandler - Default_Handler MHU1_IRQHandler - Default_Handler CRYPTOCELL_IRQHandler - Default_Handler MPC_Handler - Default_Handler PPC_Handler - Default_Handler S_MSC_COMBINED_IRQHandler - Default_Handler S_BRIDGE_ERR_IRQHandler - Default_Handler I_CACHE_INV_ERR_IRQHandler - Default_Handler SYS_PPU_IRQHandler - Default_Handler CPU0_PPU_IRQHandler - Default_Handler CPU1_PPU_IRQHandler - Default_Handler CPU0_DGB_PPU_IRQHandler - Default_Handler CPU1_DGB_PPU_IRQHandler - Default_Handler RAM0_PPU_IRQHandler - Default_Handler RAM1_PPU_IRQHandler - Default_Handler RAM2_PPU_IRQHandler - Default_Handler RAM3_PPU_IRQHandler - Default_Handler DEBUG_PPU_IRQHandler - Default_Handler CPUn_CTI_0_IRQHandler - Default_Handler CPUn_CTI_1_IRQHandler - - Default_Handler GpTimer_IRQHandler - Default_Handler I2C0_IRQHandler - Default_Handler I2C1_IRQHandler - Default_Handler I2S_IRQHandler - Default_Handler SPI_IRQHandler - Default_Handler QSPI_IRQHandler - Default_Handler UARTRX0_Handler - Default_Handler UARTTX0_Handler - Default_Handler UART0_RxTimeout_IRQHandler - Default_Handler UART0_ModemStatus_IRQHandler - Default_Handler UART0_Error_IRQHandler - Default_Handler UART0_IRQHandler - Default_Handler UARTRX1_Handler - Default_Handler UARTTX1_Handler - Default_Handler UART1_RxTimeout_IRQHandler - Default_Handler UART1_ModemStatus_IRQHandler - Default_Handler UART1_Error_IRQHandler - Default_Handler UART1_IRQHandler - Default_Handler GPIO_0_IRQHandler - Default_Handler GPIO_1_IRQHandler - Default_Handler GPIO_2_IRQHandler - Default_Handler GPIO_3_IRQHandler - Default_Handler GPIO_4_IRQHandler - Default_Handler GPIO_5_IRQHandler - Default_Handler GPIO_6_IRQHandler - Default_Handler GPIO_7_IRQHandler - Default_Handler GPIO_8_IRQHandler - Default_Handler GPIO_9_IRQHandler - Default_Handler GPIO_10_IRQHandler - Default_Handler GPIO_11_IRQHandler - Default_Handler GPIO_12_IRQHandler - Default_Handler GPIO_13_IRQHandler - Default_Handler GPIO_14_IRQHandler - Default_Handler GPIO_15_IRQHandler - Default_Handler GPIO_Combined_IRQHandler - Default_Handler PVT_IRQHandler - Default_Handler PWM_0_IRQHandler - Default_Handler RTC_IRQHandler - Default_Handler GpTimer1_IRQHandler - Default_Handler GpTimer0_IRQHandler - Default_Handler PWM_1_IRQHandler - Default_Handler PWM_2_IRQHandler - Default_Handler GPIO_Combined_NS_IRQHandler - Default_Handler SDIO_IRQHandler - Default_Handler CryptoSS_Reset_Status_IRQHandler - Default_Handler HostMHUS0_Int_Acc_NR2R_IRQHandler - Default_Handler HostMHUS0_Int_Acc_R2NR_IRQHandler - Default_Handler HostMHUR0_IRQ_Reg0_IRQHandler - Default_Handler HostMHUR0_IRQ_Reg1_IRQHandler - Default_Handler HostMHUR0_IRQComb_IRQHandler - Default_Handler HostMHUS1_Int_Acc_NR2R_IRQHandler - Default_Handler HostMHUS1_Int_Acc_R2NR_IRQHandler - Default_Handler HostMHUR1_IRQ_Reg0_IRQHandler - Default_Handler HostMHUR1_IRQ_Reg1_IRQHandler - Default_Handler HostMHUR1_IRQComb_IRQHandler - Default_Handler EFlash0_Controller_IRQHandler - Default_Handler EFlash1_Controller_IRQHandler - - - ALIGN - - END diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_GCC_ARM/musca_s.ld b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_GCC_ARM/musca_s.ld deleted file mode 100644 index ce9c4450739..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_GCC_ARM/musca_s.ld +++ /dev/null @@ -1,366 +0,0 @@ -;/* -; * Copyright (c) 2018-2020 ARM Limited -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the "License"); -; * you may not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * http://www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an "AS IS" BASIS, -; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; * -; * -; * This file is derivative of CMSIS V5.00 gcc_arm.ld -; */ - -/*********** WARNING: This is an auto-generated file. Do not edit! ***********/ - -/* Linker script to configure memory regions. */ -/* This file will be run trough the pre-processor. */ - -#include "../../../partition/region_defs.h" - -#if !defined(TFM_LVL) - #define TFM_LVL 1 -#endif - -MEMORY -{ - FLASH (rx) : ORIGIN = S_CODE_START, LENGTH = S_CODE_SIZE - RAM (rwx) : ORIGIN = S_DATA_START, LENGTH = S_DATA_SIZE - VENEERS (rx) : ORIGIN = CMSE_VENEER_REGION_START, LENGTH = CMSE_VENEER_REGION_SIZE -} - -HEAP_SIZE = S_HEAP_SIZE; -__heap_size__ = S_HEAP_SIZE; -__psp_stack_size__ = S_PSP_STACK_SIZE; -__msp_init_stack_size__ = S_MSP_STACK_SIZE; - -/* Library configurations */ -GROUP(libgcc.a libc.a libm.a libnosys.a libc_nano.a) - -ENTRY(Reset_Handler) - -SECTIONS -{ - .TFM_VECTORS : ALIGN(4) - { - __vectors_start__ = .; - KEEP(*(.vectors)) - *startup*(.text*) - . = ALIGN(4); - __vectors_end__ = .; - } > FLASH - -#if TFM_LVL == 1 - .copy.table : ALIGN(4) - { - __copy_table_start__ = .; - LONG (LOADADDR(.TFM_DATA)) - LONG (ADDR(.TFM_DATA)) - LONG (SIZEOF(.TFM_DATA)) - __copy_table_end__ = .; - } > FLASH - - .zero.table : ALIGN(4) - { - __zero_table_start__ = .; - LONG (ADDR(.TFM_BSS)) - LONG (SIZEOF(.TFM_BSS)) - LONG (ADDR(.TFM_SECURE_STACK)) - LONG (SIZEOF(.TFM_SECURE_STACK)) - LONG (ADDR(.TFM_UNPRIV_SCRATCH)) - LONG (SIZEOF(.TFM_UNPRIV_SCRATCH)) - __zero_table_end__ = .; - } > FLASH - -#else /* TFM_LVL == 1 */ - .copy.table : ALIGN(4) - { - __copy_table_start__ = .; - LONG (LOADADDR(.TFM_DATA)) - LONG (ADDR(.TFM_DATA)) - LONG (SIZEOF(.TFM_DATA)) - LONG (LOADADDR(.TFM_UNPRIV_RO_DATA)) - LONG (ADDR(.TFM_UNPRIV_RO_DATA)) - LONG (SIZEOF(.TFM_UNPRIV_RO_DATA)) - LONG (LOADADDR(.TFM_SP_PLATFORM_DATA)) - LONG (ADDR(.TFM_SP_PLATFORM_DATA)) - LONG (SIZEOF(.TFM_SP_PLATFORM_DATA)) - __copy_table_end__ = .; - } > FLASH - - .zero.table : ALIGN(4) - { - __zero_table_start__ = .; - LONG (ADDR(.TFM_BSS)) - LONG (SIZEOF(.TFM_BSS)) - LONG (ADDR(.TFM_UNPRIV_RO_BSS)) - LONG (SIZEOF(.TFM_UNPRIV_RO_BSS)) - LONG (ADDR(.TFM_SP_PLATFORM_BSS)) - LONG (SIZEOF(.TFM_SP_PLATFORM_BSS)) - LONG (ADDR(.TFM_SP_PLATFORM_STACK)) - LONG (SIZEOF(.TFM_SP_PLATFORM_STACK)) - LONG (ADDR(.TFM_UNPRIV_SCRATCH)) - LONG (SIZEOF(.TFM_UNPRIV_SCRATCH)) - __zero_table_end__ = .; - } > FLASH - - .TFM_UNPRIV_CODE : ALIGN(32) - { - *libc_nano*:*(.text*) - *libc_nano*:*(.rodata*) - *tfm_spm_services.o(.text*) - *tfm_spm_services.o(.rodata*) - *platform_retarget_dev.o(.text*) - *platform_retarget_dev.o(.rodata*) - *(SFN) - *libgcc*:*(.text*) - *libgcc*:*(.rodata*) - . = ALIGN(32); - } > FLASH - Image$$TFM_UNPRIV_CODE$$RO$$Base = ADDR(.TFM_UNPRIV_CODE); - Image$$TFM_UNPRIV_CODE$$RO$$Limit = ADDR(.TFM_UNPRIV_CODE) + SIZEOF(.TFM_UNPRIV_CODE); - - .TFM_SP_PLATFORM : ALIGN(32) - { - *tfm_platform*:*(.text*) - *tfm_platform*:*(.rodata*) - *(TFM_SP_PLATFORM_ATTR_FN) - . = ALIGN(32); - } > FLASH - Image$$TFM_SP_PLATFORM$$RO$$Base = ADDR(.TFM_SP_PLATFORM); - Image$$TFM_SP_PLATFORM$$RO$$Limit = ADDR(.TFM_SP_PLATFORM) + SIZEOF(.TFM_SP_PLATFORM); - Image$$TFM_SP_PLATFORM$$Base = ADDR(.TFM_SP_PLATFORM); - Image$$TFM_SP_PLATFORM$$Limit = ADDR(.TFM_SP_PLATFORM) + SIZEOF(.TFM_SP_PLATFORM); - - - .ARM.extab : ALIGN(32) - { - *(.ARM.extab* .gnu.linkonce.armextab.*) - } > FLASH - - __exidx_start = .; - .ARM.exidx : - { - *(.ARM.exidx* .gnu.linkonce.armexidx.*) - } > FLASH - __exidx_end = .; - -#endif /* TFM_LVL == 1 */ - - .ER_TFM_CODE : - { - *(.text*) - - KEEP(*(.init)) - KEEP(*(.fini)) - - - /* .ctors */ - *crtbegin.o(.ctors) - *crtbegin?.o(.ctors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .ctors) - *(SORT(.ctors.*)) - *(.ctors) - - /* .dtors */ - *crtbegin.o(.dtors) - *crtbegin?.o(.dtors) - *(EXCLUDE_FILE(*crtend?.o *crtend.o) .dtors) - *(SORT(.dtors.*)) - *(.dtors) - - *(.rodata*) - - KEEP(*(.eh_frame*)) - } > FLASH - - OVERLAY S_DATA_START : - { - /* shared_data and msp_stack are overlapping on purpose when - * msp_stack is extended until the beginning of RAM, when shared_date - * was read out by partitions - */ - .tfm_bl2_shared_data - { - . = ALIGN(32); - . += BOOT_TFM_SHARED_DATA_SIZE; - } - - .msp_stack - { - . = ALIGN(32); - . += S_MSP_STACK_SIZE; - } - } > RAM - - Image$$ARM_LIB_STACK_MSP$$ZI$$Limit = ADDR(.msp_stack) + SIZEOF(.msp_stack); - - .psp_stack : - { - . = ALIGN(32); - . += S_PSP_STACK_SIZE; - } > RAM - Image$$ARM_LIB_STACK$$ZI$$Base = ADDR(.psp_stack); - Image$$ARM_LIB_STACK$$ZI$$Limit = ADDR(.psp_stack) + SIZEOF(.psp_stack); - -#if TFM_LVL == 1 - - .heap : - { - . = ALIGN(8); - __end__ = .; - PROVIDE(end = .); - __HeapBase = .; - . += S_HEAP_SIZE; - __HeapLimit = .; - __heap_limit = .; /* Add for _sbrk */ - } > RAM - Image$$ARM_LIB_HEAP$$ZI$$Base = ADDR(.heap); - Image$$ARM_LIB_HEAP$$ZI$$Limit = ADDR(.heap) + SIZEOF(.heap); - - .TFM_SECURE_STACK : - { - . = ALIGN(128); - . += 0x1000; - } > RAM - Image$$TFM_SECURE_STACK$$ZI$$Base = ADDR(.TFM_SECURE_STACK); - Image$$TFM_SECURE_STACK$$ZI$$Limit = ADDR(.TFM_SECURE_STACK) + SIZEOF(.TFM_SECURE_STACK); - - .TFM_UNPRIV_SCRATCH : - { - . = ALIGN(32); - . += 0x400; - } > RAM - Image$$TFM_UNPRIV_SCRATCH$$ZI$$Base = ADDR(.TFM_UNPRIV_SCRATCH); - Image$$TFM_UNPRIV_SCRATCH$$ZI$$Limit = ADDR(.TFM_UNPRIV_SCRATCH) + SIZEOF(.TFM_UNPRIV_SCRATCH); -#else /* TFM_LVL == 1 */ - .TFM_UNPRIV_RO_DATA : - { - */tfm_spm_services.o(.data*) - */platform_retarget_dev.o(.data*) - . = ALIGN(32); - } > RAM AT> FLASH - Image$$TFM_UNPRIV_RO_DATA$$RW$$Base = ADDR(.TFM_UNPRIV_RO_DATA); - Image$$TFM_UNPRIV_RO_DATA$$RW$$Limit = ADDR(.TFM_UNPRIV_RO_DATA) + SIZEOF(.TFM_UNPRIV_RO_DATA); - - .TFM_UNPRIV_RO_BSS : ALIGN(32) - { - */tfm_spm_services.o(.bss*) - */platform_retarget_dev.o(.bss*) - */tfm_spm_services.o(COMMON) - */platform_retarget_dev.o(COMMON) - . = ALIGN(32); - } > RAM AT> FLASH - Image$$TFM_UNPRIV_RO_DATA$$ZI$$Base = ADDR(.TFM_UNPRIV_RO_BSS); - Image$$TFM_UNPRIV_RO_DATA$$ZI$$Limit = ADDR(.TFM_UNPRIV_RO_BSS) + SIZEOF(.TFM_UNPRIV_RO_BSS); - - .TFM_UNPRIV_SCRATCH : ALIGN(32) - { - . += 0x400; - } > RAM AT> FLASH - Image$$TFM_UNPRIV_SCRATCH$$ZI$$Base = ADDR(.TFM_UNPRIV_SCRATCH); - Image$$TFM_UNPRIV_SCRATCH$$ZI$$Limit = ADDR(.TFM_UNPRIV_SCRATCH) + SIZEOF(.TFM_UNPRIV_SCRATCH); - - .TFM_SP_PLATFORM_DATA : ALIGN(32) - { - *tfm_platform*:*(.data*) - . = ALIGN(32); - } > RAM AT> FLASH - Image$$TFM_SP_PLATFORM_DATA$$RW$$Base = ADDR(.TFM_SP_PLATFORM_DATA); - Image$$TFM_SP_PLATFORM_DATA$$RW$$Limit = ADDR(.TFM_SP_PLATFORM_DATA) + SIZEOF(.TFM_SP_PLATFORM_DATA); - - .TFM_SP_PLATFORM_BSS : ALIGN(32) - { - *tfm_platform*:*(.bss*) - *tfm_platform*:*(COMMON) - . = ALIGN(32); - } > RAM AT> FLASH - Image$$TFM_SP_PLATFORM_DATA$$ZI$$Base = ADDR(.TFM_SP_PLATFORM_BSS); - Image$$TFM_SP_PLATFORM_DATA$$ZI$$Limit = ADDR(.TFM_SP_PLATFORM_BSS) + SIZEOF(.TFM_SP_PLATFORM_BSS); - - .TFM_SP_PLATFORM_STACK : ALIGN(128) - { - . += 0x0400; - } > RAM AT> FLASH - Image$$TFM_SP_PLATFORM_STACK$$ZI$$Base = ADDR(.TFM_SP_PLATFORM_STACK); - Image$$TFM_SP_PLATFORM_STACK$$ZI$$Limit = ADDR(.TFM_SP_PLATFORM_STACK) + SIZEOF(.TFM_SP_PLATFORM_STACK); - -#endif /* TFM_LVL == 1 */ - - .TFM_DATA : - { - *(.data*) - - . = ALIGN(4); - /* preinit data */ - PROVIDE_HIDDEN (__preinit_array_start = .); - KEEP(*(.preinit_array)) - PROVIDE_HIDDEN (__preinit_array_end = .); - - . = ALIGN(4); - /* init data */ - PROVIDE_HIDDEN (__init_array_start = .); - KEEP(*(SORT(.init_array.*))) - KEEP(*(.init_array)) - PROVIDE_HIDDEN (__init_array_end = .); - - . = ALIGN(4); - /* finit data */ - PROVIDE_HIDDEN (__fini_array_start = .); - KEEP(*(SORT(.fini_array.*))) - KEEP(*(.fini_array)) - PROVIDE_HIDDEN (__fini_array_end = .); - - KEEP(*(.jcr*)) - . = ALIGN(4); - - } > RAM AT> FLASH - Image$$ER_TFM_DATA$$RW$$Base = ADDR(.TFM_DATA); - Image$$ER_TFM_DATA$$RW$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA); - - .TFM_BSS : - { - . = ALIGN(4); - __bss_start__ = .; - *(.bss*) - *(COMMON) - . = ALIGN(4); - __bss_end__ = .; - } > RAM - Image$$ER_TFM_DATA$$ZI$$Base = ADDR(.TFM_BSS); - Image$$ER_TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); - - Image$$ER_TFM_DATA$$Base = ADDR(.TFM_DATA); - Image$$ER_TFM_DATA$$Limit = ADDR(.TFM_DATA) + SIZEOF(.TFM_DATA) + SIZEOF(.TFM_BSS); - - ASSERT(Image$$ER_TFM_DATA$$Limit <= S_DATA_START + S_DATA_SIZE, "Exceeding secure RAM") - - /* - * Place the CMSE Veneers (containing the SG instruction) after the code, in a - * separate 32 bytes aligned region so that the SAU can programmed to just set - * this region as Non-Secure Callable. - */ - .gnu.sgstubs : ALIGN(32) - { - *(.gnu.sgstubs*) - . = ALIGN(32); - } > VENEERS AT> VENEERS - Image$$ER_CODE_CMSE_VENEER$$Base = ADDR(.gnu.sgstubs); - Image$$ER_CODE_CMSE_VENEER$$Limit = ADDR(.gnu.sgstubs) + SIZEOF(.gnu.sgstubs); - - Load$$LR$$LR_NS_PARTITION$$Base = NS_PARTITION_START; - - Load$$LR$$LR_SECONDARY_PARTITION$$Base = SECONDARY_PARTITION_START; - - PROVIDE(__stack = Image$$ARM_LIB_STACK$$ZI$$Limit); - PROVIDE(__StackTop = __stack); - PROVIDE(__StackLimit = __StackTop - SIZEOF(.psp_stack)); -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_s.S b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_s.S deleted file mode 100644 index 42697988e28..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_s.S +++ /dev/null @@ -1,401 +0,0 @@ -;/* -; * Copyright (c) 2009-2020 Arm Limited -; * -; * SPDX-License-Identifier: Apache-2.0 -; * -; * Licensed under the Apache License, Version 2.0 (the "License"); -; * you may not use this file except in compliance with the License. -; * You may obtain a copy of the License at -; * -; * http://www.apache.org/licenses/LICENSE-2.0 -; * -; * Unless required by applicable law or agreed to in writing, software -; * distributed under the License is distributed on an "AS IS" BASIS, -; * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -; * See the License for the specific language governing permissions and -; * limitations under the License. -; * -; * -; * This file is derivative of CMSIS V5.00 startup_ARMCM33.S -; */ - - .syntax unified - .arch armv8-m.main - - .section .vectors - .align 2 - .globl __Vectors -__Vectors: - .long Image$$ARM_LIB_STACK_MSP$$ZI$$Limit /* Top of Stack */ - .long Reset_Handler /* Reset Handler */ - .long NMI_Handler /* NMI Handler */ - .long HardFault_Handler /* Hard Fault Handler */ - .long MemManage_Handler /* MPU Fault Handler */ - .long BusFault_Handler /* Bus Fault Handler */ - .long UsageFault_Handler /* Usage Fault Handler */ - .long SecureFault_Handler /* Secure Fault Handler */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long 0 /* Reserved */ - .long SVC_Handler /* SVCall Handler */ - .long DebugMon_Handler /* Debug Monitor Handler */ - .long 0 /* Reserved */ - .long PendSV_Handler /* PendSV Handler */ - .long SysTick_Handler /* SysTick Handler */ - - /* Core interrupts */ - .long NS_WATCHDOG_RESET_IRQHandler /* 0: Non-Secure Watchdog Reset Request Interrupt */ - .long NS_WATCHDOG_IRQHandler /* 1: Non-Secure Watchdog Interrupt */ - .long S32K_TIMER_IRQHandler /* 2: S32K Timer Interrupt */ - .long TIMER0_IRQHandler /* 3: CMSDK Timer 0 Interrupt */ - .long TIMER1_IRQHandler /* 4: CMSDK Timer 1 Interrupt */ - .long DUALTIMER_IRQHandler /* 5: CMSDK Dual Timer Interrupt */ - .long MHU0_IRQHandler /* 6: Message Handling Unit 0 Interrupt */ - .long MHU1_IRQHandler /* 7: Message Handling Unit 1 Interrupt */ - .long CRYPTOCELL_IRQHandler /* 8: CryptoCell-312 Interrupt */ - .long MPC_Handler /* 9: Secure Combined MPC Interrupt */ - .long PPC_Handler /* 10: Secure Combined PPC Interrupt */ - .long S_MSC_COMBINED_IRQHandler /* 11: Secure Combined MSC Interrupt */ - .long S_BRIDGE_ERR_IRQHandler /* 12: Secure Bridge Error Combined Interrupt */ - .long I_CACHE_INV_ERR_IRQHandler /* 13: Intsruction Cache Invalidation Interrupt */ - .long 0 /* 14: Reserved */ - .long SYS_PPU_IRQHandler /* 15: System PPU Interrupt */ - .long CPU0_PPU_IRQHandler /* 16: CPU0 PPU Interrupt */ - .long CPU1_PPU_IRQHandler /* 17: CPU1 PPU Interrupt */ - .long CPU0_DGB_PPU_IRQHandler /* 18: CPU0 Debug PPU Interrupt */ - .long CPU1_DGB_PPU_IRQHandler /* 19: CPU1 Debug PPU Interrupt */ - .long 0 /* 20: Reserved */ - .long 0 /* 21: Reserved */ - .long RAM0_PPU_IRQHandler /* 22: RAM 0 PPU Interrupt */ - .long RAM1_PPU_IRQHandler /* 23: RAM 1 PPU Interrupt */ - .long RAM2_PPU_IRQHandler /* 24: RAM 2 PPU Interrupt */ - .long RAM3_PPU_IRQHandler /* 25: RAM 3 PPU Interrupt */ - .long DEBUG_PPU_IRQHandler /* 26: Debug PPU Interrupt */ - .long 0 /* 27: Reserved */ - .long CPU0_CTI_IRQHandler /* 28: CPU0 CTI Interrupt */ - .long CPU1_CTI_IRQHandler /* 29: CPU1 CTI Interrupt */ - .long 0 /* 30: Reserved */ - .long 0 /* 31: Reserved */ - - /* External interrupts */ - .long 0 /* 32: Reserved */ - .long GpTimer_IRQHandler /* 33: General Purpose Timer */ - .long I2C0_IRQHandler /* 34: I2C0 */ - .long I2C1_IRQHandler /* 35: I2C1 */ - .long I2S_IRQHandler /* 36: I2S */ - .long SPI_IRQHandler /* 37: SPI */ - .long QSPI_IRQHandler /* 38: QSPI */ - .long UARTRX0_Handler /* 39: UART0 receive FIFO interrupt */ - .long UARTTX0_Handler /* 40: UART0 transmit FIFO interrupt */ - .long UART0_RxTimeout_IRQHandler /* 41: UART0 receive timeout interrupt */ - .long UART0_ModemStatus_IRQHandler /* 42: UART0 modem status interrupt */ - .long UART0_Error_IRQHandler /* 43: UART0 error interrupt */ - .long UART0_IRQHandler /* 44: UART0 interrupt */ - .long UARTRX1_Handler /* 45: UART0 receive FIFO interrupt */ - .long UARTTX1_Handler /* 46: UART0 transmit FIFO interrupt */ - .long UART1_RxTimeout_IRQHandler /* 47: UART0 receive timeout interrupt */ - .long UART1_ModemStatus_IRQHandler /* 48: UART0 modem status interrupt */ - .long UART1_Error_IRQHandler /* 49: UART0 error interrupt */ - .long UART1_IRQHandler /* 50: UART0 interrupt */ - .long GPIO_0_IRQHandler /* 51: GPIO 0 interrupt */ - .long GPIO_1_IRQHandler /* 52: GPIO 1 interrupt */ - .long GPIO_2_IRQHandler /* 53: GPIO 2 interrupt */ - .long GPIO_3_IRQHandler /* 54: GPIO 3 interrupt */ - .long GPIO_4_IRQHandler /* 55: GPIO 4 interrupt */ - .long GPIO_5_IRQHandler /* 56: GPIO 5 interrupt */ - .long GPIO_6_IRQHandler /* 57: GPIO 6 interrupt */ - .long GPIO_7_IRQHandler /* 58: GPIO 7 interrupt */ - .long GPIO_8_IRQHandler /* 59: GPIO 8 interrupt */ - .long GPIO_9_IRQHandler /* 60: GPIO 9 interrupt */ - .long GPIO_10_IRQHandler /* 61: GPIO 10 interrupt */ - .long GPIO_11_IRQHandler /* 62: GPIO 11 interrupt */ - .long GPIO_12_IRQHandler /* 63: GPIO 12 interrupt */ - .long GPIO_13_IRQHandler /* 64: GPIO 13 interrupt */ - .long GPIO_14_IRQHandler /* 65: GPIO 14 interrupt */ - .long GPIO_15_IRQHandler /* 66: GPIO 15 interrupt */ - .long GPIO_Combined_IRQHandler /* 67: GPIO Combined interrupt */ - .long PVT_IRQHandler /* 68: PVT sensor interrupt */ - .long 0 /* 69: Reserved */ - .long PWM_0_IRQHandler /* 70: PWM0 interrupt */ - .long RTC_IRQHandler /* 71: RTC interrupt */ - .long GpTimer0_IRQHandler /* 72: General Purpose Timer0 */ - .long GpTimer1_IRQHandler /* 73: General Purpose Timer1 */ - .long PWM_1_IRQHandler /* 74: PWM1 interrupt */ - .long PWM_2_IRQHandler /* 75: PWM2 interrupt */ - .long GPIO_Combined_NS_IRQHandler /* 76: GPIO Combined Non-secure interrupt */ - .long SDIO_IRQHandler /* 77: SDIO interrupt handler */ - .long 0 /* 78 Reserved */ - .long 0 /* 79 Reserved */ - .long 0 /* 80 Reserved */ - .long 0 /* 81 Reserved */ - .long 0 /* 82 Reserved */ - .long 0 /* 83 Reserved */ - .long CryptoSS_Reset_Status_IRQHandler /* 84: Crypto SS reset status */ - .long HostMHUS0_Int_Acc_NR2R_IRQHandler /* 85: MHU0 Sender IRQ not-ready to ready */ - .long HostMHUS0_Int_Acc_R2NR_IRQHandler /* 86: MHU0 Sender IRQ ready to not ready */ - .long HostMHUR0_IRQ_Reg0_IRQHandler /* 87: MHU0 Receiver IRQ Register 0 */ - .long HostMHUR0_IRQ_Reg1_IRQHandler /* 88: MHU0 Receiver IRQ Register 1 */ - .long HostMHUR0_IRQComb_IRQHandler /* 89: MHU0 Receiver IRQ combined */ - .long HostMHUS1_Int_Acc_NR2R_IRQHandler /* 90: MHU1 Sender IRQ not-ready to ready */ - .long HostMHUS1_Int_Acc_R2NR_IRQHandler /* 91: MHU1 Sender IRQ ready to not ready */ - .long HostMHUR1_IRQ_Reg0_IRQHandler /* 92: MHU1 Receiver IRQ Register 0 */ - .long HostMHUR1_IRQ_Reg1_IRQHandler /* 93: MHU1 Receiver IRQ Register 1 */ - .long HostMHUR1_IRQComb_IRQHandler /* 94: MHU1 Receiver IRQ combined */ - .long EFlash0_Controller_IRQHandler /* 95: GFC-100 EFlash 0 controller interrupt */ - .long EFlash1_Controller_IRQHandler /* 96: GFC-100 EFlash 1 controller interrupt */ - .long 0 /* 97:127 Reserved */ - - - .size __Vectors, . - __Vectors - - .text - .thumb - .thumb_func - .align 2 - .globl Reset_Handler - .type Reset_Handler, %function -Reset_Handler: -/* Firstly it copies data from read only memory to RAM. There are two schemes - * to copy. One can copy more than one sections. Another can only copy - * one section. The former scheme needs more instructions and read-only - * data to implement than the latter. - * Macro __STARTUP_COPY_MULTIPLE is used to choose between two schemes. */ - -#ifdef __STARTUP_COPY_MULTIPLE -/* Multiple sections scheme. - * - * Between symbol address __copy_table_start__ and __copy_table_end__, - * there are array of triplets, each of which specify: - * offset 0: LMA of start of a section to copy from - * offset 4: VMA of start of a section to copy to - * offset 8: size of the section to copy. Must be multiply of 4 - * - * All addresses must be aligned to 4 bytes boundary. - */ - ldr r4, =__copy_table_start__ - ldr r5, =__copy_table_end__ - -.L_loop0: - cmp r4, r5 - bge .L_loop0_done - ldr r1, [r4] - ldr r2, [r4, #4] - ldr r3, [r4, #8] - -.L_loop0_0: - subs r3, #4 - ittt ge - ldrge r0, [r1, r3] - strge r0, [r2, r3] - bge .L_loop0_0 - - adds r4, #12 - b .L_loop0 - -.L_loop0_done: -#else -/* Single section scheme. - * - * The ranges of copy from/to are specified by following symbols - * __etext: LMA of start of the section to copy from. Usually end of text - * __data_start__: VMA of start of the section to copy to - * __data_end__: VMA of end of the section to copy to - * - * All addresses must be aligned to 4 bytes boundary. - */ - ldr r1, =__etext - ldr r2, =__data_start__ - ldr r3, =__data_end__ - -.L_loop1: - cmp r2, r3 - ittt lt - ldrlt r0, [r1], #4 - strlt r0, [r2], #4 - blt .L_loop1 -#endif /*__STARTUP_COPY_MULTIPLE */ - -/* This part of work usually is done in C library startup code. Otherwise, - * define this macro to enable it in this startup. - * - * There are two schemes too. One can clear multiple BSS sections. Another - * can only clear one section. The former is more size expensive than the - * latter. - * - * Define macro __STARTUP_CLEAR_BSS_MULTIPLE to choose the former. - * Otherwise efine macro __STARTUP_CLEAR_BSS to choose the later. - */ -#ifdef __STARTUP_CLEAR_BSS_MULTIPLE -/* Multiple sections scheme. - * - * Between symbol address __copy_table_start__ and __copy_table_end__, - * there are array of tuples specifying: - * offset 0: Start of a BSS section - * offset 4: Size of this BSS section. Must be multiply of 4 - */ - ldr r3, =__zero_table_start__ - ldr r4, =__zero_table_end__ - -.L_loop2: - cmp r3, r4 - bge .L_loop2_done - ldr r1, [r3] - ldr r2, [r3, #4] - movs r0, 0 - -.L_loop2_0: - subs r2, #4 - itt ge - strge r0, [r1, r2] - bge .L_loop2_0 - - adds r3, #8 - b .L_loop2 -.L_loop2_done: -#elif defined (__STARTUP_CLEAR_BSS) -/* Single BSS section scheme. - * - * The BSS section is specified by following symbols - * __bss_start__: start of the BSS section. - * __bss_end__: end of the BSS section. - * - * Both addresses must be aligned to 4 bytes boundary. - */ - ldr r1, =__bss_start__ - ldr r2, =__bss_end__ - - movs r0, 0 -.L_loop3: - cmp r1, r2 - itt lt - strlt r0, [r1], #4 - blt .L_loop3 -#endif /* __STARTUP_CLEAR_BSS_MULTIPLE || __STARTUP_CLEAR_BSS */ - - cpsid i /* Disable IRQs */ - bl SystemInit - - mrs r0, control /* Get control value */ - orr r0, r0, #2 /* Select switch to PSP */ - msr control, r0 - ldr r0, =Image$$ARM_LIB_STACK$$ZI$$Limit - msr psp, r0 - -#ifndef __START -#define __START _start -#endif - bl __START - - .pool - .size Reset_Handler, . - Reset_Handler - - -/* Macro to define default handlers. */ - .macro def_irq_handler handler_name - .align 1 - .thumb_func - .weak \handler_name - \handler_name: - b \handler_name - .endm - - def_irq_handler NMI_Handler - def_irq_handler HardFault_Handler - def_irq_handler MemManage_Handler - def_irq_handler BusFault_Handler - def_irq_handler UsageFault_Handler - def_irq_handler SecureFault_Handler - def_irq_handler SVC_Handler - def_irq_handler DebugMon_Handler - def_irq_handler PendSV_Handler - def_irq_handler SysTick_Handler - - /* Core interrupts */ - def_irq_handler NS_WATCHDOG_RESET_IRQHandler /* 0: Non-Secure Watchdog Reset Request Interrupt */ - def_irq_handler NS_WATCHDOG_IRQHandler /* 1: Non-Secure Watchdog Interrupt */ - def_irq_handler S32K_TIMER_IRQHandler /* 2: S32K Timer Interrupt */ - def_irq_handler TIMER0_IRQHandler /* 3: CMSDK Timer 0 Interrupt */ - def_irq_handler TIMER1_IRQHandler /* 4: CMSDK Timer 1 Interrupt */ - def_irq_handler DUALTIMER_IRQHandler /* 5: CMSDK Dual Timer Interrupt */ - def_irq_handler MHU0_IRQHandler /* 6: Message Handling Unit 0 Interrupt */ - def_irq_handler MHU1_IRQHandler /* 7: Message Handling Unit 1 Interrupt */ - def_irq_handler CRYPTOCELL_IRQHandler /* 8: CryptoCell-312 Interrupt */ - def_irq_handler MPC_Handler /* 9: Secure Combined MPC Interrupt */ - def_irq_handler PPC_Handler /* 10: Secure Combined PPC Interrupt */ - def_irq_handler S_MSC_COMBINED_IRQHandler /* 11: Secure Combined MSC Interrupt */ - def_irq_handler S_BRIDGE_ERR_IRQHandler /* 12: Secure Bridge Error Combined Interrupt */ - def_irq_handler I_CACHE_INV_ERR_IRQHandler /* 13: Intsruction Cache Invalidation Interrupt */ - def_irq_handler SYS_PPU_IRQHandler /* 15: System PPU Interrupt */ - def_irq_handler CPU0_PPU_IRQHandler /* 16: CPU0 PPU Interrupt */ - def_irq_handler CPU1_PPU_IRQHandler /* 17: CPU1 PPU Interrupt */ - def_irq_handler CPU0_DGB_PPU_IRQHandler /* 18: CPU0 Debug PPU Interrupt */ - def_irq_handler CPU1_DGB_PPU_IRQHandler /* 19: CPU1 Debug PPU Interrupt */ - def_irq_handler RAM0_PPU_IRQHandler /* 22: RAM 0 PPU Interrupt */ - def_irq_handler RAM1_PPU_IRQHandler /* 23: RAM 1 PPU Interrupt */ - def_irq_handler RAM2_PPU_IRQHandler /* 24: RAM 2 PPU Interrupt */ - def_irq_handler RAM3_PPU_IRQHandler /* 25: RAM 3 PPU Interrupt */ - def_irq_handler DEBUG_PPU_IRQHandler /* 26: Debug PPU Interrupt */ - def_irq_handler CPU0_CTI_IRQHandler /* 28: CPU0 CTI Interrupt */ - def_irq_handler CPU1_CTI_IRQHandler /* 29: CPU1 CTI Interrupt */ - - /* External interrupts */ - def_irq_handler GpTimer_IRQHandler /* 33: General Purpose Timer */ - def_irq_handler I2C0_IRQHandler /* 34: I2C0 */ - def_irq_handler I2C1_IRQHandler /* 35: I2C1 */ - def_irq_handler I2S_IRQHandler /* 36: I2S */ - def_irq_handler SPI_IRQHandler /* 37: SPI */ - def_irq_handler QSPI_IRQHandler /* 38: QSPI */ - def_irq_handler UARTRX0_Handler /* 39: UART0 receive FIFO interrupt */ - def_irq_handler UARTTX0_Handler /* 40: UART0 transmit FIFO interrupt */ - def_irq_handler UART0_RxTimeout_IRQHandler /* 41: UART0 receive timeout interrupt */ - def_irq_handler UART0_ModemStatus_IRQHandler /* 42: UART0 modem status interrupt */ - def_irq_handler UART0_Error_IRQHandler /* 43: UART0 error interrupt */ - def_irq_handler UART0_IRQHandler /* 44: UART0 interrupt */ - def_irq_handler UARTRX1_Handler /* 45: UART0 receive FIFO interrupt */ - def_irq_handler UARTTX1_Handler /* 46: UART0 transmit FIFO interrupt */ - def_irq_handler UART1_RxTimeout_IRQHandler /* 47: UART0 receive timeout interrupt */ - def_irq_handler UART1_ModemStatus_IRQHandler /* 48: UART0 modem status interrupt */ - def_irq_handler UART1_Error_IRQHandler /* 49: UART0 error interrupt */ - def_irq_handler UART1_IRQHandler /* 50: UART0 interrupt */ - def_irq_handler GPIO_0_IRQHandler /* 51: GPIO 0 interrupt */ - def_irq_handler GPIO_1_IRQHandler /* 52: GPIO 1 interrupt */ - def_irq_handler GPIO_2_IRQHandler /* 53: GPIO 2 interrupt */ - def_irq_handler GPIO_3_IRQHandler /* 54: GPIO 3 interrupt */ - def_irq_handler GPIO_4_IRQHandler /* 55: GPIO 4 interrupt */ - def_irq_handler GPIO_5_IRQHandler /* 56: GPIO 5 interrupt */ - def_irq_handler GPIO_6_IRQHandler /* 57: GPIO 6 interrupt */ - def_irq_handler GPIO_7_IRQHandler /* 58: GPIO 7 interrupt */ - def_irq_handler GPIO_8_IRQHandler /* 59: GPIO 8 interrupt */ - def_irq_handler GPIO_9_IRQHandler /* 60: GPIO 9 interrupt */ - def_irq_handler GPIO_10_IRQHandler /* 61: GPIO 10 interrupt */ - def_irq_handler GPIO_11_IRQHandler /* 62: GPIO 11 interrupt */ - def_irq_handler GPIO_12_IRQHandler /* 63: GPIO 12 interrupt */ - def_irq_handler GPIO_13_IRQHandler /* 64: GPIO 13 interrupt */ - def_irq_handler GPIO_14_IRQHandler /* 65: GPIO 14 interrupt */ - def_irq_handler GPIO_15_IRQHandler /* 66: GPIO 15 interrupt */ - def_irq_handler GPIO_Combined_IRQHandler /* 67: GPIO Combined interrupt */ - def_irq_handler PVT_IRQHandler /* 68: PVT sensor interrupt */ - def_irq_handler PWM_0_IRQHandler /* 70: PWM0 interrupt */ - def_irq_handler RTC_IRQHandler /* 71: RTC interrupt */ - def_irq_handler GpTimer1_IRQHandler /* 72: General Purpose Timer0 */ - def_irq_handler GpTimer0_IRQHandler /* 73: General Purpose Timer1 */ - def_irq_handler PWM_1_IRQHandler /* 74: PWM1 interrupt */ - def_irq_handler PWM_2_IRQHandler /* 75: PWM2 interrupt */ - def_irq_handler GPIO_Combined_NS_IRQHandler /* 76: GPIO Combined Non-secure interrupt */ - def_irq_handler SDIO_IRQHandler /* 77: SDIO interrupt handler */ - def_irq_handler CryptoSS_Reset_Status_IRQHandler /* 84: Crypto SS reset status */ - def_irq_handler HostMHUS0_Int_Acc_NR2R_IRQHandler /* 85: MHU0 Sender IRQ not-ready to ready */ - def_irq_handler HostMHUS0_Int_Acc_R2NR_IRQHandler /* 86: MHU0 Sender IRQ ready to not ready */ - def_irq_handler HostMHUR0_IRQ_Reg0_IRQHandler /* 87: MHU0 Receiver IRQ Register 0 */ - def_irq_handler HostMHUR0_IRQ_Reg1_IRQHandler /* 88: MHU0 Receiver IRQ Register 1 */ - def_irq_handler HostMHUR0_IRQComb_IRQHandler /* 89: MHU0 Receiver IRQ combined */ - def_irq_handler HostMHUS1_Int_Acc_NR2R_IRQHandler /* 90: MHU1 Sender IRQ not-ready to ready */ - def_irq_handler HostMHUS1_Int_Acc_R2NR_IRQHandler /* 91: MHU1 Sender IRQ ready to not ready */ - def_irq_handler HostMHUR1_IRQ_Reg0_IRQHandler /* 92: MHU1 Receiver IRQ Register 0 */ - def_irq_handler HostMHUR1_IRQ_Reg1_IRQHandler /* 93: MHU1 Receiver IRQ Register 1 */ - def_irq_handler HostMHUR1_IRQComb_IRQHandler /* 94: MHU1 Receiver IRQ combined */ - def_irq_handler EFlash0_Controller_IRQHandler /* 95: GFC-100 EFlash 0 controller interrupt */ - def_irq_handler EFlash1_Controller_IRQHandler /* 96: GFC-100 EFlash 1 controller interrupt */ - - - .end diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpc_sie_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpc_sie_drv.c deleted file mode 100644 index 23dbf50acf4..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpc_sie_drv.c +++ /dev/null @@ -1,791 +0,0 @@ -/* - * Copyright (c) 2016-2020 Arm Limited. All rights reserved. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ -#include "mpc_sie_drv.h" - -#include -#include - -#include "cmsis_compiler.h" - -/* Values for hardware version in PIDR0 reg */ -#define SIE200 0x60 -#define SIE300 0x65 - -#define MPC_SIE_BLK_CFG_OFFSET 5U - -/* Defines with numbering (eg: SIE300) are only relevant to the given SIE - * version. Defines without the numbering are applicable to all SIE versions. - */ - -/* CTRL register bit indexes */ -#define MPC_SIE200_CTRL_SEC_RESP (1UL << 4UL) /* MPC fault triggers a - * bus error - */ -#define MPC_SIE300_CTRL_GATE_REQ (1UL << 6UL) /* Request for gating - * incoming transfers - */ -#define MPC_SIE300_CTRL_GATE_ACK (1UL << 7UL) /* Acknowledge for gating - * incoming transfers - */ -#define MPC_SIE_CTRL_AUTOINCREMENT (1UL << 8UL) /* BLK_IDX auto increment */ -#define MPC_SIE300_CTRL_SEC_RESP (1UL << 16UL) /* Response type when SW - * asks to gate the transfer - */ -#define MPC_SIE300_CTRL_GATE_PRESENT (1UL << 23UL) /* Gating feature present */ -#define MPC_SIE_CTRL_SEC_LOCK_DOWN (1UL << 31UL) /* MPC Security lock down */ - -/* PIDR register bit masks */ -#define MPC_PIDR0_SIE_VERSION_MASK ((1UL << 8UL) - 1UL) - -/* ARM MPC interrupt */ -#define MPC_SIE_INT_BIT (1UL) - -/* Error code returned by the internal driver functions */ -enum mpc_sie_intern_error_t { - MPC_SIE_INTERN_ERR_NONE = MPC_SIE_ERR_NONE, - MPC_SIE_INTERN_ERR_NOT_IN_RANGE = MPC_SIE_ERR_NOT_IN_RANGE, - MPC_SIE_INTERN_ERR_NOT_ALIGNED = MPC_SIE_ERR_NOT_ALIGNED, - MPC_SIE_INTERN_ERR_INVALID_RANGE = MPC_SIE_ERR_INVALID_RANGE, - MPC_INTERN_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE = - MPC_SIE_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE, - /* Calculated block index - * is higher than the maximum allowed by the MPC. It should never - * happen unless the controlled ranges of the MPC are misconfigured - * in the driver or if the IP has not enough LUTs to cover the - * range, due to wrong reported block size for example. - */ - MPC_SIE_INTERN_ERR_BLK_IDX_TOO_HIGH = -1, - -}; - -/* ARM MPC memory mapped register access structure */ -struct mpc_sie_reg_map_t { - volatile uint32_t ctrl; /* (R/W) MPC Control */ - volatile uint32_t reserved[3];/* Reserved */ - volatile uint32_t blk_max; /* (R/ ) Maximum value of block based index */ - volatile uint32_t blk_cfg; /* (R/ ) Block configuration */ - volatile uint32_t blk_idx; /* (R/W) Index value for accessing block - * based look up table - */ - volatile uint32_t blk_lutn; /* (R/W) Block based gating - * Look Up Table (LUT) - */ - volatile uint32_t int_stat; /* (R/ ) Interrupt state */ - volatile uint32_t int_clear; /* ( /W) Interrupt clear */ - volatile uint32_t int_en; /* (R/W) Interrupt enable */ - volatile uint32_t int_info1; /* (R/ ) Interrupt information 1 */ - volatile uint32_t int_info2; /* (R/ ) Interrupt information 2 */ - volatile uint32_t int_set; /* ( /W) Interrupt set. Debug purpose only */ - volatile uint32_t reserved2[998]; /* Reserved */ - volatile uint32_t pidr4; /* (R/ ) Peripheral ID 4 */ - volatile uint32_t pidr5; /* (R/ ) Peripheral ID 5 */ - volatile uint32_t pidr6; /* (R/ ) Peripheral ID 6 */ - volatile uint32_t pidr7; /* (R/ ) Peripheral ID 7 */ - volatile uint32_t pidr0; /* (R/ ) Peripheral ID 0 */ - volatile uint32_t pidr1; /* (R/ ) Peripheral ID 1 */ - volatile uint32_t pidr2; /* (R/ ) Peripheral ID 2 */ - volatile uint32_t pidr3; /* (R/ ) Peripheral ID 3 */ - volatile uint32_t cidr0; /* (R/ ) Component ID 0 */ - volatile uint32_t cidr1; /* (R/ ) Component ID 1 */ - volatile uint32_t cidr2; /* (R/ ) Component ID 2 */ - volatile uint32_t cidr3; /* (R/ ) Component ID 3 */ -}; - -/* - * Checks if the address is controlled by the MPC and returns - * the range index in which it is contained. - * - * \param[in] dev MPC device to initialize \ref mpc_sie_dev_t - * \param[in] addr Address to check if it is controlled by MPC. - * \param[out] addr_range Range index in which it is contained. - * - * \return True if the base is controller by the range list, false otherwise. - */ -static uint32_t is_ctrl_by_range_list( - struct mpc_sie_dev_t* dev, - uint32_t addr, - const struct mpc_sie_memory_range_t** addr_range) -{ - uint32_t i; - const struct mpc_sie_memory_range_t* range; - - for(i = 0; i < dev->data->nbr_of_ranges; i++) { - range = dev->data->range_list[i]; - if(addr >= range->base && addr <= range->limit) { - *addr_range = range; - return 1; - } - } - return 0; -} - -/* - * Gets the masks selecting the bits in the LUT of the MPC corresponding - * to the base address (included) up to the limit address (included) - * - * \param[in] mpc_dev The MPC device. - * \param[in] base Address in a range controlled by this MPC - * (included), aligned on block size. - * \param[in] limit Address in a range controlled by this MPC - * (included), aligned on block size. - * \param[out] range Memory range in which the base address and - * limit are. - * \param[out] first_word_idx Index of the first touched word in the LUT. - * \param[out] nr_words Number of words used in the LUT. If 1, only - * first_word_mask is valid and limit_word_mask - * must not be used. - * \param[out] first_word_mask First word mask in the LUT will be stored here. - * \param[out] limit_word_mask Limit word mask in the LUT will be stored here. - * - * \return Returns error code as specified in \ref mpc_sie_intern_error_t - */ -static enum mpc_sie_intern_error_t get_lut_masks( - struct mpc_sie_dev_t* dev, - const uint32_t base, const uint32_t limit, - const struct mpc_sie_memory_range_t** range, - uint32_t *first_word_idx, - uint32_t *nr_words, - uint32_t *first_word_mask, - uint32_t *limit_word_mask) -{ - const struct mpc_sie_memory_range_t* base_range; - uint32_t block_size; - uint32_t base_block_idx; - uint32_t base_word_idx; - uint32_t blk_max; - const struct mpc_sie_memory_range_t* limit_range; - uint32_t limit_block_idx; - uint32_t limit_word_idx; - uint32_t mask; - uint32_t norm_base; - uint32_t norm_limit; - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - /* - * Check that the addresses are within the controlled regions - * of this MPC - */ - if(!is_ctrl_by_range_list(dev, base, &base_range) || - !is_ctrl_by_range_list(dev, limit, &limit_range)) { - return MPC_SIE_INTERN_ERR_NOT_IN_RANGE; - } - - /* Base and limit should be part of the same range */ - if(base_range != limit_range) { - return MPC_SIE_INTERN_ERR_INVALID_RANGE; - } - *range = base_range; - - block_size = (1 << (p_mpc->blk_cfg + MPC_SIE_BLK_CFG_OFFSET)); - - /* Base and limit+1 addresses must be aligned on the MPC block size */ - if(base % block_size || (limit+1) % block_size) { - return MPC_SIE_INTERN_ERR_NOT_ALIGNED; - } - - /* - * Get a normalized address that is an offset from the beginning - * of the lowest range controlled by the MPC - */ - norm_base = (base - base_range->base) + base_range->range_offset; - norm_limit = (limit - base_range->base) + base_range->range_offset; - - /* - * Calculate block index and to which 32 bits word it belongs - */ - limit_block_idx = norm_limit/block_size; - limit_word_idx = limit_block_idx/32; - - base_block_idx = norm_base/block_size; - base_word_idx = base_block_idx/32; - - if(base_block_idx > limit_block_idx) { - return MPC_SIE_INTERN_ERR_INVALID_RANGE; - } - - /* Transmit the information to the caller */ - *nr_words = limit_word_idx - base_word_idx + 1; - *first_word_idx = base_word_idx; - - /* Limit to the highest block that can be configured */ - blk_max = p_mpc->blk_max; - - if((limit_word_idx > blk_max) || (base_word_idx > blk_max)) { - return MPC_SIE_INTERN_ERR_BLK_IDX_TOO_HIGH; - } - - /* - * Create the mask for the first word to only select the limit N bits - */ - *first_word_mask = ~((1 << (base_block_idx % 32)) - 1); - - /* - * Create the mask for the limit word to select only the first M bits. - */ - *limit_word_mask = (1 << ((limit_block_idx+1) % 32)) - 1; - /* - * If limit_word_mask is 0, it means that the limit touched block index is - * the limit in its word, so the limit word mask has all its bits selected - */ - if(*limit_word_mask == 0) { - *limit_word_mask = 0xFFFFFFFF; - } - - /* - * If the blocks to configure are all packed in one word, only - * touch this word. - * Code using the computed masks should test if this mask - * is non-zero, and if so, only use this one instead of the limit_word_mask - * and first_word_mask. - * As the only bits that are the same in both masks are the 1 that we want - * to select, just use XOR to extract them. - */ - if(base_word_idx == limit_word_idx) { - mask = ~(*first_word_mask ^ *limit_word_mask); - *first_word_mask = mask; - *limit_word_mask = mask; - } - - return MPC_SIE_INTERN_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_init(struct mpc_sie_dev_t* dev, - const struct mpc_sie_memory_range_t** range_list, - uint8_t nbr_of_ranges) -{ - if((range_list == NULL) || (nbr_of_ranges == 0)) { - return MPC_SIE_INVALID_ARG; - } - - dev->data->sie_version = get_sie_version(dev); - - if ((dev->data->sie_version != SIE200) && - (dev->data->sie_version != SIE300)) { - return MPC_SIE_UNSUPPORTED_HARDWARE_VERSION; - } - - dev->data->range_list = range_list; - dev->data->nbr_of_ranges = nbr_of_ranges; - dev->data->is_initialized = true; - - return MPC_SIE_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_get_block_size(struct mpc_sie_dev_t* dev, - uint32_t* blk_size) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - if(blk_size == 0) { - return MPC_SIE_INVALID_ARG; - } - - /* Calculate the block size in byte according to the manual */ - *blk_size = (1 << (p_mpc->blk_cfg + MPC_SIE_BLK_CFG_OFFSET)); - - return MPC_SIE_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_config_region(struct mpc_sie_dev_t* dev, - const uint32_t base, - const uint32_t limit, - enum mpc_sie_sec_attr_t attr) -{ - enum mpc_sie_intern_error_t error; - uint32_t first_word_idx; - uint32_t first_word_mask; - uint32_t i; - uint32_t limit_word_mask; - uint32_t limit_word_idx; - uint32_t nr_words; - const struct mpc_sie_memory_range_t* range; - uint32_t word_value; - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - /* Get the bitmasks used to select the bits in the LUT */ - error = get_lut_masks(dev, base, limit, &range, &first_word_idx, &nr_words, - &first_word_mask, &limit_word_mask); - - limit_word_idx = first_word_idx + nr_words - 1; - - if(error != MPC_SIE_INTERN_ERR_NONE) { - /* Map internal error code lower than 0 to a generic errpr */ - if(error < 0) { - return MPC_SIE_ERR_INVALID_RANGE; - } - return (enum mpc_sie_error_t)error; - } - - /* - * The memory range should allow accesses in with the wanted security - * attribute if it requires special attribute for successful accesses - */ - if(range->attr != attr) { - return MPC_SIE_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE; - } - - /* - * Starts changing actual configuration so issue DMB to ensure every - * transaction has completed by now - */ - __DMB(); - - /* Set the block index to the first word that will be updated */ - p_mpc->blk_idx = first_word_idx; - - /* If only one word needs to be touched in the LUT */ - if(nr_words == 1) { - word_value = p_mpc->blk_lutn; - if(attr == MPC_SIE_SEC_ATTR_NONSECURE) { - word_value |= first_word_mask; - } else { - word_value &= ~first_word_mask; - } - - /* - * Set the index again because full word read or write could have - * incremented it - */ - p_mpc->blk_idx = first_word_idx; - p_mpc->blk_lutn = word_value; - - /* Commit the configuration change */ - __DSB(); - __ISB(); - - return MPC_SIE_ERR_NONE; - } - - /* First word */ - word_value = p_mpc->blk_lutn; - if(attr == MPC_SIE_SEC_ATTR_NONSECURE) { - word_value |= first_word_mask; - } else { - word_value &= ~first_word_mask; - } - /* - * Set the index again because full word read or write could have - * incremented it - */ - p_mpc->blk_idx = first_word_idx; - /* Partially configure the first word */ - p_mpc->blk_lutn = word_value; - - /* Fully configure the intermediate words if there are any */ - for(i=first_word_idx+1; iblk_idx = i; - if(attr == MPC_SIE_SEC_ATTR_NONSECURE) { - p_mpc->blk_lutn = 0xFFFFFFFF; - } else { - p_mpc->blk_lutn = 0x00000000; - } - } - - /* Partially configure the limit word */ - p_mpc->blk_idx = limit_word_idx; - word_value = p_mpc->blk_lutn; - if(attr == MPC_SIE_SEC_ATTR_NONSECURE) { - word_value |= limit_word_mask; - } else { - word_value &= ~limit_word_mask; - } - p_mpc->blk_idx = limit_word_idx; - p_mpc->blk_lutn = word_value; - - /* Commit the configuration change */ - __DSB(); - __ISB(); - - return MPC_SIE_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_get_region_config( - struct mpc_sie_dev_t* dev, - uint32_t base, uint32_t limit, - enum mpc_sie_sec_attr_t* attr) -{ - enum mpc_sie_sec_attr_t attr_prev; - uint32_t block_size; - uint32_t block_size_mask; - enum mpc_sie_intern_error_t error; - uint32_t first_word_idx; - uint32_t first_word_mask; - uint32_t i; - uint32_t limit_word_idx; - uint32_t limit_word_mask; - uint32_t nr_words; - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - const struct mpc_sie_memory_range_t* range; - uint32_t word_value; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - if(attr == 0) { - return MPC_SIE_INVALID_ARG; - } - - /* - * Initialize the security attribute to mixed in case of early - * termination of this function. A caller that does not check the - * returned error will act as if it does not know anything about the - * region queried, which is the safest bet - */ - *attr = MPC_SIE_SEC_ATTR_MIXED; - - /* - * If the base and limit are not aligned, align them and make sure - * that the resulting region fully includes the original region - */ - block_size = (1 << (p_mpc->blk_cfg + MPC_SIE_BLK_CFG_OFFSET)); - - block_size_mask = block_size - 1; - base &= ~(block_size_mask); - limit &= ~(block_size_mask); - limit += block_size - 1; /* Round to the upper block address, - * and then remove one to get the preceding - * address. - */ - - /* Get the bitmasks used to select the bits in the LUT */ - error = get_lut_masks(dev, base, limit, &range, &first_word_idx, &nr_words, - &first_word_mask, &limit_word_mask); - - limit_word_idx = first_word_idx+nr_words - 1; - - if(error != MPC_SIE_INTERN_ERR_NONE) { - /* Map internal error code lower than 0 to generic error */ - if(error < 0) { - return MPC_SIE_ERR_INVALID_RANGE; - } - return (enum mpc_sie_error_t)error; - } - - /* Set the block index to the first word that will be updated */ - p_mpc->blk_idx = first_word_idx; - - /* If only one word needs to be touched in the LUT */ - if(nr_words == 1) { - word_value = p_mpc->blk_lutn; - word_value &= first_word_mask; - if(word_value == 0) { - *attr = MPC_SIE_SEC_ATTR_SECURE; - /* - * If there are differences between the mask and the word value, - * it means that the security attributes of blocks are mixed - */ - } else if(word_value ^ first_word_mask) { - *attr = MPC_SIE_SEC_ATTR_MIXED; - } else { - *attr = MPC_SIE_SEC_ATTR_NONSECURE; - } - return MPC_SIE_ERR_NONE; - } - - /* Get the partial configuration of the first word */ - word_value = p_mpc->blk_lutn & first_word_mask; - if(word_value == 0x00000000) { - *attr = MPC_SIE_SEC_ATTR_SECURE; - } else if(word_value ^ first_word_mask) { - *attr = MPC_SIE_SEC_ATTR_MIXED; - /* - * Bail out as the security attribute will be the same regardless - * of the configuration of other blocks - */ - return MPC_SIE_ERR_NONE; - } else { - *attr = MPC_SIE_SEC_ATTR_NONSECURE; - } - /* - * Store the current found attribute, to check that all the blocks indeed - * have the same security attribute. - */ - attr_prev = *attr; - - /* Get the configuration of the intermediate words if there are any */ - for(i=first_word_idx+1; iblk_idx = i; - word_value = p_mpc->blk_lutn; - if(word_value == 0x00000000) { - *attr = MPC_SIE_SEC_ATTR_SECURE; - } else if(word_value == 0xFFFFFFFF) { - *attr = MPC_SIE_SEC_ATTR_NONSECURE; - } else { - *attr = MPC_SIE_SEC_ATTR_MIXED; - return MPC_SIE_ERR_NONE; - } - - /* If the attribute is different than the one found before, bail out */ - if(*attr != attr_prev) { - *attr = MPC_SIE_SEC_ATTR_MIXED; - return MPC_SIE_ERR_NONE; - } - attr_prev = *attr; - } - - /* Get the partial configuration of the limit word */ - p_mpc->blk_idx = limit_word_idx; - word_value = p_mpc->blk_lutn & limit_word_mask; - if(word_value == 0x00000000) { - *attr = MPC_SIE_SEC_ATTR_SECURE; - } else if(word_value ^ first_word_mask) { - *attr = MPC_SIE_SEC_ATTR_MIXED; - return MPC_SIE_ERR_NONE; - } else { - *attr = MPC_SIE_SEC_ATTR_NONSECURE; - } - - if(*attr != attr_prev) { - *attr = MPC_SIE_SEC_ATTR_MIXED; - return MPC_SIE_ERR_NONE; - } - - return MPC_SIE_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_get_ctrl(struct mpc_sie_dev_t* dev, - uint32_t* ctrl_val) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - if(ctrl_val == 0) { - return MPC_SIE_INVALID_ARG; - } - - *ctrl_val = p_mpc->ctrl; - - return MPC_SIE_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_set_ctrl(struct mpc_sie_dev_t* dev, - uint32_t mpc_ctrl) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - p_mpc->ctrl = mpc_ctrl; - - return MPC_SIE_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_get_sec_resp(struct mpc_sie_dev_t* dev, - enum mpc_sie_sec_resp_t* sec_rep) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - bool gating_present = false; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - if(sec_rep == NULL) { - return MPC_SIE_INVALID_ARG; - } - - if (dev->data->sie_version == SIE200) { - if(p_mpc->ctrl & MPC_SIE200_CTRL_SEC_RESP) { - *sec_rep = MPC_SIE_RESP_BUS_ERROR; - } else { - *sec_rep = MPC_SIE_RESP_RAZ_WI; - } - - } else if (dev->data->sie_version == SIE300) { - mpc_sie_is_gating_present(dev, &gating_present); - if (!gating_present) { - return MPC_SIE_ERR_GATING_NOT_PRESENT; - } - - if(p_mpc->ctrl & MPC_SIE300_CTRL_SEC_RESP) { - /* MPC returns a BUS ERROR response */ - *sec_rep = MPC_SIE_RESP_BUS_ERROR; - } else { - /* MPC sets the ready signals LOW, which stalls any transactions */ - *sec_rep = MPC_SIE_RESP_WAIT_GATING_DISABLED; - } - } else { - return MPC_SIE_UNSUPPORTED_HARDWARE_VERSION; - } - - return MPC_SIE_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_set_sec_resp(struct mpc_sie_dev_t* dev, - enum mpc_sie_sec_resp_t sec_rep) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - bool gating_present = false; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - if (dev->data->sie_version == SIE200) { - if (sec_rep == MPC_SIE_RESP_BUS_ERROR) { - p_mpc->ctrl |= MPC_SIE200_CTRL_SEC_RESP; - } else if (sec_rep == MPC_SIE_RESP_RAZ_WI) { - p_mpc->ctrl &= ~MPC_SIE200_CTRL_SEC_RESP; - } else { - return MPC_SIE_INVALID_ARG; - } - - } else if (dev->data->sie_version == SIE300) { - mpc_sie_is_gating_present(dev, &gating_present); - if (!gating_present) { - return MPC_SIE_ERR_GATING_NOT_PRESENT; - } - - if (sec_rep == MPC_SIE_RESP_BUS_ERROR) { - p_mpc->ctrl |= MPC_SIE300_CTRL_SEC_RESP; - } else if (sec_rep == MPC_SIE_RESP_WAIT_GATING_DISABLED) { - p_mpc->ctrl &= ~MPC_SIE300_CTRL_SEC_RESP; - } else { - return MPC_SIE_INVALID_ARG; - } - - } else { - return MPC_SIE_UNSUPPORTED_HARDWARE_VERSION; - } - - return MPC_SIE_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_irq_enable(struct mpc_sie_dev_t* dev) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - p_mpc->int_en |= MPC_SIE_INT_BIT; - - return MPC_SIE_ERR_NONE; -} - -void mpc_sie_irq_disable(struct mpc_sie_dev_t* dev) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - p_mpc->int_en &= ~MPC_SIE_INT_BIT; -} - -void mpc_sie_clear_irq(struct mpc_sie_dev_t* dev) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - p_mpc->int_clear = MPC_SIE_INT_BIT; -} - -uint32_t mpc_sie_irq_state(struct mpc_sie_dev_t* dev) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - return (p_mpc->int_stat & MPC_SIE_INT_BIT); -} - -enum mpc_sie_error_t mpc_sie_lock_down(struct mpc_sie_dev_t* dev) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - p_mpc->ctrl |= (MPC_SIE_CTRL_AUTOINCREMENT - | MPC_SIE_CTRL_SEC_LOCK_DOWN); - - return MPC_SIE_ERR_NONE; -} - -enum mpc_sie_error_t mpc_sie_is_gating_present(struct mpc_sie_dev_t* dev, - bool* gating_present) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - if(dev->data->is_initialized != true) { - return MPC_SIE_NOT_INIT; - } - - if (dev->data->sie_version != SIE300) { - return MPC_SIE_UNSUPPORTED_HARDWARE_VERSION; - } - - *gating_present = (bool)(p_mpc->ctrl & MPC_SIE300_CTRL_GATE_PRESENT); - - return MPC_SIE_ERR_NONE; -} - -uint32_t get_sie_version(struct mpc_sie_dev_t* dev) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - return p_mpc->pidr0 & MPC_PIDR0_SIE_VERSION_MASK; -} - -bool mpc_sie_get_gate_ack(struct mpc_sie_dev_t* dev) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - return (bool)(p_mpc->ctrl & MPC_SIE300_CTRL_GATE_ACK); -} - -void mpc_sie_request_gating(struct mpc_sie_dev_t* dev) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - p_mpc->ctrl |= MPC_SIE300_CTRL_GATE_REQ; -} - -void mpc_sie_release_gating(struct mpc_sie_dev_t* dev) -{ - struct mpc_sie_reg_map_t* p_mpc = - (struct mpc_sie_reg_map_t*)dev->cfg->base; - - p_mpc->ctrl &= ~MPC_SIE300_CTRL_GATE_REQ; -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpc_sie_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpc_sie_drv.h deleted file mode 100644 index 279d9a6371b..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpc_sie_drv.h +++ /dev/null @@ -1,354 +0,0 @@ -/* - * Copyright (c) 2016-2020 Arm Limited. All rights reserved. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - * \file mpc_sie_drv.h - * \brief Generic driver for ARM SIE Memory Protection - * Controllers (MPC). - */ - -#ifndef __MPC_SIE__DRV_H__ -#define __MPC_SIE__DRV_H__ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* Error code returned by the driver functions */ -enum mpc_sie_error_t { - MPC_SIE_ERR_NONE, /*!< No error */ - MPC_SIE_INVALID_ARG, /*!< MPC invalid input arguments */ - MPC_SIE_NOT_INIT, /*!< MPC not initialized */ - MPC_SIE_ERR_NOT_IN_RANGE, /*!< Address does not belong to a range - * controlled by the MPC */ - MPC_SIE_ERR_NOT_ALIGNED, /*!< Address is not aligned on the block size - * of this MPC - */ - MPC_SIE_ERR_INVALID_RANGE, /*!< The given address range to configure - * is invalid. This could be because: - * - The base and limit swapped - * - The base and limit addresses - * are in different ranges - */ - MPC_SIE_ERR_RANGE_SEC_ATTR_NON_COMPATIBLE, /*!< The given range cannot be - * accessed with the wanted - * security attributes - */ - MPC_SIE_UNSUPPORTED_HARDWARE_VERSION, /*!< MPC hardware version read from - * PIDR0 is not supported - */ - MPC_SIE_ERR_GATING_NOT_PRESENT /*!< MPC gating not present in HW */ -}; - -/* Security attribute used in various place of the API */ -enum mpc_sie_sec_attr_t { - MPC_SIE_SEC_ATTR_SECURE, /*!< Secure attribute */ - MPC_SIE_SEC_ATTR_NONSECURE, /*!< Non-secure attribute */ - /*!< Used when getting the configuration of a memory range and some blocks - * are secure whereas some other are non secure - */ - MPC_SIE_SEC_ATTR_MIXED, -}; - -/* What can happen when trying to do an illegal memory access */ -enum mpc_sie_sec_resp_t { - MPC_SIE_RESP_RAZ_WI, /*!< Read As Zero, Write Ignored */ - MPC_SIE_RESP_BUS_ERROR, /*!< Bus error */ - MPC_SIE_RESP_WAIT_GATING_DISABLED /*!< Wait until gating is disabled */ -}; - -/* Description of a memory range controlled by the MPC */ -struct mpc_sie_memory_range_t { - const uint32_t base; /*!< Base address (included in the range) */ - const uint32_t limit; /*!< Limit address (included in the range) */ - const uint32_t range_offset; /*!< Offset of current range area to the 0 - * point of the whole area (the sum of the - * sizes of the previous memory ranges - * covered by the same MPC) - */ - const enum mpc_sie_sec_attr_t attr; /*!< Optional security attribute - * needed to be matched when - * accessing this range. - * For example, the non-secure - * alias of a memory region can not - * be accessed using secure access, - * and configuring the MPC to - * secure using that range will not - * be permitted by the driver. - */ -}; - -/* ARM MPC SIE device configuration structure */ -struct mpc_sie_dev_cfg_t { - const uint32_t base; /*!< MPC base address */ -}; - -/* ARM MPC SIE device data structure */ -struct mpc_sie_dev_data_t { - /*!< Array of pointers to memory ranges controlled by the MPC */ - const struct mpc_sie_memory_range_t** range_list; - uint8_t nbr_of_ranges; /*!< Number of memory ranges in the list */ - bool is_initialized; /*!< Indicates if the MPC driver - * is initialized and enabled - */ - uint32_t sie_version; /*!< SIE version */ -}; - -/* ARM MPC SIE device structure */ -struct mpc_sie_dev_t { - const struct mpc_sie_dev_cfg_t* const cfg; /*!< MPC configuration */ - struct mpc_sie_dev_data_t* const data; /*!< MPC data */ -}; - -/** - * \brief Initializes a MPC device. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * \param[in] range_list List of memory ranges controller by the MPC - * (\ref mpc_sie_memory_range_t). This list can not - * freed after the initializations. - * \param[in] nbr_of_ranges Number of memory ranges - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_init(struct mpc_sie_dev_t* dev, - const struct mpc_sie_memory_range_t** range_list, - uint8_t nbr_of_ranges); - -/** - * \brief Gets MPC block size. All regions must be aligned on this block - * size (base address and limit+1 address). - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * \param[out] blk_size MPC block size - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_get_block_size(struct mpc_sie_dev_t* dev, - uint32_t* blk_size); - -/** - * \brief Configures a memory region (base and limit included). - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * \param[in] base Base address of the region to poll. This bound is - * included. It does not need to be aligned in any way. - * - * \param[in] limit Limit address of the region to poll. This bound is - * included. (limit+1) does not need to be aligned - * in any way. - * \param[in] attr Security attribute of the region. If the region has mixed - * secure/non-secure, a special value is returned - * (\ref mpc_sie_sec_attr_t). - * - * In case base and limit+1 addresses are not aligned on - * the block size, the enclosing region with base and - * limit+1 aligned on block size will be queried. - * In case of early termination of the function (error), the - * security attribute will be set to MPC_SIE_ATTR_MIXED. - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_config_region(struct mpc_sie_dev_t* dev, - const uint32_t base, - const uint32_t limit, - enum mpc_sie_sec_attr_t attr); - -/** - * \brief Gets a memory region configuration(base and limit included). - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * \param[in] base Base address of the region to get the configuration. - * \param[in] limit Limit address of the region to get the configuration. - * \param[out] attr Security attribute of the region - * \ref mpc_sie_sec_attr_t - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_get_region_config(struct mpc_sie_dev_t* dev, - uint32_t base, - uint32_t limit, - enum mpc_sie_sec_attr_t* attr); - -/** - * \brief Gets the MPC control value. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * \param[out] ctrl_val Current MPC control value. - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_get_ctrl(struct mpc_sie_dev_t* dev, - uint32_t* ctrl_val); - -/** - * \brief Sets the MPC control value. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * \param[in] mpc_ctrl New MPC control value - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_set_ctrl(struct mpc_sie_dev_t* dev, - uint32_t mpc_ctrl); - -/** - * \brief Gets the configured secure response. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * \param[out] sec_rep Configured secure response (\ref mpc_sie_sec_resp_t). - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_get_sec_resp(struct mpc_sie_dev_t* dev, - enum mpc_sie_sec_resp_t* sec_rep); - -/** - * \brief Sets the response type when SW asks to gate the incoming transfers. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * \param[in] sec_rep Secure response to configure (\ref mpc_sie_sec_resp_t). - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_set_sec_resp(struct mpc_sie_dev_t* dev, - enum mpc_sie_sec_resp_t sec_rep); - -/** - * \brief Enables MPC interrupt. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_irq_enable(struct mpc_sie_dev_t* dev); - -/** - * \brief Disables MPC interrupt - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void mpc_sie_irq_disable(struct mpc_sie_dev_t* dev); - -/** - * \brief Clears MPC interrupt. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void mpc_sie_clear_irq(struct mpc_sie_dev_t* dev); - -/** - * \brief Returns the MPC interrupt state. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * - * \return Returns 1 if the interrupt is active, 0 otherwise. - * - * \note This function doesn't check if dev is NULL. - */ -uint32_t mpc_sie_irq_state(struct mpc_sie_dev_t* dev); - -/** - * \brief Locks down the MPC configuration. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_lock_down(struct mpc_sie_dev_t* dev); - -/** - * \brief Returns if gating is present in hardware. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * \param[out] gating_present Returns if gating is present in hardware. - * - * \return Returns error code as specified in \ref mpc_sie_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpc_sie_error_t mpc_sie_is_gating_present(struct mpc_sie_dev_t* dev, - bool* gating_present); - -/** - * \brief Returns the value of Peripheral ID 0 register. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * - * \return Returns the value of Peripheral ID 0 register. - * - * \note This function doesn't check if dev is NULL. - */ -uint32_t get_sie_version(struct mpc_sie_dev_t* dev); - -/** - * \brief Reads bit indicating acknowledge for gating incoming transfers. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * - * \return True if acknowledge is set. - * - * \note This function doesn't check if dev is NULL. - */ -bool mpc_sie_get_gate_ack(struct mpc_sie_dev_t* dev); - -/** - * \brief Sets bit to request for gating incoming transfers. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void mpc_sie_request_gating(struct mpc_sie_dev_t* dev); - -/** - * \brief Clears bit to request for gating incoming transfers. - * - * \param[in] dev MPC device \ref mpc_sie_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void mpc_sie_release_gating(struct mpc_sie_dev_t* dev); - -#ifdef __cplusplus -} -#endif -#endif /* __MPC_SIE_DRV_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpu_armv8m_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpu_armv8m_drv.c deleted file mode 100644 index ad9efab9cee..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpu_armv8m_drv.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include "mpu_armv8m_drv.h" -#include "cmsis.h" - -/* - * FixMe: - * This is a beta quality driver for MPU in v8M. To be finalized. - */ - -enum mpu_armv8m_error_t mpu_armv8m_enable(struct mpu_armv8m_dev_t *dev, - uint32_t privdef_en, - uint32_t hfnmi_en) -{ - /*No error checking*/ - - MPU_Type *mpu = (MPU_Type *)dev->base; - - /* - * FixMe: Set 3 pre-defined MAIR_ATTR for memory. The attributes come - * from default memory map, need to check if fine-tune is necessary. - * - * MAIR0_0: Peripheral, Device-nGnRE. - * MAIR0_1: Code, WT RA. Same attr for Outer and Inner. - * MAIR0_2: SRAM, WBWA RA. Same attr for Outer and Inner. - */ - mpu->MAIR0 = (MPU_ARMV8M_MAIR_ATTR_DEVICE_VAL << MPU_MAIR0_Attr0_Pos) | - (MPU_ARMV8M_MAIR_ATTR_CODE_VAL << MPU_MAIR0_Attr1_Pos) | - (MPU_ARMV8M_MAIR_ATTR_DATA_VAL << MPU_MAIR0_Attr2_Pos); - - mpu->CTRL = - (privdef_en ? MPU_CTRL_PRIVDEFENA_Msk : 0) | - (hfnmi_en ? MPU_CTRL_HFNMIENA_Msk : 0); - - /*Ensure all configuration is written before enable*/ - - mpu->CTRL |= MPU_CTRL_ENABLE_Msk; - - /* Enable MPU before next instruction */ - __DSB(); - __ISB(); - return MPU_ARMV8M_OK; -} - -enum mpu_armv8m_error_t mpu_armv8m_disable(struct mpu_armv8m_dev_t *dev) -{ - MPU_Type *mpu = (MPU_Type *)dev->base; - - /* Reset all fields as enable does full setup */ - mpu->CTRL = 0; - - return MPU_ARMV8M_OK; -} - - -enum mpu_armv8m_error_t mpu_armv8m_region_enable( - struct mpu_armv8m_dev_t *dev, - struct mpu_armv8m_region_cfg_t *region_cfg) -{ - MPU_Type *mpu = (MPU_Type *)dev->base; - - enum mpu_armv8m_error_t ret_val = MPU_ARMV8M_OK; - uint32_t ctrl_before; - uint32_t base_cfg; - uint32_t limit_cfg; - - /*FIXME : Add complete error checking*/ - if ((region_cfg->region_base & ~MPU_RBAR_BASE_Msk) != 0) { - return MPU_ARMV8M_ERROR; - } - /* region_limit doesn't need to be aligned but the scatter - * file needs to be setup to ensure that partitions do not overlap. - */ - - ctrl_before = mpu->CTRL; - mpu->CTRL = 0; - - mpu->RNR = region_cfg->region_nr & MPU_RNR_REGION_Msk; - - /* This 0s the lower bits of the base address */ - base_cfg = region_cfg->region_base & MPU_RBAR_BASE_Msk; - base_cfg |= (region_cfg->attr_sh << MPU_RBAR_SH_Pos) & MPU_RBAR_SH_Msk; - base_cfg |= (region_cfg->attr_access << MPU_RBAR_AP_Pos) & MPU_RBAR_AP_Msk; - base_cfg |= (region_cfg->attr_exec << MPU_RBAR_XN_Pos) & MPU_RBAR_XN_Msk; - - mpu->RBAR = base_cfg; - - /*This 0s the lower bits of base address but they are treated as 1 */ - limit_cfg = (region_cfg->region_limit-1) & MPU_RLAR_LIMIT_Msk; - - limit_cfg |= (region_cfg->region_attridx << MPU_RLAR_AttrIndx_Pos) & - MPU_RLAR_AttrIndx_Msk; - - limit_cfg |= MPU_RLAR_EN_Msk; - - mpu->RLAR = limit_cfg; - - /*Restore main MPU control*/ - mpu->CTRL = ctrl_before; - - /* Enable MPU before the next instruction */ - __DSB(); - __ISB(); - - return ret_val; -} - - -enum mpu_armv8m_error_t mpu_armv8m_region_disable( - struct mpu_armv8m_dev_t *dev, - uint32_t region_nr) -{ - - MPU_Type *mpu = (MPU_Type *)dev->base; - - enum mpu_armv8m_error_t ret_val = MPU_ARMV8M_OK; - uint32_t ctrl_before; - - /*FIXME : Add complete error checking*/ - - ctrl_before = mpu->CTRL; - mpu->CTRL = 0; - - mpu->RNR = region_nr & MPU_RNR_REGION_Msk; - - mpu->RBAR = 0; - mpu->RLAR = 0; - - /*Restore main MPU control*/ - mpu->CTRL = ctrl_before; - - return ret_val; -} - -enum mpu_armv8m_error_t mpu_armv8m_clean(struct mpu_armv8m_dev_t *dev) -{ - MPU_Type *mpu = (MPU_Type *)dev->base; - uint32_t i = (mpu->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos; - - while (i > 0) { - mpu_armv8m_region_disable(dev, i-1); - i--; - } - - return MPU_ARMV8M_OK; - -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpu_armv8m_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpu_armv8m_drv.h deleted file mode 100644 index d427604f38e..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/mpu_armv8m_drv.h +++ /dev/null @@ -1,143 +0,0 @@ -/* - * Copyright (c) 2017-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __MPU_ARMV8M_DRV_H__ -#define __MPU_ARMV8M_DRV_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -#define PRIVILEGED_DEFAULT_ENABLE 1 -#define HARDFAULT_NMI_ENABLE 1 - -/* MAIR_ATTR */ -#define MPU_ARMV8M_MAIR_ATTR_DEVICE_VAL 0x04 -#define MPU_ARMV8M_MAIR_ATTR_DEVICE_IDX 0 -#define MPU_ARMV8M_MAIR_ATTR_CODE_VAL 0xAA -#define MPU_ARMV8M_MAIR_ATTR_CODE_IDX 1 -#define MPU_ARMV8M_MAIR_ATTR_DATA_VAL 0xFF -#define MPU_ARMV8M_MAIR_ATTR_DATA_IDX 2 - -struct mpu_armv8m_dev_t { - const uint32_t base; -}; - -enum mpu_armv8m_error_t { - MPU_ARMV8M_OK, - MPU_ARMV8M_ERROR -}; - -enum mpu_armv8m_attr_exec_t { - MPU_ARMV8M_XN_EXEC_OK, - MPU_ARMV8M_XN_EXEC_NEVER -}; - -enum mpu_armv8m_attr_access_t { - MPU_ARMV8M_AP_RW_PRIV_ONLY, - MPU_ARMV8M_AP_RW_PRIV_UNPRIV, - MPU_ARMV8M_AP_RO_PRIV_ONLY, - MPU_ARMV8M_AP_RO_PRIV_UNPRIV -}; - -enum mpu_armv8m_attr_shared_t { - MPU_ARMV8M_SH_NONE, - MPU_ARMV8M_SH_UNUSED, - MPU_ARMV8M_SH_OUTER, - MPU_ARMV8M_SH_INNER -}; - -struct mpu_armv8m_region_cfg_t { - uint32_t region_nr; - uint32_t region_base; - uint32_t region_limit; - uint32_t region_attridx; - enum mpu_armv8m_attr_exec_t attr_exec; - enum mpu_armv8m_attr_access_t attr_access; - enum mpu_armv8m_attr_shared_t attr_sh; -}; - -struct mpu_armv8m_region_cfg_raw_t { - uint32_t region_nr; - uint32_t region_base; - uint32_t region_limit; -}; - - -/** - * \brief Enable MPU - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * \param[in] privdef_en privilege default region 1:enable 0:disable - * \param[in] hfnmi_en mpu for hard fault & nmi 1:enable 0:disable - * - * \return Error code \ref mpu_armv8m_error_t - * - * \note This function doesn't check if dev is NULL. - */ - -enum mpu_armv8m_error_t mpu_armv8m_enable(struct mpu_armv8m_dev_t *dev, - uint32_t privdef_en, - uint32_t hfnmi_en); - -/** - * \brief Disable MPU - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * - * \return Error code \ref arm_mpu_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpu_armv8m_error_t mpu_armv8m_disable(struct mpu_armv8m_dev_t *dev); - -/** - * \brief Disable MPU and clean all regions - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * - * \return Error code \ref arm_mpu_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpu_armv8m_error_t mpu_armv8m_clean(struct mpu_armv8m_dev_t *dev); - -/** - * \brief Enable MPU Region - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * \param[in] region_cfg MPU region config \ref mpu_armv8m_region_cfg_t - * - * \return Error code \ref arm_mpu_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpu_armv8m_error_t mpu_armv8m_region_enable( - struct mpu_armv8m_dev_t *dev, - struct mpu_armv8m_region_cfg_t *region_cfg); - -/** - * \brief Disable MPU Region - * - * \param[in] dev MPU device \ref mpu_armv8m_dev_t - * \param[in] region_nr Region number - * - * \return Error code \ref arm_mpu_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum mpu_armv8m_error_t mpu_armv8m_region_disable( - struct mpu_armv8m_dev_t *dev, - uint32_t region_nr); - -#ifdef __cplusplus -} -#endif - -#endif /* __MPU_ARMV8M_DRV_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/ppc_sse200_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/ppc_sse200_drv.c deleted file mode 100644 index dda05506dbd..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/ppc_sse200_drv.c +++ /dev/null @@ -1,347 +0,0 @@ -/* - * Copyright (c) 2017-2019 Arm Limited. All rights reserved. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "ppc_sse200_drv.h" - -/* SPCTRL PPCs control memory mapped registers access structure */ -struct arm_spctrl_ppc_sse200_t { - volatile uint32_t reserved[8]; - volatile uint32_t secppcintstat; /* Secure PPC Interrupt Status */ - volatile uint32_t secppcintclr; /* Secure PPC Interrupt Clear */ - volatile uint32_t secppcinten; /* Secure PPC Interrupt Enable */ - volatile uint32_t reserved1[9]; - volatile uint32_t ahbnsppc0; /* Non-Secure Access AHB slave Peripheral - * Protection Control #0 - */ - volatile uint32_t reserved2[3]; /* Reserved for Future Non-secure Access - * AHB Slave Peripheral Protection Control - */ - volatile uint32_t ahbnsppcexp0; /* Expansion 0 Non_Secure Access AHB - * slave Peripheral Protection Control - */ - volatile uint32_t ahbnsppcexp1; /* Expansion 1 Non_Secure Access AHB - * slave Peripheral Protection Control - */ - volatile uint32_t ahbnsppcexp2; /* Expansion 2 Non_Secure Access AHB - * slave Peripheral Protection Control - */ - volatile uint32_t ahbnsppcexp3; /* Expansion 3 Non_Secure Access AHB - * slave Peripheral Protection Control - */ - volatile uint32_t apbnsppc0; /* Non-Secure Access APB slave Peripheral - * Protection Control 0 - */ - volatile uint32_t apbnsppc1; /* Non-Secure Access APB slave Peripheral - * Protection Control 1 - */ - volatile uint32_t reserved3[2]; /* Non-Secure Access APB slave Peripheral - * Protection Control [3:1] - */ - volatile uint32_t apbnsppcexp0; /* Expansion 0 Non_Secure Access APB - * slave Peripheral Protection Control - */ - volatile uint32_t apbnsppcexp1; /* Expansion 1 Non_Secure Access APB - * slave Peripheral Protection Control - */ - volatile uint32_t apbnsppcexp2; /* Expansion 2 Non_Secure Access APB - * slave Peripheral Protection Control - */ - volatile uint32_t apbnsppcexp3; /* Expansion 3 Non_Secure Access APB - * slave Peripheral Protection Control - */ - volatile uint32_t ahbspppc0; /* Secure Unprivileged Access AHB slave - * Peripheral Protection Control 0 - */ - volatile uint32_t reserved4[3]; /* Reserved for Future Secure Unprivileged - * Access AHB slave Peripheral Protection - * Control - */ - volatile uint32_t ahbspppcexp0; /* Expansion 0 Secure Unprivileged Access - * AHB slave Peripheral Protection Control - */ - volatile uint32_t ahbspppcexp1; /* Expansion 1 Secure Unprivileged Access - * AHB slave Peripheral Protection Control - */ - volatile uint32_t ahbspppcexp2; /* Expansion 2 Secure Unprivileged Access - * AHB slave Peripheral Protection Control - */ - volatile uint32_t ahbspppcexp3; /* Expansion 3 Secure Unprivileged Access - * AHB slave Peripheral Protection Control - */ - volatile uint32_t apbspppc0; /* Secure Unprivileged Access APB slave - * Peripheral 0 - */ - volatile uint32_t apbspppc1; /* Secure Unprivileged Access APB slave - * Peripheral 1 - */ - volatile uint32_t reserved5[2]; /* Reserved for Future Secure Unprivileged - * Access APB slave Peripheral Protection - * Control - */ - volatile uint32_t apbspppcexp0; /* Expansion 0 Secure Unprivileged Access - * APB slave Peripheral Protection - * Control - */ - volatile uint32_t apbspppcexp1; /* Expansion 1 Secure Unprivileged Access - * APB slave Peripheral Protection - * Control - */ - volatile uint32_t apbspppcexp2; /* Expansion 2 Secure Unprivileged Access - * APB slave Peripheral Protection - * Control - */ - volatile uint32_t apbspppcexp3; /* Expansion 3 Secure Unprivileged Access - * APB slave Peripheral Protection - * Control - */ -}; - -/* NSPCTRL PPCs memory mapped register access structure */ -struct arm_nspctrl_ppc_sse200_t { - volatile uint32_t reserved[36]; - volatile uint32_t ahbnspppc0; - volatile uint32_t reserved1[3]; - volatile uint32_t ahbnspppcexp0; - volatile uint32_t ahbnspppcexp1; - volatile uint32_t ahbnspppcexp2; - volatile uint32_t ahbnspppcexp3; - volatile uint32_t apbnspppc0; - volatile uint32_t apbnspppc1; - volatile uint32_t reserved2[2]; - volatile uint32_t apbnspppcexp0; - volatile uint32_t apbnspppcexp1; - volatile uint32_t apbnspppcexp2; - volatile uint32_t apbnspppcexp3; -}; - -/* PPC interrupt position mask */ -#define APB_PPC0_INT_POS_MASK (1UL << 0) -#define APB_PPC1_INT_POS_MASK (1UL << 1) -/* Reserved bits 2:3 */ -#define APB_PPCEXP0_INT_POS_MASK (1UL << 4) -#define APB_PPCEXP1_INT_POS_MASK (1UL << 5) -#define APB_PPCEXP2_INT_POS_MASK (1UL << 6) -#define APB_PPCEXP3_INT_POS_MASK (1UL << 7) -/* Reserved bits 8:15 */ -#define AHB_PPC0_INT_POS_MASK (1UL << 16) -/* Reserved bits 17:19 */ -#define AHB_PPCEXP0_INT_POS_MASK (1UL << 20) -#define AHB_PPCEXP1_INT_POS_MASK (1UL << 21) -#define AHB_PPCEXP2_INT_POS_MASK (1UL << 22) -#define AHB_PPCEXP3_INT_POS_MASK (1UL << 23) -/* Reserved bits 24:31 */ - -/* ARM PPC state definitions */ -#define PPC_SSE200_INITIALIZED (1 << 0) - -/* Default peripheral states */ -#define SECURE_AS_DEFAULT_PERIPHERAL_STATE 1 -#define PRIVILEGE_ONLY_AS_DEFAULT_PERIPHERAL_STATE 1 - -void ppc_sse200_init(struct ppc_sse200_dev_t* dev, - enum ppc_sse200_name_t ppc_name) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - struct arm_nspctrl_ppc_sse200_t* p_nspctrl = - (struct arm_nspctrl_ppc_sse200_t*)dev->cfg->nspctrl_base; - - switch(ppc_name) { - case AHB_PPC0: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppc0; - dev->data->p_sp_ppc = &p_spctrl->ahbspppc0; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppc0; - dev->data->int_bit_mask = AHB_PPC0_INT_POS_MASK; - break; - case AHB_PPC_EXP0: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppcexp0; - dev->data->p_sp_ppc = &p_spctrl->ahbspppcexp0; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppcexp0; - dev->data->int_bit_mask = AHB_PPCEXP0_INT_POS_MASK; - break; - case AHB_PPC_EXP1: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppcexp1; - dev->data->p_sp_ppc = &p_spctrl->ahbspppcexp1; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppcexp1; - dev->data->int_bit_mask = AHB_PPCEXP1_INT_POS_MASK; - break; - case AHB_PPC_EXP2: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppcexp2; - dev->data->p_sp_ppc = &p_spctrl->ahbspppcexp2; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppcexp2; - dev->data->int_bit_mask = AHB_PPCEXP2_INT_POS_MASK; - break; - case AHB_PPC_EXP3: - dev->data->p_ns_ppc = &p_spctrl->ahbnsppcexp3; - dev->data->p_sp_ppc = &p_spctrl->ahbspppcexp3; - dev->data->p_nsp_ppc = &p_nspctrl->ahbnspppcexp3; - dev->data->int_bit_mask = AHB_PPCEXP3_INT_POS_MASK; - break; - case APB_PPC0: - dev->data->p_ns_ppc = &p_spctrl->apbnsppc0; - dev->data->p_sp_ppc = &p_spctrl->apbspppc0; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppc0; - dev->data->int_bit_mask = APB_PPC0_INT_POS_MASK; - break; - case APB_PPC1: - dev->data->p_ns_ppc = &p_spctrl->apbnsppc1; - dev->data->p_sp_ppc = &p_spctrl->apbspppc1; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppc1; - dev->data->int_bit_mask = APB_PPC1_INT_POS_MASK; - break; - case APB_PPC_EXP0: - dev->data->p_ns_ppc = &p_spctrl->apbnsppcexp0; - dev->data->p_sp_ppc = &p_spctrl->apbspppcexp0; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppcexp0; - dev->data->int_bit_mask = APB_PPCEXP0_INT_POS_MASK; - break; - case APB_PPC_EXP1: - dev->data->p_ns_ppc = &p_spctrl->apbnsppcexp1; - dev->data->p_sp_ppc = &p_spctrl->apbspppcexp1; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppcexp1; - dev->data->int_bit_mask = APB_PPCEXP1_INT_POS_MASK; - break; - case APB_PPC_EXP2: - dev->data->p_ns_ppc = &p_spctrl->apbnsppcexp2; - dev->data->p_sp_ppc = &p_spctrl->apbspppcexp2; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppcexp2; - dev->data->int_bit_mask = APB_PPCEXP2_INT_POS_MASK; - break; - case APB_PPC_EXP3: - dev->data->p_ns_ppc = &p_spctrl->apbnsppcexp3; - dev->data->p_sp_ppc = &p_spctrl->apbspppcexp3; - dev->data->p_nsp_ppc = &p_nspctrl->apbnspppcexp3; - dev->data->int_bit_mask = APB_PPCEXP3_INT_POS_MASK; - break; - /* default: The default is not defined intentionally to force the - * compiler to check that all enumeration values are - * covered in the switch. - */ - } - - dev->data->state = PPC_SSE200_INITIALIZED; -} - -enum ppc_sse200_error_t ppc_sse200_config_peripheral( - struct ppc_sse200_dev_t* dev, - uint8_t periph, - enum ppc_sse200_sec_attr_t sec_attr, - enum ppc_sse200_priv_attr_t priv_attr) -{ - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return PPC_SSE200_NOT_INIT; - } - - if(sec_attr == PPC_SSE200_SECURE_ONLY) { - /* Sets secure attribute */ - *(dev->data->p_ns_ppc) &= ~(1U << periph); - - /* Uses secure unprivileged access address (SPCTRL) to set privilege - * attribute - */ - if(priv_attr == PPC_SSE200_PRIV_ONLY) { - *(dev->data->p_sp_ppc) &= ~(1U << periph); - } else { - *(dev->data->p_sp_ppc) |= (1U << periph); - } - } else { - /* Sets secure attribute */ - *(dev->data->p_ns_ppc) |= (1U << periph); - - /* Uses non-secure unprivileged access address (NSPCTRL) to set - * privilege attribute - */ - if(priv_attr == PPC_SSE200_PRIV_ONLY) { - *(dev->data->p_nsp_ppc) &= ~(1U << periph); - } else { - *(dev->data->p_nsp_ppc) |= (1U << periph); - } - } - - return PPC_SSE200_ERR_NONE; -} - -uint32_t ppc_sse200_is_periph_secure(struct ppc_sse200_dev_t* dev, - uint8_t periph) -{ - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return SECURE_AS_DEFAULT_PERIPHERAL_STATE; - } - - return ((*(dev->data->p_ns_ppc) & (1U << periph)) == 0); -} - -uint32_t ppc_sse200_is_periph_priv_only(struct ppc_sse200_dev_t* dev, - uint8_t periph) -{ - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return PRIVILEGE_ONLY_AS_DEFAULT_PERIPHERAL_STATE; - } - - if ((*(dev->data->p_ns_ppc) & (1U << periph)) == 0) { - /* Returns secure unprivileged access address (SPCTRL) */ - return ((*(dev->data->p_sp_ppc) & (1U << periph)) == 0); - } else { - /* Returns non-secure unprivileged access address (NSPCTRL) */ - return ((*(dev->data->p_nsp_ppc) & (1U << periph)) == 0); - } -} - -enum ppc_sse200_error_t ppc_sse200_irq_enable(struct ppc_sse200_dev_t* dev) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return PPC_SSE200_NOT_INIT; - } - - p_spctrl->secppcinten |= dev->data->int_bit_mask; - - return PPC_SSE200_ERR_NONE; -} - -void ppc_sse200_irq_disable(struct ppc_sse200_dev_t* dev) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - - if(dev->data->state == PPC_SSE200_INITIALIZED) { - p_spctrl->secppcinten &= ~(dev->data->int_bit_mask); - } -} - -void ppc_sse200_clear_irq(struct ppc_sse200_dev_t* dev) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - - if(dev->data->state == PPC_SSE200_INITIALIZED) { - p_spctrl->secppcintclr = dev->data->int_bit_mask; - } -} - -uint32_t ppc_sse200_irq_state(struct ppc_sse200_dev_t* dev) -{ - struct arm_spctrl_ppc_sse200_t* p_spctrl = - (struct arm_spctrl_ppc_sse200_t*)dev->cfg->spctrl_base; - - if(dev->data->state != PPC_SSE200_INITIALIZED) { - return 0; - } - - return ((p_spctrl->secppcintstat & dev->data->int_bit_mask) != 0); -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/ppc_sse200_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/ppc_sse200_drv.h deleted file mode 100644 index 7a08a8f9fe5..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/ppc_sse200_drv.h +++ /dev/null @@ -1,201 +0,0 @@ -/* - * Copyright (c) 2017-2019 Arm Limited. All rights reserved. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - * \file ppc_sse200_drv.h - * \brief Generic driver for ARM SEE 200 Peripheral Protection - * Controllers (PPC). - */ - -#ifndef __PPC_SSE_200_DRV_H__ -#define __PPC_SSE_200_DRV_H__ - -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/* Secure Privilege Control Block aka SPCTRL */ -/* Non-Secure Privilege Control Block aka NSPCTRL */ - -/* ARM TrustZone PPC device configuration structure */ -struct ppc_sse200_dev_cfg_t { - uint32_t const spctrl_base; /*!< SPCTRL base address */ - uint32_t const nspctrl_base; /*!< NSPCTRL base address */ -}; - -/* ARM TrustZone PPC device data structure */ -struct ppc_sse200_dev_data_t { - volatile uint32_t* p_ns_ppc; /*!< Pointer to non-secure register */ - volatile uint32_t* p_sp_ppc; /*!< Pointer to secure unprivileged - * register - */ - volatile uint32_t* p_nsp_ppc; /*!< Pointer to non-secure unprivileged - * register - */ - uint32_t int_bit_mask; /*!< Interrupt bit mask */ - uint8_t state; /*!< Indicates if the PPC driver - * is initialized - */ - uint8_t reserved[3]; /*!< 32 bits alignment */ -}; - -/* ARM PPC device structure */ -struct ppc_sse200_dev_t { - const struct ppc_sse200_dev_cfg_t* const cfg; /*!< PPC configuration */ - struct ppc_sse200_dev_data_t* const data; /*!< PPC data */ -}; - -/* Security attribute used to configure the peripheral */ -enum ppc_sse200_sec_attr_t { - PPC_SSE200_SECURE_ONLY, /*! Secure access */ - PPC_SSE200_NONSECURE_ONLY, /*! Non-secure access */ -}; - -/* Privilege attribute used to configure the peripheral */ -enum ppc_sse200_priv_attr_t { - PPC_SSE200_PRIV_AND_NONPRIV, /*! Privilege and non-Privilege access */ - PPC_SSE200_PRIV_ONLY, /*! Privilege only access */ -}; - -/* ARM PPC error codes */ -enum ppc_sse200_error_t { - PPC_SSE200_ERR_NONE = 0, /*!< No error */ - PPC_SSE200_NOT_INIT, /*!< PPC not initialized */ -}; - -/* ARM PPC names */ -enum ppc_sse200_name_t { - AHB_PPC0 = 0, /*!< AHB PPC0 */ - AHB_PPC_EXP0, /*!< Expansion 0 AHB PPC */ - AHB_PPC_EXP1, /*!< Expansion 1 AHB PPC */ - AHB_PPC_EXP2, /*!< Expansion 2 AHB PPC */ - AHB_PPC_EXP3, /*!< Expansion 3 AHB PPC */ - APB_PPC0, /*!< APB PPC0 */ - APB_PPC1, /*!< APB PPC1 */ - APB_PPC_EXP0, /*!< Expansion 0 APB PPC */ - APB_PPC_EXP1, /*!< Expansion 1 APB PPC */ - APB_PPC_EXP2, /*!< Expansion 2 APB PPC */ - APB_PPC_EXP3 /*!< Expansion 3 APB PPC */ -}; - -/** - * \brief Initialize the PPC device. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * \param[in] ppc_name PPC name \ref ppc_sse200_name_t - * - * \note This function doesn't check if dev is NULL. - */ -void ppc_sse200_init(struct ppc_sse200_dev_t* dev, - enum ppc_sse200_name_t ppc_name); - -/** - * \brief Configures the PPC device. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * \param[in] periph Peripheral position in the PPC. - * \param[in] sec_attr Secure attribute value. - * \param[in] priv_attr Privilege attribute value. - * - * \return Returns error code as specified in \ref ppc_sse200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum ppc_sse200_error_t ppc_sse200_config_peripheral( - struct ppc_sse200_dev_t* dev, - uint8_t periph, - enum ppc_sse200_sec_attr_t sec_attr, - enum ppc_sse200_priv_attr_t priv_attr); -/** - * \brief Checks if the peripheral is configured as secure or non-secure. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * \param[in] periph Peripheral position in the PPC. - * - * \return Returns 1 for secure and 0 for non-secure. - * If the driver is not initialized the return value is 1 (secure) as - * it is the default system configuration. - * - * \note This function doesn't check if dev is NULL. - */ -uint32_t ppc_sse200_is_periph_secure(struct ppc_sse200_dev_t* dev, - uint8_t periph); - -/** - * \brief Checks if the peripheral is configured as Privilege only or - * Privilege and non-Privilege access mode. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * \param[in] periph Peripheral position in the PPC. - * - * \return Returns 1 for Privilege only configuration and 0 for Privilege and - * non-Privilege access. - * If the driver is not initialized the return of this function is - * 1 (Privilege only) as it is the default system configuration. - * - * \note This function doesn't check if dev is NULL. - */ -uint32_t ppc_sse200_is_periph_priv_only(struct ppc_sse200_dev_t* dev, - uint8_t periph); -/** - * \brief Enables PPC interrupt. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * - * \return Returns error code as specified in \ref ppc_sse200_error_t - * - * \note This function doesn't check if dev is NULL. - */ -enum ppc_sse200_error_t ppc_sse200_irq_enable(struct ppc_sse200_dev_t* dev); - -/** - * \brief Disables PPC interrupt. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void ppc_sse200_irq_disable(struct ppc_sse200_dev_t* dev); - -/** - * \brief Clears PPC interrupt. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * - * \note This function doesn't check if dev is NULL. - */ -void ppc_sse200_clear_irq(struct ppc_sse200_dev_t* dev); - -/** - * \brief Returns the PPC interrupt state. - * - * \param[in] dev PPC device \ref ppc_sse200_dev_t - * - * \return Returns 1 if the interrupt is active and otherwise 0. - * If the driver is not initialized the return of this function is - * 0 (not active) as it is the default system configuration. - * - * \note This function doesn't check if dev is NULL. - */ -uint32_t ppc_sse200_irq_state(struct ppc_sse200_dev_t* dev); - -#ifdef __cplusplus -} -#endif - -#endif /* __PPC_SSE_200_DRV_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/qspi_ip6514e_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/qspi_ip6514e_drv.c deleted file mode 100644 index bb13a4219bf..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/qspi_ip6514e_drv.c +++ /dev/null @@ -1,755 +0,0 @@ -/* - * Copyright (c) 2018-2019 Arm Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include -#include -#include -/* Use memcpy */ -#include - -#include "qspi_ip6514e_drv.h" - -/** Setter bit manipulation macro */ -#define SET_BIT(WORD, BIT_INDEX) ((WORD) |= (1U << (BIT_INDEX))) -/** Clearing bit manipulation macro */ -#define CLR_BIT(WORD, BIT_INDEX) ((WORD) &= ~(1U << (BIT_INDEX))) -/** Getter bit manipulation macro */ -#define GET_BIT(WORD, BIT_INDEX) (bool)(((WORD) & (1U << (BIT_INDEX)))) - -#define WORD_ALIGN_4B_MASK 0x3U /* Mask the first 2 bits */ -#define IS_ADDR_ALIGNED(ADDR) (((uint32_t)(ADDR) & (WORD_ALIGN_4B_MASK)) == 0U) - -#define BITS_PER_BYTE 8U -#define BITS_PER_WORD 32U - -#define CFG_READS true -#define CFG_WRITES false - -#define ARG_NOT_USED 0 -#define ARG_PTR_NOT_USED NULL - -#define DATA_REG_NUMBER 2U -#define DATA_REG_LOWER 0U -#define DATA_REG_UPPER 1U - -#define ERROR_VALUE 0xFFFFFFFFU - -/** - * \brief QSPI IP6514E register map structure - */ -struct _qspi_ip6514e_reg_map_t { - volatile uint32_t qspi_cfg; /*!< 0x00 (R/W) */ - volatile uint32_t device_read_inst; /*!< 0x04 (R/W) */ - volatile uint32_t device_write_inst; /*!< 0x08 (R/W) */ - volatile uint32_t hidden1[2]; - volatile uint32_t device_size; /*!< 0x14 (R/W) */ - volatile uint32_t hidden2[3]; - volatile uint32_t remap_addr; /*!< 0x24 (R/W) */ - volatile uint32_t hidden3[26]; - volatile uint32_t flash_cmd_ctrl; /*!< 0x90 (R/W) */ - volatile uint32_t flash_cmd_addr; /*!< 0x94 (R/W) */ - volatile uint32_t hidden4[2]; - volatile uint32_t flash_cmd_read_data_lower; /*!< 0xA0 (R/ ) */ - volatile uint32_t flash_cmd_read_data_upper; /*!< 0xA4 (R/ ) */ - volatile uint32_t flash_cmd_write_data_lower; /*!< 0xA8 (R/W) */ - volatile uint32_t flash_cmd_write_data_upper; /*!< 0xAC (R/W) */ - volatile uint32_t hidden5[2]; -}; - -/** QSPI Configuration register description (offset 0x00) */ -#define QSPI_CFG_ENABLE_POS 0U -#define QSPI_CFG_ENABLE_ADDR_REMAP_POS 16U -#define QSPI_CFG_BAUD_DIV_POS 19U - #define QSPI_CFG_BAUD_DIV_MIN 2U - #define QSPI_CFG_BAUD_DIV_MAX 32U - #define QSPI_CFG_BAUD_DIV_BITS 4U -#define QSPI_CFG_IDLE_POS 31U - -/** - * Device Read/Write Instruction registers description (offset 0x04 and 0x08). - * These values are the same for the Device Read Instruction register at offset - * 0x04 and the Device Write Instruction register at offset 0x08. - */ -#define DEVICE_READ_WRITE_INST_OPCODE_POS 0U -#define DEVICE_READ_INST_INST_TYPE_POS 8U /* Only applies to the Read - * register. */ -#define DEVICE_READ_WRITE_INST_ADDR_TYPE_POS 12U -#define DEVICE_READ_WRITE_INST_DATA_TYPE_POS 16U - #define DEVICE_READ_WRITE_INST_MODE_QSPI 2U - #define DEVICE_READ_WRITE_INST_MODE_DSPI 1U - #define DEVICE_READ_WRITE_INST_MODE_SPI 0U - #define DEVICE_READ_WRITE_INST_MODE_BITS 2U -#define DEVICE_READ_WRITE_INST_DUMMY_CYCLES_POS 24U - #define DEVICE_READ_WRITE_INST_DUMMY_CYCLES_BITS 5U - #define DEVICE_READ_WRITE_INST_DUMMY_CYCLES_MAX 31U - -/** Device Size Configuration register description (offset 0x14) */ -#define DEVICE_SIZE_ADDR_BYTES_POS 0U - #define DEVICE_SIZE_ADDR_BYTES_MIN 1U - #define DEVICE_SIZE_ADDR_BYTES_MAX 16U - #define DEVICE_SIZE_ADDR_BYTES_BITS 4U -#define DEVICE_SIZE_PAGE_BYTES_POS 4U - #define DEVICE_SIZE_PAGE_BYTES_MAX 4095U - #define DEVICE_SIZE_PAGE_BYTES_BITS 12U - -/** Flash Command Control register description (offset 0x90) */ -#define FLASH_CMD_CTRL_EXECUTE_POS 0U -#define FLASH_CMD_CTRL_BUSY_POS 1U -#define FLASH_CMD_CTRL_DUMMY_CYCLES_POS 7U - #define FLASH_CMD_CTRL_DUMMY_CYCLES_MAX 31U - #define FLASH_CMD_CTRL_DUMMY_CYCLES_BITS 5U -#define FLASH_CMD_CTRL_WRITE_BYTES_POS 12U - #define FLASH_CMD_CTRL_WRITE_BYTES_MAX 8U - #define FLASH_CMD_CTRL_WRITE_BYTES_BITS 3U -#define FLASH_CMD_CTRL_WRITE_ENABLE_POS 15U -#define FLASH_CMD_CTRL_ADDR_BYTES_POS 16U - #define FLASH_CMD_CTRL_ADDR_BYTES_MAX 4U - #define FLASH_CMD_CTRL_ADDR_BYTES_BITS 2U -#define FLASH_CMD_CTRL_ADDR_ENABLE_POS 19U -#define FLASH_CMD_CTRL_READ_BYTES_POS 20U - #define FLASH_CMD_CTRL_READ_BYTES_MAX 8U - #define FLASH_CMD_CTRL_READ_BYTES_BITS 3U -#define FLASH_CMD_CTRL_READ_ENABLE_POS 23U -#define FLASH_CMD_CTRL_OPCODE_POS 24U - -/** Default register values of the QSPI Flash controller */ -#define QSPI_CFG_REG_RESET_VALUE (0x80080080U) -#define DEVICE_READ_INSTR_REG_RESET_VALUE (0x080220EBU) -#define DEVICE_WRITE_INSTR_REG_RESET_VALUE (0x00000002U) -#define DEVICE_SIZE_CFG_REG_RESET_VALUE (0x00101002U) -#define REMAP_ADDR_REG_RESET_VALUE (0x00000000U) -#define FLASH_CMD_CONTROL_REG_RESET_VALUE (0x00000000U) -#define FLASH_CMD_ADDRESS_REG_RESET_VALUE (0x00000000U) -#define FLASH_CMD_WRITE_DATA_REG_RESET_VALUE (0x00000000U) - -/** - * \brief Change specific bits in a 32 bits word. - * - * \param[in,out] word Pointer of the word to change - * \param[in] bits bits_length bits to put at bits_pos in the word - * pointed - * \param[in] bits_length Number of bits to change - * \param[in] bits_pos Position of the bits to change - * - * \note This function will do nothing if the parameters given are incorret: - * * word is NULL - * * bits_length + bits_pos > 32 - * * bits_length is 0 - */ -static void change_bits_in_word(volatile uint32_t *word, - uint32_t bits, - uint32_t bits_length, - uint32_t bits_pos) -{ - uint32_t mask; - - if ((word == NULL) || - ((bits_length + bits_pos) > BITS_PER_WORD) || - (bits_length == 0U)) { - /* Silently fail */ - return; - } - - /* Change all the bits */ - if (bits_length == BITS_PER_WORD) { - *word = bits; - return; - } - - mask = ((1U << bits_length) - 1); - /* - * We change the bits in three steps: - * - clear bits_length bits with zeroes at bits_pos in the word - * - mask bits in case it contains more than bits_length bits - * - set the new bits in the cleared word - * Because the data pointed by word is only read once, the data will still - * be coherent after an interruption that changes it. - */ - *word = ((*word & ~(mask << bits_pos)) | ((bits & mask) << bits_pos)); -} - -/** - * \brief Configure reads or writes commands for direct operations. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] opcode Read/write opcode that will be used for every - * direct read/write - * \param[in] dummy_cycles Number of dummy cycles to wait before triggering - * the command, this value must be between 0 and 31 - * (both included) - * \param[in] is_reads_cfg true to configure direct reads, false to configure - * direct writes - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - */ -static enum qspi_ip6514e_error_t qspi_ip6514e_cfg_reads_writes( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles, - bool is_reads_cfg) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - /* - * Select the good register address if we want to configure reads or writes. - */ - volatile uint32_t *device_read_write_inst_reg = is_reads_cfg ? - &(reg_map->device_read_inst) : - &(reg_map->device_write_inst); - uint32_t device_read_write_inst_reg_copy = *device_read_write_inst_reg; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - if (dummy_cycles > DEVICE_READ_WRITE_INST_DUMMY_CYCLES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - change_bits_in_word(&device_read_write_inst_reg_copy, - (uint32_t)opcode, - BITS_PER_BYTE, - DEVICE_READ_WRITE_INST_OPCODE_POS); - change_bits_in_word(&device_read_write_inst_reg_copy, - dummy_cycles, - DEVICE_READ_WRITE_INST_DUMMY_CYCLES_BITS, - DEVICE_READ_WRITE_INST_DUMMY_CYCLES_POS); - - *device_read_write_inst_reg = device_read_write_inst_reg_copy; - - return QSPI_IP6514E_ERR_NONE; -} - -/** - * \brief Given the public SPI mode enumeration, returns the private value it - * maps to in the register field. - * - * \param[in] spi_mode Read/write opcode that will be used for every direct - * read/write - * - * \return Return the correct DEVICE_READ_WRITE_INST_MODE value. - */ -static uint32_t spi_mode_field_value(enum qspi_ip6514e_spi_mode_t spi_mode) -{ - switch (spi_mode) { - case QSPI_IP6514E_SPI_MODE: - return DEVICE_READ_WRITE_INST_MODE_SPI; - case QSPI_IP6514E_DSPI_MODE: - return DEVICE_READ_WRITE_INST_MODE_DSPI; - case QSPI_IP6514E_QSPI_MODE: - return DEVICE_READ_WRITE_INST_MODE_QSPI; - default: - return ERROR_VALUE; - } -} - -bool qspi_ip6514e_is_idle(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - return GET_BIT(reg_map->qspi_cfg, QSPI_CFG_IDLE_POS); -} - -bool qspi_ip6514e_is_enabled(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - return GET_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_POS); -} - -void qspi_ip6514e_disable(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - CLR_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_POS); -} - -void qspi_ip6514e_enable(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - SET_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_POS); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_set_baud_rate_div( - struct qspi_ip6514e_dev_t* dev, - uint32_t div) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - /* div should be an even number. */ - if (((div & 1U) == 1) || - (div < QSPI_CFG_BAUD_DIV_MIN) || - (div > QSPI_CFG_BAUD_DIV_MAX)) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - /* - * The div value (between 2 and 32) needs to be stored in the register on a - * 4 bits field. - */ - change_bits_in_word(&(reg_map->qspi_cfg), - (div / 2) - 1, - QSPI_CFG_BAUD_DIV_BITS, - QSPI_CFG_BAUD_DIV_POS); - - return QSPI_IP6514E_ERR_NONE; -} - -enum qspi_ip6514e_error_t qspi_ip6514e_set_spi_mode( - struct qspi_ip6514e_dev_t* dev, - enum qspi_ip6514e_spi_mode_t inst_type, - enum qspi_ip6514e_spi_mode_t addr_type, - enum qspi_ip6514e_spi_mode_t data_type) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - uint32_t inst_spi_mode, addr_spi_mode, data_spi_mode; - /* - * A local copy of the Device Read Instruction and Device Write Instruction - * registers is used to limit APB accesses. - */ - uint32_t device_read_inst_cpy = reg_map->device_read_inst; - uint32_t device_write_inst_cpy = reg_map->device_write_inst; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - /* - * First check that the instruction mode is not SPI. If that is the case, - * the address and data mode register fields become DO NOT CARE. - */ - inst_spi_mode = spi_mode_field_value(inst_type); - if (inst_spi_mode == ERROR_VALUE) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - if (inst_type != QSPI_IP6514E_SPI_MODE) { - change_bits_in_word(&(reg_map->device_read_inst), - inst_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_INST_INST_TYPE_POS); - return QSPI_IP6514E_ERR_NONE; - } - - /* Now check and set address and data modes. */ - addr_spi_mode = spi_mode_field_value(addr_type); - data_spi_mode = spi_mode_field_value(data_type); - if ((addr_spi_mode == ERROR_VALUE) || (data_spi_mode == ERROR_VALUE)) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - /* Change the Device Read Instruction register. */ - change_bits_in_word(&device_read_inst_cpy, - inst_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_INST_INST_TYPE_POS); - change_bits_in_word(&device_read_inst_cpy, - addr_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_WRITE_INST_ADDR_TYPE_POS); - change_bits_in_word(&device_read_inst_cpy, - data_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_WRITE_INST_DATA_TYPE_POS); - - /* Change the Device Write Instruction register. */ - change_bits_in_word(&device_write_inst_cpy, - addr_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_WRITE_INST_ADDR_TYPE_POS); - change_bits_in_word(&device_write_inst_cpy, - data_spi_mode, - DEVICE_READ_WRITE_INST_MODE_BITS, - DEVICE_READ_WRITE_INST_DATA_TYPE_POS); - - /* Save the changes. */ - reg_map->device_read_inst = device_read_inst_cpy; - reg_map->device_write_inst = device_write_inst_cpy; - - return QSPI_IP6514E_ERR_NONE; -} - -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_reads(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles) -{ - return qspi_ip6514e_cfg_reads_writes(dev, opcode, dummy_cycles, CFG_READS); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_writes( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles) -{ - return qspi_ip6514e_cfg_reads_writes(dev, opcode, dummy_cycles, CFG_WRITES); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_page_size( - struct qspi_ip6514e_dev_t* dev, - uint32_t page_size) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - if (page_size > DEVICE_SIZE_PAGE_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - change_bits_in_word(&(reg_map->device_size), - page_size, - DEVICE_SIZE_PAGE_BYTES_BITS, - DEVICE_SIZE_PAGE_BYTES_POS); - - return QSPI_IP6514E_ERR_NONE; -} - -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_addr_bytes( - struct qspi_ip6514e_dev_t* dev, - uint32_t bytes_number) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - /* - * Wait for the Serial Interface and QSPI pipeline to be IDLE when - * all low level synchronization has been done. - */ - while(!qspi_ip6514e_is_idle(dev)); - - if (bytes_number < DEVICE_SIZE_ADDR_BYTES_MIN || - bytes_number > DEVICE_SIZE_ADDR_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - change_bits_in_word(&(reg_map->device_size), - bytes_number - 1, - DEVICE_SIZE_ADDR_BYTES_BITS, - DEVICE_SIZE_ADDR_BYTES_POS); - - - return QSPI_IP6514E_ERR_NONE; -} - -void qspi_ip6514e_remap_addr(struct qspi_ip6514e_dev_t* dev, uint32_t offset) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - /* Save the enable state to restore it after. */ - bool is_enabled = qspi_ip6514e_is_enabled(dev); - - if (is_enabled) { - qspi_ip6514e_disable(dev); - } - - reg_map->remap_addr = offset; - SET_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_ADDR_REMAP_POS); - - if (is_enabled) { - qspi_ip6514e_enable(dev); - } -} - -void qspi_ip6514e_disable_remap(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - /* Save the enable state to restore it after. */ - bool is_enabled = qspi_ip6514e_is_enabled(dev); - - if (is_enabled) { - qspi_ip6514e_disable(dev); - } - - CLR_BIT(reg_map->qspi_cfg, QSPI_CFG_ENABLE_ADDR_REMAP_POS); - - if (is_enabled) { - qspi_ip6514e_enable(dev); - } -} - -void qspi_ip6514e_reset_regs(struct qspi_ip6514e_dev_t* dev) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - - /* Restore the default value of the QSPI Configuration register. */ - reg_map->qspi_cfg = QSPI_CFG_REG_RESET_VALUE; - - /* Restore the default value of the Device R/W Instruction registers. */ - reg_map->device_read_inst = DEVICE_READ_INSTR_REG_RESET_VALUE; - reg_map->device_write_inst = DEVICE_WRITE_INSTR_REG_RESET_VALUE; - - /* Restore the default value of the Device Size Configuration register. */ - reg_map->device_size = DEVICE_SIZE_CFG_REG_RESET_VALUE; - - /* Restore the default value of the Remap Address register. */ - reg_map->remap_addr = REMAP_ADDR_REG_RESET_VALUE; - - /* Restore the default value of the Flash Command Control register. */ - reg_map->flash_cmd_ctrl = FLASH_CMD_CONTROL_REG_RESET_VALUE; - /* Restore the default value of the Flash Command Address register. */ - reg_map->flash_cmd_addr = FLASH_CMD_ADDRESS_REG_RESET_VALUE; - - /* Restore the default value of the Flash Command Write Data registers. */ - reg_map->flash_cmd_write_data_lower = FLASH_CMD_WRITE_DATA_REG_RESET_VALUE; - reg_map->flash_cmd_write_data_upper = FLASH_CMD_WRITE_DATA_REG_RESET_VALUE; - - /* - * This function does not affect the Flash Command Read Data registers - * which are completely Read-Only. - */ -} - -enum qspi_ip6514e_error_t qspi_ip6514e_send_cmd(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - void *read_data, - uint32_t read_len, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles) -{ - struct _qspi_ip6514e_reg_map_t *reg_map = - (struct _qspi_ip6514e_reg_map_t *)dev->cfg->base; - /* To limit APB accesses, we set this reg up locally before */ - uint32_t flash_cmd_ctrl = 0U; - bool read_requested = ((read_data != NULL) && (read_len != 0)); - bool write_requested = ((write_data != NULL) && (write_len != 0)); - bool addr_requested = (addr_bytes_number != 0); - /* - * To prevent unaligned and byte or halfbyte accesses to the APB registers, - * a word aligned buffer is used to temporary transfer the data before doing - * word accesses on these registers from that buffer. - */ - uint32_t data_regs[DATA_REG_NUMBER] = {0}; - - if (read_len > FLASH_CMD_CTRL_READ_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - if (write_len > FLASH_CMD_CTRL_WRITE_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - if (addr_bytes_number > FLASH_CMD_CTRL_ADDR_BYTES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - if (dummy_cycles > FLASH_CMD_CTRL_DUMMY_CYCLES_MAX) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - if (read_requested && write_requested) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - change_bits_in_word(&flash_cmd_ctrl, - (uint32_t)opcode, - BITS_PER_BYTE, - FLASH_CMD_CTRL_OPCODE_POS); - - /* Enable read if requested */ - if (read_requested) { - SET_BIT(flash_cmd_ctrl, FLASH_CMD_CTRL_READ_ENABLE_POS); - change_bits_in_word(&flash_cmd_ctrl, - read_len - 1, - FLASH_CMD_CTRL_READ_BYTES_BITS, - FLASH_CMD_CTRL_READ_BYTES_POS); - } - - /* Enable write if requested */ - if (write_requested) { - SET_BIT(flash_cmd_ctrl, FLASH_CMD_CTRL_WRITE_ENABLE_POS); - change_bits_in_word(&flash_cmd_ctrl, - write_len - 1, - FLASH_CMD_CTRL_WRITE_BYTES_BITS, - FLASH_CMD_CTRL_WRITE_BYTES_POS); - - if (IS_ADDR_ALIGNED(write_data) && IS_ADDR_ALIGNED(write_len)) { - /* - * Optimised case when write_data is word aligned and write_len is - * 4 or 8. - */ - reg_map->flash_cmd_write_data_lower = *(uint32_t *)write_data; - if (write_len == FLASH_CMD_CTRL_WRITE_BYTES_MAX) { - reg_map->flash_cmd_write_data_upper = - *((uint32_t *)write_data + 1); - } - } else { - /* - * data_regs is used as a buffer to only do unaligned access on the - * AHB bus and word aligned accesses to the APB registers. - */ - memcpy((void *)data_regs, write_data, write_len); - /* - * Only write_len bytes will be written even if both data registers - * are written. - */ - reg_map->flash_cmd_write_data_lower = data_regs[DATA_REG_LOWER]; - reg_map->flash_cmd_write_data_upper = data_regs[DATA_REG_UPPER]; - } - } - - /* Enable the address if requested */ - if (addr_requested) { - SET_BIT(flash_cmd_ctrl, FLASH_CMD_CTRL_ADDR_ENABLE_POS); - reg_map->flash_cmd_addr = addr; - change_bits_in_word(&flash_cmd_ctrl, - addr_bytes_number - 1, - FLASH_CMD_CTRL_ADDR_BYTES_BITS, - FLASH_CMD_CTRL_ADDR_BYTES_POS); - } - - /* Put dummy cycles number */ - change_bits_in_word(&flash_cmd_ctrl, - dummy_cycles, - FLASH_CMD_CTRL_DUMMY_CYCLES_BITS, - FLASH_CMD_CTRL_DUMMY_CYCLES_POS); - - /* Copy the Flash Command Control register and execute the command */ - reg_map->flash_cmd_ctrl = flash_cmd_ctrl; - SET_BIT(reg_map->flash_cmd_ctrl, FLASH_CMD_CTRL_EXECUTE_POS); - - /* Wait for termination */ - while (GET_BIT(reg_map->flash_cmd_ctrl, FLASH_CMD_CTRL_BUSY_POS)); - - /* - * Recolt the read data if it was requested. read_len validity has already - * been verified at this point. - */ - if (read_requested) { - if (IS_ADDR_ALIGNED(read_data) && IS_ADDR_ALIGNED(read_len)) { - /* - * Optimised case when read_data is word aligned and read_len is - * 4 or 8. - */ - *(uint32_t *)read_data = reg_map->flash_cmd_read_data_lower; - if (read_len == FLASH_CMD_CTRL_READ_BYTES_MAX) { - *((uint32_t *)read_data + 1) = - reg_map->flash_cmd_read_data_upper; - } - } else { - /* - * Only read_len bytes have been written even if both data registers - * are written. - */ - data_regs[DATA_REG_LOWER] = reg_map->flash_cmd_read_data_lower; - data_regs[DATA_REG_UPPER] = reg_map->flash_cmd_read_data_upper; - /* - * data_regs is used as a buffer to only do unaligned access on the - * AHB bus and word aligned accesses to the APB registers. - */ - memcpy(read_data, (void *)data_regs, read_len); - } - } - - return QSPI_IP6514E_ERR_NONE; -} - -void qspi_ip6514e_send_simple_cmd(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode) -{ - /* - * No read/write data, no address, no dummy cycles. - * Given the arguments, this function can not fail. - */ - (void)qspi_ip6514e_send_cmd(dev, - opcode, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - ARG_NOT_USED, - ARG_NOT_USED, - 0); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_send_read_cmd( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - void *read_data, - uint32_t read_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles) -{ - /* Read arguments are expected */ - if (read_data == ARG_PTR_NOT_USED || read_len == ARG_NOT_USED) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - /* No write data */ - return qspi_ip6514e_send_cmd(dev, - opcode, - read_data, - read_len, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - addr, - addr_bytes_number, - dummy_cycles); -} - -enum qspi_ip6514e_error_t qspi_ip6514e_send_write_cmd( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles) -{ - /* Write arguments are expected */ - if (write_data == ARG_PTR_NOT_USED || write_len == ARG_NOT_USED) { - return QSPI_IP6514E_ERR_WRONG_ARGUMENT; - } - - /* No read data, no dummy cycles */ - return qspi_ip6514e_send_cmd(dev, - opcode, - ARG_PTR_NOT_USED, - ARG_NOT_USED, - write_data, - write_len, - addr, - addr_bytes_number, - dummy_cycles); -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/qspi_ip6514e_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/qspi_ip6514e_drv.h deleted file mode 100644 index 69929255dd7..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/device/drivers/qspi_ip6514e_drv.h +++ /dev/null @@ -1,416 +0,0 @@ -/* - * Copyright (c) 2018 Arm Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/** - * \file qspi_ip6514e_drv.h - * \brief Driver for Cadence QSPI Flash Controller IP. - * There are two ways to communicate with the flash memory device: - * - issue AHB requests for direct read and writes in the Flash memory - * mapped address zone. The commands used for those can be configured - * by the driver - * - send a command to the device to access his internal registers and - * do other operations like erasing a sector - * At reset, the QSPI controller will work in a default mode which will - * allow to do basic commands. It should be configured with the - * flash memory device specifications for optimal use for commands and - * direct reads/writes. Here is an example of configuration: - * - send command to activate QSPI mode on the flash memory device - * - send command to change dummy cycles on the flash memory device - * - check if any operation is ungoing - * - disable the QSPI controller - * - change the baud rate divisor - * - activate the QSPI mode on the controller - * - change the dummy cycles number and opcode for reads/writes - * - change the number of bytes per page - * - change the number of address bytes - * - activate the QSPI controller - * - * Warning: none of the functions declared here check if the dev - * argument points to NULL. - */ - -#ifndef __QSPI_IP6514E_DRV_H__ -#define __QSPI_IP6514E_DRV_H__ - -#include -#include - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * \brief Cadence QSPI IP6514E error enumeration types - */ -enum qspi_ip6514e_error_t { - QSPI_IP6514E_ERR_NONE, - QSPI_IP6514E_ERR_WRONG_ARGUMENT, - QSPI_IP6514E_ERR_CONTROLLER_NOT_DISABLED, - QSPI_IP6514E_ERR_READ_IN_PROGRESS, - QSPI_IP6514E_ERR_WRITE_IN_PROGRESS, - /* Any new error should be added to the enumeration type error of - * the corresponding Flash device library as well. - */ -}; - -/** - * \brief Cadence QSPI IP6514E SPI modes - */ -enum qspi_ip6514e_spi_mode_t { - QSPI_IP6514E_SPI_MODE, - /*!< Use 1 line for Instruction, Address and Data */ - QSPI_IP6514E_DSPI_MODE, - /*!< Use 2 lines for Instruction, Address and Data */ - QSPI_IP6514E_QSPI_MODE, - /*!< Use 4 lines for Instruction, Address and Data */ -}; - -/** - * \brief Cadence QSPI IP6514E device configuration structure - */ -struct qspi_ip6514e_dev_cfg_t { - const uint32_t base; /*!< QSPI IP6514E base address */ - /* - * If not all the AHB wires are connected to the QSPI Flash Controller the - * driver can still access all of the Flash memory. The bits of this value - * should be put to 1 for every wire that is connected. Set it to - * 0xFFFFFFFFU if all AHB address wires are connected to the - * QSPI Flash Controller. - */ - uint32_t addr_mask; -}; - -/** - * \brief Cadence QSPI IP6514E device structure - */ -struct qspi_ip6514e_dev_t { - const struct qspi_ip6514e_dev_cfg_t* const cfg; - /*!< QSPI IP6514E configuration */ -}; - -/** - * \brief Check if the controller is idle. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * - * \return true if the controller is idle, false otherwise. - */ -bool qspi_ip6514e_is_idle(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Check if the controller is enabled. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * - * \return true if the controller is enabled, false otherwise. - */ -bool qspi_ip6514e_is_enabled(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Disable the QSPI controller. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - */ -void qspi_ip6514e_disable(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Enable the QSPI controller. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - */ -void qspi_ip6514e_enable(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Change the baud rate divisor. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] div Baud rate divisor value. It can only be an even number - * between 2 and 32 (both included). - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI frequency is calculated dividing the QSPI controller clock by - * this divisor. Please check Flash memory device specifications to know - * the maximal frequency that can be used. - * \note The QSPI controller should be disabled before calling this function. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_set_baud_rate_div( - struct qspi_ip6514e_dev_t* dev, - uint32_t div); - -/** - * \brief Set SPI mode for instruction, address and data. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] inst_type SPI mode to use for the instruction part of the command - * \param[in] addr_type SPI mode to use for the address part of the command - * \param[in] data_type SPI mode to use for the data part of the command - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - * \note Changing this setting will affect commands and direct operations. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_set_spi_mode( - struct qspi_ip6514e_dev_t* dev, - enum qspi_ip6514e_spi_mode_t inst_type, - enum qspi_ip6514e_spi_mode_t addr_type, - enum qspi_ip6514e_spi_mode_t data_type); - -/** - * \brief Configure read commands for direct reads. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] opcode Read opcode that will be used for every direct read - * \param[in] dummy_cycles Number of dummy cycles to wait before triggering the - * command, this value must be between 0 and 31 - * (both included) - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_reads(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles); - -/** - * \brief Configure write commands for direct writes. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] opcode Write opcode that will be used for every direct write - * \param[in] dummy_cycles Number of dummy cycles to wait before triggering the - * command, this value must be between 0 and 31 - * (both included) - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_writes( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - uint32_t dummy_cycles); - -/** - * \brief Change the number of bytes per device page. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] page_size Number of bytes per device page, must be between 0 - * and 4095 (both included) - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - * \note This function will affect direct reads/writes. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_page_size( - struct qspi_ip6514e_dev_t* dev, - uint32_t page_size); - -/** - * \brief Change the number of device address bytes. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] bytes_number Number of device address bytes, must be between 1 - * and 16 (both included) - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note The QSPI controller should be idle before calling this function. - * \note This function will affect direct reads/writes. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_cfg_addr_bytes( - struct qspi_ip6514e_dev_t* dev, - uint32_t bytes_number); - -/** - * \brief Remap the incoming AHB address with an offset for direct accesses. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] offset Offset that will be added to the incoming AHB address to - * access the Flash memory - * - * \note This function will only affect direct reads/writes. - * \note This function does not check if the resulting address is out of memory - * bounds. - */ -void qspi_ip6514e_remap_addr(struct qspi_ip6514e_dev_t* dev, uint32_t offset); - -/** - * \brief Disable AHB address remapping for direct accesses. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * - * \note This function will disable the controller if it is not already - * disabled and enable it again (if it was). - * \note This function will only affect direct reads/writes. - */ -void qspi_ip6514e_disable_remap(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Restore the default value of the QSPI controller registers. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * - * \note The QSPI controller should be disabled before calling this function. - */ -void qspi_ip6514e_reset_regs(struct qspi_ip6514e_dev_t* dev); - -/** - * \brief Send a command to the flash memory device using the Software Triggered - * Instruction Generator (STIG). - * - * \param[in] dev QSPI IP6514E device struct - * \ref qspi_ip6514e_dev_t - * \param[in] opcode Opcode for the command. - * \param[out] read_data Pointer to a memory zone where the read_len - * bytes read will be written to. If no data is to - * be read for the command, - * this argument should be NULL. - * \param[in] read_len Number of bytes to read for the command. If - * no bytes are to be read, use 0 for argument - * otherwise between 1 and 8 bytes (both - * included) can be read. - * \param[in] write_data Pointer to a memory zone where are - * located the write_len bytes to write for - * this command. If no bytes are to be written, - * use NULL as argument. - * \param[in] write_len Number of bytes to write for the command. If - * no bytes are to be written, use 0 for - * argument otherwise between 1 and 8 bytes - * (both included) can be written. - * \param[in] addr Address used for the command - * \param[in] addr_bytes_number Number of address bytes for this command. - * If an address is not needed for the command, - * use 0 for argument, otherwise between 1 and - * 4 bytes (both included) can be used. - * \param[in] dummy_cycles Number of dummy cycles required for the - * command, between 0 and 31 (both included). - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note Check the flash memory device specifications for the possible opcodes - * that can be used and the other informations needed for this function. - * \note The SPI mode used for this command is the one set with the - * \ref qspi_ip6514e_activate_qspi_mode function or the default one. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_send_cmd(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - void *read_data, - uint32_t read_len, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles); - -/** - * \brief Send a simple command to the flash memory device using the Software - * Triggered Instruction Generator (STIG) with no data arguments. - * This command can be used for example to send the WRITE ENABLE command. - * - * \param[in] dev QSPI IP6514E device struct \ref qspi_ip6514e_dev_t - * \param[in] opcode Opcode for the command. - * - * \note Check the flash memory device specifications for the possible opcodes - * that can be used and the other informations needed for this function. - * \note The SPI mode used for this command is the one set with the - * \ref qspi_ip6514e_activate_qspi_mode function or the default one. - */ -void qspi_ip6514e_send_simple_cmd(struct qspi_ip6514e_dev_t* dev, - uint8_t opcode); - -/** - * \brief Send a read command to the flash memory device using the Software - * Triggered Instruction Generator (STIG). This command can be used to - * read Flash memory data or registers. - * - * \param[in] dev QSPI IP6514E device struct - * \ref qspi_ip6514e_dev_t - * \param[in] opcode Opcode for the command. - * \param[out] read_data Pointer to a memory zone where the - * read_len bytes read will be written to. - * \param[in] read_len Number of bytes to read for the command. - * Between 1 and 8 bytes (both included) can be - * read. - * \param[in] addr Address used for the command - * \param[in] addr_bytes_number Number of address bytes for this command. - * If an address is not needed for the command, - * use 0 for argument, otherwise between 1 and - * 4 bytes (both included) can be used. - * \param[in] dummy_cycles Number of dummy cycles required for the - * command, between 0 and 31 (both included). - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note Check the flash memory device specifications for the possible opcodes - * that can be used and the other informations needed for this function. - * \note The SPI mode used for this command is the one set with the - * \ref qspi_ip6514e_activate_qspi_mode function or the default one. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_send_read_cmd( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - void *read_data, - uint32_t read_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles); - -/** - * \brief Send a write command to the flash memory device using the Software - * Triggered Instruction Generator (STIG). This command can be used to - * write Flash memory or registers. - * - * \param[in] dev QSPI IP6514E device struct - * \ref qspi_ip6514e_dev_t - * \param[in] opcode Opcode for the command. - * \param[in] write_data Pointer to a memory zone where are - * located the write_len bytes to write for - * this command. - * \param[in] write_len Number of bytes to write for the command. - * Between 1 and 8 bytes (both included) can be - * written. - * \param[in] addr Address used for the command - * \param[in] addr_bytes_number Number of address bytes for this command. - * If an address is not needed for the command, - * use 0 for argument, otherwise between 1 and - * 4 bytes (both included) can be used. - * \param[in] dummy_cycles Number of dummy cycles required for the - * command, between 0 and 31 (both included). - * - * \return Returns error code as specified in \ref qspi_ip6514e_error_t - * - * \note Check the flash memory device specifications for the possible opcodes - * that can be used and the other informations needed for this function. - * \note The SPI mode used for this command is the one set with the - * \ref qspi_ip6514e_activate_qspi_mode function or the default one. - */ -enum qspi_ip6514e_error_t qspi_ip6514e_send_write_cmd( - struct qspi_ip6514e_dev_t* dev, - uint8_t opcode, - const void *write_data, - uint32_t write_len, - uint32_t addr, - uint32_t addr_bytes_number, - uint32_t dummy_cycles); - -#ifdef __cplusplus -} -#endif - -#endif /* __QSPI_IP6514E_DRV_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/flash_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/flash_api.c deleted file mode 100644 index f35e5761576..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/flash_api.c +++ /dev/null @@ -1,138 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2020 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "device.h" -#include "flash_layout.h" -#include "flash_api.h" - -#if DEVICE_FLASH - -#define FLASH_DEV MT25QL_DEV_S - -int32_t flash_init(flash_t *obj) -{ - (void)(obj); - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - qspi_ip6514e_enable(FLASH_DEV.controller); - - /* Configure QSPI Flash controller to operate in single SPI mode and - * to use fast Flash commands */ - err = mt25ql_config_mode(&FLASH_DEV, MT25QL_FUNC_STATE_FAST); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -int32_t flash_free(flash_t *obj) -{ - (void)(obj); - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - /* Restores the QSPI Flash controller and MT25QL to reset state */ - err = mt25ql_restore_reset_state(&FLASH_DEV); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -int32_t flash_erase_sector(flash_t *obj, uint32_t address) -{ - (void)(obj); - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - address -= FLASH_DEV.direct_access_start_addr; - - err = mt25ql_erase(&FLASH_DEV, address, MT25QL_ERASE_SUBSECTOR_4K); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -int32_t flash_read(flash_t *obj, uint32_t address, - uint8_t *data, uint32_t size) -{ - (void)obj; - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - address -= FLASH_DEV.direct_access_start_addr; - - err = mt25ql_command_read(&FLASH_DEV, address, data, size); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -int32_t flash_program_page(flash_t *obj, uint32_t address, const uint8_t *data, uint32_t size) -{ - (void)(obj); - enum mt25ql_error_t err = MT25QL_ERR_NONE; - - address -= FLASH_DEV.direct_access_start_addr; - - err = mt25ql_command_write(&FLASH_DEV, address, data, size); - if (err != MT25QL_ERR_NONE) { - return -1; - } - - return 0; -} - -uint32_t flash_get_sector_size(const flash_t *obj, uint32_t address) -{ - (void)(obj); - if ((address >= S_QSPI_ALIAS_BASE) && (address < S_QSPI_ALIAS_BASE + QSPI_FLASH_TOTAL_SIZE)) { - return SUBSECTOR_4KB; - } - - return MBED_FLASH_INVALID_SIZE; -} - -uint32_t flash_get_page_size(const flash_t *obj) -{ - (void)(obj); - return FLASH_PAGE_SIZE; -} - -uint32_t flash_get_start_address(const flash_t *obj) -{ - (void)(obj); - return S_QSPI_ALIAS_BASE; -} - -uint32_t flash_get_size(const flash_t *obj) -{ - (void)(obj); - return QSPI_FLASH_TOTAL_SIZE; -} - -uint8_t flash_get_erase_value(const flash_t *obj) -{ - (void)obj; - return 0xFF; -} - -#endif // DEVICE_FLASH diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/gpio_api_s.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/gpio_api_s.c deleted file mode 100644 index 31c6a0bd036..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/gpio_api_s.c +++ /dev/null @@ -1,102 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2017-2020 Arm Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* - * This file implements APIS defined in hal/gpio_api.h - */ - -#include -#include "gpio_api.h" -#include "pinmap.h" -#include "objects.h" -#include "mbed_error.h" - -uint32_t gpio_set(PinName pin) -{ - pin_function(pin, (int)PRIMARY_FUNC); - - /* Return the correct mask of the given PIN */ - return (1 << GPIO_PIN_NUMBER(pin)); -} - -void gpio_init(gpio_t *obj, PinName pin) -{ - struct gpio_cmsdk_dev_t *gpio_dev; - obj->pin_num = (uint32_t)NC; - - if (pin >= PA0 && pin <= PA15) { -#ifdef GPIO0_CMSDK_DEV - gpio_dev = &GPIO0_CMSDK_DEV; -#else - error("GPIO associated with expansion pin %d, is disabled", pin); - /* error() calls exit() eventually, but to be safe we return here */ - return; -#endif - - gpio_cmsdk_init(gpio_dev); - - obj->gpio_dev = gpio_dev; - obj->pin_num = pin; - /* GPIO is input by default */ - obj->direction = PIN_INPUT; - return; - } - - error("pin %d is not a GPIO", pin); -} - -void gpio_mode(gpio_t *obj, PinMode mode) -{ - pin_mode(obj->pin_num, mode); -} - -void gpio_dir(gpio_t *obj, PinDirection direction) -{ - enum gpio_cmsdk_direction_t pin_dir = - (direction == PIN_INPUT) ? GPIO_CMSDK_INPUT : GPIO_CMSDK_OUTPUT; - - if (gpio_cmsdk_pin_config(obj->gpio_dev, obj->pin_num, pin_dir, - GPIO_CMSDK_MAIN_FUNC) == GPIO_CMSDK_ERR_NONE) { - obj->direction = direction; - } -} - -int gpio_is_connected(const gpio_t *obj) -{ - if (obj->pin_num == (uint32_t)NC) { - return 0; - } else { - return 1; - } -} - -void gpio_write(gpio_t *obj, int value) -{ - enum gpio_cmsdk_error_t ret = - gpio_cmsdk_pin_write(obj->gpio_dev, obj->pin_num, (uint32_t)value); - - if (ret) { - error("Can not write pin %d", obj->pin_num); - } -} - -int gpio_read(gpio_t *obj) -{ - uint32_t data = 0; - (void)gpio_cmsdk_pin_read(obj->gpio_dev, obj->pin_num, &data); - - return (int)data; -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/pinmap_s.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/pinmap_s.c deleted file mode 100644 index 6caf4db688a..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/pinmap_s.c +++ /dev/null @@ -1,115 +0,0 @@ -/* mbed Microcontroller Library - * Copyright (c) 2017-2020 Arm Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* - * This file implements APIS defined in hal/pinmap.h - * - * Pin functions are not available in interrupt context, because the - * NS side is only allowed to call TF-M secure functions (veneers) from - * the NS Thread mode. - * - */ - -#include "mbed_assert.h" -#include "mbed_error.h" -#include "device_definition.h" -#include "objects.h" -#include "pinmap.h" -#include "musca_b1_scc_drv.h" - -/** - * \brief Translates between different pin mode enums - * - * \param[in] mode Pin mode to translate \ref PinMode - * - * \return Translated pin mode \ref pinmode_select_t - */ -static enum pinmode_select_t translate_pinmode(PinMode mode) -{ - switch (mode) { - case PullNone: - return PINMODE_NONE; - case PullDown: - return PINMODE_PULL_DOWN; - case PullUp: - return PINMODE_PULL_UP; - default: - return PINMODE_NONE; - } -} - -/** - * \brief Configures the GPIO pin and sets the alternate function - * - * \param[in] pin GPIO pin number \ref PinName - * \param[in] function Alternate function to set \ref PinFunction - */ -void pin_function(PinName pin, int function) -{ - enum gpio_altfunc_t flags; - uint32_t result = 0; - - MBED_ASSERT(pin != NC); - - switch (function) { - case PRIMARY_FUNC: - flags = GPIO_MAIN_FUNC; - break; - case ALTERNATE_FUNC_1: - flags = GPIO_ALTFUNC_1; - break; - case ALTERNATE_FUNC_2: - flags = GPIO_ALTFUNC_2; - break; - case ALTERNATE_FUNC_3: - flags = GPIO_ALTFUNC_3; - break; - default: - return; - } - -#ifdef MUSCA_B1_SCC_DEV - result = musca_b1_scc_set_alt_func(&MUSCA_B1_SCC_DEV, flags, (1u< -#include "platform/include/tfm_spm_hal.h" -#include "spm_api.h" -#include "spm_db.h" -#include "tfm_platform_core_api.h" -#include "target_cfg.h" -#include "Driver_MPC.h" -#include "mpu_armv8m_drv.h" -#include "region_defs.h" -#include "secure_utilities.h" - -/* Import MPC driver */ -extern ARM_DRIVER_MPC Driver_CODE_SRAM_MPC; - -/* Get address of memory regions to configure MPU */ -extern const struct memory_region_limits memory_regions; - -struct mpu_armv8m_dev_t dev_mpu_s = { MPU_BASE }; - -void tfm_spm_hal_init_isolation_hw(void) -{ - /* Configures non-secure memory spaces in the target */ - sau_and_idau_cfg(); - mpc_init_cfg(); - ppc_init_cfg(); -} - -void tfm_spm_hal_configure_default_isolation( - const struct tfm_spm_partition_platform_data_t *platform_data) -{ - if (platform_data) { - if (platform_data->periph_ppc_bank != PPC_SP_DO_NOT_CONFIGURE) { - ppc_configure_to_secure(platform_data->periph_ppc_bank, - platform_data->periph_ppc_loc); - } - } -} - -#if TFM_LVL != 1 - -#define MPU_REGION_VENEERS 0 -#define MPU_REGION_TFM_UNPRIV_CODE 1 -#define MPU_REGION_TFM_UNPRIV_DATA 2 -#define MPU_REGION_NS_DATA 3 -#define PARTITION_REGION_RO 4 -#define PARTITION_REGION_RW_STACK 5 -#define PARTITION_REGION_PERIPH 6 -#define PARTITION_REGION_SHARE 7 - -REGION_DECLARE(Image$$, TFM_UNPRIV_CODE, $$RO$$Base); -REGION_DECLARE(Image$$, TFM_UNPRIV_CODE, $$RO$$Limit); -REGION_DECLARE(Image$$, TFM_UNPRIV_RO_DATA, $$RW$$Base); -REGION_DECLARE(Image$$, TFM_UNPRIV_RO_DATA, $$ZI$$Limit); -REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base); -REGION_DECLARE(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit); - -static enum spm_err_t tfm_spm_mpu_init(void) -{ - struct mpu_armv8m_region_cfg_t region_cfg; - - mpu_armv8m_clean(&dev_mpu_s); - - /* Veneer region */ - region_cfg.region_nr = MPU_REGION_VENEERS; - region_cfg.region_base = memory_regions.veneer_base; - region_cfg.region_limit = memory_regions.veneer_limit; - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_OK; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - /* TFM Core unprivileged code region */ - region_cfg.region_nr = MPU_REGION_TFM_UNPRIV_CODE; - region_cfg.region_base = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_CODE, $$RO$$Base); - region_cfg.region_limit = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_CODE, $$RO$$Limit); - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_OK; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - /* TFM Core unprivileged data region */ - region_cfg.region_nr = MPU_REGION_TFM_UNPRIV_DATA; - region_cfg.region_base = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_RO_DATA, $$RW$$Base); - region_cfg.region_limit = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_RO_DATA, $$ZI$$Limit); - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - /* TFM Core unprivileged non-secure data region */ - region_cfg.region_nr = MPU_REGION_NS_DATA; - region_cfg.region_base = NS_DATA_START; - region_cfg.region_limit = NS_DATA_LIMIT; - region_cfg.attr_access = MPU_ARMV8M_AP_RW_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - mpu_armv8m_enable(&dev_mpu_s, PRIVILEGED_DEFAULT_ENABLE, - HARDFAULT_NMI_ENABLE); - - return SPM_ERR_OK; -} - -enum spm_err_t tfm_spm_hal_partition_sandbox_config( - const struct tfm_spm_partition_memory_data_t *memory_data, - const struct tfm_spm_partition_platform_data_t *platform_data) -{ - /* This function takes a partition id and enables the - * SPM partition for that partition - */ - - struct mpu_armv8m_region_cfg_t region_cfg; - - mpu_armv8m_disable(&dev_mpu_s); - - /* Configure Regions */ - if (memory_data->ro_start) { - /* RO region */ - region_cfg.region_nr = PARTITION_REGION_RO; - region_cfg.region_base = memory_data->ro_start; - region_cfg.region_limit = memory_data->ro_limit; - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_OK; - - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) - != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - } - - /* RW, ZI and stack as one region */ - region_cfg.region_nr = PARTITION_REGION_RW_STACK; - region_cfg.region_base = memory_data->rw_start; - region_cfg.region_limit = memory_data->stack_top; - region_cfg.attr_access = MPU_ARMV8M_AP_RW_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - if (platform_data) { - /* Peripheral */ - region_cfg.region_nr = PARTITION_REGION_PERIPH; - region_cfg.region_base = platform_data->periph_start; - region_cfg.region_limit = platform_data->periph_limit; - region_cfg.attr_access = MPU_ARMV8M_AP_RW_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - if (mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg) - != MPU_ARMV8M_OK) { - return SPM_ERR_INVALID_CONFIG; - } - - ppc_en_secure_unpriv(platform_data->periph_ppc_bank, - platform_data->periph_ppc_loc); - } - - mpu_armv8m_enable(&dev_mpu_s, PRIVILEGED_DEFAULT_ENABLE, - HARDFAULT_NMI_ENABLE); - - return SPM_ERR_OK; -} - -enum spm_err_t tfm_spm_hal_partition_sandbox_deconfig( - const struct tfm_spm_partition_memory_data_t *memory_data, - const struct tfm_spm_partition_platform_data_t *platform_data) -{ - /* This function takes a partition id and disables the - * SPM partition for that partition - */ - - if (platform_data) { - /* Peripheral */ - ppc_clr_secure_unpriv(platform_data->periph_ppc_bank, - platform_data->periph_ppc_loc); - } - - mpu_armv8m_disable(&dev_mpu_s); - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_RO); - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_RW_STACK); - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_PERIPH); - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_SHARE); - mpu_armv8m_enable(&dev_mpu_s, PRIVILEGED_DEFAULT_ENABLE, - HARDFAULT_NMI_ENABLE); - - return SPM_ERR_OK; -} - -/** - * Set share region to which the partition needs access - */ -enum spm_err_t tfm_spm_hal_set_share_region( - enum tfm_buffer_share_region_e share) -{ - struct mpu_armv8m_region_cfg_t region_cfg; - enum spm_err_t res = SPM_ERR_INVALID_CONFIG; - uint32_t scratch_base = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Base); - uint32_t scratch_limit = - (uint32_t)®ION_NAME(Image$$, TFM_UNPRIV_SCRATCH, $$ZI$$Limit); - - mpu_armv8m_disable(&dev_mpu_s); - - if (share == TFM_BUFFER_SHARE_DISABLE) { - mpu_armv8m_region_disable(&dev_mpu_s, PARTITION_REGION_SHARE); - } else { - - region_cfg.region_nr = PARTITION_REGION_SHARE; - region_cfg.attr_access = MPU_ARMV8M_AP_RW_PRIV_UNPRIV; - region_cfg.attr_sh = MPU_ARMV8M_SH_NONE; - region_cfg.attr_exec = MPU_ARMV8M_XN_EXEC_NEVER; - switch (share) { - case TFM_BUFFER_SHARE_SCRATCH: - /* Use scratch area for SP-to-SP data sharing */ - region_cfg.region_base = scratch_base; - region_cfg.region_limit = scratch_limit; - res = SPM_ERR_OK; - break; - case TFM_BUFFER_SHARE_NS_CODE: - region_cfg.region_base = memory_regions.non_secure_partition_base; - region_cfg.region_limit = memory_regions.non_secure_partition_limit; - /* Only allow read access to NS code region and keep - * exec.never attribute - */ - region_cfg.attr_access = MPU_ARMV8M_AP_RO_PRIV_UNPRIV; - res = SPM_ERR_OK; - break; - default: - /* Leave res to be set to SPM_ERR_INVALID_CONFIG */ - break; - } - if (res == SPM_ERR_OK) { - mpu_armv8m_region_enable(&dev_mpu_s, ®ion_cfg); - } - } - mpu_armv8m_enable(&dev_mpu_s, PRIVILEGED_DEFAULT_ENABLE, - HARDFAULT_NMI_ENABLE); - - return res; -} - -#endif /* TFM_LVL != 1 */ - -void tfm_spm_hal_setup_isolation_hw(void) -{ -#if TFM_LVL != 1 - if (tfm_spm_mpu_init() != SPM_ERR_OK) { - ERROR_MSG("Failed to set up initial MPU configuration! Halting."); - while (1) { - ; - } - } -#endif -} - -void MPC_Handler(void) -{ - /* Clear MPC interrupt flag and pending MPC IRQ */ - Driver_CODE_SRAM_MPC.ClearInterrupt(); - NVIC_ClearPendingIRQ(S_MPC_COMBINED_IRQn); - - /* Print fault message and block execution */ - LOG_MSG("Oops... MPC fault!!!"); - - /* Inform TF-M core that isolation boundary has been violated */ - tfm_access_violation_handler(); -} - -void PPC_Handler(void) -{ - /* - * Due to an issue on the FVP, the PPC fault doesn't trigger a - * PPC IRQ which is handled by the PPC_handler. - * In the FVP execution, this code is not execute. - */ - - /* Clear PPC interrupt flag and pending PPC IRQ */ - ppc_clear_irq(); - NVIC_ClearPendingIRQ(S_PPC_COMBINED_IRQn); - - /* Print fault message*/ - LOG_MSG("Oops... PPC fault!!!"); - - /* Inform TF-M core that isolation boundary has been violated */ - tfm_access_violation_handler(); -} - -uint32_t tfm_spm_hal_get_ns_VTOR(void) -{ - return memory_regions.non_secure_code_start; -} - -uint32_t tfm_spm_hal_get_ns_MSP(void) -{ - return *((uint32_t *)memory_regions.non_secure_code_start); -} - -uint32_t tfm_spm_hal_get_ns_entry_point(void) -{ - return *((uint32_t *)(memory_regions.non_secure_code_start+ 4)); -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/target_cfg.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/target_cfg.c deleted file mode 100644 index 88d512f59b9..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/target_cfg.c +++ /dev/null @@ -1,533 +0,0 @@ -/* - * Copyright (c) 2018-2020 Arm Limited. All rights reserved. - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#include "target_cfg.h" -#include "Driver_MPC.h" -#include "Driver_PPC.h" -#include "platform_description.h" -#include "device_definition.h" -#include "region_defs.h" -#include "tfm_secure_api.h" -#include "mbed_assert.h" -#include "platform_srv_impl.h" - - -/* Macros to pick linker symbols */ -#define REGION(a, b, c) a##b##c -#define REGION_NAME(a, b, c) REGION(a, b, c) -#define REGION_DECLARE(a, b, c) extern uint32_t REGION_NAME(a, b, c) - -/* The section names come from the scatter file */ -REGION_DECLARE(Load$$LR$$, LR_NS_PARTITION, $$Base); -REGION_DECLARE(Image$$, ER_CODE_CMSE_VENEER, $$Base); -REGION_DECLARE(Image$$, ER_CODE_CMSE_VENEER, $$Limit); - - -const struct memory_region_limits memory_regions = { - .non_secure_code_start = - (uint32_t)®ION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base) + - BL2_HEADER_SIZE, - - .non_secure_partition_base = - (uint32_t)®ION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base), - - .non_secure_partition_limit = - (uint32_t)®ION_NAME(Load$$LR$$, LR_NS_PARTITION, $$Base) + - NS_PARTITION_SIZE - 1, - - .veneer_base = - (uint32_t)®ION_NAME(Image$$, ER_CODE_CMSE_VENEER, $$Base), - - .veneer_limit = - (uint32_t)®ION_NAME(Image$$, ER_CODE_CMSE_VENEER, $$Limit), -}; - - -/* Allows software, via SAU, to define the code region as a NSC */ -#define NSCCFG_CODENSC 1 - -/* Import MPC driver */ -extern ARM_DRIVER_MPC Driver_CODE_SRAM_MPC, Driver_EFLASH0_MPC; -extern ARM_DRIVER_MPC Driver_ISRAM0_MPC, Driver_ISRAM1_MPC; -extern ARM_DRIVER_MPC Driver_ISRAM2_MPC, Driver_ISRAM3_MPC; - -/* Import PPC driver */ -extern ARM_DRIVER_PPC Driver_APB_PPC0, Driver_APB_PPC1; -extern ARM_DRIVER_PPC Driver_AHB_PPCEXP0; -extern ARM_DRIVER_PPC Driver_APB_PPCEXP0, Driver_APB_PPCEXP1; - -/* Define Peripherals NS address range for the platform */ -#define PERIPHERALS_BASE_NS_START (0x40000000) -#define PERIPHERALS_BASE_NS_END (0x4FFFFFFF) - -/* Enable system reset request for CPU 0 */ -#define ENABLE_CPU0_SYSTEM_RESET_REQUEST (1U << 4U) - -/* To write into AIRCR register, 0x5FA value must be write to the VECTKEY field, - * otherwise the processor ignores the write. - */ -#define SCB_AIRCR_WRITE_MASK ((0x5FAUL << SCB_AIRCR_VECTKEY_Pos)) - -/* Debug configuration MASKS */ -#define DBG_CTRL_MASK_DBGEN (0x01 << 1) -#define DBG_CTRL_MASK_NIDEN (0x01 << 2) -#define DBG_CTRL_MASK_SPIDEN (0x01 << 3) -#define DBG_CTRL_MASK_SPNIDEN (0x01 << 4) - -#define DBG_CTRL_ADDR 0x50089E00UL - -#define All_SEL_STATUS (SPNIDEN_SEL_STATUS | SPIDEN_SEL_STATUS | \ - NIDEN_SEL_STATUS | DBGEN_SEL_STATUS) - -struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart = { - MUSCA_B1_UART1_NS_BASE, - MUSCA_B1_UART1_NS_BASE + 0xFFF, - PPC_SP_DO_NOT_CONFIGURE, - -1 -}; - -static ARM_DRIVER_PPC *const ppc_bank_drivers[] = { - 0, /* AHB PPC0 */ - 0, /* Reserved */ - 0, /* Reserved */ - 0, /* Reserved */ - &Driver_AHB_PPCEXP0, /* AHB PPCEXP0 */ - 0, /* AHB PPCEXP1 */ - 0, /* AHB PPCEXP2 */ - 0, /* AHB PPCEXP3 */ - &Driver_APB_PPC0, /* APB PPC0 */ - &Driver_APB_PPC1, /* APB PPC1 */ - 0, /* Reserved */ - 0, /* Reserved */ - &Driver_APB_PPCEXP0, /* APB PPCEXP0 */ - &Driver_APB_PPCEXP1, /* APB PPCEXP1 */ -}; - -#define PPC_BANK_COUNT \ - (sizeof(ppc_bank_drivers)/sizeof(ppc_bank_drivers[0])) - -void enable_fault_handlers(void) -{ - /* Explicitly set secure fault priority to the highest */ - NVIC_SetPriority(SecureFault_IRQn, 0); - - /* Enables BUS, MEM, USG and Secure faults */ - SCB->SHCSR |= SCB_SHCSR_USGFAULTENA_Msk - | SCB_SHCSR_BUSFAULTENA_Msk - | SCB_SHCSR_MEMFAULTENA_Msk - | SCB_SHCSR_SECUREFAULTENA_Msk; -} - -void system_reset_cfg(void) -{ - struct sysctrl_t *sysctrl = (struct sysctrl_t *)CMSDK_SYSCTRL_BASE_S; - uint32_t reg_value = SCB->AIRCR; - - /* Enable system reset request for CPU 0, to be triggered via - * NVIC_SystemReset function. - */ - sysctrl->resetmask |= ENABLE_CPU0_SYSTEM_RESET_REQUEST; - - /* Clear SCB_AIRCR_VECTKEY value */ - reg_value &= ~(uint32_t)(SCB_AIRCR_VECTKEY_Msk); - - /* Enable system reset request only to the secure world */ - reg_value |= (uint32_t)(SCB_AIRCR_WRITE_MASK | SCB_AIRCR_SYSRESETREQS_Msk); - - SCB->AIRCR = reg_value; -} - -void tfm_spm_hal_init_debug(void) -{ - - volatile uint32_t *dbg_ctrl_p = (uint32_t*)DBG_CTRL_ADDR; - -#if defined(DAUTH_NONE) - - *dbg_ctrl_p &= ~(DBG_CTRL_MASK_DBGEN | - DBG_CTRL_MASK_NIDEN | - DBG_CTRL_MASK_SPIDEN | - DBG_CTRL_MASK_SPNIDEN); - -#elif defined(DAUTH_NS_ONLY) - *dbg_ctrl_p &= ~(DBG_CTRL_MASK_SPIDEN | - DBG_CTRL_MASK_SPNIDEN); - *dbg_ctrl_p |= DBG_CTRL_MASK_DBGEN | - DBG_CTRL_MASK_NIDEN; - -#elif defined(DAUTH_FULL) - *dbg_ctrl_p |= DBG_CTRL_MASK_DBGEN | - DBG_CTRL_MASK_NIDEN | - DBG_CTRL_MASK_SPIDEN | - DBG_CTRL_MASK_SPNIDEN; -#else - -#if !defined(DAUTH_CHIP_DEFAULT) -#error "No debug authentication setting is provided." -#endif - /* No need to set any enable bits because the value depends on - * input signals. - */ - (void)dbg_ctrl_p; -#endif -} - -/*----------------- NVIC interrupt target state to NS configuration ----------*/ -void nvic_interrupt_target_state_cfg() -{ - /* Target every interrupt to NS; unimplemented interrupts will be WI */ - for (uint8_t i=0; iITNS)/sizeof(NVIC->ITNS[0]); i++) { - NVIC->ITNS[i] = 0xFFFFFFFF; - } - - /* Make sure that MPC and PPC are targeted to S state */ - NVIC_ClearTargetState(S_MPC_COMBINED_IRQn); - NVIC_ClearTargetState(S_PPC_COMBINED_IRQn); -} - -/*----------------- NVIC interrupt enabling for S peripherals ----------------*/ -void nvic_interrupt_enable() -{ - int32_t ret = ARM_DRIVER_OK; - /* MPC interrupt enabling */ - ret |= Driver_EFLASH0_MPC.EnableInterrupt(); - ret |= Driver_CODE_SRAM_MPC.EnableInterrupt(); - if (ret != ARM_DRIVER_OK) { - MBED_ASSERT("MPC IRQ enable failed!"); - } - NVIC_EnableIRQ(S_MPC_COMBINED_IRQn); - - /* PPC interrupt enabling */ - /* Clear pending PPC interrupts */ - /* In the PPC configuration function, we have used the Non-Secure - * Privilege Control Block to grant unprivilged NS access to some - * peripherals used by NS. That triggers a PPC0 exception as that - * register is meant for NS privileged access only. Clear it here - */ - Driver_APB_PPC0.ClearInterrupt(); - - /* Enable PPC interrupts for APB PPC */ - ret |= Driver_APB_PPC0.EnableInterrupt(); - ret |= Driver_APB_PPC1.EnableInterrupt(); - ret |= Driver_APB_PPCEXP0.EnableInterrupt(); - ret |= Driver_APB_PPCEXP1.EnableInterrupt(); - if (ret != ARM_DRIVER_OK) { - MBED_ASSERT("PPC IRQ enable failed!"); - } - NVIC_EnableIRQ(S_PPC_COMBINED_IRQn); -} - -/*------------------- SAU/IDAU configuration functions -----------------------*/ - -void sau_and_idau_cfg(void) -{ - /* Enables SAU */ - TZ_SAU_Enable(); - - /* Configures SAU regions to be non-secure */ - SAU->RNR = TFM_NS_REGION_CODE; - SAU->RBAR = (memory_regions.non_secure_partition_base - & SAU_RBAR_BADDR_Msk); - SAU->RLAR = (memory_regions.non_secure_partition_limit - & SAU_RLAR_LADDR_Msk) - | SAU_RLAR_ENABLE_Msk; - - SAU->RNR = TFM_NS_REGION_DATA; - SAU->RBAR = (NS_DATA_START & SAU_RBAR_BADDR_Msk); - SAU->RLAR = (NS_DATA_LIMIT & SAU_RLAR_LADDR_Msk) | SAU_RLAR_ENABLE_Msk; - - /* Configures veneers region to be non-secure callable */ - SAU->RNR = TFM_NS_REGION_VENEER; - SAU->RBAR = (memory_regions.veneer_base & SAU_RBAR_BADDR_Msk); - SAU->RLAR = (memory_regions.veneer_limit & SAU_RLAR_LADDR_Msk) - | SAU_RLAR_ENABLE_Msk - | SAU_RLAR_NSC_Msk; - - /* Configure the peripherals space */ - SAU->RNR = TFM_NS_REGION_PERIPH_1; - SAU->RBAR = (PERIPHERALS_BASE_NS_START & SAU_RBAR_BADDR_Msk); - SAU->RLAR = (PERIPHERALS_BASE_NS_END & SAU_RLAR_LADDR_Msk) - | SAU_RLAR_ENABLE_Msk; - - /* Secondary image partition */ - SAU->RNR = TFM_NS_SECONDARY_IMAGE_REGION; - SAU->RBAR = (memory_regions.secondary_partition_base & SAU_RBAR_BADDR_Msk); - SAU->RLAR = (memory_regions.secondary_partition_limit & SAU_RLAR_LADDR_Msk) - | SAU_RLAR_ENABLE_Msk; - - /* Allows SAU to define the code region as a NSC */ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - spctrl->nsccfg |= NSCCFG_CODENSC; -} - -/*------------------- Memory configuration functions -------------------------*/ - -void mpc_init_cfg(void) -{ - ARM_DRIVER_MPC* mpc_data_region0 = &Driver_ISRAM0_MPC; - ARM_DRIVER_MPC* mpc_data_region1 = &Driver_ISRAM1_MPC; - ARM_DRIVER_MPC* mpc_data_region2 = &Driver_ISRAM2_MPC; - ARM_DRIVER_MPC* mpc_data_region3 = &Driver_ISRAM3_MPC; - int32_t ret = ARM_DRIVER_OK; - - ret |= Driver_EFLASH0_MPC.Initialize(); - ret |= Driver_EFLASH0_MPC.ConfigRegion(memory_regions.non_secure_partition_base, - memory_regions.non_secure_partition_limit, - ARM_MPC_ATTR_NONSECURE); - - /* Secondary image region */ - ret |= Driver_EFLASH0_MPC.ConfigRegion(memory_regions.secondary_partition_base, - memory_regions.secondary_partition_limit, - ARM_MPC_ATTR_NONSECURE); - - ret |= mpc_data_region0->Initialize(); - ret |= mpc_data_region0->ConfigRegion(MPC_ISRAM0_RANGE_BASE_S, - MPC_ISRAM0_RANGE_LIMIT_S, - ARM_MPC_ATTR_SECURE); - - ret |= mpc_data_region1->Initialize(); - ret |= mpc_data_region1->ConfigRegion(MPC_ISRAM1_RANGE_BASE_S, - MPC_ISRAM1_RANGE_LIMIT_S, - ARM_MPC_ATTR_SECURE); - - ret |= mpc_data_region2->Initialize(); - ret |= mpc_data_region2->ConfigRegion(MPC_ISRAM2_RANGE_BASE_NS, - MPC_ISRAM2_RANGE_LIMIT_NS, - ARM_MPC_ATTR_NONSECURE); - - ret |= mpc_data_region3->Initialize(); - ret |= mpc_data_region3->ConfigRegion(MPC_ISRAM3_RANGE_BASE_NS, - MPC_ISRAM3_RANGE_LIMIT_NS, - ARM_MPC_ATTR_NONSECURE); - - if (ret != ARM_DRIVER_OK) { - MBED_ASSERT("MPC init failed!"); - } - - /* Add barriers to assure the MPC configuration is done before continue - * the execution. - */ - __DSB(); - __ISB(); -} - -void mpc_revert_non_secure_to_secure_cfg(void) -{ - ARM_DRIVER_MPC* mpc_data_region2 = &Driver_ISRAM2_MPC; - ARM_DRIVER_MPC* mpc_data_region3 = &Driver_ISRAM3_MPC; - int32_t ret = ARM_DRIVER_OK; - - ret |= Driver_EFLASH0_MPC.ConfigRegion(MPC_EFLASH0_RANGE_BASE_S, - MPC_EFLASH0_RANGE_LIMIT_S, - ARM_MPC_ATTR_SECURE); - - ret |= mpc_data_region2->ConfigRegion(MPC_ISRAM2_RANGE_BASE_S, - MPC_ISRAM2_RANGE_LIMIT_S, - ARM_MPC_ATTR_SECURE); - - ret |= mpc_data_region3->ConfigRegion(MPC_ISRAM3_RANGE_BASE_S, - MPC_ISRAM3_RANGE_LIMIT_S, - ARM_MPC_ATTR_SECURE); - - if (ret != ARM_DRIVER_OK) { - MBED_ASSERT("MPC revert config failed!"); - } - - /* Add barriers to assure the MPC configuration is done before continue - * the execution. - */ - __DSB(); - __ISB(); -} - -/*---------------------- PPC configuration functions -------------------------*/ - -void ppc_init_cfg(void) -{ - struct spctrl_def* spctrl = CMSDK_SPCTRL; - int32_t ret = ARM_DRIVER_OK; - - /* Grant non-secure access to peripherals in the APB PPC0 - * (timer0 and 1, dualtimer, mhu 0 and 1) - */ - ret |= Driver_APB_PPC0.Initialize(); - ret |= Driver_APB_PPC0.ConfigPeriph(CMSDK_TIMER0_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPC0.ConfigPeriph(CMSDK_TIMER1_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPC0.ConfigPeriph(CMSDK_DTIMER_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPC0.ConfigPeriph(CMSDK_MHU0_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPC0.ConfigPeriph(CMSDK_MHU1_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - - /* Grant non-secure access for APB MHU0 on EXP0 */ - ret |= Driver_APB_PPCEXP0.Initialize(); - ret |= Driver_APB_PPCEXP0.ConfigPeriph(MUSCA_B1_CI_MHU0_S_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP0.ConfigPeriph(MUSCA_B1_CI_MHU0_R_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - - /* Grant non-secure access for APB peripherals on EXP1 */ - ret |= Driver_APB_PPCEXP1.Initialize(); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_PWM0_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_PWM1_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_PWM2_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_I2S_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_UART0_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_UART1_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_AND_NONPRIV); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_I2C0_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_I2C1_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_SPI_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_GPTIMER_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_RTC_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_PVT_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - ret |= Driver_APB_PPCEXP1.ConfigPeriph(MUSCA_B1_SDIO_APB_PPC_POS, - ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - - if (ret != ARM_DRIVER_OK) { - MBED_ASSERT("PPC init failed!"); - } - - /* Configure the response to a security violation as a - * bus error instead of RAZ/WI - */ - spctrl->secrespcfg |= 1U; -} - -void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint16_t pos) -{ - /* Setting NS flag for peripheral to enable NS access */ - ARM_DRIVER_PPC *ppc_driver; - - if (bank >= PPC_BANK_COUNT) { - return; - } - - ppc_driver = ppc_bank_drivers[bank]; - if (ppc_driver) { - ppc_driver->ConfigPeriph(pos, ARM_PPC_NONSECURE_ONLY, - ARM_PPC_PRIV_ONLY); - } -} - -void ppc_configure_to_secure(enum ppc_bank_e bank, uint16_t pos) -{ - /* Clear NS flag for peripheral to prevent NS access */ - ARM_DRIVER_PPC *ppc_driver; - - if (bank >= PPC_BANK_COUNT) { - return; - } - - ppc_driver = ppc_bank_drivers[bank]; - if (ppc_driver) { - ppc_driver->ConfigPeriph(pos, ARM_PPC_SECURE_ONLY, - ARM_PPC_PRIV_ONLY); - } -} - -void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint16_t pos) -{ - ARM_DRIVER_PPC *ppc_driver; - - if (bank >= PPC_BANK_COUNT) { - return; - } - - ppc_driver = ppc_bank_drivers[bank]; - if (ppc_driver) { - ppc_driver->ConfigPeriph(pos, ARM_PPC_SECURE_ONLY, - ARM_PPC_PRIV_AND_NONPRIV); - } -} - -void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint16_t pos) -{ - ARM_DRIVER_PPC *ppc_driver; - - if (bank >= PPC_BANK_COUNT) { - return; - } - - ppc_driver = ppc_bank_drivers[bank]; - if (ppc_driver) { - ppc_driver->ConfigPeriph(pos, ARM_PPC_SECURE_ONLY, - ARM_PPC_PRIV_ONLY); - } -} - -void ppc_clear_irq(void) -{ - Driver_AHB_PPCEXP0.ClearInterrupt(); - Driver_APB_PPC0.ClearInterrupt(); - Driver_APB_PPC1.ClearInterrupt(); - Driver_APB_PPCEXP0.ClearInterrupt(); - Driver_APB_PPCEXP1.ClearInterrupt(); -} - - -void mbed_psa_system_reset_impl(void) -{ - __disable_irq(); - mpc_revert_non_secure_to_secure_cfg(); - - NVIC->ICPR[0] = UINT32_MAX; /* Clear all pending interrupts */ - NVIC->ICPR[1] = UINT32_MAX; /* Clear all pending interrupts */ - NVIC->ICPR[2] = UINT32_MAX; /* Clear all pending interrupts */ - NVIC->ICPR[3] = UINT32_MAX; /* Clear all pending interrupts */ - NVIC->ICPR[4] = UINT32_MAX; /* Clear all pending interrupts */ - NVIC->ICPR[5] = UINT32_MAX; /* Clear all pending interrupts */ - NVIC->ICPR[6] = UINT32_MAX; /* Clear all pending interrupts */ - NVIC->ICPR[7] = UINT32_MAX; /* Clear all pending interrupts */ - - NVIC_SystemReset(); - -} - diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/target_cfg.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/target_cfg.h deleted file mode 100644 index a45ec7fbe6b..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/target_cfg.h +++ /dev/null @@ -1,126 +0,0 @@ -/* - * Copyright (c) 2018-2020 Arm Limited - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#ifndef __TARGET_CFG_H__ -#define __TARGET_CFG_H__ - -#include -#include "tfm_peripherals_def.h" - -#ifdef __cplusplus -extern "C" { -#endif - -/** - * \brief Defines the word offsets of Slave Peripheral Protection Controller - * Registers - */ -enum ppc_bank_e -{ - PPC_SP_DO_NOT_CONFIGURE = -1, - PPC_SP_AHB_PPC0 = 0, - PPC_SP_RES0, - PPC_SP_RES1, - PPC_SP_RES2, - PPC_SP_AHB_PPC_EXP0, - PPC_SP_AHB_PPC_EXP1, - PPC_SP_AHB_PPC_EXP2, - PPC_SP_AHB_PPC_EXP3, - PPC_SP_APB_PPC0, - PPC_SP_APB_PPC1, - PPC_SP_RES3, - PPC_SP_RES4, - PPC_SP_APB_PPC_EXP0, - PPC_SP_APB_PPC_EXP1, - PPC_SP_APB_PPC_EXP2, - PPC_SP_APB_PPC_EXP3, -}; - -/** - * \brief Store the addresses of memory regions - */ -struct memory_region_limits { - uint32_t non_secure_code_start; - uint32_t non_secure_partition_base; - uint32_t non_secure_partition_limit; - uint32_t veneer_base; - uint32_t veneer_limit; - uint32_t secondary_partition_base; - uint32_t secondary_partition_limit; -}; - -/** - * \brief Holds the data necessary to do isolation for a specific peripheral. - */ -struct tfm_spm_partition_platform_data_t -{ - uint32_t periph_start; - uint32_t periph_limit; - int16_t periph_ppc_bank; - int16_t periph_ppc_loc; -}; - -/** - * \brief Configures the Memory Protection Controller. - */ -void mpc_init_cfg(void); - -/** - * \brief Set to secure the initialized non-secure regions of - * the Memory Protection Controller. - */ -void mpc_revert_non_secure_to_secure_cfg(void); - -/** - * \brief Configures the Peripheral Protection Controller. - */ -void ppc_init_cfg(void); - -/** - * \brief Restict access to peripheral to secure - */ -void ppc_configure_to_secure(enum ppc_bank_e bank, uint16_t loc); - -/** - * \brief Allow non-secure access to peripheral - */ -void ppc_configure_to_non_secure(enum ppc_bank_e bank, uint16_t loc); - -/** - * \brief Enable secure unprivileged access to peripheral - */ -void ppc_en_secure_unpriv(enum ppc_bank_e bank, uint16_t pos); - -/** - * \brief Clear secure unprivileged access to peripheral - */ -void ppc_clr_secure_unpriv(enum ppc_bank_e bank, uint16_t pos); - -/** - * \brief Clears PPC interrupt. - */ -void ppc_clear_irq(void); - -/** - * \brief Configures SAU and IDAU. - */ -void sau_and_idau_cfg(void); - -#ifdef __cplusplus -} -#endif - -#endif /* __TARGET_CFG_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/tfm_peripherals_def.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/tfm_peripherals_def.h deleted file mode 100644 index c65ac46b22d..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/tfm_peripherals_def.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * Copyright (c) 2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#ifndef __TFM_PERIPHERALS_DEF_H__ -#define __TFM_PERIPHERALS_DEF_H__ - -struct tfm_spm_partition_platform_data_t; - -extern struct tfm_spm_partition_platform_data_t tfm_peripheral_std_uart; - -#define TFM_PERIPHERAL_STD_UART (&tfm_peripheral_std_uart) - -#endif /* __TFM_PERIPHERALS_DEF_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/tfm_platform_system.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/tfm_platform_system.c deleted file mode 100644 index a9ec3219fed..00000000000 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_S/tfm_platform_system.c +++ /dev/null @@ -1,183 +0,0 @@ -/* - * Copyright (c) 2018-2020, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -#include -#include "platform_description.h" -#include "target_cfg.h" -#include "device_definition.h" -#include "psa/client.h" -#include "tfm_secure_api.h" -#include "tfm_ioctl_api.h" -#include "platform_srv_impl.h" - -#ifndef TFM_PSA_API -/*! - * \brief Verify access rights for memory addresses sent in io vectors - * - * \param[in] in_vec Pointer to in_vec array, which contains pointer - * to input arguments for the service - * \param[in] out_vec Pointer out_vec array, which contains pointer to - * output data of the pin service - * - * \return Returns true if memory is accessible by the service - */ -static bool memory_addr_check(const psa_invec *in_vec, - const psa_outvec *out_vec) -{ - if ((in_vec->base != NULL) && - (tfm_core_memory_permission_check((void *)in_vec->base, in_vec->len, - TFM_MEMORY_ACCESS_RO) == TFM_SUCCESS) && - (out_vec->base != NULL) && - (tfm_core_memory_permission_check((void *)out_vec->base, out_vec->len, - TFM_MEMORY_ACCESS_RW) == TFM_SUCCESS)) { - return true; - } else { - return false; - } -} -#endif /* TFM_PSA_API */ - -static enum tfm_platform_err_t -musca_b1_pin_service(const psa_invec *in_vec, - const psa_outvec *out_vec) -{ - struct tfm_pin_service_args_t *args; - uint32_t *result; - enum gpio_altfunc_t altfunc; - enum pinmode_select_t pin_mode; - -#ifndef TFM_PSA_API - if (memory_addr_check(in_vec, out_vec) == false) { - return TFM_PLATFORM_ERR_SYSTEM_ERROR; - } -#endif /* TFM_PSA_API */ - - if (in_vec->len != sizeof(struct tfm_pin_service_args_t) || - out_vec->len != sizeof(uint32_t)) { - return TFM_PLATFORM_ERR_INVALID_PARAM; - } - - args = (struct tfm_pin_service_args_t *)in_vec->base; - result = (uint32_t *)out_vec->base; - switch (args->type) { - case TFM_PIN_SERVICE_TYPE_SET_ALTFUNC: - altfunc = (enum gpio_altfunc_t)args->u.set_altfunc.alt_func; - *result = musca_b1_scc_set_alt_func(&MUSCA_B1_SCC_DEV_S, altfunc, - args->u.set_altfunc.pin_mask); - break; - case TFM_PIN_SERVICE_TYPE_SET_DEFAULT_IN: - altfunc = (enum gpio_altfunc_t)args->u.set_altfunc.alt_func; - *result = musca_b1_scc_set_default_in(&MUSCA_B1_SCC_DEV_S, altfunc, - args->u.set_default_in.pin_value, - args->u.set_default_in.default_in_value); - break; - case TFM_PIN_SERVICE_TYPE_SET_PIN_MODE: - pin_mode = (enum pinmode_select_t)args->u.set_pin_mode.pin_mode; - *result = musca_b1_scc_set_pinmode(&MUSCA_B1_SCC_DEV_S, - args->u.set_pin_mode.pin_mask, - pin_mode); - break; - default: - *result = SCC_INVALID_ARG; - break; - } - - return TFM_PLATFORM_ERR_SUCCESS; -} - -enum tfm_platform_err_t -tfm_platform_hal_gpio_service(const psa_invec *in_vec, - const psa_outvec *out_vec) -{ - struct tfm_gpio_service_args_t *args; - struct tfm_gpio_service_out_t *out; - enum gpio_cmsdk_direction_t dir; - /* Alternate function is configured through the SCC, this is not used - * on Musca-B1, the default value is passed to the driver - */ - enum gpio_cmsdk_altfunc_t altfunc = GPIO_CMSDK_MAIN_FUNC; - -#ifndef TFM_PSA_API - if (memory_addr_check(in_vec, out_vec) == false) { - return TFM_PLATFORM_ERR_SYSTEM_ERROR; - } -#endif /* TFM_PSA_API */ - - if (in_vec->len != sizeof(struct tfm_gpio_service_args_t) || - out_vec->len != sizeof(struct tfm_gpio_service_out_t)) { - return TFM_PLATFORM_ERR_INVALID_PARAM; - } - - args = (struct tfm_gpio_service_args_t *)in_vec->base; - out = (struct tfm_gpio_service_out_t *)out_vec->base; - switch (args->type) { - case TFM_GPIO_SERVICE_TYPE_INIT: - gpio_cmsdk_init(&GPIO0_CMSDK_DEV_S); - out->u.result = GPIO_CMSDK_ERR_NONE; - break; - case TFM_GPIO_SERVICE_TYPE_PIN_CONFIG: - dir = (enum gpio_cmsdk_direction_t)args->u.gpio_config.direction; - out->u.result = gpio_cmsdk_pin_config( - &GPIO0_CMSDK_DEV_S, - args->u.gpio_config.pin_num_or_mask, - dir, altfunc); - break; - case TFM_GPIO_SERVICE_TYPE_PIN_WRITE: - out->u.result = gpio_cmsdk_pin_write( - &GPIO0_CMSDK_DEV_S, - args->u.gpio_write.pin_num_or_mask, - args->u.gpio_write.value); - break; - case TFM_GPIO_SERVICE_TYPE_PIN_READ: - out->u.gpio_read_result.result = - gpio_cmsdk_pin_read(&GPIO0_CMSDK_DEV_S, - args->u.gpio_read.pin_num_or_mask, - &out->u.gpio_read_result.data); - break; - case TFM_GPIO_SERVICE_TYPE_PORT_CONFIG: - dir = (enum gpio_cmsdk_direction_t)args->u.gpio_config.direction; - out->u.result = gpio_cmsdk_port_config( - &GPIO0_CMSDK_DEV_S, - args->u.gpio_config.pin_num_or_mask, - dir, altfunc); - break; - case TFM_GPIO_SERVICE_TYPE_PORT_WRITE: - out->u.result = gpio_cmsdk_port_write( - &GPIO0_CMSDK_DEV_S, - args->u.gpio_write.pin_num_or_mask, - args->u.gpio_write.value); - break; - case TFM_GPIO_SERVICE_TYPE_PORT_READ: - out->u.gpio_read_result.result = - gpio_cmsdk_port_read(&GPIO0_CMSDK_DEV_S, - args->u.gpio_read.pin_num_or_mask, - &out->u.gpio_read_result.data); - break; - default: - out->u.result = GPIO_CMSDK_ERR_INVALID_ARG; - break; - } - - in_vec++; - out_vec++; - - return TFM_PLATFORM_ERR_SUCCESS; -} - -enum tfm_platform_err_t tfm_platform_hal_ioctl(tfm_platform_ioctl_req_t request, - psa_invec *in_vec, - psa_outvec *out_vec) -{ - switch (request) { - case TFM_PLATFORM_IOCTL_PIN_SERVICE: - return musca_b1_pin_service(in_vec, out_vec); - case TFM_PLATFORM_IOCTL_GPIO_SERVICE: - return tfm_platform_hal_gpio_service(in_vec, out_vec); - default: - return TFM_PLATFORM_ERR_NOT_SUPPORTED; - } -} diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_ARMC6/musca_ns.sct b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct similarity index 97% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_ARMC6/musca_ns.sct rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct index 0ed5d9e2e90..1ffda871c16 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_ARMC6/musca_ns.sct +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/musca_ns.sct @@ -18,7 +18,7 @@ * limitations under the License. */ -#include "../../../partition/region_defs.h" +#include "../../partition/region_defs.h" #include "../cmsis_nvic.h" #if !defined(MBED_ROM_START) diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_ns.S b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_ns.S similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_ns.S rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_ARMC6/startup_cmsdk_musca_ns.S diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_GCC_ARM/musca_ns.ld b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld similarity index 99% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_GCC_ARM/musca_ns.ld rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld index 7ae4d3c2479..20fac91e006 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_GCC_ARM/musca_ns.ld +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/musca_ns.ld @@ -22,7 +22,7 @@ /* Linker script to configure memory regions. */ /* This file will be run trough the pre-processor. */ -#include "../../../partition/region_defs.h" +#include "../../partition/region_defs.h" #include "../cmsis_nvic.h" /* Stack size is 1K for Mbed-OS */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_ns.S b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_ns.S similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_ns.S rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/TOOLCHAIN_GCC_ARM/startup_cmsdk_musca_ns.S diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/cmsis_nvic.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/cmsis_nvic.h similarity index 96% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/cmsis_nvic.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/cmsis_nvic.h index 72e4151081c..19ff575a421 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/cmsis_nvic.h +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/cmsis_nvic.h @@ -24,7 +24,7 @@ #ifndef MBED_CMSIS_NVIC_H #define MBED_CMSIS_NVIC_H -#include "../../partition/region_defs.h" +#include "../partition/region_defs.h" #define NVIC_NUM_VECTORS (16 + 128) /** Location of vectors to move in RAM */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/cmsis_nvic_virtual.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/cmsis_nvic_virtual.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/cmsis_nvic_virtual.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/cmsis_nvic_virtual.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/cmsis_nvic_virtual.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/cmsis_nvic_virtual.h similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/cmsis_nvic_virtual.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/cmsis_nvic_virtual.h diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/device_cfg.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/device_cfg.h index e52df8a76ea..0079b56d911 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/device_cfg.h +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/device_cfg.h @@ -29,52 +29,7 @@ * This is a default device configuration file with all peripherals enabled. */ -#if defined(TARGET_MUSCA_B1_S) -/* ARM SCC */ -#define MUSCA_B1_SCC_S -#define MUSCA_B1_SCC_DEV MUSCA_B1_SCC_DEV_S - -/* ARM Memory Protection Controller (MPC) SIE 200 */ -#define MPC_ISRAM0_S -#define MPC_ISRAM1_S -#define MPC_ISRAM2_S -#define MPC_ISRAM3_S -#define MPC_CODE_SRAM_S -#define MPC_CODE_SRAM_NS -#define MPC_QSPI_S -#define MPC_QSPI_NS -#define MPC_EFLASH0_S -#define MPC_EFLASH1_S - -/* ARM Peripheral Protection Controllers (PPC) */ -#define AHB_PPC0_S -#define AHB_PPCEXP0_S -#define AHB_PPCEXP1_S -#define AHB_PPCEXP2_S -#define AHB_PPCEXP3_S - -#define APB_PPC0_S -#define APB_PPC1_S -#define APB_PPCEXP0_S -#define APB_PPCEXP1_S -#define APB_PPCEXP2_S -#define APB_PPCEXP3_S - -/* Cadence QSPI Flash Controller */ -#define QSPI_IP6514E_S - -/* MT25QL Flash memory library */ -#define MT25QL_S - -/* GPIO */ -#define GPIO0_CMSDK_S -#define GPIO0_CMSDK_DEV GPIO0_CMSDK_DEV_S - -#endif // defined(TARGET_MUSCA_B1_S) - - -#if defined(TARGET_MUSCA_B1_NS) /*ARM UART Controller PL011*/ #define UART0_PL011_NS @@ -133,6 +88,5 @@ #define USEC_REPORTED_BITS (32 - USEC_REPORTED_SHIFT) #define UART_DEFAULT_BAUD_RATE 9600U -#endif // TARGET_MUSCA_B1_NS #endif /* __ARM_LTD_DEVICE_CFG_H__ */ diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/i2c_ip6510_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/i2c_ip6510_drv.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/i2c_ip6510_drv.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/i2c_ip6510_drv.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/i2c_ip6510_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/i2c_ip6510_drv.h similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/i2c_ip6510_drv.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/i2c_ip6510_drv.h diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/timer_gp_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/timer_gp_drv.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/timer_gp_drv.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/timer_gp_drv.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/timer_gp_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/timer_gp_drv.h similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/timer_gp_drv.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/timer_gp_drv.h diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/uart_pl011_drv.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/uart_pl011_drv.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/uart_pl011_drv.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/uart_pl011_drv.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/uart_pl011_drv.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/uart_pl011_drv.h similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/device/drivers/uart_pl011_drv.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/device/drivers/uart_pl011_drv.h diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/gpio_api_ns.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/gpio_api_ns.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/gpio_api_ns.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/gpio_api_ns.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/gpio_irq_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/gpio_irq_api.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/gpio_irq_api.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/gpio_irq_api.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/i2c_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/i2c_api.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/i2c_api.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/i2c_api.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/lp_ticker.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/lp_ticker.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/lp_ticker.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/lp_ticker.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/mbed_serial_platform.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/mbed_serial_platform.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/mbed_serial_platform.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/mbed_serial_platform.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/mbed_serial_platform.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/mbed_serial_platform.h similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/mbed_serial_platform.h rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/mbed_serial_platform.h diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/objects.h b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/objects.h index 6a6405436d8..f19fe1d0ae4 100644 --- a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/objects.h +++ b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/objects.h @@ -31,7 +31,6 @@ extern "C" { #endif -#if TARGET_MUSCA_B1_NS struct serial_s { struct uart_pl011_dev_t *uart_dev; UARTName uart_index; /* UART device number */ @@ -39,7 +38,6 @@ struct serial_s { IRQn_Type rx_irq; IRQn_Type rx_timeout_irq; }; -#endif // TARGET_MUSCA_B1_NS #if DEVICE_FLASH struct flash_s { diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/pinmap_ns.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/pinmap_ns.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/pinmap_ns.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/pinmap_ns.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/LICENSE-permissive-binary-license-1.0.txt b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/LICENSE-permissive-binary-license-1.0.txt similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/LICENSE-permissive-binary-license-1.0.txt rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/LICENSE-permissive-binary-license-1.0.txt diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/README.md b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/README.md similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/README.md rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/README.md diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/cmse_lib.o b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/cmse_lib.o similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/cmse_lib.o rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/cmse_lib.o diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/crypto_access_control.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/crypto_access_control.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/crypto_access_control.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/crypto_access_control.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/mcuboot.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/mcuboot.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/mcuboot.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/mcuboot.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/spm_client.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/spm_client.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/spm_client.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/spm_client.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/spm_server.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/spm_server.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/spm_server.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/spm_server.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/spm_smoke.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/spm_smoke.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/spm_smoke.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/spm_smoke.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/tfm.bin b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/tfm.bin similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/tfm.bin rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/tfm.bin diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/serial_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/serial_api.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/serial_api.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/serial_api.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/sleep_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/sleep_api.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/sleep_api.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/sleep_api.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/tfm_ioctl_ns_api.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/tfm_ioctl_ns_api.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/tfm_ioctl_ns_api.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/tfm_ioctl_ns_api.c diff --git a/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/us_ticker.c b/targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/us_ticker.c similarity index 100% rename from targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/us_ticker.c rename to targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/us_ticker.c diff --git a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/cmsis_nvic_virtual.c b/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/cmsis_nvic_virtual.c deleted file mode 100644 index 39d02c73daf..00000000000 --- a/targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/device/cmsis_nvic_virtual.c +++ /dev/null @@ -1,31 +0,0 @@ -/* - * Copyright (c) 2018 Arm Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -#if MBED_CONF_PSA_PRESENT - -#include "cmsis_nvic_virtual.h" -#include "mbed_toolchain.h" - -MBED_NORETURN void mbed_psa_system_reset(); - -void __NVIC_TFMSystemReset(void) -{ - mbed_psa_system_reset(); -} - -#endif // MBED_CONF_PSA_PRESENT diff --git a/targets/targets.json b/targets/targets.json index 11e99bd7e70..46754cbff76 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -2548,161 +2548,6 @@ "5" ] }, - "LPC55S69": { - "public": false, - "inherits": [ - "Target" - ], - "default_toolchain": "ARMC6", - "supported_form_factors": [ - "ARDUINO" - ], - "macros": [ - "CPU_LPC55S69JBD100_cm33_core0" - ], - "extra_labels": [ - "NXP", - "MCUXpresso_MCUS", - "LPCXpresso", - "LPC" - ], - "detect_code": [ - "0236" - ], - "device_name": "LPC55S69JBD100", - "release_versions": [ - "5" - ], - "program_cycle_s": 10, - "sectors": [ - [ - 0, - 512 - ] - ] - }, - "LPC55S69_NS": { - "inherits": [ - "NSPE_Target", - "LPC55S69" - ], - "core": "Cortex-M33FE-NS", - "supported_toolchains": [ - "ARMC6", - "GCC_ARM", - "IAR" - ], - "macros_add": [ - "__STARTUP_CLEAR_BSS", - "MBED_FAULT_HANDLER_DISABLED", - "CMSIS_NVIC_VIRTUAL", - "MBED_MPU_CUSTOM", - "NXP_LPADC", - "MBED_TICKLESS" - ], - "components_add": [ - "FLASHIAP" - ], - "extra_labels_add": [ - "M33_NS", - "PSA", - "TFM" - ], - "device_has_add": [ - "USTICKER", - "RTC", - "ANALOGIN", - "I2C", - "I2CSLAVE", - "INTERRUPTIN", - "PORTIN", - "PORTINOUT", - "PORTOUT", - "SERIAL", - "SERIAL_FC", - "SLEEP", - "SPI", - "SPISLAVE", - "FLASH", - "STDIO_MESSAGES" - ], - "post_binary_hook": { - "function": "LPC55S69Code.binary_hook" - }, - "secure_image_filename": "tfm.bin", - "overrides": { - "non-secure-rom-start": "0x00030000", - "non-secure-rom-size": "0x68000", - "non-secure-ram-start": "0x20022000", - "non-secure-ram-size": "0x22000", - "secure-rom-start": "0x10000000", - "secure-rom-size": "0x28000", - "secure-ram-start": "0x30000000", - "secure-ram-size": "0x22000", - "tickless-from-us-ticker": true, - "init-us-ticker-at-boot": true - }, - "OUTPUT_EXT": "hex", - "bootloader_supported": true, - "detect_code": [ - "0236" - ] - }, - "LPC55S69_S": { - "inherits": [ - "SPE_Target", - "LPC55S69" - ], - "core": "Cortex-M33FE", - "supported_toolchains": [ - "ARMC6" - ], - "macros_add": [ - "__STARTUP_CLEAR_BSS_MULTIPLE", - "__STARTUP_COPY_MULTIPLE", - "MBED_MPU_CUSTOM", - "DAUTH_CHIP_DEFAULT", - "MBEDTLS_PSA_CRYPTO_SPM" - ], - "components_add": [ - "FLASHIAP" - ], - "extra_labels_add": [ - "M33_S", - "PSA", - "TFM" - ], - "device_has_add": [ - "FLASH", - "TRNG" - ], - "deliver_to_target": "LPC55S69_NS", - "delivery_dir": "TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_LPC55S69/TARGET_M33_NS/prebuilt", - "overrides": { - "non-secure-rom-start": "0x00030000", - "non-secure-rom-size": "0x68000", - "non-secure-ram-start": "0x20022000", - "non-secure-ram-size": "0x22000", - "secure-rom-start": "0x10000000", - "secure-rom-size": "0x28000", - "secure-ram-start": "0x30000000", - "secure-ram-size": "0x22000" - } - }, - "HANI_IOT": { - "inherits": [ - "LPC55S69_NS" - ], - "detect_code": [ - "0360" - ], - "components_add": [ - "SPIF" - ], - "extra_labels_remove": [ - "LPCXpresso" - ] - }, "NUCLEO_F030R8": { "inherits": [ "FAMILY_STM32" @@ -7469,44 +7314,6 @@ "non-secure-ram-size": "0xf000" } }, - "ARM_MUSCA_A1_S": { - "inherits": [ - "SPE_Target", - "ARM_MUSCA_A1" - ], - "core": "Cortex-M33", - "supported_toolchains": [ - "ARMC6", - "GCC_ARM" - ], - "device_has_add": [ - "FLASH" - ], - "macros": [ - "__STARTUP_CLEAR_BSS_MULTIPLE", - "__STARTUP_COPY_MULTIPLE", - "MBED_MPU_CUSTOM", - "DAUTH_CHIP_DEFAULT", - "MBEDTLS_PSA_CRYPTO_SPM", - "MBEDTLS_ENTROPY_NV_SEED" - ], - "components_add": [ - "FLASHIAP" - ], - "extra_labels_add": [ - "MUSCA_A1_S", - "PSA", - "TFM" - ], - "deliver_to_target": "ARM_MUSCA_A1_NS", - "delivery_dir": "TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt", - "overrides": { - "secure-rom-start": "0x10020400", - "secure-rom-size": "0x7f800", - "secure-ram-start": "0x30000000", - "secure-ram-size": "0x11000" - } - }, "ARM_MUSCA_B1": { "public": false, "inherits": [ @@ -7564,44 +7371,6 @@ "non-secure-ram-size": "0x40000" } }, - "ARM_MUSCA_B1_S": { - "inherits": [ - "SPE_Target", - "ARM_MUSCA_B1" - ], - "core": "Cortex-M33", - "supported_toolchains": [ - "ARMC6", - "GCC_ARM" - ], - "device_has_add": [ - "FLASH" - ], - "macros": [ - "__STARTUP_CLEAR_BSS_MULTIPLE", - "__STARTUP_COPY_MULTIPLE", - "MBED_MPU_CUSTOM", - "DAUTH_CHIP_DEFAULT", - "MBEDTLS_PSA_CRYPTO_SPM", - "MBEDTLS_ENTROPY_NV_SEED" - ], - "components_add": [ - "FLASHIAP" - ], - "extra_labels_add": [ - "MUSCA_B1_S", - "PSA", - "TFM" - ], - "deliver_to_target": "ARM_MUSCA_B1_NS", - "delivery_dir": "TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt", - "overrides": { - "secure-rom-start": "0x1A020400", - "secure-rom-size": "0x4f800", - "secure-ram-start": "0x30000000", - "secure-ram-size": "0x40000" - } - }, "RZ_A1XX": { "inherits": [ "Target" @@ -11084,88 +10853,6 @@ "mbed_ram_start": "0x20000000", "mbed_ram_size": "0x2000" }, - "NU_PFM_M2351_NS": { - "inherits": [ - "NSPE_Target", - "NU_PFM_M2351" - ], - "core": "Cortex-M23-NS", - "supported_toolchains": [ - "ARMC6", - "GCC_ARM", - "IAR" - ], - "tfm.level": 1, - "extra_labels_add": [ - "M23_NS", - "PSA", - "TFM", - "NU_PREBUILD_SECURE" - ], - "macros_add": [ - "CMSIS_NVIC_VIRTUAL", - "MBEDTLS_PSA_CRYPTO_C" - ], - "components_add": [ - "FLASHIAP" - ], - "post_binary_hook": { - "function": "M2351Code.merge_secure" - }, - "secure_image_filename": "tfm.hex", - "overrides": { - "secure-rom-start": "0x0", - "secure-rom-size": "0x3C000", - "secure-ram-start": "0x20000000", - "secure-ram-size": "0x10000", - "non-secure-rom-start": "0x1003C000", - "non-secure-rom-size": "0x44000", - "non-secure-ram-start": "0x30010000", - "non-secure-ram-size": "0x8000" - } - }, - "NU_PFM_M2351_S": { - "inherits": [ - "SPE_Target", - "NU_PFM_M2351" - ], - "core": "Cortex-M23", - "supported_toolchains": [ - "ARMC6" - ], - "tfm.level": 1, - "extra_labels_add": [ - "M23_S", - "PSA", - "TFM" - ], - "device_has_remove": [ - "SERIAL", - "SERIAL_ASYNCH", - "SERIAL_FC", - "STDIO_MESSAGES" - ], - "macros_add": [ - "DAUTH_CHIP_DEFAULT", - "MBEDTLS_PSA_CRYPTO_C", - "MBEDTLS_PSA_CRYPTO_SPM" - ], - "components_add": [ - "FLASHIAP" - ], - "deliver_to_target": "NU_PFM_M2351_NS", - "delivery_dir": "TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/TARGET_NU_PFM_M2351_NS/TARGET_NU_PREBUILD_SECURE", - "overrides": { - "secure-rom-start": "0x0", - "secure-rom-size": "0x3C000", - "secure-ram-start": "0x20000000", - "secure-ram-size": "0x10000", - "non-secure-rom-start": "0x1003C000", - "non-secure-rom-size": "0x44000", - "non-secure-ram-start": "0x30010000", - "non-secure-ram-size": "0x8000" - } - }, "NUMAKER_M252KG": { "core": "Cortex-M23", "trustzone": false, diff --git a/tools/build.py b/tools/build.py index bde45610506..027b6ffcca2 100644 --- a/tools/build.py +++ b/tools/build.py @@ -44,8 +44,6 @@ from tools.utils import argparse_dir_not_parent from tools.utils import NoValidToolchainException from tools.utils import print_end_warnings -from tools.psa import generate_psa_sources -from tools.resources import OsAndSpeResourceFilter def main(): start = time() @@ -189,12 +187,6 @@ def main(): if options.source_dir: resource_filter = None - if target.is_PSA_secure_target: - generate_psa_sources( - source_dirs=options.source_dir, - ignore_paths=[options.build_dir] - ) - resource_filter = OsAndSpeResourceFilter() lib_build_res = build_library( options.source_dir, options.build_dir, target, toolchain_name, diff --git a/tools/build_api.py b/tools/build_api.py index a92fc1af376..8da1666d48d 100755 --- a/tools/build_api.py +++ b/tools/build_api.py @@ -42,7 +42,7 @@ MBED_CONFIG_FILE, MBED_LIBRARIES_DRIVERS, MBED_LIBRARIES_PLATFORM, MBED_LIBRARIES_HAL, BUILD_DIR) -from .resources import Resources, FileType, FileRef, PsaManifestResourceFilter +from .resources import Resources, FileType, FileRef from .notifier.mock import MockNotifier from .targets import TARGET_NAMES, TARGET_MAP, CORE_ARCH, Target from .libraries import Library @@ -422,7 +422,6 @@ def get_mbed_official_release(version): ) for target in TARGET_NAMES \ if (hasattr(TARGET_MAP[target], 'release_versions') and version in TARGET_MAP[target].release_versions) - and not Target.get_target(target).is_PSA_secure_target ) ) @@ -624,11 +623,7 @@ def build_project(src_paths, build_path, target, toolchain_name, into_dir, extra_artifacts = toolchain.config.deliver_into() if into_dir: copy_when_different(res[0], into_dir) - if not extra_artifacts: - if toolchain.target.is_TrustZone_secure_target: - cmse_lib = join(dirname(res[0]), "cmse_lib.o") - copy_when_different(cmse_lib, into_dir) - else: + if extra_artifacts: for tc, art in extra_artifacts: if toolchain_name == tc: copy_when_different(join(build_path, art), into_dir) @@ -774,7 +769,6 @@ def build_library(src_paths, build_path, target, toolchain_name, res = Resources(notify).scan_with_toolchain( src_paths, toolchain, dependencies_paths, inc_dirs=inc_dirs) res.filter(resource_filter) - res.filter(PsaManifestResourceFilter()) # Copy headers, objects and static libraries - all files needed for # static lib diff --git a/tools/config/__init__.py b/tools/config/__init__.py index bb0879a0214..88d593ad27d 100755 --- a/tools/config/__init__.py +++ b/tools/config/__init__.py @@ -706,25 +706,14 @@ def _get_primary_memory_override(self, memory_type): ) if hasattr(self.target, "mbed_{}_size".format(memory_type)): mem_size = getattr(self.target, "mbed_{}_size".format(memory_type)) - if ( - self.target.is_PSA_non_secure_target or - self.target.is_PSA_secure_target - ): + if self.target.is_PSA_non_secure_target: config, _ = self.get_config_data() - if self.target.is_PSA_secure_target: - mem_start = config.get( - "target.secure-{}-start".format(memory_type), mem_start - ).value - mem_size = config.get( - "target.secure-{}-size".format(memory_type), mem_size - ).value - elif self.target.is_PSA_non_secure_target: - mem_start = config.get( - "target.non-secure-{}-start".format(memory_type), mem_start - ).value - mem_size = config.get( - "target.non-secure-{}-size".format(memory_type), mem_size - ).value + mem_start = config.get( + "target.non-secure-{}-start".format(memory_type), mem_start + ).value + mem_size = config.get( + "target.non-secure-{}-size".format(memory_type), mem_size + ).value if mem_start and not isinstance(mem_start, int): mem_start = int(mem_start, 0) if mem_size and not isinstance(mem_size, int): diff --git a/tools/export/cces/__init__.py b/tools/export/cces/__init__.py index cb193aaa8fa..e4180d07d47 100644 --- a/tools/export/cces/__init__.py +++ b/tools/export/cces/__init__.py @@ -53,9 +53,12 @@ def is_target_supported(cls, target_name): target_name - the name of the target. """ target = TARGET_MAP[target_name] - return (cls.TOOLCHAIN in target.supported_toolchains) \ - and hasattr(target, "device_name") \ - and (target.device_name in SUPPORTED_DEVICES) + if not target.is_TFM_target: + return (cls.TOOLCHAIN in target.supported_toolchains) \ + and hasattr(target, "device_name") \ + and (target.device_name in SUPPORTED_DEVICES) + else: + return False @property def flags(self): diff --git a/tools/export/cdt/__init__.py b/tools/export/cdt/__init__.py index d9f83f99e9c..e71fa7a409a 100644 --- a/tools/export/cdt/__init__.py +++ b/tools/export/cdt/__init__.py @@ -122,10 +122,13 @@ class EclipseArmc5(Eclipse, Armc5): @classmethod def is_target_supported(cls, target_name): target = TARGET_MAP[target_name] - if int(target.build_tools_metadata["version"]) > 0: - return "ARMC5" in target.supported_toolchains + if not target.is_TFM_target: + if int(target.build_tools_metadata["version"]) > 0: + return "ARMC5" in target.supported_toolchains + else: + return True else: - return True + return False class EclipseIAR(Eclipse, IAR): LOAD_EXE = True diff --git a/tools/export/cmsis/__init__.py b/tools/export/cmsis/__init__.py index a4569122b57..874610bf2d3 100644 --- a/tools/export/cmsis/__init__.py +++ b/tools/export/cmsis/__init__.py @@ -129,7 +129,10 @@ class CMSIS(Exporter): @classmethod def is_target_supported(cls, target_name): target = TARGET_MAP[target_name] - return cls.TOOLCHAIN in target.supported_toolchains + if not target.is_TFM_target: + return cls.TOOLCHAIN in target.supported_toolchains + else: + return False def make_key(self, src): """turn a source file into its group name""" diff --git a/tools/export/exporters.py b/tools/export/exporters.py index 1ce9f275703..7d092c9839a 100644 --- a/tools/export/exporters.py +++ b/tools/export/exporters.py @@ -325,8 +325,11 @@ def is_target_supported(cls, target_name): target_name - the name of the target. """ target = TARGET_MAP[target_name] - return bool(set(target.resolution_order_names).intersection(set(cls.TARGETS))) \ - and cls.TOOLCHAIN in target.supported_toolchains + if not target.is_TFM_target: + return bool(set(target.resolution_order_names).intersection(set(cls.TARGETS))) \ + and cls.TOOLCHAIN in target.supported_toolchains + else: + return False @classmethod @@ -351,11 +354,14 @@ def filter_dot(str): def apply_supported_whitelist(compiler, whitelist, target): """Generate a list of supported targets for a given compiler and post-binary hook white-list.""" - if compiler not in target.supported_toolchains: - return False - if not hasattr(target, "post_binary_hook"): - return True - if target.post_binary_hook['function'] in whitelist: - return True + if not target.is_TFM_target: + if compiler not in target.supported_toolchains: + return False + if not hasattr(target, "post_binary_hook"): + return True + if target.post_binary_hook['function'] in whitelist: + return True + else: + return False else: return False diff --git a/tools/export/iar/__init__.py b/tools/export/iar/__init__.py index 5090b5eba5e..ca0cb153a29 100644 --- a/tools/export/iar/__init__.py +++ b/tools/export/iar/__init__.py @@ -18,13 +18,16 @@ def _supported(mcu, iar_targets): - if "IAR" not in mcu.supported_toolchains: + if not mcu.is_TFM_target: + if "IAR" not in mcu.supported_toolchains: + return False + if hasattr(mcu, 'device_name') and mcu.device_name in iar_targets: + return True + if mcu.name in iar_targets: + return True + return False + else: return False - if hasattr(mcu, 'device_name') and mcu.device_name in iar_targets: - return True - if mcu.name in iar_targets: - return True - return False _iar_defs = os.path.join( diff --git a/tools/export/makefile/__init__.py b/tools/export/makefile/__init__.py index 19cf24e8dbe..ca34ebe4aab 100644 --- a/tools/export/makefile/__init__.py +++ b/tools/export/makefile/__init__.py @@ -289,18 +289,21 @@ class Armc5(Arm): @classmethod def is_target_supported(cls, target_name): target = TARGET_MAP[target_name] - if int(target.build_tools_metadata["version"]) > 0: - #Although toolchain name is set to ARM above we should check for ARMC5 for 5.12/onwards - if "ARMC5" not in target.supported_toolchains: - return False - - arm_res = apply_supported_whitelist( - "ARM", cls.POST_BINARY_WHITELIST, target - ) - armc5_res = apply_supported_whitelist( - "ARMC5", cls.POST_BINARY_WHITELIST, target - ) - return arm_res or armc5_res + if not target.is_TFM_target: + if int(target.build_tools_metadata["version"]) > 0: + # Although toolchain name is set to ARM above we should check for ARMC5 for 5.12/onwards + if "ARMC5" not in target.supported_toolchains: + return False + + arm_res = apply_supported_whitelist( + "ARM", cls.POST_BINARY_WHITELIST, target + ) + armc5_res = apply_supported_whitelist( + "ARMC5", cls.POST_BINARY_WHITELIST, target + ) + return arm_res or armc5_res + else: + return False class Armc6(Arm): """ARM Compiler 6 (armclang) specific generic makefile target""" @@ -310,23 +313,25 @@ class Armc6(Arm): @classmethod def is_target_supported(cls, target_name): target = TARGET_MAP[target_name] - - if int(target.build_tools_metadata["version"]) > 0: - if not (len(set(target.supported_toolchains).intersection( - set(["ARM", "ARMC6"]))) > 0): - return False - - if not apply_supported_whitelist( - cls.TOOLCHAIN, cls.POST_BINARY_WHITELIST, target): - #ARMC6 is not in the list, but also check for ARM as ARM represents ARMC6 for 5.12/onwards - #and still keep cls.TOOLCHAIN as ARMC6 as thats the toolchain we want to use - return apply_supported_whitelist( - "ARM", cls.POST_BINARY_WHITELIST, target) + if not target.is_TFM_target: + if int(target.build_tools_metadata["version"]) > 0: + if not (len(set(target.supported_toolchains).intersection( + set(["ARM", "ARMC6"]))) > 0): + return False + + if not apply_supported_whitelist( + cls.TOOLCHAIN, cls.POST_BINARY_WHITELIST, target): + # ARMC6 is not in the list, but also check for ARM as ARM represents ARMC6 for 5.12/onwards + # and still keep cls.TOOLCHAIN as ARMC6 as thats the toolchain we want to use + return apply_supported_whitelist( + "ARM", cls.POST_BINARY_WHITELIST, target) + else: + return True else: - return True + return apply_supported_whitelist( + cls.TOOLCHAIN, cls.POST_BINARY_WHITELIST, target) else: - return apply_supported_whitelist( - cls.TOOLCHAIN, cls.POST_BINARY_WHITELIST, target) + return class IAR(Makefile): diff --git a/tools/export/sw4stm32/__init__.py b/tools/export/sw4stm32/__init__.py index da6a7e1e048..74df6a2277c 100644 --- a/tools/export/sw4stm32/__init__.py +++ b/tools/export/sw4stm32/__init__.py @@ -298,10 +298,12 @@ class Sw4STM32(GNUARMEclipse): @classmethod def is_target_supported(cls, target_name): target = TARGET_MAP[target_name] - target_supported = bool(set(target.resolution_order_names) - .intersection(set(cls.BOARDS.keys()))) - toolchain_supported = cls.TOOLCHAIN in target.supported_toolchains - return target_supported and toolchain_supported + if not target.is_TFM_target: + target_supported = bool(set(target.resolution_order_names) + .intersection(set(cls.BOARDS.keys()))) + toolchain_supported = cls.TOOLCHAIN in target.supported_toolchains + return target_supported and toolchain_supported + return False def __gen_dir(self, dir_name): """ diff --git a/tools/export/uvision/__init__.py b/tools/export/uvision/__init__.py index 503e28b2d88..f75b40c6b42 100644 --- a/tools/export/uvision/__init__.py +++ b/tools/export/uvision/__init__.py @@ -390,23 +390,26 @@ class UvisionArmc5(Uvision): @classmethod def is_target_supported(cls, target_name): target = TARGET_MAP[target_name] - if int(target.build_tools_metadata["version"]) > 0: - #Just check for ARMC5 as ARMC5 must be there irrespective of whether uARM is there or not if the target is staying with ARMC5 - if "ARMC5" not in target.supported_toolchains: + if not target.is_TFM_target: + if int(target.build_tools_metadata["version"]) > 0: + # Just check for ARMC5 as ARMC5 must be there irrespective of whether uARM is there or not if the target is staying with ARMC5 + if "ARMC5" not in target.supported_toolchains: + return False + else: + if not (set(target.supported_toolchains).intersection( + set(["ARM", "uARM"]))): + return False + + if not DeviceCMSIS.check_supported(target_name): return False - else: - if not (set(target.supported_toolchains).intersection( - set(["ARM", "uARM"]))): + if "Cortex-A" in target.core: + return False + if not hasattr(target, "post_binary_hook"): + return True + if target.post_binary_hook['function'] in cls.POST_BINARY_WHITELIST: + return True + else: return False - - if not DeviceCMSIS.check_supported(target_name): - return False - if "Cortex-A" in target.core: - return False - if not hasattr(target, "post_binary_hook"): - return True - if target.post_binary_hook['function'] in cls.POST_BINARY_WHITELIST: - return True else: return False @@ -419,21 +422,24 @@ class UvisionArmc6(Uvision): @classmethod def is_target_supported(cls, target_name): target = TARGET_MAP[target_name] - if int(target.build_tools_metadata["version"]) > 0: - if not len(set(target.supported_toolchains).intersection( - set(["ARM", "ARMC6"]))) > 0: + if not target.is_TFM_target: + if int(target.build_tools_metadata["version"]) > 0: + if not len(set(target.supported_toolchains).intersection( + set(["ARM", "ARMC6"]))) > 0: + return False + else: + if "ARMC6" not in target.supported_toolchains: + return False + + if not DeviceCMSIS.check_supported(target_name): return False - else: - if "ARMC6" not in target.supported_toolchains: + if "Cortex-A" in target.core: + return False + if not hasattr(target, "post_binary_hook"): + return True + if target.post_binary_hook['function'] in cls.POST_BINARY_WHITELIST: + return True + else: return False - - if not DeviceCMSIS.check_supported(target_name): - return False - if "Cortex-A" in target.core: - return False - if not hasattr(target, "post_binary_hook"): - return True - if target.post_binary_hook['function'] in cls.POST_BINARY_WHITELIST: - return True else: return False diff --git a/tools/importer/tfm_importer.json b/tools/importer/tfm_importer.json deleted file mode 100644 index 67d44d47f4a..00000000000 --- a/tools/importer/tfm_importer.json +++ /dev/null @@ -1,100 +0,0 @@ -{ - "files": [ - { - "src_file": "interface/src/tfm_ns_lock_rtx.c", - "dest_file": "components/TARGET_PSA/TARGET_TFM/COMPONENT_NSPE/interface/src/tfm_ns_lock_rtx.c" - }, - { - "src_file": "interface/src/tfm_psa_ns_api.c", - "dest_file": "components/TARGET_PSA/TARGET_TFM/COMPONENT_NSPE/interface/src/tfm_psa_ns_api.c" - }, - { - "src_file": "interface/include/psa_client.h", - "dest_file": "components/TARGET_PSA/TARGET_TFM/interface/include/psa_client.h" - }, - { - "src_file": "interface/include/psa_service.h", - "dest_file": "components/TARGET_PSA/TARGET_TFM/interface/include/psa_service.h" - }, - { - "src_file": "interface/include/tfm_api.h", - "dest_file": "components/TARGET_PSA/TARGET_TFM/interface/include/tfm_api.h" - }, - { - "src_file": "interface/include/tfm_ns_lock.h", - "dest_file": "components/TARGET_PSA/TARGET_TFM/interface/include/tfm_ns_lock.h" - }, - { - "src_file": "interface/include/tfm_ns_svc.h", - "dest_file": "components/TARGET_PSA/TARGET_TFM/interface/include/tfm_ns_svc.h" - }, - { - "src_file": "interface/include/tfm_nspm_svc_handler.h", - "dest_file": "components/TARGET_PSA/TARGET_TFM/interface/include/tfm_nspm_svc_handler.h" - }, - { - "src_file": "platform/include/tfm_spm_hal.h", - "dest_file": "components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/platform/include/tfm_spm_hal.h" - }, - { - "src_file": "secure_fw/ns_callable/tfm_psa_api_veneers.c", - "dest_file": "components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/ns_callable/tfm_psa_api_veneers.c" - } - ], - "folders": [ - { - "src_folder": "secure_fw/core", - "dest_folder": "components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core" - }, - { - "src_folder": "secure_fw/core/ipc", - "dest_folder": "components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc" - }, - { - "src_folder": "secure_fw/core/ipc/include", - "dest_folder": "components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/core/ipc/include" - }, - { - "src_folder": "secure_fw/include", - "dest_folder": "components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/include" - }, - { - "src_folder": "secure_fw/spm", - "dest_folder": "components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/secure_fw/spm" - }, - { - "src_folder": "bl2/include", - "dest_folder": "components/TARGET_PSA/TARGET_TFM/COMPONENT_SPE/bl2/include" - } - ], - "commit_sha": [ - { - "sha": "11bff3f3cbfbd3e2c284e884d0066531e6b47d7e", - "msg": "TF-M patch: General modifications, Remove un-needed files, Disable printf and uart, Modify include paths, Guard macros from mbed_lib with ifndef" - }, - { - "sha": "795e6418d0e73841868b351b605659a05c04e1f6", - "msg": "TF-M patch: Fix tfm_ns_lock_init issue (TF-M issue #239), Link to bug tracking: https://developer.trustedfirmware.org/T239" - }, - { - "sha": "35938a407133fe0c20c25b6fae2836148d1adfca", - "msg": "TF-M patch: Fix service handles not cleared issue (TF-M issue #230), Link to bug tracking: https://developer.trustedfirmware.org/T230" - }, - { - "sha": "910a402ce6c96b654cb6ae1a5b679e4f856c5419", - "msg": "TF-M patch: Fix tfm_psa_call_venner wrong argument type (TF-M issue #241), Link to bug tracking: https://developer.trustedfirmware.org/T241" - }, - { - "sha": "cb748c5608cd68a1dbecde5b3b2c1488c3d0d17b", - "msg": "TF-M patch: Change #if TFM_PSA_API to #ifdef TFM_PSA_API to avoid compiler errors as mbed-cli only generates "-D" macros only for "macros" defined in targets.json, TF-M task link: https://developer.trustedfirmware.org/T396" - }, - { - "sha": "9a5110561a60ec9f663079a25ec54f7ad0832743", - "msg": "TF-M patch: Remove secure_fw/core/tfm_func_api.c which is required only when TFM_PSA_API is not set" - }, - { - "sha": "6e899b3cc98c3e1811a160df09abbccddb2fa014", - "msg": "TF-M patch/workaround related to (TF-M issue #T240), Link to bug tracking: https://developer.trustedfirmware.org/T240, The issue is fixed by TF-M team. However they autogenerate region details (code, ro, rw, zi and stack ) using linker scripts and in mbed-os we also autogenerate region details but using mix of service definition in json file and other template files." - } - ] -} diff --git a/tools/make.py b/tools/make.py index fe3f6584f71..f01e22eb52a 100644 --- a/tools/make.py +++ b/tools/make.py @@ -55,8 +55,6 @@ from tools.utils import print_large_string from tools.settings import ROOT from tools.targets import Target -from tools.psa import generate_psa_sources -from tools.resources import OsAndSpeResourceFilter def default_args_dict(options): return dict( @@ -336,13 +334,6 @@ def main(): if options.source_dir is not None: resource_filter = None - if target.is_PSA_secure_target: - generate_psa_sources( - source_dirs=options.source_dir, - ignore_paths=[options.build_dir] - ) - resource_filter = OsAndSpeResourceFilter() - wrapped_build_project( options.source_dir, options.build_dir, diff --git a/tools/project.py b/tools/project.py index 76cc051bd4c..a943d3dfcc3 100644 --- a/tools/project.py +++ b/tools/project.py @@ -53,8 +53,6 @@ from tools.utils import NotSupportedException from tools.options import extract_profile, list_profiles, extract_mcus from tools.notifier.term import TerminalNotifier -from tools.psa import generate_psa_sources -from tools.resources import OsAndSpeResourceFilter """ The CLI entry point for exporting projects from the mbed tools to any of the supported IDEs or project structures. @@ -389,14 +387,7 @@ def main(): args_error(parser, "%s not supported by %s" % (mcu, ide)) try: - target = Target.get_target(mcu) resource_filter = None - if target.is_PSA_secure_target: - generate_psa_sources(source_dirs=options.source_dir, - ignore_paths=[] - ) - resource_filter = OsAndSpeResourceFilter() - export( mcu, ide, diff --git a/tools/psa/README.md b/tools/psa/README.md deleted file mode 100644 index 047a3992ee8..00000000000 --- a/tools/psa/README.md +++ /dev/null @@ -1,69 +0,0 @@ -# PSA tools - -## Code generation script - -Mbed-OS contains two implementations of PSA Firmware Framework: - -* Mbed-SPM - Implementation for dual-core v7 targets. -* TF-M - Implementation for v8 targets. - -Both PSA Firmware Framework implementation impose the following requirements: - -* PSA manifests must be valid according to the JSON schema file provided by PSA FF spec. -* There are no conflicts between various PSA manifests (duplicate SIDs and PIDs, dependencies, etc.) -* Secure partition initialization code to be present at mbed-os core compile time. - -To satisfy the requirement listed above, Mbed-OS build system invokes `generate_partition_code.py` script -during the build process for PSA targets. - -PSA code generation step has the following effects: -* Scan the whole source tree for PSA manifest files, including application (in case invoked from application directory) and all the `TESTS` directories. -* All found PSA manifest files get parsed and validated. -* Source and header files for initializing SPM are generated. Test related partitions and SIDs are disabled by default by `#ifndef` guards. - To enable them following defines must be passed to build command (typically done automatically via [release.py](#secure-image-generation)): - * `-DUSE_PSA_TEST_PARTITIONS` - * `-DUSE_` where `` corresponds to the name in PSA manifest file (`"name"` property). - -## Secure image generation - -`release.py` is the script assigned with compiling the default secure images. - -For an application with custom secure portions, the secure image should be generated by invoking `mbed-cli` directly. - -> **Note**: when building targets utilizing TF-M PSA implementations, add the following arguments to a build command for the secure image: - `--app-config /tools/psa/tfm/mbed_app.json` - -### Usage -```text -usage: release.py [-h] [-m MCU] [-t TC] [-d] [-q] [-l] [--commit] - [--skip-tests] [-x ...] - -optional arguments: - -h, --help show this help message and exit - -m MCU, --mcu MCU build for the given MCU - -t TC, --tc TC build for the given tool chain (default is - default_toolchain) - -d, --debug set build profile to debug - -q, --quiet No Build log will be printed - -l, --list Print supported PSA secure targets - --commit create a git commit for each platform - --skip-tests skip the test build phase - -x ..., --extra ... additional build parameters -``` - -* The script must be run from the mbed-os folder via `tools/psa/release.py`, - otherwise the list of available tests will not be accurate and the test - partitions will not be properly generated. -* When `MCU ` is not specified, the script compiles all the images for all the targets. -* When `-t/--tc` is not specified, the script compiles with the default_toolchain speciified in targets.json. -* When `-d/--debug` is not specified, the script compiles the images using the release profile. -* When `--commit` is not specified, the script will not commit the images to git and - any auto-generated PSA related components and services. -* A user can specify additional commands that will be passed on to the build commands (Ex. -D for compilation defines). - -This script should be run in following scenarios: - -* Release. -* Update to files originating in the secure side. -* Drivers update. -* PSA updates. diff --git a/tools/psa/__init__.py b/tools/psa/__init__.py index 21e25ba4648..6498cec529e 100644 --- a/tools/psa/__init__.py +++ b/tools/psa/__init__.py @@ -1,4 +1,4 @@ -#!/usr/bin/python +#!/usr/bin/env python # Copyright (c) 2019 ARM Limited # # SPDX-License-Identifier: Apache-2.0 @@ -16,13 +16,7 @@ # limitations under the License. import os -import shutil - from tools.resources import FileType -from tools.settings import ROOT -from .generate_partition_code import manifests_discovery, generate_spm_code - - def find_secure_image(notify, resources, ns_image_path, configured_s_image_filename, image_type): @@ -56,12 +50,3 @@ def find_secure_image(notify, resources, ns_image_path, raise Exception("Required secure image not found.") return secure_image - -def generate_psa_sources(source_dirs, ignore_paths): - services, apps = manifests_discovery(root_dirs=source_dirs, - ignore_paths=ignore_paths + ['.git']) - assert len(services + apps), 'PSA manifest discovery failed' - psa_out_dir = os.path.join(ROOT, 'components', 'TARGET_PSA') - - generate_spm_code(services, apps, psa_out_dir) - return psa_out_dir diff --git a/tools/psa/generate_partition_code.py b/tools/psa/generate_partition_code.py deleted file mode 100644 index 1567c988405..00000000000 --- a/tools/psa/generate_partition_code.py +++ /dev/null @@ -1,129 +0,0 @@ -#!/usr/bin/python -# Copyright (c) 2017-2019 ARM Limited -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. -import argparse -import itertools -import json -import os -import sys -from os.path import join as path_join - -# Be sure that the tools directory is in the search path -ROOT = os.path.abspath(path_join(os.path.dirname(__file__), os.pardir, os.pardir)) -sys.path.insert(0, ROOT) - -from tools.psa.mbed_spm_tfm_common import validate_partition_manifests, \ - manifests_discovery, parse_manifests, generate_source_files, \ - MBED_OS_ROOT - -__version__ = '1.1' -SCRIPT_DIR = os.path.dirname(os.path.abspath(__file__)) -MANIFEST_FILE_PATTERN = '*_psa.json' -PSA_CORE_ROOT = path_join(MBED_OS_ROOT, 'components', 'TARGET_PSA') -TEMPLATES_DESC = path_join(SCRIPT_DIR, 'spm_template_file_list.json') - - -def _get_timestamp(f): - return os.path.getmtime(f) if os.path.isfile(f) else 0 - - -def is_up_to_date(manifest_files, out_files): - manifest_timestamp = max(_get_timestamp(f) for f in manifest_files) - out_timestamps = min(_get_timestamp(f) for f in out_files) - return manifest_timestamp <= out_timestamps - - -def generate_spm_code(service_files, app_files, output_dir): - with open(TEMPLATES_DESC, 'r') as fh: - templates_data = json.load(fh) - templates_dict = { - path_join(MBED_OS_ROOT, t['template']): - path_join(output_dir, t['output']) for t in templates_data - } - - if is_up_to_date(service_files + app_files, list(templates_dict.values())): - return - - # Construct lists of all the manifests and mmio_regions. - service_manifests, service_region_list = parse_manifests(service_files) - test_manifests, test_region_list = parse_manifests(app_files) - - # Validate the correctness of the manifest collection. - validate_partition_manifests(service_manifests + test_manifests) - - region_list = service_region_list + test_region_list - - render_args = { - 'service_partitions': service_manifests, - 'test_partitions': test_manifests, - 'script_ver': __version__, - 'regions': region_list, - 'region_pair_list': list(itertools.combinations(region_list, 2)), - } - - generate_source_files(templates_dict, render_args) - - -class AppendReadableDir(argparse.Action): - def __call__(self, parser, namespace, values, option_string=None): - prosp_dir = os.path.abspath(values) - if not os.path.isdir(prosp_dir): - raise argparse.ArgumentTypeError("{} is missing".format(prosp_dir)) - if not os.access(prosp_dir, os.R_OK): - raise argparse.ArgumentTypeError( - "{} is not a accessible for read".format(prosp_dir)) - if not getattr(namespace, self.dest): - setattr(namespace, self.dest, []) - getattr(namespace, self.dest).append(prosp_dir) - - -def get_parser(): - parser = argparse.ArgumentParser( - description='PSA SPM code generator', - formatter_class=argparse.ArgumentDefaultsHelpFormatter - ) - parser.add_argument( - '-u', '--user-app', - action=AppendReadableDir, - default=[ROOT], - help='Root directory for recursive PSA manifest scan. Use for adding ' - 'application specific secure partitions. Can be supplied more ' - 'than once', - metavar='DIR' - ) - - parser.add_argument( - '-o', '--output-dir', - default=ROOT, - help='Root directory for generating the sources', - metavar='DIR' - ) - - return parser - - -def main(): - parser = get_parser() - args = parser.parse_args() - - services, apps = manifests_discovery(root_dirs=args.user_app, - ignore_paths=['BUILD', '.git']) - - generate_spm_code(services, apps, args.output_dir) - - -if __name__ == '__main__': - main() diff --git a/tools/psa/mbed_spm_tfm_common.py b/tools/psa/mbed_spm_tfm_common.py deleted file mode 100644 index eb1f407191d..00000000000 --- a/tools/psa/mbed_spm_tfm_common.py +++ /dev/null @@ -1,678 +0,0 @@ -#!/usr/bin/python -# Copyright (c) 2017-2018 ARM Limited -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import os -from os.path import join as path_join -import json -from jsonschema import validate -import fnmatch -from six import integer_types, string_types -from jinja2 import Environment, FileSystemLoader, StrictUndefined - -SCRIPT_DIR = os.path.dirname(os.path.abspath(__file__)) -MBED_OS_ROOT = os.path.abspath(path_join(SCRIPT_DIR, os.pardir, os.pardir)) -SERVICES_DIR = path_join(MBED_OS_ROOT, "components", "TARGET_PSA", "services") -TESTS_DIR = path_join(MBED_OS_ROOT, "TESTS", "psa") -MANIFEST_FILE_PATTERN = '*_psa.json' - - -def _assert_int(num): - """ - Tries to parse an integer num from a given string - - :param num: Number in int/string type - :return: Numeric value - """ - if isinstance(num, int): - return num - num_str = str(num) - radix = 16 if num_str.lower().startswith('0x') else 10 - res = int(num_str, radix) - # Python converts str to int as a signed integer - if res > 0x7FFFFFFF: - res -= 0x100000000 - return res - - -class RotService(object): - MINOR_POLICIES = ['STRICT', 'RELAXED'] - - def __init__( - self, - name, - identifier, - signal, - non_secure_clients, - minor_version=1, - minor_policy='STRICT' - ): - """ - Root of Trust Service C'tor (Aligned with json schema) - - :param name: Root of Trust Service identifier (available to user) - :param identifier: Root of Trust Service numeric enumeration. - :param signal: Root of Trust Service identifier inside the partition - :param non_secure_clients: True to allow connections from non-secure - partitions - :param minor_version: Root of Trust Service version - :param minor_policy: Enforcement level of minor version - """ - self.name = name - self.id = identifier - self.signal = signal - - assert _assert_int(identifier) - - assert isinstance(non_secure_clients, bool), \ - 'non_secure_clients parameter must be of boolean type' - self.nspe_callable = non_secure_clients - - self.minor_version = _assert_int(minor_version) - assert self.minor_version > 0, 'minor_version parameter is invalid' - - assert minor_policy in self.MINOR_POLICIES, \ - 'minor_policy parameter is invalid' - self.minor_policy = minor_policy - - @property - def numeric_id(self): - return _assert_int(self.id) - - def __eq__(self, other): - return ( - (self.name == other.name) and - (self.id == other.id) and - (self.signal == other.signal) and - (self.nspe_callable == other.nspe_callable) and - (self.minor_version == other.minor_version) and - (self.minor_policy == other.minor_policy) - ) - - -class MmioRegion(object): - MMIO_PERMISSIONS = { - 'READ-ONLY': 'PSA_MMIO_PERM_READ_ONLY', - 'READ-WRITE': 'PSA_MMIO_PERM_READ_WRITE' - } - - def __init__(self, **kwargs): - """ - MMIO Region C'tor (Aligned with json schema) - - Supports both named and numeric regions - In case of named region the acceptable params are name and permission - In case of numeric region the acceptable params are name, size and - permission - - :param name: C definition name of the region (size will be - auto-generated) - :param base: C hex string defining a memory address (must be 32bit) - :param size: size of a region (Applicable only for numbered regions) - :param permission: Access permissions to the described region (R/RW) - - """ - assert 'permission' in kwargs - self.permission = self.MMIO_PERMISSIONS[kwargs['permission']] - if 'name' in kwargs: - self.base = kwargs['name'] - self.size = '(sizeof(*({})))'.format(kwargs['name']) - if 'base' in kwargs: - self.base = kwargs['base'] - self.size = _assert_int(kwargs['size']) - - assert 'partition_id' in kwargs - self.partition_id = _assert_int(kwargs['partition_id']) - - assert hasattr(self, 'base') - assert hasattr(self, 'size') - assert hasattr(self, 'permission') - assert hasattr(self, 'partition_id') - - def __eq__(self, other): - return ( - (self.base == other.base) and - (self.size == other.size) and - (self.permission == other.permission) - ) - - -class Irq(object): - def __init__(self, line_num, signal): - """ - IRQ line C'tor (Aligned with json schema) - - :param line_num: number of interrupt used by the partition - :param signal: IRQ line identifier inside the partition - """ - self.line_num = _assert_int(line_num) - assert isinstance(signal, string_types) - self.signal = signal - - def __eq__(self, other): - return (self.line_num == other.line_num) and \ - (self.signal == other.signal) - - -class Manifest(object): - PRIORITY = { - 'LOW': 'osPriorityLow', - 'NORMAL': 'osPriorityNormal', - 'HIGH': 'osPriorityHigh' - } - PARTITION_TYPES = ['APPLICATION-ROT', 'PSA-ROT'] - # The following signal bits cannot be used: - # bit[0-2] | Reserved - # bit[3] | PSA Doorbell - # bit[31] | RTX error bit - RESERVED_SIGNALS = 5 - - def __init__( - self, - manifest_file, - name, - partition_id, - partition_type, - priority, - entry_point, - heap_size, - stack_size, - source_files, - mmio_regions=None, - rot_services=None, - extern_sids=None, - irqs=None - ): - """ - Manifest C'tor (Aligned with json schema) - - :param manifest_file: Path to json manifest - :param name: Partition unique name - :param partition_id: Partition identifier - :param partition_type: Whether the partition is unprivileged or part - of the trusted computing base - :param priority: Priority of the partition's thread - :param entry_point: C symbol name of the partition's main function - :param heap_size: Size of heap required for the partition - :param stack_size: Size of stack required for the partition - :param source_files: List of files assembling the partition - (relative paths) - :param mmio_regions: List of MMIO regions used by the partition - :param rot_services: List of Root of Trust Services declared by the - partition - :param extern_sids: List of Root of Trust Services the partition can call - :param irqs: List of interrupts the partition can handle - """ - assert manifest_file is not None - assert name is not None - assert partition_id is not None - assert partition_type is not None - assert entry_point is not None - assert priority is not None - assert heap_size is not None - assert stack_size is not None - assert source_files is not None - - mmio_regions = [] if mmio_regions is None else mmio_regions - rot_services = [] if rot_services is None else rot_services - extern_sids = [] if extern_sids is None else extern_sids - irqs = [] if irqs is None else irqs - - assert os.path.isfile(manifest_file) - assert isinstance(partition_id, integer_types) - assert isinstance(heap_size, int) - assert isinstance(stack_size, int) - assert isinstance(entry_point, string_types) - assert partition_type in self.PARTITION_TYPES - assert partition_id > 0 - - self.file = manifest_file - self.name = name - self.id = partition_id - self.type = partition_type - - self.priority_tfm = priority - self.priority_mbed = self.PRIORITY[priority] - self.heap_size = heap_size - self.stack_size = stack_size - self.entry_point = entry_point - if isinstance(source_files, list): - self.source_files = source_files - else: - self.source_files = [source_files] - - self.mmio_regions = mmio_regions - self.rot_services = rot_services - self.extern_sids = extern_sids - self.irqs = irqs - - for src_file in self.source_files: - assert os.path.isfile(src_file), \ - "The source file {} mentioned in {} doesn't exist.".format( - src_file, self.file - ) - - for rot_srv in self.rot_services: - assert isinstance(rot_srv, RotService) - - for extern_sid in self.extern_sids: - assert isinstance(extern_sid, string_types) - - assert len(self.extern_sids) == len(set(self.extern_sids)), \ - 'Detected duplicates external SIDs in {}'.format(self.file) - - for irq in self.irqs: - assert isinstance(irq, Irq) - - total_signals = len(self.rot_services) + len(self.irqs) - assert total_signals <= 32 - self.RESERVED_SIGNALS, \ - 'Manifest {} - {} exceeds limit of RoT services and IRQs allowed ' \ - '({}).'.format( - self.name, self.file, 32 - self.RESERVED_SIGNALS - ) - - def __eq__(self, other): - return ( - (self.file == other.file) and - (self.name == other.name) and - (self.id == other.id) and - (self.type == other.type) and - (self.priority_mbed == other.priority_mbed) and - (self.priority_tfm == other.priority_tfm) and - (self.heap_size == other.heap_size) and - (self.stack_size == other.stack_size) and - (self.entry_point == other.entry_point) and - (self.source_files == other.source_files) and - (self.mmio_regions == other.mmio_regions) and - (self.rot_services == other.rot_services) and - (self.extern_sids == other.extern_sids) and - (self.irqs == other.irqs) - ) - - @classmethod - def from_json(cls, manifest_file, skip_src=False): - """ - Load a partition manifest file - - :param manifest_file: Manifest file path - :param skip_src: Ignore the `source_files` entry - :return: Manifest object - """ - - partition_schema_path = path_join( - SCRIPT_DIR, - 'partition_description_schema.json' - ) - with open(partition_schema_path) as schema_fh: - partition_schema = json.load(schema_fh) - - # Load partition manifest file. - with open(manifest_file) as fh: - manifest = json.load(fh) - - validate(manifest, partition_schema) - manifest_dir = os.path.dirname(manifest_file) - - source_files = [] - if not skip_src: - for src_file in manifest['source_files']: - source_files.append( - os.path.normpath(path_join(manifest_dir, src_file))) - - mmio_regions = [] - for mmio_region in manifest.get('mmio_regions', []): - mmio_regions.append( - MmioRegion(partition_id=manifest['id'], **mmio_region)) - - rot_services = [] - for rot_srv in manifest.get('services', []): - rot_services.append(RotService(**rot_srv)) - - irqs = [] - for irq in manifest.get('irqs', []): - irqs.append(Irq(**irq)) - - return Manifest( - manifest_file=manifest_file, - name=manifest['name'], - partition_id=_assert_int(manifest['id']), - partition_type=manifest['type'], - priority=manifest['priority'], - heap_size=_assert_int(manifest['heap_size']), - stack_size=_assert_int(manifest['stack_size']), - entry_point=manifest['entry_point'], - source_files=source_files, - mmio_regions=mmio_regions, - rot_services=rot_services, - extern_sids=manifest.get('extern_sids', []), - irqs=irqs - ) - - @property - def sids(self): - return [rot_srv.name for rot_srv in self.rot_services] - - @property - def autogen_folder(self): - return os.path.abspath(os.path.dirname(self.file)) - - def find_dependencies(self, manifests): - """ - Find other manifests which holds Root of Trust Services that - are declared as extern in this manifest - - :param manifests: list of manifests to filter - :return: list of manifest's names that holds current - extern Root of Trust Services - """ - - manifests = [man for man in manifests if man != self] - extern_sids_set = set(self.extern_sids) - return [manifest.name for manifest in manifests - if extern_sids_set.intersection(set(manifest.sids))] - - def templates_to_files(self, templates, templates_base, output_dir): - """ - Translates a list of partition templates to file names - - :param templates: List of partition templates - :param templates_base: Base directory of the templates - :param output_dir: Output directory (Default is autogen folder property) - :return: Dictionary of template to output file translation - """ - - generated_files = {} - for t in templates: - fname = os.path.relpath(t, templates_base) - _tpl = fname.replace('NAME', self.name.lower()) - full_path = path_join( - output_dir, - os.path.splitext(_tpl)[0] - ) - generated_files[t] = full_path - - return generated_files - - -def check_circular_call_dependencies(manifests): - """ - Check if there is a circular dependency between the partitions - described by the manifests. - A circular dependency might happen if there is a scenario in which a - partition calls a Root of Trust Service in another partition which than - calls another Root of Trust Service which resides in the - originating partition. - For example: Partition A has a Root of Trust Service A1 and extern sid B1, - partition B has a Root of Trust Service B1 and extern sid A1. - - :param manifests: List of the partition manifests. - :return: True if a circular dependency exists, false otherwise. - """ - - # Construct a call graph. - call_graph = {} - for manifest in manifests: - call_graph[manifest.name] = { - 'calls': manifest.find_dependencies(manifests), - 'called_by': set() - } - for manifest_name in call_graph: - for called in call_graph[manifest_name]['calls']: - call_graph[called]['called_by'].add(manifest_name) - - # Run topological sort on the call graph. - while len(call_graph) > 0: - # Find all the nodes that aren't called by anyone and - # therefore can be removed. - nodes_to_remove = [x for x in list(call_graph.keys()) if - len(call_graph[x]['called_by']) == 0] - - # If no node can be removed we have a circle. - if not nodes_to_remove: - return True - - # Remove the nodes. - for node in nodes_to_remove: - for called in call_graph[node]['calls']: - call_graph[called]['called_by'].remove(node) - call_graph.pop(node) - - return False - - -def validate_partition_manifests(manifests): - """ - Check the correctness of the manifests list - (no conflicts, no missing elements, etc.) - - :param manifests: List of the partition manifests - """ - for manifest in manifests: - assert isinstance(manifest, Manifest) - - partitions_names = {} - partitions_ids = {} - rot_service_ids = {} - rot_service_names = {} - rot_service_signals = {} - irq_signals = {} - irq_numbers = {} - all_extern_sids = set() - spe_contained_manifests = [] - - for manifest in manifests: - # Make sure the partition names are unique. - if manifest.name in partitions_names: - raise ValueError( - 'Partition name {} is not unique, ' - 'found in both {} and {}.'.format( - manifest.name, - partitions_names[manifest.name], - manifest.file - ) - ) - partitions_names[manifest.name] = manifest.file - - # Make sure the partition ID's are unique. - if manifest.id in partitions_ids: - raise ValueError( - 'Partition id {} is not unique, ' - 'found in both {} and {}.'.format( - manifest.id, - partitions_ids[manifest.id], - manifest.file - ) - ) - partitions_ids[manifest.id] = manifest.file - - is_nspe_callabale = False - - # Make sure all the Root of Trust Service IDs and signals are unique. - for rot_service in manifest.rot_services: - if rot_service.name in rot_service_names: - raise ValueError( - 'Root of Trust Service name {} is found ' - 'in both {} and {}.'.format( - rot_service.name, - rot_service_names[rot_service.name], - manifest.file - ) - ) - rot_service_names[rot_service.name] = manifest.file - - if rot_service.signal in rot_service_signals: - raise ValueError( - 'Root of Trust Service signal {} is found ' - 'in both {} and {}.'.format( - rot_service.signal, - rot_service_signals[rot_service.signal], - manifest.file - ) - ) - rot_service_signals[rot_service.signal] = manifest.file - - if rot_service.numeric_id in rot_service_ids: - raise ValueError( - 'Root of Trust Service identifier {} is found ' - 'in both {} and {}.'.format( - rot_service.numeric_id, - rot_service_ids[rot_service.numeric_id], - manifest.file - ) - ) - rot_service_ids[rot_service.numeric_id] = manifest.file - is_nspe_callabale |= rot_service.nspe_callable - - if not is_nspe_callabale: - spe_contained_manifests.append(manifest) - - # Make sure all the IRQ signals and line-numbers are unique. - for irq in manifest.irqs: - if irq.signal in irq_signals: - raise ValueError( - 'IRQ signal {} is found in both {} and {}.'.format( - irq.signal, - irq_signals[irq.signal], - manifest.file - ) - ) - irq_signals[irq.signal] = manifest.file - - if irq.line_num in irq_numbers: - raise ValueError( - 'IRQ line number {} is found in both {} and {}.'.format( - irq.line_num, - irq_numbers[irq.line_num], - manifest.file - ) - ) - irq_numbers[irq.line_num] = manifest.file - - all_extern_sids.update(manifest.extern_sids) - - # Check that all the external SIDs can be found. - declared_sids = set(rot_service_names.keys()) - for manifest in manifests: - extern_sids = set(manifest.extern_sids) - if not extern_sids.issubset(declared_sids): - missing_sids = extern_sids.difference(declared_sids) - raise ValueError( - "External SID(s) {} required by {} can't be found in " - "any partition manifest.".format( - ', '.join(missing_sids), manifest.file) - ) - - if check_circular_call_dependencies(manifests): - raise ValueError( - "Detected a circular call dependency between the partitions.") - - for manifest in spe_contained_manifests: - rot_services = set([service.name for service in manifest.rot_services]) - if not rot_services.intersection(all_extern_sids) and len( - manifest.irqs) == 0: - raise ValueError( - 'Partition {} (defined by {}) is not accessible from NSPE ' - 'and not referenced by any other partition.'.format( - manifest.name, - manifest.file - ) - ) - - -def is_test_manifest(manifest): - return 'TESTS' in manifest - - -def is_service_manifest(manifest): - return not is_test_manifest(manifest) - - -def manifests_discovery(root_dirs, ignore_paths): - service_manifest_files = set() - test_manifest_files = set() - for root_dir in root_dirs: - for root, dirs, files in os.walk(root_dir, followlinks=True): - # Filters paths if they are inside one of the ignore paths - if next((True for igp in ignore_paths if igp in root), False): - continue - - to_add = [path_join(root, f) for f in - fnmatch.filter(files, MANIFEST_FILE_PATTERN)] - service_manifest_files.update(filter(is_service_manifest, to_add)) - test_manifest_files.update(filter(is_test_manifest, to_add)) - - service_manifest_files = sorted(list(service_manifest_files)) - test_manifest_files = sorted(list(test_manifest_files)) - return service_manifest_files, test_manifest_files - - -def parse_manifests(manifests_files): - region_list = [] - manifests = [] - for manifest_file in manifests_files: - manifest_obj = Manifest.from_json(manifest_file) - manifests.append(manifest_obj) - for region in manifest_obj.mmio_regions: - region_list.append(region) - - return manifests, region_list - - -def generate_source_files( - templates, - render_args, - extra_filters=None -): - """ - Generate SPM common C code from manifests using given templates - - :param templates: Dictionary of template and their auto-generated products - :param render_args: Dictionary of arguments that should be passed to render - :param extra_filters: Dictionary of extra filters to use in the rendering - process - :return: Path to generated folder containing common generated files - """ - - rendered_files = [] - templates_dirs = list( - set([os.path.dirname(path) for path in templates]) - ) - template_files = {os.path.basename(t): t for t in templates} - - # Load templates for the code generation. - env = Environment( - loader=FileSystemLoader(templates_dirs), - lstrip_blocks=True, - trim_blocks=True, - undefined=StrictUndefined - ) - if extra_filters: - env.filters.update(extra_filters) - - for tf in template_files: - template = env.get_template(tf) - rendered_files.append( - (templates[template_files[tf]], template.render(**render_args))) - rendered_file_dir = os.path.dirname(templates[template_files[tf]]) - if not os.path.exists(rendered_file_dir): - os.makedirs(rendered_file_dir) - - for fname, data in rendered_files: - output_folder = os.path.dirname(fname) - if not os.path.isdir(output_folder): - os.makedirs(output_folder) - with open(fname, 'wt') as fh: - fh.write(data) diff --git a/tools/psa/partition_description_schema.json b/tools/psa/partition_description_schema.json deleted file mode 100644 index 1089c8dca63..00000000000 --- a/tools/psa/partition_description_schema.json +++ /dev/null @@ -1,196 +0,0 @@ -{ - "$schema": "http://json-schema.org/draft-04/schema#", - "description": "schema for a partition description.", - "type": "object", - "required": ["name", "type", "priority", "id", "entry_point", "stack_size", "heap_size", "source_files"], - "anyOf": [ - {"required" : ["services"]}, - {"required" : ["irqs"]} - ], - "properties": { - "name": { - "description": "Alphanumeric C macro for referring to a partition. (all capital)", - "$ref": "#/definitions/c_macro" - }, - "type": { - "description": "Whether the partition is unprivileged or part of the trusted computing base.", - "enum": ["APPLICATION-ROT", "PSA-ROT"] - }, - "priority": { - "description": "Partition task priority.", - "enum": ["LOW", "NORMAL", "HIGH"] - }, - "id": { - "description": "Partition numeric unique positive identifier. (must be a positive 8 bytes hex string)", - "type": "string", - "pattern": "^0x[0-7][0-9a-fA-F]{7}$" - }, - "entry_point": { - "description": "C symbol name of the partition's entry point. (unmangled, use extern C if needed)", - "$ref": "#/definitions/c_symbol" - }, - "stack_size": { - "description": "Partition's task stack size in bytes.", - "$ref": "#/definitions/positive_integer_or_hex_string" - }, - "heap_size": { - "description": "Partition's task heap size in bytes.", - "$ref": "#/definitions/positive_integer_or_hex_string" - }, - "mmio_regions": { - "description": "List of Memory-Mapped IO region objects which the partition has access to.", - "type": "array", - "items": { - "anyOf": [{ - "$ref": "#/definitions/named_region" - }, - { - "$ref": "#/definitions/numbered_region" - } - ] - }, - "uniqueItems": true - }, - "services": { - "description": "List of RoT Service objects which the partition implements.", - "type": "array", - "items": { - "$ref": "#/definitions/service" - }, - "uniqueItems": true - }, - "extern_sids": { - "description": "List of SID which the partition code depends on and allowed to access.", - "type": "array", - "items": { - "$ref": "#/definitions/c_macro" - }, - "uniqueItems": true - }, - "source_files": { - "description": "List of source files relative to PSA Manifest file. A Secure Partition is built from explicit file list.", - "type": "array", - "items": { - "type": "string", - "pattern": "^[a-zA-Z0-9-_./]+$" - }, - "minItems": 1, - "uniqueItems": true - }, - "irqs": { - "description": "List of IRQ objects which the partition implements.", - "type": "array", - "items": { - "$ref": "#/definitions/irq" - }, - "uniqueItems": true - } - }, - "definitions": { - "c_macro": { - "type": "string", - "pattern": "^[A-Z_][A-Z0-9_]*$" - }, - "c_symbol": { - "type": "string", - "pattern": "^[a-zA-Z_][a-zA-Z0-9_]*$" - }, - "hex_string": { - "type": "string", - "pattern": "^0x(0*[1-9a-fA-F][0-9a-fA-F]*)$", - "minLength": 3, - "maxLength": 10 - }, - "positive_integer": { - "type": "integer", - "exclusiveMinimum": true, - "minimum": 0 - }, - "positive_integer_or_hex_string": { - "oneOf": [{ - "$ref": "#/definitions/positive_integer" - }, - { - "$ref": "#/definitions/hex_string" - } - ] - }, - "named_region": { - "description": "MMIO region which is described by it's C macro name and access permissions.", - "required": ["name", "permission"], - "properties": { - "name": { - "description": "Alphanumeric C macro for referring to the region.", - "$ref": "#/definitions/c_macro" - }, - "permission": { - "description": "Access permissions for the region.", - "enum": ["READ-ONLY", "READ-WRITE"] - } - } - }, - "numbered_region": { - "description": "MMIO region which is described by it's base address, size and access permissions.", - "required": ["base", "size", "permission"], - "properties": { - "base": { - "description": "The base address of the region.", - "$ref": "#/definitions/hex_string" - }, - "size": { - "description": "Size in bytes of the region.", - "$ref": "#/definitions/positive_integer_or_hex_string" - }, - "permission": { - "description": "Access permissions for the region.", - "enum": ["READ-ONLY", "READ-WRITE"] - } - } - }, - "service": { - "required": ["name", "identifier", "non_secure_clients", "signal"], - "properties": { - "name": { - "description": "Alphanumeric C macro for referring to a RoT Service from source code (all capital)", - "$ref": "#/definitions/c_macro" - }, - "identifier": { - "description": "The integer value of the NAME field", - "$ref": "#/definitions/positive_integer_or_hex_string" - }, - "non_secure_clients": { - "description": "Denote whether the RoT Service is exposed to non-secure clients.", - "type": "boolean" - }, - "signal": { - "description": "Alphanumeric C macro for referring to the RoT Service's signal value. (all capital)", - "$ref": "#/definitions/c_macro" - }, - "minor_version": { - "description": "Optional: Minor version number of the RoT Service's interface.", - "$ref": "#/definitions/positive_integer", - "default": 1 - }, - "minor_policy": { - "description": "Optional: Minor version policy to apply on connections to the RoT Service.", - "enum": ["STRICT", "RELAXED"], - "default": "STRICT" - } - } - }, - "irq": { - "required": ["line_num", "signal"], - "properties": { - "line_num": { - "description": "Interrupt line number for registering to ISR table entry and enable/disable the specific IRQ once received.", - "type": "integer", - "minimum": 0 - }, - "signal": { - "description": "Alphanumeric C macro for referring to the IRQ's signal value. (all capital)", - "$ref": "#/definitions/c_macro" - } - } - } - } -} diff --git a/tools/psa/release.py b/tools/psa/release.py deleted file mode 100644 index 8034df81f41..00000000000 --- a/tools/psa/release.py +++ /dev/null @@ -1,389 +0,0 @@ -#!/usr/bin/python -# Copyright (c) 2017-2018 ARM Limited -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import os -import subprocess -import sys -import shutil -import logging -import argparse - -FNULL = open(os.devnull, 'w') -ROOT = os.path.abspath(os.path.join(os.path.dirname(__file__), - os.pardir, os.pardir)) -sys.path.insert(0, ROOT) -from tools.toolchains import TOOLCHAIN_CLASSES -from tools.targets import Target, TARGET_MAP, TARGET_NAMES - - -logging.basicConfig(level=logging.DEBUG, - format='[%(name)s] %(asctime)s: %(message)s.', - datefmt='%H:%M:%S') -logger = logging.getLogger('PSA release tool') -subprocess_output = None -subprocess_err = None - -MAKE_PY_LOCATTION = os.path.join(ROOT, 'tools', 'make.py') -TEST_PY_LOCATTION = os.path.join(ROOT, 'tools', 'test.py') -TFM_MBED_APP = os.path.join(ROOT, 'tools', 'psa', 'tfm', 'mbed_app.json') -PSA_TESTS = { - '*psa-spm_smoke': ['USE_PSA_TEST_PARTITIONS', 'USE_SMOKE_TESTS_PART1'], - '*psa-spm_client': ['USE_PSA_TEST_PARTITIONS', 'USE_CLIENT_TESTS_PART1'], - '*psa-spm_server': ['USE_PSA_TEST_PARTITIONS', 'USE_SERVER_TESTS_PART1', - 'USE_SERVER_TESTS_PART2'], - '*psa-crypto_access_control': ['USE_PSA_TEST_PARTITIONS', - 'USE_CRYPTO_ACL_TEST'] -} -PSA_AUTOGEN_LOCATION = os.path.join(ROOT, 'components', 'TARGET_PSA') - -def _psa_backend(target): - """ - Returns a target PSA backend. - - :param target: Target name as in targets.json - :return: PSA backend as string (TFM/MBED_SPM) - """ - return 'TFM' if 'TFM' in Target.get_target(target).labels else 'MBED_SPM' - - -def _get_target_info(target, toolchain): - """ - Creates a PSA target tuple with default toolchain and - artifact delivery directory. - - :param target: Target name. - :return: tuple (target, toolchain, delivery directory). - """ - delivery_dir = os.path.join(ROOT, 'targets', - TARGET_MAP[target].delivery_dir) - - if not os.path.exists(delivery_dir): - raise Exception("{} does not have delivery_dir".format(target)) - - if toolchain: - if toolchain not in TARGET_MAP[target].supported_toolchains: - raise Exception("Toolchain {} is not supported by {}".format(toolchain, TARGET_MAP[target].name)) - return tuple([TARGET_MAP[target].name, - toolchain, - delivery_dir]) - else: - return tuple([TARGET_MAP[target].name, - TARGET_MAP[target].default_toolchain, - delivery_dir]) - - -def _get_psa_secure_targets_list(): - """ - Creates a list of PSA secure targets. - - :return: List of PSA secure targets. - """ - return [str(t) for t in TARGET_NAMES if - Target.get_target(t).is_PSA_secure_target] - - -def verbose_check_call(cmd, check_call=True): - """ - Calls a shell command and logs the call. - - :param cmd: command to run as a list - :param check_call: choose subprocess method (call/check_call) - :return: return code of the executed command - """ - logger.info('Running: {}'.format(' '.join(cmd))) - if check_call: - return subprocess.check_call(cmd, stdout=subprocess_output, - stderr=subprocess_err) - - return subprocess.call(cmd, stdout=subprocess_output, stderr=subprocess_err) - - -def get_mbed_official_psa_release(target=None, toolchain=None): - """ - Creates a list of PSA targets with default toolchain and - artifact delivery directory. - - :param target: Ask for specific target, None for all targets. - :return: List of tuples (target, toolchain, delivery directory). - """ - psa_secure_targets = _get_psa_secure_targets_list() - logger.debug("Found the following PSA targets: {}".format( - ', '.join(psa_secure_targets))) - if target is not None: - return [_get_target_info(target, toolchain)] - - return [_get_target_info(t, toolchain) for t in psa_secure_targets] - - -def create_mbed_ignore(build_dir): - """ - Creates a .mbedignore file in a given directory. - - :param build_dir: Directory to create .mbedignore file. - """ - logger.debug('Created .mbedignore in {}'.format(build_dir)) - with open(os.path.join(build_dir, '.mbedignore'), 'w') as f: - f.write('*\n') - - -def build_tests(target, toolchain, profile, args): - """ - Builds secure images for tests. - - :param target: target to be built. - :param toolchain: toolchain to be used. - :param profile: build profile. - :param args: list of extra arguments. - """ - build_dir = os.path.join(ROOT, 'BUILD', 'tests', target) - if os.path.exists(build_dir): - logger.info("BUILD directory deleted: {}".format(build_dir)) - shutil.rmtree(build_dir) - - for test in PSA_TESTS.keys(): - logger.info( - "Building tests image({}) for {} using {} with {} profile".format( - test, target, toolchain, profile)) - - test_defines = ['-D{}'.format(define) for define in PSA_TESTS[test]] - cmd = [ - sys.executable, TEST_PY_LOCATTION, - '--greentea', - '--profile', profile, - '-t', toolchain, - '-m', target, - '--source', ROOT, - '--build', build_dir, - '--test-spec', os.path.join(build_dir, 'test_spec.json'), - '--build-data', os.path.join(build_dir, 'build_data.json'), - '-n', test] + test_defines + args - - if _psa_backend(target) is 'TFM': - cmd += ['--app-config', TFM_MBED_APP] - - verbose_check_call(cmd) - logger.info( - "Finished Building tests image({}) for {}".format(test, target)) - - -def build_default_image(target, toolchain, profile, args): - """ - Builds the default secure image. - - :param target: target to be built. - :param toolchain: toolchain to be used. - :param profile: build profile. - :param args: list of extra arguments. - """ - logger.info("Building default image for {} using {} with {} profile".format( - target, toolchain, profile)) - - build_dir = os.path.join(ROOT, 'BUILD', target) - if os.path.exists(build_dir): - logger.info("BUILD directory deleted: {}".format(build_dir)) - shutil.rmtree(build_dir) - - cmd = [ - sys.executable, MAKE_PY_LOCATTION, - '-t', toolchain, - '-m', target, - '--profile', profile, - '--source', ROOT, - '--build', build_dir] + args - - if _psa_backend(target) is 'TFM': - cmd += ['--app-config', TFM_MBED_APP] - else: - cmd += ['--artifact-name', 'psa_release_1.0'] - - verbose_check_call(cmd) - logger.info( - "Finished building default image for {} successfully".format(target)) - - -def commit_binaries(target, delivery_dir, toolchain): - """ - Commits changes in secure binaries. - - :param target: Target name. - :param delivery_dir: Secure images should be moved to this folder - by the build system. - """ - changes_made = verbose_check_call([ - 'git', - '-C', ROOT, - 'diff', '--exit-code', '--quiet', - delivery_dir], check_call=False) - - if changes_made: - logger.info("Change in images for {} has been detected".format(target)) - verbose_check_call([ - 'git', - '-C', ROOT, - 'add', os.path.relpath(delivery_dir, ROOT)]) - - logger.info("Committing images for {}".format(target)) - commit_message = '--message="Update secure binaries for %s (%s)"' % ( - target, toolchain) - verbose_check_call([ - 'git', - '-C', ROOT, - 'commit', - commit_message]) - else: - logger.info("No changes detected in {}, Skipping commit".format(target)) - -def commit_psa_autogen(): - """ - Commit changes related to auto-generated PSA components and services - """ - changes_made = verbose_check_call([ - 'git', - '-C', ROOT, - 'diff', '--exit-code', '--quiet', - PSA_AUTOGEN_LOCATION], check_call=False) - - if changes_made: - logger.info("Change in PSA auto-generated files has been detected") - verbose_check_call([ - 'git', - '-C', ROOT, - 'add', PSA_AUTOGEN_LOCATION]) - - logger.info("Committing changes...") - commit_message = ('--message=Update PSA auto-generated components and ' - 'services') - verbose_check_call([ - 'git', - '-C', ROOT, - 'commit', - commit_message]) - else: - logger.info("No changes has been detected for PSA autogen, " - "Skipping commit") - -def build_psa_platform(target, toolchain, delivery_dir, debug, git_commit, - skip_tests, args): - """ - Calls the correct build function and commits if requested. - - :param target: Target name. - :param toolchain: Toolchain to be used. - :param delivery_dir: Artifact directory, where images should be placed. - :param debug: Build with debug profile. - :param git_commit: Commit the changes. - :param skip_tests: skip the test images build phase. - :param args: list of extra arguments. - """ - profile = 'debug' if debug else 'release' - if not skip_tests: - build_tests(target, toolchain, profile, args) - - build_default_image(target, toolchain, profile, args) - if git_commit: - commit_binaries(target, delivery_dir, toolchain) - commit_psa_autogen() - - -def get_parser(): - parser = argparse.ArgumentParser() - parser.add_argument("-m", "--mcu", - help="build for the given MCU", - default=None, - choices=_get_psa_secure_targets_list(), - metavar="MCU") - - parser.add_argument("-t", "--tc", - help="build for the given tool chain (default is default_toolchain)", - default=None) - - parser.add_argument("-d", "--debug", - help="set build profile to debug", - action="store_true", - default=False) - - parser.add_argument('-q', '--quiet', - action="store_true", - default=False, - help="No Build log will be printed") - - parser.add_argument('-l', '--list', - action="store_true", - default=False, - help="Print supported PSA secure targets") - - parser.add_argument("--commit", - help="create a git commit for each platform", - action="store_true", - default=False) - - parser.add_argument('--skip-tests', - action="store_true", - default=False, - help="skip the test build phase") - - parser.add_argument('-x', '--extra', - dest='extra_args', - default=[], - nargs=argparse.REMAINDER, - help="additional build parameters") - - return parser - - -def prep_build_dir(): - build_dir = os.path.join(ROOT, 'BUILD') - if not os.path.exists(build_dir): - logger.info("BUILD directory created in {}".format(build_dir)) - os.makedirs(build_dir) - create_mbed_ignore(build_dir) - - -def main(): - parser = get_parser() - options = parser.parse_args() - if options.quiet: - logger.setLevel(logging.INFO) - global subprocess_output, subprocess_err - subprocess_output = FNULL - subprocess_err = subprocess.STDOUT - - if options.list: - logger.info("Available platforms are: {}".format( - ', '.join([t for t in _get_psa_secure_targets_list()]))) - return - - prep_build_dir() - psa_platforms_list = get_mbed_official_psa_release(options.mcu, options.tc) - logger.info("Building the following platforms: {}".format( - ', '.join([t[0] for t in psa_platforms_list]))) - - toolchains_set = set([t[1] for t in psa_platforms_list]) - for tc in toolchains_set: - if not TOOLCHAIN_CLASSES[tc].check_executable(): - raise Exception("Toolchain {} was not found in PATH".format(tc)) - - for target, tc, directory in psa_platforms_list: - build_psa_platform(target, tc, directory, options.debug, - options.commit, options.skip_tests, - options.extra_args) - - logger.info("Finished Updating PSA images") - - -if __name__ == '__main__': - main() diff --git a/tools/psa/spm_template_file_list.json b/tools/psa/spm_template_file_list.json deleted file mode 100644 index 2c4125114e0..00000000000 --- a/tools/psa/spm_template_file_list.json +++ /dev/null @@ -1,37 +0,0 @@ -[ - { - "name": "Secure Partition ID definitions", - "template": "tools/psa/templates/tfm_partition_defs.inc.tpl", - "output": "TARGET_TFM/COMPONENT_SPE/inc/tfm_partition_defs.inc" - }, - { - "name": "Secure Partition declarations", - "template": "tools/psa/templates/tfm_partition_list.inc.tpl", - "output": "TARGET_TFM/COMPONENT_SPE/inc/tfm_partition_list.inc" - }, - { - "name": "Secure Service list", - "template": "tools/psa/templates/tfm_service_list.inc.tpl", - "output": "TARGET_TFM/COMPONENT_SPE/inc/tfm_service_list.inc" - }, - { - "name": "Secure Service signals list", - "template": "tools/psa/templates/tfm_spm_signal_defs.h.tpl", - "output": "TARGET_TFM/COMPONENT_SPE/inc/tfm_spm_signal_defs.h" - }, - { - "name": "mbed-SPM database", - "template": "tools/psa/templates/psa_setup.c.tpl", - "output": "TARGET_MBED_SPM/COMPONENT_SPE/psa_setup.c" - }, - { - "name": "Mappings from RoT Service names to SIDs", - "template": "tools/psa/templates/sid.h.tpl", - "output": "services/inc/autogen_sid.h" - }, - { - "name": "Details partition defines and structures", - "template": "tools/psa/templates/mbed_spm_partitions.h.tpl", - "output": "services/inc/mbed_spm_partitions.h" - } -] diff --git a/tools/psa/templates/mbed_spm_partitions.h.tpl b/tools/psa/templates/mbed_spm_partitions.h.tpl deleted file mode 100644 index 01b3af4d25e..00000000000 --- a/tools/psa/templates/mbed_spm_partitions.h.tpl +++ /dev/null @@ -1,104 +0,0 @@ -/* Copyright (c) 2017-2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version {{script_ver}} - ******************************************************************************/ - -#ifndef __MBED_SPM_PARTITIONS_H___ -#define __MBED_SPM_PARTITIONS_H___ - -{% macro do_parition(partition) -%} - -/* ----------------------------------------------------------------------------- - * {{partition.name|upper}} defines - * -------------------------------------------------------------------------- */ -#define {{partition.name|upper}}_ID {{partition.id}} - -{% if partition.rot_services|count > 0 %} -#define {{partition.name|upper}}_ROT_SRV_COUNT ({{partition.rot_services|count}}UL) -{% endif %} -#define {{partition.name|upper}}_EXT_ROT_SRV_COUNT ({{partition.extern_sids|count}}UL) - -{% for irq in partition.irqs %} -#define {{irq.signal|upper}}_POS ({{loop.index + 3 }}UL) -#define {{irq.signal|upper}} (1UL << {{irq.signal|upper}}_POS) -{% endfor %} - -{% if partition.irqs|count > 0 %} -#define {{partition.name|upper}}_WAIT_ANY_IRQ_MSK (\ -{% for irq in partition.irqs %} - {{irq.signal|upper}}{{")" if loop.last else " | \\"}} -{% endfor %} -{% else %} -#define {{partition.name|upper}}_WAIT_ANY_IRQ_MSK (0) -{% endif %} - -{% for rot_srv in partition.rot_services %} -#define {{rot_srv.signal|upper}}_POS ({{loop.index + 3 + partition.irqs|count}}UL) -#define {{rot_srv.signal|upper}} (1UL << {{rot_srv.signal|upper}}_POS) -{% endfor %} - -{% if partition.rot_services|count > 0 %} -#define {{partition.name|upper}}_WAIT_ANY_SID_MSK (\ -{% for rot_srv in partition.rot_services %} - {{rot_srv.signal|upper}}{{")" if loop.last else " | \\"}} -{% endfor %} -{% else %} -#define {{partition.name|upper}}_WAIT_ANY_SID_MSK (0) -{% endif %} - -{% if partition.irqs|count > 0 %} -uint32_t spm_{{partition.name|lower}}_signal_to_irq_mapper(uint32_t signal); -{% endif %} -{%- endmacro %} -{# ------------------ macro do_parition(partition) -------------------------- #} - -/****************** Common definitions ****************************************/ - -/* PSA reserved event flags */ -#define PSA_RESERVED1_POS (1UL) -#define PSA_RESERVED1_MSK (1UL << PSA_RESERVED1_POS) - -#define PSA_RESERVED2_POS (2UL) -#define PSA_RESERVED2_MSK (1UL << PSA_RESERVED2_POS) - -/****************** Service Partitions ****************************************/ - -{% for partition in service_partitions %} -{{ do_parition(partition) }} -{% endfor %} - -/****************** Test Partitions *******************************************/ - -#ifdef USE_PSA_TEST_PARTITIONS - -{% for test_partition in test_partitions %} -#ifdef USE_{{test_partition.name|upper}} -{{ do_parition(test_partition) }} -#endif // USE_{{test_partition.name|upper}} - -{% endfor %} - -#endif // USE_PSA_TEST_PARTITIONS - -#endif // __MBED_SPM_PARTITIONS_H___ -{# End of file #} diff --git a/tools/psa/templates/psa_setup.c.tpl b/tools/psa/templates/psa_setup.c.tpl deleted file mode 100644 index 54e8ec994f9..00000000000 --- a/tools/psa/templates/psa_setup.c.tpl +++ /dev/null @@ -1,281 +0,0 @@ -/* Copyright (c) 2017-2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version {{script_ver}} - ******************************************************************************/ - -#include "cmsis.h" -#include "rtx_os.h" - -#include "mbed_toolchain.h" /* For using MBED_ALIGN macro */ - -#include "spm_panic.h" -#include "spm_internal.h" -#include "handles_manager.h" -#include "mbed_spm_partitions.h" - -#include "psa_manifest/sid.h" - -extern spm_db_t g_spm; - -{% macro do_parition(partition) -%} - -/* ----------------------------------------------------------------------------- - * {{partition.name|upper}} declarations - * -------------------------------------------------------------------------- */ -MBED_ALIGN(8) static uint8_t {{partition.name|lower}}_thread_stack[{{partition.stack_size}}] = {0}; - -static osRtxThread_t {{partition.name|lower}}_thread_cb = {0}; -static const osThreadAttr_t {{partition.name|lower}}_thread_attr = { - .name = "{{partition.name|lower}}", - .attr_bits = 0, - .cb_mem = &{{partition.name|lower}}_thread_cb, - .cb_size = sizeof({{partition.name|lower}}_thread_cb), - .stack_mem = {{partition.name|lower}}_thread_stack, - .stack_size = {{partition.stack_size}}, - .priority = {{partition.priority_mbed}}, - .tz_module = 0, - .reserved = 0 -}; - -static osRtxMutex_t {{partition.name|lower}}_mutex = {0}; -static const osMutexAttr_t {{partition.name|lower}}_mutex_attr = { - .name = "{{partition.name|lower}}_mutex", - .attr_bits = osMutexRecursive | osMutexPrioInherit | osMutexRobust, - .cb_mem = &{{partition.name|lower}}_mutex, - .cb_size = sizeof({{partition.name|lower}}_mutex), -}; - -{% if partition.rot_services|count > 0 %} -spm_rot_service_t {{partition.name|lower}}_rot_services[] = { -{% for rot_srv in partition.rot_services %} - { - .sid = {{rot_srv.name|upper}}, - .mask = {{rot_srv.signal|upper}}, - .partition = NULL, - .min_version = {{rot_srv.minor_version}}, - .min_version_policy = PSA_MINOR_VERSION_POLICY_{{rot_srv.minor_policy|upper}}, -{% if rot_srv.nspe_callable %} - .allow_nspe = true, -{% else %} - .allow_nspe = false, -{% endif %} - .queue = { - .head = NULL, - .tail = NULL - } - }, -{% endfor %} -}; - -{% endif %} -{% if partition.extern_sids|count > 0 %} -/* External SIDs used by {{partition.name}} */ -const uint32_t {{partition.name|lower}}_external_sids[{{partition.extern_sids|count}}] = { -{% for sid in partition.extern_sids %} - {{sid|upper}}, -{% endfor %} -}; - -{% endif %} -{% if partition.irqs|count > 0 %} -// Mapper function from irq signal to interupts number -IRQn_Type spm_{{partition.name|lower}}_signal_to_irq_mapper(uint32_t signal) -{ - SPM_ASSERT({{partition.name|upper}}_WAIT_ANY_IRQ_MSK & signal); - switch(signal){ - {% for irq in partition.irqs %} - case {{ irq.signal }}: - return (IRQn_Type){{irq.line_num}}; - break; - {% endfor %} - default: - break; - } - - SPM_PANIC("Unknown signal number %lu", signal); - return 0; -} - -{% for irq in partition.irqs %} -// ISR handler for interrupt {irq.line_num} -void spm_irq_{{irq.signal}}_{{partition.name|lower}}(void) -{ - spm_partition_t *partition = NULL; - for (uint32_t i = 0; i < g_spm.partition_count; ++i) { - if (g_spm.partitions[i].partition_id == {{partition.name|upper}}_ID) { - partition = &(g_spm.partitions[i]); - } - } - SPM_ASSERT(partition); - - NVIC_DisableIRQ((IRQn_Type){{irq.line_num}}); // will be enabled by psa_eoi() - osThreadFlagsSet(partition->thread_id, {{irq.signal|upper}}); // notify partition -} - -{% endfor %} -{% endif %} -extern void {{partition.entry_point}}(void *ptr); - -void {{partition.name|lower}}_init(spm_partition_t *partition) -{ - if (NULL == partition) { - SPM_PANIC("partition is NULL!\n"); - } - - partition->mutex = osMutexNew(&{{partition.name|lower}}_mutex_attr); - if (NULL == partition->mutex) { - SPM_PANIC("Failed to create mutex for secure partition {{partition.name|lower}}!\n"); - } - - {% if partition.rot_services|count > 0 %} - for (uint32_t i = 0; i < {{partition.name|upper}}_ROT_SRV_COUNT; ++i) { - {{partition.name|lower}}_rot_services[i].partition = partition; - } - partition->rot_services = {{partition.name|lower}}_rot_services; - {% else %} - partition->rot_services = NULL; - {% endif %} - - partition->thread_id = osThreadNew({{partition.entry_point}}, NULL, &{{partition.name|lower}}_thread_attr); - if (NULL == partition->thread_id) { - SPM_PANIC("Failed to create start main thread of partition {{partition.name|lower}}!\n"); - } -} - -{%- endmacro %} -{# -------------- macro do_parition(partition) ----------------------------- #} -/****************** Service Partitions ****************************************/ - -{% for partition in service_partitions %} -{{do_parition(partition)}} - -{% endfor %} - -/****************** Test Partitions *******************************************/ -#ifdef USE_PSA_TEST_PARTITIONS - -{% for test_partition in test_partitions %} -#ifdef USE_{{test_partition.name|upper}} -{{ do_parition(test_partition) }} - -#endif // USE_{{test_partition.name|upper}} - -{% endfor %} -#endif // USE_PSA_TEST_PARTITIONS - -{# -------------- spm_db_entry(partition) ----------------------------------- #} -{% macro spm_db_entry(partition) -%} - - /* {{partition.name|upper}} */ - { - .partition_id = {{partition.name|upper}}_ID, - .thread_id = 0, - .flags = {{partition.name|upper}}_WAIT_ANY_SID_MSK | {{partition.name|upper}}_WAIT_ANY_IRQ_MSK, - .rot_services = NULL, - {% if partition.rot_services|count > 0 %} - .rot_services_count = {{partition.name|upper}}_ROT_SRV_COUNT, - {% else %} - .rot_services_count = 0, - {% endif %} - {% if partition.extern_sids|count > 0 %} - .extern_sids = {{partition.name|lower}}_external_sids, - {% else %} - .extern_sids = NULL, - {% endif %} - .extern_sids_count = {{partition.name|upper}}_EXT_ROT_SRV_COUNT, - {% if partition.irqs|count > 0 %} - .irq_mapper = spm_{{partition.name|lower}}_signal_to_irq_mapper, - {% else %} - .irq_mapper = NULL, - {% endif %} - }, -{%- endmacro %} -{# -------------- spm_db_entry(partition) ----------------------------------- #} -/****************** SPM DB initialization *************************************/ -spm_partition_t g_partitions[] = { -{% for partition in service_partitions %} - {{spm_db_entry(partition)}} - -{% endfor %} -#ifdef USE_PSA_TEST_PARTITIONS - -{% for test_partition in test_partitions %} -#ifdef USE_{{test_partition.name|upper}} {{ spm_db_entry(test_partition) }} -#endif // USE_{{test_partition.name|upper}} - -{% endfor %} -#endif // USE_PSA_TEST_PARTITIONS - -}; - -/****************** MMIO regions **********************************************/ -{% if regions|count > 0 %} -/****************** Sanity checks *********************************************/ -/* Check all the defined memory regions for overlapping. */ -{% for region_pair in region_pair_list %} -MBED_STATIC_ASSERT( - ((uintptr_t)({{region_pair[0].base}}) + {{region_pair[0].size}} - 1 < (uintptr_t)({{region_pair[1].base}})) || - ((uintptr_t)({{region_pair[1].base}}) + {{region_pair[1].size}} - 1 < (uintptr_t)({{region_pair[0].base}})), - "The region with base {{region_pair[0].base}} and size {{region_pair[0].size}} overlaps with the region with base {{region_pair[1].base}} and size {{region_pair[1].size}}!"); - -{% endfor %} -/****************** MMIO regions definition ***********************************/ -/* A list of all the memory regions. */ -const mem_region_t mem_regions[] = { -{% for region in regions %} - { (uint32_t)({{region.base}}), {{region.size}}, {{region.permission}}, {{region.partition_id}} }, -{% endfor %} -}; -{% else %} -const mem_region_t *mem_regions = NULL; -{% endif %} -const uint32_t mem_region_count = {{regions|count}}; - -/****************** Partitions init function *********************************/ -uint32_t init_partitions(spm_partition_t **partitions) -{ - uint32_t partition_idx = 0; - - if (NULL == partitions) { - SPM_PANIC("partitions is NULL!\n"); - } - -{% for partition in service_partitions %} - {{partition.name|lower}}_init(&(g_partitions[partition_idx++])); -{% endfor %} - -#ifdef USE_PSA_TEST_PARTITIONS - -{% for test_partition in test_partitions %} -#ifdef USE_{{test_partition.name|upper}} - {{test_partition.name|lower}}_init(&(g_partitions[partition_idx++])); -#endif // USE_{{test_partition.name|upper}} - -{% endfor %} -#endif // USE_PSA_TEST_PARTITIONS - - *partitions = g_partitions; - return partition_idx; -} - -{# End of file #} diff --git a/tools/psa/templates/sid.h.tpl b/tools/psa/templates/sid.h.tpl deleted file mode 100644 index 7cc6e1202d9..00000000000 --- a/tools/psa/templates/sid.h.tpl +++ /dev/null @@ -1,47 +0,0 @@ -/* Copyright (c) 2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version {{script_ver}} - ******************************************************************************/ -{% macro parition_sid(partition) -%} -/* ----------------------------------------------------------------------------- - * {{partition.name|upper}} Service IDs - * -------------------------------------------------------------------------- */ - -{% for rot_srv in partition.rot_services %} -#define {{rot_srv.name|upper}} {{rot_srv.id}} -{% endfor %} - -{%- endmacro %} -{# -------------- macro parition_sid(partition) ---------------------------- #} - -/****************** Service Partitions ****************************************/ - -{% for partition in service_partitions %} -{{parition_sid(partition)}} -{% endfor %} -/****************** Test Partitions *******************************************/ - -{% for partition in test_partitions %} -{{parition_sid(partition)}} -{% endfor %} -{# End of file #} diff --git a/tools/psa/templates/tfm_partition_defs.inc.tpl b/tools/psa/templates/tfm_partition_defs.inc.tpl deleted file mode 100644 index d462164a261..00000000000 --- a/tools/psa/templates/tfm_partition_defs.inc.tpl +++ /dev/null @@ -1,56 +0,0 @@ -/* Copyright (c) 2017-2019 ARM Limited - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version {{script_ver}} - ******************************************************************************/ - -#ifndef __TFM_PARTITION_DEFS_INC__ -#define __TFM_PARTITION_DEFS_INC__ - -/*************************** Service Partitions *******************************/ - -{% for partition in service_partitions %} -{% set partition_loop = loop %} -#define {{partition.name|upper}}_ID (TFM_SP_BASE + {{ partition_loop.index0 }}) -{% endfor %} - -/*************************** Test Partitions **********************************/ - -#ifdef USE_PSA_TEST_PARTITIONS - -{% for partition in test_partitions %} -{% set partition_loop = loop %} -#ifdef USE_{{partition.name|upper}} -#define {{partition.name|upper}}_ID (TFM_SP_BASE + {{service_partitions|count}} + {{ partition_loop.index0 }}) -#endif - -{% endfor %} -#endif // USE_PSA_TEST_PARTITIONS - -#ifdef USE_PSA_TEST_PARTITIONS -#define TFM_MAX_USER_PARTITIONS ({{service_partitions|count}} + {{test_partitions|count}}) -#else -#define TFM_MAX_USER_PARTITIONS ({{service_partitions|count}}) -#endif - -#endif // __TFM_PARTITION_DEFS_INC__ -{# End of file #} diff --git a/tools/psa/templates/tfm_partition_list.inc.tpl b/tools/psa/templates/tfm_partition_list.inc.tpl deleted file mode 100644 index e05a6393071..00000000000 --- a/tools/psa/templates/tfm_partition_list.inc.tpl +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version {{script_ver}} - ******************************************************************************/ - -#ifndef __TFM_PARTITION_LIST_INC__ -#define __TFM_PARTITION_LIST_INC__ - -/*************************** Service Partitions *******************************/ -{% for partition in service_partitions %} -/* ----------------------------------------------------------------------------- - * {{partition.name|upper}} - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE({{partition.name|upper}}, 0 - | SPM_PART_FLAG_IPC - , "{{partition.type}}", {{partition.id}}, {{partition.priority_tfm}}, {{partition.stack_size}}); -PARTITION_ADD_INIT_FUNC({{partition.name|upper}}, {{partition.entry_point}}); - -{% endfor %} -/*************************** Test Partitions **********************************/ -#ifdef USE_PSA_TEST_PARTITIONS - -{% for partition in test_partitions %} -#ifdef USE_{{partition.name|upper}} -/* ----------------------------------------------------------------------------- - * {{partition.name|upper}} - * -------------------------------------------------------------------------- */ -PARTITION_DECLARE({{partition.name|upper}}, 0 - | SPM_PART_FLAG_IPC - , "{{partition.type}}", {{partition.id}}, {{partition.priority_tfm}}, {{partition.stack_size}}); -PARTITION_ADD_INIT_FUNC({{partition.name|upper}}, {{partition.entry_point}}); -#endif // USE_{{partition.name|upper}} - -{% endfor %} -#endif // USE_PSA_TEST_PARTITIONS - -#endif // __TFM_PARTITION_LIST_INC__ -{# End of file #} diff --git a/tools/psa/templates/tfm_service_list.inc.tpl b/tools/psa/templates/tfm_service_list.inc.tpl deleted file mode 100644 index 3f0a83c66a7..00000000000 --- a/tools/psa/templates/tfm_service_list.inc.tpl +++ /dev/null @@ -1,46 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version {{script_ver}} - ******************************************************************************/ - -#ifndef __TFM_SERVICE_LIST_INC__ -#define __TFM_SERVICE_LIST_INC__ - -/*************************** Service Partitions *******************************/ -{% for partition in service_partitions %} -/* ----------------------------------------------------------------------------- - * {{partition.name|upper}} Services - * -------------------------------------------------------------------------- */ -{% for rot_srv in partition.rot_services %} -{"{{rot_srv.name|upper}}", {{partition.name|upper}}_ID, {{rot_srv.signal|upper}}, {{rot_srv.id}}, {% if rot_srv.nspe_callable %}true{% else %}false{% endif %}, {{rot_srv.minor_version}}, TFM_VERSION_POLICY_{{rot_srv.minor_policy|upper}}}, -{% endfor %} - -{% endfor %} -/*************************** Test Partitions **********************************/ -#ifdef USE_PSA_TEST_PARTITIONS - -{% for partition in test_partitions %} -#ifdef USE_{{partition.name|upper}} -/* ----------------------------------------------------------------------------- - * {{partition.name|upper}} Services - * -------------------------------------------------------------------------- */ -{% for rot_srv in partition.rot_services %} -{"{{rot_srv.name|upper}}", {{partition.name|upper}}_ID, {{rot_srv.signal|upper}}, {{rot_srv.id}}, {% if rot_srv.nspe_callable %}true{% else %}false{% endif %}, {{rot_srv.minor_version}}, TFM_VERSION_POLICY_{{rot_srv.minor_policy|upper}}}, -{% endfor %} -#endif // USE_{{partition.name|upper}} - -{% endfor %} -#endif // USE_PSA_TEST_PARTITIONS - -#endif // __TFM_SERVICE_LIST_INC__ -{# End of file #} diff --git a/tools/psa/templates/tfm_spm_signal_defs.h.tpl b/tools/psa/templates/tfm_spm_signal_defs.h.tpl deleted file mode 100644 index cf37eab490c..00000000000 --- a/tools/psa/templates/tfm_spm_signal_defs.h.tpl +++ /dev/null @@ -1,48 +0,0 @@ -/* - * Copyright (c) 2018-2019, Arm Limited. All rights reserved. - * - * SPDX-License-Identifier: BSD-3-Clause - * - */ - -/******************************************************************************* - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * THIS FILE IS AN AUTO-GENERATED FILE - DO NOT MODIFY IT. - * !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! - * Template Version 1.0 - * Generated by tools/psa/generate_partition_code.py Version {{script_ver}} - ******************************************************************************/ - -#ifndef __TFM_SPM_SIGNAL_DEFS_H__ -#define __TFM_SPM_SIGNAL_DEFS_H__ - -/*************************** Service Partitions *******************************/ -{% for partition in service_partitions %} -/* ----------------------------------------------------------------------------- - * {{partition.name|upper}} Signals - * -------------------------------------------------------------------------- */ -{% for rot_srv in partition.rot_services %} -#define {{rot_srv.signal|upper}}_POS ({{loop.index + 3}}UL) -#define {{rot_srv.signal|upper}} (1UL << {{rot_srv.signal|upper}}_POS) -{% endfor %} - -{% endfor %} -/*************************** Test Partitions **********************************/ -#ifdef USE_PSA_TEST_PARTITIONS - -{% for partition in test_partitions %} -#ifdef USE_{{partition.name|upper}} -/* ----------------------------------------------------------------------------- - * {{partition.name|upper}} Signals - * -------------------------------------------------------------------------- */ -{% for rot_srv in partition.rot_services %} -#define {{rot_srv.signal|upper}}_POS ({{loop.index + 3}}UL) -#define {{rot_srv.signal|upper}} (1UL << {{rot_srv.signal|upper}}_POS) -{% endfor %} -#endif // USE_{{partition.name|upper}} - -{% endfor %} -#endif // USE_PSA_TEST_PARTITIONS - -#endif // __TFM_SPM_SIGNAL_DEFS_H__ -{# End of file #} diff --git a/tools/psa/tfm/__init__.py b/tools/psa/tfm/__init__.py index e69de29bb2d..97484473fc6 100644 --- a/tools/psa/tfm/__init__.py +++ b/tools/psa/tfm/__init__.py @@ -0,0 +1,16 @@ +#! /usr/bin/env python +# Copyright (c) 2019 ARM Limited +# +# SPDX-License-Identifier: Apache-2.0 +# +# Licensed under the Apache License, Version 2.0 (the "License"); +# you may not use this file except in compliance with the License. +# You may obtain a copy of the License at +# +# http://www.apache.org/licenses/LICENSE-2.0 +# +# Unless required by applicable law or agreed to in writing, software +# distributed under the License is distributed on an "AS IS" BASIS, +# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. +# See the License for the specific language governing permissions and +# limitations under the License. diff --git a/tools/psa/tfm/mbed_app.json b/tools/psa/tfm/mbed_app.json deleted file mode 100644 index b98452dfdef..00000000000 --- a/tools/psa/tfm/mbed_app.json +++ /dev/null @@ -1,6 +0,0 @@ -{ - "name": "tfm_build", - "requires" : ["psa-services", "tfm", "tfm-s", "psa"], - "macros": ["MBEDTLS_CIPHER_MODE_CTR", "MBEDTLS_CMAC_C"], - "artifact_name": "tfm" -} diff --git a/tools/resources/__init__.py b/tools/resources/__init__.py index 45339c1c302..102309c9fb3 100644 --- a/tools/resources/__init__.py +++ b/tools/resources/__init__.py @@ -604,38 +604,3 @@ def filter(self, res_filter): for t in res_filter.file_types: self._file_refs[t] = set(filter( res_filter.predicate, self._file_refs[t])) - - -class ResourceFilter(object): - def __init__(self, file_types): - self.file_types = file_types - - def predicate(self, ref): - raise NotImplemented - - -class SpeOnlyResourceFilter(ResourceFilter): - def __init__(self): - ResourceFilter.__init__( - self, [FileType.ASM_SRC, FileType.C_SRC, FileType.CPP_SRC]) - - def predicate(self, ref): - return 'COMPONENT_SPE' in ref.name - - -class OsAndSpeResourceFilter(ResourceFilter): - def __init__(self): - ResourceFilter.__init__( - self, [FileType.ASM_SRC, FileType.C_SRC, FileType.CPP_SRC]) - - def predicate(self, ref): - return ROOT in abspath(ref.name) or 'COMPONENT_SPE' in ref.name - - -class PsaManifestResourceFilter(ResourceFilter): - def __init__(self): - ResourceFilter.__init__( - self, [FileType.JSON]) - - def predicate(self, ref): - return not ref.name.endswith('_psa.json') diff --git a/tools/targets/ARM_MUSCA_A1.py b/tools/targets/ARM_MUSCA_A1.py index 4729e43b706..2ef4b368668 100644 --- a/tools/targets/ARM_MUSCA_A1.py +++ b/tools/targets/ARM_MUSCA_A1.py @@ -39,7 +39,7 @@ def musca_tfm_bin(t_self, non_secure_bin, secure_bin): if not isdir(tempdir): os.makedirs(tempdir) flash_layout = path_join(MUSCA_A1_BASE, 'partition', 'flash_layout.h') - mcuboot_bin = path_join(MUSCA_A1_BASE, 'TARGET_MUSCA_A1_NS', 'prebuilt', 'mcuboot.bin') + mcuboot_bin = path_join(MUSCA_A1_BASE, 'prebuilt', 'mcuboot.bin') ns_bin_name, ns_bin_ext = splitext(basename(non_secure_bin)) concatenated_bin = path_join(tempdir, 'tfm_' + ns_bin_name + ns_bin_ext) signed_bin = path_join(tempdir, 'tfm_' + ns_bin_name + '_signed' + ns_bin_ext) diff --git a/tools/targets/ARM_MUSCA_B1.py b/tools/targets/ARM_MUSCA_B1.py index eb0e1d74b1a..f8555d4cf41 100644 --- a/tools/targets/ARM_MUSCA_B1.py +++ b/tools/targets/ARM_MUSCA_B1.py @@ -39,7 +39,7 @@ def musca_tfm_bin(t_self, non_secure_bin, secure_bin): if not isdir(tempdir): os.makedirs(tempdir) flash_layout = path_join(MUSCA_B1_BASE, 'partition', 'flash_layout.h') - mcuboot_bin = path_join(MUSCA_B1_BASE, 'TARGET_MUSCA_B1_NS', 'prebuilt', 'mcuboot.bin') + mcuboot_bin = path_join(MUSCA_B1_BASE, 'prebuilt', 'mcuboot.bin') ns_bin_name, ns_bin_ext = splitext(basename(non_secure_bin)) concatenated_bin = path_join(tempdir, 'tfm_' + ns_bin_name + ns_bin_ext) signed_bin = path_join(tempdir, 'tfm_' + ns_bin_name + '_signed' + ns_bin_ext) diff --git a/tools/targets/__init__.py b/tools/targets/__init__.py index ce4d15536e0..2ef5d6d40b0 100644 --- a/tools/targets/__init__.py +++ b/tools/targets/__init__.py @@ -387,36 +387,21 @@ def core_without_NS(self): else: return self.core - # Mechanism for specifying TrustZone is subject to change - see - # discussion on https://github.com/ARMmbed/mbed-os/issues/9460 - # In the interim, we follow heuristics that support existing - # documentation for ARMv8-M TF-M integration (check the "TFM" label), - # plus an extra "trustzone" flag set by M2351, and looking at the "-NS" - # suffix. This now permits non-TrustZone ARMv8 builds if - # having trustzone = false (default), no TFM flag, and no -NS suffix. - @property - def is_TrustZone_secure_target(self): - return (getattr(self, 'trustzone', False) or 'TFM' in self.labels) and not self.core.endswith('-NS') - @property def is_TrustZone_non_secure_target(self): return self.core.endswith('-NS') @property def is_TrustZone_target(self): - return self.is_TrustZone_secure_target or self.is_TrustZone_non_secure_target - - @property - def is_PSA_secure_target(self): - return 'SPE_Target' in self.labels + return self.is_TrustZone_non_secure_target @property def is_PSA_non_secure_target(self): return 'NSPE_Target' in self.labels @property - def is_PSA_target(self): - return self.is_PSA_secure_target or self.is_PSA_non_secure_target + def is_TFM_target(self): + return getattr(self, 'tfm_target_name', False) def get_post_build_hook(self, toolchain_labels): """Initialize the post-build hooks for a toolchain. For now, this diff --git a/tools/targets/musca_a1-root-rsa-3072.md b/tools/targets/musca_a1-root-rsa-3072.md index 143e1e091f5..03629646604 100644 --- a/tools/targets/musca_a1-root-rsa-3072.md +++ b/tools/targets/musca_a1-root-rsa-3072.md @@ -2,7 +2,7 @@ A default RSA key pair is given to the Musca-A1 target. -Public key was pre-compiled to `targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/TARGET_MUSCA_A1_NS/prebuilt/mcuboot.bin` and private key is in `musca_a1-root-rsa-3072.pem`. +Public key was pre-compiled to `targets/TARGET_ARM_SSG/TARGET_MUSCA_A1/prebuilt/mcuboot.bin` and private key is in `musca_a1-root-rsa-3072.pem`. DO NOT use them in production code, they are exclusively for testing! diff --git a/tools/targets/musca_b1-root-rsa-3072.md b/tools/targets/musca_b1-root-rsa-3072.md index 1ef42674368..277728a4216 100644 --- a/tools/targets/musca_b1-root-rsa-3072.md +++ b/tools/targets/musca_b1-root-rsa-3072.md @@ -2,7 +2,7 @@ A default RSA key pair is given to the Musca-B1 target. -Public key was pre-compiled to `targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/TARGET_MUSCA_B1_NS/prebuilt/mcuboot.bin` and private key is in `musca_b1-root-rsa-3072.pem`. +Public key was pre-compiled to `targets/TARGET_ARM_SSG/TARGET_MUSCA_B1/prebuilt/mcuboot.bin` and private key is in `musca_b1-root-rsa-3072.pem`. DO NOT use them in production code, they are exclusively for testing! diff --git a/tools/test.py b/tools/test.py index e0cb11c1b5c..41abd62a8b7 100644 --- a/tools/test.py +++ b/tools/test.py @@ -43,8 +43,6 @@ from tools.utils import print_end_warnings from tools.settings import ROOT from tools.targets import Target -from tools.psa import generate_psa_sources -from tools.resources import OsAndSpeResourceFilter, SpeOnlyResourceFilter def main(): error = False @@ -247,12 +245,6 @@ def main(): profile = extract_profile(parser, options, internal_tc_name) try: resource_filter = None - if target.is_PSA_secure_target: - resource_filter = OsAndSpeResourceFilter() - generate_psa_sources( - source_dirs=base_source_paths, - ignore_paths=[options.build_dir] - ) # Build sources notify = TerminalNotifier(options.verbose, options.silent) @@ -288,10 +280,7 @@ def main(): if not library_build_success: print("Failed to build library") else: - if target.is_PSA_secure_target: - resource_filter = SpeOnlyResourceFilter() - else: - resource_filter = None + resource_filter = None # Build all the tests notify = TerminalNotifier(options.verbose, options.silent) diff --git a/tools/test/psa/__init__.py b/tools/test/psa/__init__.py deleted file mode 100644 index 982d7317e57..00000000000 --- a/tools/test/psa/__init__.py +++ /dev/null @@ -1,17 +0,0 @@ -""" -Copyright (c) 2019 ARM Limited. All rights reserved. - -SPDX-License-Identifier: Apache-2.0 - -Licensed under the Apache License, Version 2.0 (the "License"); -you may not use this file except in compliance with the License. -You may obtain a copy of the License at - -http://www.apache.org/licenses/LICENSE-2.0 - -Unless required by applicable law or agreed to in writing, software -distributed under the License is distributed on an "AS IS" BASIS, -WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -See the License for the specific language governing permissions and -limitations -""" diff --git a/tools/test/psa/test_data.py b/tools/test/psa/test_data.py deleted file mode 100644 index 3b8a3150aaf..00000000000 --- a/tools/test/psa/test_data.py +++ /dev/null @@ -1,732 +0,0 @@ -# Copyright (c) 2017-2018 ARM Limited -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -manifests = [ - { - 'name': 'TEST_PARTITION', - 'id': "0x7FFFFFFF", - "type": "APPLICATION-ROT", - 'priority': 'NORMAL', - 'entry_point': 'test_main', - 'stack_size': 512, # 512 == 0x200 - 'heap_size': 2048, - 'mmio_regions': [ - { - 'name': 'PERIPH1', - 'permission': 'READ-ONLY' - }, - { - 'name': 'PERIPH2', - 'permission': 'READ-ONLY' - }, - { - 'base': '0xCCCCCCCC', - 'size': 4096, 'permission': 'READ-ONLY' - }, - { - 'base': '0xDDDDDDDD', - 'size': 33554432, 'permission': 'READ-WRITE' - } - ], - 'services': [ - { - 'name': 'SID1', - 'identifier': '0x00000001', - 'signal': 'SID1', - 'minor_version': 1, - 'minor_policy': 'RELAXED', - 'non_secure_clients': True - }, - { - 'name': 'SID2', - 'identifier': '0x00000002', - 'signal': 'SID2', - 'minor_version': 2, - 'minor_policy': 'STRICT', - 'non_secure_clients': False - }, - ], - 'source_files': ['src1.cpp', 'src2.cpp'], - 'irqs': [ - {"line_num": 20, "signal": "ISR20"}, - {"line_num": 21, "signal": "ISR21"} - ], - 'extern_sids': ['SID3', 'SID4'] - }, - { - 'name': 'TEST_PARTITION2', - 'id': "0x7FFFFFFE", - "type": "APPLICATION-ROT", - 'priority': 'NORMAL', - 'entry_point': 'test2_main', - 'stack_size': 512, # 512 == 0x200 - 'heap_size': 2048, - 'mmio_regions': [ - { - 'name': 'PERIPH1', - 'permission': 'READ-ONLY' - }, - { - 'name': 'PERIPH3', - 'permission': 'READ-ONLY' - }, - { - 'base': '0xAAAAAAAA', - 'size': 4096, 'permission': 'READ-ONLY' - }, - { - 'base': '0xBBBBBBBB', - 'size': 33554432, 'permission': 'READ-WRITE' - } - ], - 'services': [ - { - 'name': 'SID3', - 'identifier': '0x00000003', - 'signal': 'SID3', - 'minor_version': 5, - 'minor_policy': 'RELAXED', - 'non_secure_clients': True - }, - { - 'name': 'SID4', - 'identifier': '0x00000004', - 'signal': 'SID4', - 'minor_version': 12, - 'minor_policy': 'STRICT', - 'non_secure_clients': False - }, - ], - 'source_files': ['src3.cpp', 'src4.cpp'], - 'irqs': [ - {"line_num": 22, "signal": "ISR22"}, - {"line_num": 23, "signal": "ISR23"} - ] - } -] - -manifests_for_circular_call_dependency_checks = [ - { - 'name': 'PARTITION1', - 'id': '0x7FFFFFFF', - 'type': 'APPLICATION-ROT', - 'priority': 'NORMAL', - 'entry_point': 'test_main', - 'stack_size': 512, - 'heap_size': 2048, - 'source_files': ['src1.cpp'], - 'services': [ - { - 'name': 'SID1', - 'identifier': '0x00000001', - 'signal': 'SID1', - 'non_secure_clients': False - }, - { - 'name': 'SID2', - 'identifier': '0x00000002', - 'signal': 'SID2', - 'non_secure_clients': False - } - ], - 'extern_sids': ['SID3', 'SID4'] - }, - { - 'name': 'PARTITION2', - 'id': '0x7FFFFFFE', - 'type': 'APPLICATION-ROT', - 'priority': 'NORMAL', - 'entry_point': 'test_main', - 'stack_size': 512, - 'heap_size': 2048, - 'source_files': ['src2.cpp'], - 'services': [ - { - 'name': 'SID3', - 'identifier': '0x00000003', - 'signal': 'SID3', - 'non_secure_clients': False - }, - { - 'name': 'SID4', - 'identifier': '0x00000004', - 'signal': 'SID4', - 'non_secure_clients': False - } - ], - 'extern_sids': ['SID1', 'SID2'] - }, - { - 'name': 'PARTITION3', - 'id': '0x7FFFFFFD', - 'type': 'APPLICATION-ROT', - 'priority': 'NORMAL', - 'entry_point': 'test_main', - 'stack_size': 512, - 'heap_size': 2048, - 'source_files': ['src3.cpp'], - 'services': [ - { - 'name': 'SID5', - 'identifier': '0x00000005', - 'signal': 'SID5', - 'non_secure_clients': False - } - ], - 'extern_sids': ['SID7'] - }, - { - 'name': 'PARTITION4', - 'id': '0x7FFFFFFC', - 'type': 'APPLICATION-ROT', - 'priority': 'NORMAL', - 'entry_point': 'test_main', - 'stack_size': 512, - 'heap_size': 2048, - 'source_files': ['src4.cpp'], - 'services': [ - { - 'name': 'SID6', - 'identifier': '0x00000006', - 'signal': 'SID6', - 'non_secure_clients': False - }, - { - 'name': 'SID7', - 'identifier': '0x00000007', - 'signal': 'SID7', - 'non_secure_clients': False - }, - ], - 'extern_sids': ['SID9'] - }, - { - 'name': 'PARTITION5', - 'id': '0x7FFFFFFB', - 'type': 'APPLICATION-ROT', - 'priority': 'NORMAL', - 'entry_point': 'test_main', - 'stack_size': 512, - 'heap_size': 2048, - 'source_files': ['src5.cpp'], - 'services': [ - { - 'name': 'SID8', - 'identifier': '0x00000008', - 'signal': 'SID8', - 'non_secure_clients': False - }, - { - 'name': 'SID9', - 'identifier': '0x00000009', - 'signal': 'SID9', - 'non_secure_clients': False - } - ], - 'extern_sids': ['SID5'] - }, - { - 'name': 'PARTITION6', - 'id': '0x7FFFFFFA', - 'type': 'APPLICATION-ROT', - 'priority': 'NORMAL', - 'entry_point': 'test_main', - 'stack_size': 512, - 'heap_size': 2048, - 'source_files': ['src6.cpp'], - 'services': [ - { - 'name': 'SID10', - 'identifier': '0x0000000A', - 'signal': 'SID10', - 'non_secure_clients': False - }, - { - 'name': 'SID11', - 'identifier': '0x0000000B', - 'signal': 'SID11', - 'non_secure_clients': False - } - ], - 'extern_sids': ['SID7', 'SID5'] - }, - { - 'name': 'PARTITION7', - 'id': '0x7FFFFFF9', - 'type': 'APPLICATION-ROT', - 'priority': 'NORMAL', - 'entry_point': 'test_main', - 'stack_size': 512, - 'heap_size': 2048, - 'source_files': ['src6.cpp'], - 'services': [ - { - 'name': 'SID12', - 'identifier': '0x0000000C', - 'signal': 'SID12', - 'non_secure_clients': False - } - ] - } -] - -invalid_minor_version_policy_rot_srv = [ - { - 'name': 'SID1', - 'identifier': '0x00000001', - 'signal': 'SID1', - 'minor_version': 1, - 'minor_policy': 'invalid_policy', - 'non_secure_clients': True - } -] - -invalid_nspe_callable_rot_srv = [ - { - 'name': 'SID1', - 'identifier': '0x00000001', - 'signal': 'SID1', - 'minor_version': 1, - 'minor_policy': 'STRICT', - 'non_secure_clients': 'invalid_value' - } -] - -missing_nspe_callable_rot_srv = [ - { - 'name': 'SID1', - 'identifier': '0x00000001', - 'signal': 'SID1', - 'minor_version': 1, - 'minor_policy': 'STRICT' - } -] - -duplicate_signal_rot_services = [ - { - 'name': 'SID3', - 'identifier': '0x00000001', - 'signal': 'SID1', - 'minor_version': 5, - 'minor_policy': 'RELAXED', - 'non_secure_clients': True - }, - { - 'name': 'SID4', - 'identifier': '0x00000002', - 'signal': 'SID2', - 'minor_version': 12, - 'minor_policy': 'STRICT', - 'non_secure_clients': True - }, -] - -duplicate_identifier_rot_services = [ - { - 'name': 'SID3', - 'identifier': '0x00000003', - 'signal': 'SID3', - 'minor_version': 5, - 'minor_policy': 'RELAXED', - 'non_secure_clients': True - }, - { - 'name': 'SID4', - 'identifier': '0x00000002', - 'signal': 'SID4', - 'minor_version': 12, - 'minor_policy': 'STRICT', - 'non_secure_clients': True - }, -] - -spe_contained_rot_services = [ - { - 'name': 'SID5', - 'identifier': '0x00000005', - 'signal': 'SID5', - 'minor_version': 5, - 'minor_policy': 'RELAXED', - 'non_secure_clients': False - }, - { - 'name': 'SID6', - 'identifier': '0x00000006', - 'signal': 'SID6', - 'minor_version': 12, - 'minor_policy': 'STRICT', - 'non_secure_clients': False - } -] - -missing_minor_version_rot_srv = [ - { - 'name': 'SID1', - 'identifier': '0x00000001', - 'signal': 'SID1', - 'minor_policy': 'RELAXED', - 'non_secure_clients': True - } -] - -missing_minor_version_policy_rot_srv = [ - { - 'name': 'SID2', - 'identifier': '0x00000002', - 'signal': 'SID2', - 'minor_version': 1, - 'non_secure_clients': True - } -] - -missing_minor_completley_rot_srv = [ - {'name': 'SID2', 'identifier': '0x00000002', 'signal': 'SID2', - 'non_secure_clients': True} -] - -duplicate_signal_irqs = [ - {"line_num": 22, "signal": "ISR20"} -] - -duplicate_line_num_irqs = [ - {"line_num": 21, "signal": "ISR22"} -] - -invalid_mmioregion_base = { - 'base': 'str', - 'size': 4096, - 'permission': 'READ-ONLY' -} - -invalid_mmioregion_size = { - 'base': '0xEEEEEEEE', - 'size': 'str', - 'permission': 'READ-ONLY' -} - -test_mock_files = { - 'manifest1': 1, - 'manifest2': 2, - 'template_common1': 3, - 'template_common2': 4, - 'template_NAME_3': 5, - 'template_NAME_4': 6, - 'gen1': 7, - 'gen2': 8, - 'gen3': 9, - 'gen4': 10, - 'gen5': 11, - 'gen6': 12 -} - -test_common_template = '''{ - "num_of_partitions": {{partitions|count}}, - "partition_names": [ -{% for partition in partitions %} - "{{partition.name}}"{{"" if loop.last else ","}} -{% endfor %} - ], - "num_of_region_pairs": {{region_pair_list|count}} -} -''' - -test_common_expected = '''{ - "num_of_partitions": 2, - "partition_names": [ - "TEST_PARTITION", - "TEST_PARTITION2" - ], - "num_of_region_pairs": 28 -} -''' - -test_partition_template = '''{ - "name": "{{partition.name}}", - "id": "0x{{"%0x"|format(partition.id|int)|upper}}", - "type": "{{partition.type}}", - "priority": "{{partition.priority_mbed|find_priority_key}}", - "entry_point": "{{partition.entry_point}}", - "stack_size": {{partition.stack_size}}, - "heap_size": {{partition.heap_size}}, - "mmio_regions": [ -{% for mmio in partition.mmio_regions %} - { - {% if mmio.size|int %} - "base": "{{mmio.base}}", - "size": {{mmio.size}}, - {% else %} - "name": "{{mmio.base}}", - {% endif %} - "permission": "{{mmio.permission|find_permission_key}}" - {{"}" if loop.last else "},"}} -{% endfor %} - ], - "services": [ -{% for rot_srv in partition.rot_services %} - { - "name": "{{rot_srv.name}}", - "identifier": "{{rot_srv.id}}", - "signal": "{{rot_srv.signal}}", - "minor_version": {{rot_srv.minor_version}}, - "minor_policy": "{{rot_srv.minor_policy}}", - "non_secure_clients": {{rot_srv.nspe_callable|lower}} - {{"}" if loop.last else "},"}} -{% endfor %} - ], -{% if partition.extern_sids %} - "extern_sids": [ -{% for ext_sid in partition.extern_sids %} - "{{ext_sid}}"{{"" if loop.last else ","}} -{% endfor %} - ], -{% endif %} - "source_files": [ -{% for src in partition.source_files %} - "{{src|basename}}"{{"" if loop.last else ","}} -{% endfor %} - ], - "irqs": [ -{% for irq in partition.irqs %} - { - "line_num": {{irq.line_num}}, - "signal": "{{irq.signal}}" - {{"}" if loop.last else "},"}} -{% endfor %} - ] -} -''' - -exceeding_services = [ - { - "name": "XSID1", - "signal": "XSID1", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000009" - }, - { - "name": "XSID2", - "signal": "XSID2", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000000a" - }, { - "name": "XSID3", - "signal": "XSID3", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000000b" - }, { - "name": "XSID4", - "signal": "XSID4", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000000c" - }, { - "name": "XSID5", - "signal": "XSID5", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000000d" - }, { - "name": "XSID6", - "signal": "XSID6", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000000e" - }, { - "name": "XSID7", - "signal": "XSID7", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000000f" - }, { - "name": "XSID8", - "signal": "XSID8", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000010" - }, { - "name": "XSID9", - "signal": "XSID9", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000011" - }, { - "name": "XSID10", - "signal": "XSID10", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000012" - }, { - "name": "XSID11", - "signal": "XSID11", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000013" - }, { - "name": "XSID12", - "signal": "XSID12", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000014" - }, { - "name": "XSID13", - "signal": "XSID13", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000015" - }, { - "name": "XSID14", - "signal": "XSID14", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000016" - }, { - "name": "XSID15", - "signal": "XSID15", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000017" - }, { - "name": "XSID16", - "signal": "XSID16", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000018" - }, { - "name": "XSID17", - "signal": "XSID17", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000019" - }, { - "name": "XSID18", - "signal": "XSID18", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000001a" - }, { - "name": "XSID19", - "signal": "XSID19", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000001b" - }, { - "name": "XSID20", - "signal": "XSID20", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000001c" - }, { - "name": "XSID21", - "signal": "XSID21", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000001d" - }, { - "name": "XSID22", - "signal": "XSID22", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000001e" - }, { - "name": "XSID23", - "signal": "XSID23", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x0000001f" - }, { - "name": "XSID24", - "signal": "XSID24", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000020" - }, { - "name": "XSID25", - "signal": "XSID25", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000021" - }, { - "name": "XSID26", - "signal": "XSID26", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000022" - }, { - "name": "XSID27", - "signal": "XSID27", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000023" - }, { - "name": "XSID28", - "signal": "XSID28", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000024" - }, { - "name": "XSID29", - "signal": "XSID29", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000025" - }, { - "name": "XSID30", - "signal": "XSID30", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000026" - }, { - "name": "XSID31", - "signal": "XSID31", - "non_secure_clients": True, - "minor_version": 5, - "minor_policy": "RELAXED", - "identifier": "0x00000027" - } -] diff --git a/tools/test/psa/test_find_secure_image.py b/tools/test/psa/test_find_secure_image.py deleted file mode 100644 index d303a4a6652..00000000000 --- a/tools/test/psa/test_find_secure_image.py +++ /dev/null @@ -1,57 +0,0 @@ -# Copyright (c) 2019 ARM Limited -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import pytest -import os -from tools.notifier.mock import MockNotifier -from tools.resources import Resources, FileType -from tools.psa import find_secure_image - - -def test_find_secure_image(): - mock_notifier = MockNotifier() - mock_resources = Resources(mock_notifier) - ns_image_path = os.path.join('BUILD', 'TARGET_NS', 'app.bin') - ns_test_path = os.path.join('BUILD', 'TARGET_NS', 'test.bin') - config_s_image_name = 'target_config.bin' - default_bin = os.path.join('prebuilt', config_s_image_name) - test_bin = os.path.join('prebuilt', 'test.bin') - - with pytest.raises(Exception, match='ns_image_path and configured_s_image_path are mandatory'): - find_secure_image(mock_notifier, mock_resources, None, None, FileType.BIN) - find_secure_image(mock_notifier, mock_resources, ns_image_path, None, FileType.BIN) - find_secure_image(mock_notifier, mock_resources, None, config_s_image_name, FileType.BIN) - - with pytest.raises(Exception, match='image_type must be of type BIN or HEX'): - find_secure_image(mock_notifier, mock_resources, ns_image_path, config_s_image_name, None) - find_secure_image(mock_notifier, mock_resources, ns_image_path, config_s_image_name, FileType.C_SRC) - - with pytest.raises(Exception, match='No image files found for this target'): - find_secure_image(mock_notifier, mock_resources, ns_image_path, config_s_image_name, FileType.BIN) - - dummy_bin = os.path.join('path', 'to', 'dummy.bin') - mock_resources.add_file_ref(FileType.BIN, dummy_bin, dummy_bin) - - with pytest.raises(Exception, match='Required secure image not found'): - find_secure_image(mock_notifier, mock_resources, ns_image_path, config_s_image_name, FileType.BIN) - - mock_resources.add_file_ref(FileType.BIN, default_bin, default_bin) - mock_resources.add_file_ref(FileType.BIN, test_bin, test_bin) - secure_image = find_secure_image(mock_notifier, mock_resources, ns_image_path, config_s_image_name, FileType.BIN) - assert secure_image == default_bin - - secure_image = find_secure_image(mock_notifier, mock_resources, ns_test_path, config_s_image_name, FileType.BIN) - assert secure_image == test_bin diff --git a/tools/test/psa/test_generate_partition_code.py b/tools/test/psa/test_generate_partition_code.py deleted file mode 100644 index a45fb03b28d..00000000000 --- a/tools/test/psa/test_generate_partition_code.py +++ /dev/null @@ -1,683 +0,0 @@ -# Copyright (c) 2017-2018 ARM Limited -# -# SPDX-License-Identifier: Apache-2.0 -# -# Licensed under the Apache License, Version 2.0 (the "License"); -# you may not use this file except in compliance with the License. -# You may obtain a copy of the License at -# -# http://www.apache.org/licenses/LICENSE-2.0 -# -# Unless required by applicable law or agreed to in writing, software -# distributed under the License is distributed on an "AS IS" BASIS, -# WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. -# See the License for the specific language governing permissions and -# limitations under the License. - -import filecmp -import re -import shutil -import tempfile -import pytest -import jsonschema.exceptions as jexcep -from jinja2.defaults import DEFAULT_FILTERS -from tools.psa.mbed_spm_tfm_common import * -from tools.psa.generate_partition_code import * -from .test_data import * - - -SCRIPT_DIR = os.path.dirname(os.path.abspath(__file__)) - - -def extract_test_name(line): - return re.search(r'.*\[(.*)\]', line).group(1) - - -def dump_manifest_to_json(manifest, test_name, test_dir, create_files=True): - """ - Create a JSON manifest file from a dictionary. - - :param manifest: The manifest dictionary. - :param test_name: Name of the test. - :param test_dir: Directory to contain the JSON file. - :param create_files: Whether to create the source files listed in the - manifest 'source_files' entry. - :return: Path of the JSON file. - """ - test_file_name = test_dir.join('{}.json'.format(test_name)) - with open(test_file_name.strpath, 'wt') as fh: - json.dump(manifest, fh, indent=2) - - # Create all the partition source files - if create_files: - [test_dir.join(name).write(name) for name in - manifest.get('source_files', [])] - - return test_file_name.strpath - - -def find_priority_key(value): - """ - Finds the key in 'Manifest.PRIORITY' of a given value. - - :param value: The value. - :return: The key of the given value. - """ - return next( - (key for key, val in Manifest.PRIORITY.items() if val == value), - None - ) - - -def find_permission_key(value): - """ - Finds the key in 'MmioRegion.MMIO_PERMISIONS' of a given value. - - :param value: The value. - :return: The key of the given value. - """ - return next( - (key for key, val in MmioRegion.MMIO_PERMISSIONS.items() if - val == value), - None - ) - - -@pytest.fixture(scope="session") -def temp_test_data(tmpdir_factory): - """ - Fixture (https://docs.pytest.org/en/latest/fixture.html) function to be - used by the tests. - This fixture function Creates a valid JSON manifest file in a temporary - directory. The scope of this fixture is the entire test session. - - :param tmpdir_factory: Fixture used to create temporary directories. - see: https://docs.pytest.org/en/latest/tmpdir.html#the-tmpdir-factory-fixture - :return: A dictionary containing these keys: - 'dir': The temporary directory object created by this fixture. - 'json': The created valid manifest JSON file. - 'manifest': The manifest object read from the JSON file. - """ - test_dir = tmpdir_factory.mktemp('test_data') - fname = dump_manifest_to_json(manifests[0], 'valid_partition', test_dir) - valid_manifest = Manifest.from_json(fname) - return {'dir': test_dir, 'json': fname, 'manifest': valid_manifest} - - -""" -'modified_json_params' contain the parameters to be used in the -'modified_json' fixture. -Each key in the dictionary represents a different parameter to be used by -'modified_json', so for each test which uses -the 'modified_json' fixture, the test will run len(modified_json_params) times, - each time with different parameters. -Each parameter is a dictionary which contains these keys: - 'partition': A modified partition dictionary. - 'assert': The expected assertion which must occur when running with this - parameter. -""" -modified_json_params = { - 'missing_partition_name': { - 'partition': {k: manifests[0][k] for k in manifests[0] if k != 'name'}, - 'assert': jexcep.ValidationError - }, - 'missing_partition_id': { - 'partition': {k: manifests[0][k] for k in manifests[0] if k != 'id'}, - 'assert': jexcep.ValidationError - }, - 'missing_partition_priority': { - 'partition': {k: manifests[0][k] for k in manifests[0] if - k != 'priority'}, - 'assert': jexcep.ValidationError - }, - 'missing_entry_point': { - 'partition': {k: manifests[0][k] for k in manifests[0] if - k != 'entry_point'}, - 'assert': jexcep.ValidationError - }, - 'missing_stack_size': { - 'partition': {k: manifests[0][k] for k in manifests[0] if - k != 'stack_size'}, - 'assert': jexcep.ValidationError - }, - 'missing_heap_size': { - 'partition': {k: manifests[0][k] for k in manifests[0] if - k != 'heap_size'}, - 'assert': jexcep.ValidationError - }, - 'missing_source_files': { - 'partition': {k: manifests[0][k] for k in manifests[0] if - k != 'source_files'}, - 'assert': jexcep.ValidationError - }, - 'missing_irqs_and_sids': { - 'partition': {k: manifests[0][k] for k in manifests[0] if - k not in ['services', 'irqs']}, - 'assert': jexcep.ValidationError - }, - 'empty_source_files': { - 'partition': dict(manifests[0], source_files=[]), - 'assert': jexcep.ValidationError - }, - 'invalid_minor_policy': { - 'partition': dict(manifests[0], - services=invalid_minor_version_policy_rot_srv), - 'assert': jexcep.ValidationError - }, - 'invalid_nspe_callable': { - 'partition': dict(manifests[0], - services=invalid_nspe_callable_rot_srv), - 'assert': jexcep.ValidationError - }, - 'missing_nspe_callable': { - 'partition': dict(manifests[0], - services=missing_nspe_callable_rot_srv), - 'assert': jexcep.ValidationError - }, - 'invalid_stack_size': { - 'partition': dict(manifests[0], stack_size='str'), - 'assert': jexcep.ValidationError - }, - 'invalid_heap_size': { - 'partition': dict(manifests[0], heap_size='str'), - 'assert': jexcep.ValidationError - }, - 'invalid_priority': { - 'partition': dict(manifests[0], priority='invalid_priority'), - 'assert': jexcep.ValidationError - }, - 'invalid_mmioregion_base': { - 'partition': dict(manifests[0], - mmio_regions=[invalid_mmioregion_base]), - 'assert': jexcep.ValidationError - }, - 'invalid_mmioregion_size': { - 'partition': dict(manifests[0], - mmio_regions=[invalid_mmioregion_size]), - 'assert': jexcep.ValidationError - }, - 'invalid_irq_num': { - 'partition': dict(manifests[0], - irqs=[{"line_num": "str", "signal": "ISR22"}]), - 'assert': jexcep.ValidationError - }, - 'not_exist_src_filename': { - 'partition': dict(manifests[0], source_files=['missing.cpp']), - 'assert': AssertionError - }, - 'invalid_partition_id_decimal': { - 'partition': dict(manifests[0], id=-1), - 'assert': jexcep.ValidationError - }, - 'invalid_partition_id_hex': { - 'partition': dict(manifests[0], id='0xFFFFFFFF'), - 'assert': jexcep.ValidationError - }, - 'duplicates_extern_sids': { - 'partition': dict(manifests[0], extern_sids=['SID66', 'SID66']), - 'assert': jexcep.ValidationError - }, - 'exceeding_services': { - 'partition': dict(manifests[1], services=exceeding_services), - 'assert': AssertionError - } -} - - -@pytest.fixture(params=modified_json_params.values(), - ids=modified_json_params.keys()) -def modified_json(request, temp_test_data): - """ - Fixture (https://docs.pytest.org/en/latest/fixture.html) function to be - used by the tests. - This fixture function Creates a JSON manifest file from a given partition - dictionary and save it - to a temporary directory. - This fixture uses the 'temp_test_data' fixture. - This fixture is a parametrized fixture - (https://docs.pytest.org/en/latest/fixture.html#parametrizing-fixtures). - The scope of this fixture is a specific test. - - :param request: Request object which contain the current parameter from - 'modified_json_params'. - :param temp_test_data: The 'temp_test_data' fixture. - :return: A list containing these values: - - The created manifest JSON file for the current parameter. - - The expected assertion for the current parameter. - """ - testname = extract_test_name(request.node.name) - test_file = dump_manifest_to_json(request.param['partition'], testname, - temp_test_data['dir'], False) - return test_file, request.param['assert'] - - -def test_invalid_json(modified_json): - """ - Test which gets an invalid JSON manifest file (from the - 'modified_json' fixture) and tries to create a - Manifest object from it. - The test expects an assertion to happen. - - :param modified_json: The 'modified_json' fixture. - :return: - """ - with pytest.raises(modified_json[1]): - Manifest.from_json(modified_json[0]) - - -def test_valid_json(temp_test_data): - """ - Test which gets a valid JSON manifest file (from the 'temp_test_data' - fixture) and tries to create a Manifest object from it. - The test expects the Manifest to be same as the Manifest created by the - 'temp_test_data' fixture. - - :param temp_test_data: The 'temp_test_data' fixture. - :return: - """ - manifest = Manifest.from_json(temp_test_data['json']) - assert manifest == temp_test_data['manifest'] - - -# Test parametrization decorator -# See https://docs.pytest.org/en/latest/parametrize.html#pytest-mark-parametrize-parametrizing-test-functions -# Contain the parameters to be used in the 'test_validate_partition_manifest' -# test. It defines a list of (manifest, assertion) tuples which each entry -# will be the input of the 'test_validate_partition_manifest' test, the test -# will run len(LIST_OF_TUPPLES) times, each time with different (manifest, -# assertion) tuple. -# The tuple fields are: -# 'manifest': A modified partition dictionary. -# 'assertion': A tuple containing the expected assertion and assertion -# string which must occur when running with this parameter. -@pytest.mark.parametrize( - 'manifests, assertion', - [ - pytest.param( - [manifests[0], dict(manifests[1], name=manifests[0]['name'])], - (ValueError, r'Partition name .* is not unique, .*'), - id='duplicate_partition_name' - ), - pytest.param( - [manifests[0], dict(manifests[1], id=manifests[0]['id'])], - (ValueError, r'Partition id .* is not unique, .*'), - id='duplicate_partition_id' - ), - pytest.param( - [manifests[0], dict(manifests[1], services=manifests[0]['services'])], - (ValueError, r'Root of Trust Service name .* is found in both .*'), - id='duplicate_rot_srv_name' - ), - pytest.param( - [manifests[0], dict(manifests[1], services=duplicate_signal_rot_services)], - (ValueError, r'Root of Trust Service signal .* is found in both .*'), - id='duplicate_rot_srv_signal' - ), - pytest.param( - [manifests[0], dict(manifests[1], services=duplicate_identifier_rot_services)], - (ValueError, r'Root of Trust Service identifier .* is found in both .*'), - id='duplicate_rot_srv_identifier' - ), - pytest.param( - [manifests[0], dict(manifests[1], irqs=duplicate_signal_irqs)], - (ValueError, r'IRQ signal .* is found in both .*'), - id='duplicate_irq_signal' - ), - pytest.param( - [manifests[0], dict(manifests[1], irqs=duplicate_line_num_irqs)], - (ValueError, r'IRQ line number .* is found in both .*'), - id='duplicate_irq_line_num' - ), - pytest.param( - [manifests[0], dict(manifests[1], extern_sids=['SID66', 'SID999'])], - (ValueError, r'External SID\(s\) .* can\'t be found in any partition manifest.'), - id='orphan_extern_ids' - ), - pytest.param( - [manifests[0], dict(manifests[1], extern_sids=[manifests[0]['services'][0]['name']])], - (ValueError, r'Detected a circular call dependency between the partitions.'), - id='circular_call_dependency' - ), - pytest.param( - [{k: manifests[0][k] for k in manifests[0] if k != 'extern_sids'}, - dict({k: manifests[1][k] for k in manifests[1] if k != 'services' - and k != 'irqs'}, services=spe_contained_rot_services)], - (ValueError, r'Partition .* is not accessible from NSPE ' - 'and not referenced by any other partition.'), - id='dead_partition' - ) - ] -) -def test_validate_partition_manifest(request, temp_test_data, manifests, assertion): - """ - Test which creates an invalid manifest object (after passing JSON schema - validation) and call - validate_partition_manifests() with it and with a valid manifest object. - The test expects an assertion to happen. - - :param request: Request object. - :param temp_test_data: The 'temp_test_data' fixture. - :param manifest: The manifest value from the (manifest, assertion) tuple - for the current parameter. - :param assertion: The assertion value from the (manifest, assertion) tuple - for the current parameter. - :return: - """ - test_name = extract_test_name(request.node.name) - jsons = [dump_manifest_to_json(m, '%s_%d' % (test_name, i), temp_test_data['dir']) for i, m in enumerate(manifests)] - created_manifests, _ = parse_manifests(jsons) - - with pytest.raises(assertion[0], match=assertion[1]): - validate_partition_manifests(created_manifests) - - -""" -'verify_json_params' contain the parameters to be used in the 'verify_json' -fixture. Each key in the dictionary represents a different parameter to be used -by 'verify_json', so for each test which uses the 'verify_json' fixture, the -test will run len(verify_json_params) times, each time with different -parameters. -Each parameter is a dictionary which contains these keys: - 'partition': A modified partition dictionary. - 'field': The modified field name. - 'expected': The expected field object. -""" -verify_json_params = { - 'missing_minor_version_rot_services': { - 'partition': dict(manifests[0], - services=missing_minor_version_rot_srv), - 'field': 'rot_services', - 'expected': [ - RotService( - name='SID1', identifier='0x00000001',signal='SID1', - minor_policy='RELAXED', non_secure_clients=True, minor_version=1 - ) - ] - }, - 'missing_minor_version_policy_rot_services': { - 'partition': dict(manifests[0], - services=missing_minor_version_policy_rot_srv), - 'field': 'rot_services', - 'expected': [ - RotService( - name='SID2', identifier='0x00000002', signal='SID2', - minor_policy='STRICT', non_secure_clients=True, minor_version=1 - ) - ] - }, - 'missing_minor_completley_rot_services': { - 'partition': dict(manifests[0], - services=missing_minor_completley_rot_srv), - 'field': 'rot_services', - 'expected': [ - RotService( - name='SID2', identifier='0x00000002', signal='SID2', - minor_policy='STRICT', non_secure_clients=True, minor_version=1 - ) - ] - } -} - - -@pytest.fixture(params=verify_json_params.values(), - ids=verify_json_params.keys()) -def verify_json(request, tmpdir_factory): - """ - Fixture (https://docs.pytest.org/en/latest/fixture.html) function to be - used by the tests. - This fixture function Creates 2 JSON manifest files (The 1st from - 'verify_json_params', the 2nd from manifests[1]) and saves them to a - temporary directory. This fixture is a parametrized fixture - (https://docs.pytest.org/en/latest/fixture.html#parametrizing-fixtures). - The scope of this fixture is a specific test. - - :param request: Request object which contain the current parameter from - 'verify_json_params'. - :param tmpdir_factory: The 'tmpdir_factory' fixture. - :return: A dictionary containing these keys: - 'files_list': A list of the created manifest JSON files. - 'field': The changed field in the 1st manifest. - 'expected': The expected 'field' object. - """ - test_dir = tmpdir_factory.mktemp('test_data') - test_name = extract_test_name(request.node.name) - files_list = [ - dump_manifest_to_json(request.param['partition'], '%s1' % test_name, - test_dir), - dump_manifest_to_json(dict(manifests[1], extern_sids=[]), - '%s2' % test_name, test_dir) - ] - return {'files_list': files_list, 'field': request.param['field'], - 'expected': request.param['expected']} - - -def test_verify_json(verify_json): - """ - Test which gets 2 JSON manifest files (from the 'verify_json' fixture), - create Manifest objects from them, call validate_partition_manifests() on - the manifest objects and check that the 1st Manifest object is as expected. - - :param verify_json: The 'verify_json' fixture. - :return: - """ - test_manifests, _ = parse_manifests(verify_json['files_list']) - validate_partition_manifests(test_manifests) - assert getattr(test_manifests[0], verify_json['field']) == verify_json['expected'] - - -@pytest.fixture(scope="function") -def test_template_setup(tmpdir_factory): - """ - Fixture (https://docs.pytest.org/en/latest/fixture.html) function to be - used by the tests. This fixture function Creates JSON manifest files, - Manifest objects from 'manifest' and template files in a temporary - directory. The scope of this fixture is the entire test session. - - :param tmpdir_factory: Fixture used to create temporary directories. - see: https://docs.pytest.org/en/latest/tmpdir.html#the-tmpdir-factory-fixture - :return: A dictionary containing these keys: - 'dir': The temporary directory object created by this fixture. - 'template_files': List of the created template files. - 'manifest_files': List of the created manifest JSON files. - 'manifests': List of the created Manifest objects. - 'filters': Dictionary with additional filters for - generate_source_files() - """ - - def find_priority_key(value): - """ - Finds the key in 'Manifest.PRIORITY' of a given value. - - :param value: The value. - :return: The key of the given value. - """ - return next( - (key for key, val in Manifest.PRIORITY.items() if val == value), - None) - - def find_permission_key(value): - """ - Finds the key in 'MmioRegion.MMIO_PERMISIONS' of a given value. - - :param value: The value. - :return: The key of the given value. - """ - return next((key for key, val in MmioRegion.MMIO_PERMISSIONS.items() if - val == value), None) - - test_dir = tmpdir_factory.mktemp('test_data') - manifest_files = [ - dump_manifest_to_json(manifest, manifest['name'], test_dir) for - manifest in manifests] - manifest_objects, regions = parse_manifests(manifest_files) - filters = { - 'basename': os.path.basename, - 'find_priority_key': find_priority_key, - 'find_permission_key': find_permission_key - } - template_files = [test_dir.join('_NAME_data.json.tpl'), - test_dir.join('common.json.tpl')] - for template, _file in [(test_partition_template, template_files[0]), - (test_common_template, template_files[1])]: - _file.write(template) - template_files = [_file.strpath for _file in template_files] - - expected_common_files = [test_dir.join('common.json')] - for output, _file in [(test_common_expected, expected_common_files[0])]: - _file.write(output) - expected_common_files = [_file.strpath for _file in expected_common_files] - - return { - 'dir': test_dir.strpath, - 'template_files': template_files, - 'manifest_files': manifest_files, - 'common_files': expected_common_files, - 'manifests': manifest_objects, - 'region_list': regions, - 'filters': filters - } - - -def test_generate_source_files(test_template_setup): - """ - Test which calls generate_source_files() with the data from - 'test_template_setup' fixture and checks normal output. - - :param test_template_setup: The 'test_template_setup' fixture. - :return: - """ - - before_file_list = set(os.listdir(test_template_setup['dir'])) - partition_templates = filter(lambda filename: '_NAME_' in filename, test_template_setup['template_files']) - common_templates = filter(lambda filename: '_NAME_' not in filename, test_template_setup['template_files']) - common_templates = { - t: path_join(test_template_setup['dir'], os.path.basename(os.path.splitext(t)[0])) for t in common_templates - } - - region_pair_list = list(itertools.combinations(test_template_setup['region_list'], 2)) - for manifest in test_template_setup['manifests']: - generate_source_files( - templates=manifest.templates_to_files(partition_templates, test_template_setup['dir'], test_template_setup['dir']), - render_args={ - 'partition': manifest, - 'dependent_partitions': manifest.find_dependencies(test_template_setup['manifests']) - }, - extra_filters=test_template_setup['filters'] - ) - - generate_source_files( - common_templates, - render_args={ - 'partitions': test_template_setup['manifests'], - 'region_pair_list': region_pair_list - }, - extra_filters=test_template_setup['filters'] - ) - - after_file_list = set(os.listdir(test_template_setup['dir'])) - generated_files = list(after_file_list.difference(before_file_list)) - - for gen_file in [os.path.join(test_template_setup['dir'], f) for f in generated_files]: - """ - For each generated json file in 'autogen_dir': - 1. Load the json file to a dictionary named 'generated'. - 2. If it was generated from a partition template ('generated' has a 'name' key): - a) Read the original manifest json from the test temp dir. - b) Load the manifest json file to a dictionary named 'expected'. - Else (generated from a common template): - a) Calculate 'region_list'. - b) Build the 'expected' dictionary with values from the original manifest objects. - 3. Compare 'generated' with 'expected'. - """ - with open(gen_file) as fh: - generated = json.load(fh) - - if 'name' in generated: - input_file = os.path.join(test_template_setup['dir'], - generated['name'] + '.json') - assert os.path.isfile(input_file) - assert input_file in test_template_setup['manifest_files'] - with open(input_file) as fh: - expected = json.load(fh) - else: - expected = { - 'num_of_partitions': len(test_template_setup['manifests']), - 'partition_names': [manifest.name for manifest in - test_template_setup['manifests']], - 'num_of_region_pairs': len(region_pair_list) - } - assert generated == expected - - -circular_call_dependency_params = { - 'no manifests': { - 'manifests': [], - 'result': False - }, - 'one manifest': { - 'manifests': ['PARTITION1'], - 'result': False - }, - '2 manifests with dependency': { - 'manifests': ['PARTITION1', 'PARTITION2'], - 'result': True - }, - '2 manifests without dependency': { - 'manifests': ['PARTITION1', 'PARTITION3'], - 'result': False - }, - '5 manifests with dependency': { - 'manifests': ['PARTITION1', 'PARTITION3', 'PARTITION4', 'PARTITION5', 'PARTITION6'], - 'result': True - }, - '5 manifests without dependency': { - 'manifests': ['PARTITION1', 'PARTITION3', 'PARTITION4', 'PARTITION6', 'PARTITION7'], - 'result': False - } -} - - -@pytest.fixture(params=circular_call_dependency_params.values(), - ids=circular_call_dependency_params.keys()) -def circular_dependencies(request, tmpdir_factory): - """ - Fixture (https://docs.pytest.org/en/latest/fixture.html) function to be - used by the tests. - This fixture function Creates a JSON manifest file from a given partition - dictionary and save it - to a temporary directory. - This fixture uses the 'temp_test_data' fixture. - This fixture is a parametrized fixture - (https://docs.pytest.org/en/latest/fixture.html#parametrizing-fixtures). - The scope of this fixture is a specific test. - - :param request: Request object which contain the current parameter from - 'circular_call_dependency_params'. - :param temp_test_data: The 'temp_test_data' fixture. - :return: A Dictionary containing these values: - - files - list of manifest filesgenerated - - The expected result from check_circular_call_dependencies - """ - test_dir = tmpdir_factory.mktemp('test_data') - - test_manifests = filter(lambda x: x['name'] in request.param['manifests'], - manifests_for_circular_call_dependency_checks) - manifest_files = [ - dump_manifest_to_json(manifest, manifest['name'], test_dir) for - manifest in test_manifests] - - return {'files': manifest_files, 'result': request.param['result']} - - -def test_check_circular_call_dependencies(circular_dependencies): - """ - Test detection of circular call dependencies between the partitions. - The test performs the circular call dependency check in a few - predefined partition topologies and compares the result with the expected value. - - :param circular_dependencies: the 'circular_dependencies' fixture - :return: - """ - objects, _ = parse_manifests(circular_dependencies['files']) - assert check_circular_call_dependencies(objects) == circular_dependencies[ - 'result'] diff --git a/tools/test/toolchains/test_toolchains.py b/tools/test/toolchains/test_toolchains.py index 8f963074209..93353ef9935 100644 --- a/tools/test/toolchains/test_toolchains.py +++ b/tools/test/toolchains/test_toolchains.py @@ -130,7 +130,6 @@ def test_gcc_minimal_printf(self): mock_target.c_lib = "std" del mock_target.default_lib mock_target.supported_c_libs = {"gcc_arm": ["std"]} - mock_target.is_TrustZone_secure_target = False gcc_obj = GCC_ARM(mock_target) @@ -158,7 +157,6 @@ def test_gcc_arm_c_lib(self): mock_target.c_lib = "sMALL" del mock_target.default_lib mock_target.supported_toolchains = ["GCC_ARM"] - mock_target.is_TrustZone_secure_target = False gcc_arm_obj = GCC_ARM(mock_target) self.assertIn("-DMBED_RTOS_SINGLE_THREAD", gcc_arm_obj.flags["common"]) self.assertIn("-D__NEWLIB_NANO", gcc_arm_obj.flags["common"]) @@ -213,7 +211,6 @@ def test_iar_minimal_printf(self): del mock_target.default_lib mock_target.c_lib = "std" mock_target.supported_c_libs = {"iar": ["std"]} - mock_target.is_TrustZone_secure_target = False iar_obj = IAR(mock_target) var = "-DMBED_MINIMAL_PRINTF" @@ -227,7 +224,6 @@ def test_iar_c_lib(self): mock_target.c_lib = "sTD" del mock_target.default_lib mock_target.supported_toolchains = ["IAR"] - mock_target.is_TrustZone_secure_target = False try: IAR(mock_target) except NotSupportedException: diff --git a/tools/toolchains/arm.py b/tools/toolchains/arm.py index 42c7450325d..4c9fadb4634 100644 --- a/tools/toolchains/arm.py +++ b/tools/toolchains/arm.py @@ -591,17 +591,6 @@ def __init__(self, target, *args, **kwargs): self.check_and_add_minimal_printf(target) - if target.is_TrustZone_secure_target: - if kwargs.get('build_dir', False): - # Output secure import library - build_dir = kwargs['build_dir'] - secure_file = join(build_dir, "cmse_lib.o") - self.flags["ld"] += ["--import_cmse_lib_out=%s" % secure_file] - - # Enable compiler security extensions - self.flags['cxx'].append("-mcmse") - self.flags['c'].append("-mcmse") - if target.is_TrustZone_non_secure_target: # Add linking time preprocessor macro DOMAIN_NS # (DOMAIN_NS is passed to compiler and assembler via CORTEX_SYMBOLS diff --git a/tools/toolchains/gcc.py b/tools/toolchains/gcc.py index 8d9b87e933b..8656b2c510c 100644 --- a/tools/toolchains/gcc.py +++ b/tools/toolchains/gcc.py @@ -92,15 +92,6 @@ def __init__(self, target, notify=None, macros=None, build_profile=None, self.flags["ld"].append(minimal_printf_wrap) self.cpu = [] - if target.is_TrustZone_secure_target: - # Enable compiler security extensions - self.cpu.append("-mcmse") - # Output secure import library - self.flags["ld"].extend([ - "-Wl,--cmse-implib", - "-Wl,--out-implib=%s" % join(build_dir, "cmse_lib.o") - ]) - if target.is_TrustZone_non_secure_target: # Add linking time preprocessor macro DOMAIN_NS # (DOMAIN_NS is passed to compiler and assembler via CORTEX_SYMBOLS diff --git a/tools/toolchains/iar.py b/tools/toolchains/iar.py index c010334d73b..cc7764840c5 100644 --- a/tools/toolchains/iar.py +++ b/tools/toolchains/iar.py @@ -63,14 +63,6 @@ def __init__(self, target, notify=None, macros=None, build_profile=None, self.check_c_lib_supported(target, "iar") - if target.is_TrustZone_secure_target: - # Enable compiler security extensions - self.flags["asm"] += ["--cmse"] - self.flags["common"] += ["--cmse"] - # Output secure import library - secure_file = join(build_dir, "cmse_lib.o") - self.flags["ld"] += ["--import_cmse_lib_out=%s" % secure_file] - if target.is_TrustZone_non_secure_target: # Add linking time preprocessor macro DOMAIN_NS # (DOMAIN_NS is passed to compiler and assembler via CORTEX_SYMBOLS diff --git a/tools/toolchains/mbed_toolchain.py b/tools/toolchains/mbed_toolchain.py index bf961e9cec3..cb763863c8f 100755 --- a/tools/toolchains/mbed_toolchain.py +++ b/tools/toolchains/mbed_toolchain.py @@ -990,15 +990,6 @@ def add_linker_defines(self): self.ld.append(define_string) self.flags["ld"].append(define_string) - if self.target.is_PSA_secure_target: - for flag, param in [ - ("MBED_PUBLIC_RAM_START", "target.public-ram-start"), - ("MBED_PUBLIC_RAM_SIZE", "target.public-ram-size") - ]: - define_string = self.make_ld_define(flag, params[param].value) - self.ld.append(define_string) - self.flags["ld"].append(define_string) - if hasattr(self.target, 'post_binary_hook'): if self.target.post_binary_hook is None: define_string = self.make_ld_define(