From 249752e7bcf98606270f626fafce7b354aad8531 Mon Sep 17 00:00:00 2001
From: jeromecoutant <jerome.coutant@st.com>
Date: Mon, 23 Mar 2020 18:42:02 +0100
Subject: [PATCH] STM32H7: enable QSPI

- DISCO_H747I board has MT25QL512 embedded QSPI
---
 .../TARGET_DISCO_H747I/PinNames.h                   |  8 ++++++++
 targets/TARGET_STM/TARGET_STM32H7/objects.h         | 13 +++++++++++++
 targets/targets.json                                | 10 ++++++++--
 3 files changed, 29 insertions(+), 2 deletions(-)

diff --git a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I/PinNames.h b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I/PinNames.h
index 621e8ee0682..915f100a5dc 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I/PinNames.h
+++ b/targets/TARGET_STM/TARGET_STM32H7/TARGET_STM32H747xI/TARGET_DISCO_H747I/PinNames.h
@@ -428,6 +428,14 @@ typedef enum {
     ETH_TX_EN = PG_11,
     ETH_TX_EN_ALT0 = PB_11,
 
+    /**** QSPI FLASH pins ****/
+    QSPI_FLASH1_IO0 = PD_11,
+    QSPI_FLASH1_IO1 = PF_9,
+    QSPI_FLASH1_IO2 = PF_7,
+    QSPI_FLASH1_IO3 = PF_6,
+    QSPI_FLASH1_SCK = PB_2,
+    QSPI_FLASH1_CSN = PG_6,
+
     /**** OSCILLATOR pins ****/
     RCC_OSC32_IN = PC_14,
     RCC_OSC32_OUT = PC_15,
diff --git a/targets/TARGET_STM/TARGET_STM32H7/objects.h b/targets/TARGET_STM/TARGET_STM32H7/objects.h
index afbd3bae0d6..39d4d675151 100644
--- a/targets/TARGET_STM/TARGET_STM32H7/objects.h
+++ b/targets/TARGET_STM/TARGET_STM32H7/objects.h
@@ -146,6 +146,19 @@ struct analogin_s {
     uint8_t differential;
 };
 
+#if DEVICE_QSPI
+struct qspi_s {
+    QSPI_HandleTypeDef handle;
+    QSPIName qspi;
+    PinName io0;
+    PinName io1;
+    PinName io2;
+    PinName io3;
+    PinName sclk;
+    PinName ssel;
+};
+#endif
+
 #define GPIO_IP_WITHOUT_BRR
 
 #if defined(DUAL_CORE)
diff --git a/targets/targets.json b/targets/targets.json
index 40039db39dd..c89e665ac7e 100644
--- a/targets/targets.json
+++ b/targets/targets.json
@@ -4905,6 +4905,7 @@
         ],
         "core": "Cortex-M7FD",
         "components_add": [
+            "QSPIF",
             "FLASHIAP"
         ],
         "mbed_rom_start": "0x08000000",
@@ -4914,7 +4915,8 @@
         "extra_labels_add": [
             "STM32H7",
             "STM32H747xI",
-            "DISCO_H747I_CM7"
+            "DISCO_H747I_CM7",
+            "MT25QL512"
         ],
         "config": {
             "clock_source": {
@@ -4950,6 +4952,7 @@
             "CRC",
             "TRNG",
             "FLASH",
+            "QSPI",
             "MPU"
         ],
         "release_versions": [
@@ -4967,9 +4970,11 @@
         "extra_labels_add": [
             "STM32H7",
             "STM32H747xI",
-            "DISCO_H747I"
+            "DISCO_H747I",
+            "MT25QL512"
         ],
         "components_add": [
+            "QSPIF",
             "FLASHIAP"
         ],
         "mbed_rom_start": "0x08100000",
@@ -5007,6 +5012,7 @@
             "CRC",
             "TRNG",
             "FLASH",
+            "QSPI",
             "MPU"
         ],
         "bootloader_supported": true