From 152f6f197575b65c271359dbf7d18447edd5a169 Mon Sep 17 00:00:00 2001 From: Chun-Chieh Li Date: Mon, 20 Jan 2020 10:03:20 +0800 Subject: [PATCH 1/2] M2351: Refine MBED_TZ_DEFAULT_ACCESS placement 1. On M2351, SYS/CLK registers are hard-wired to secure. Define MBED_TZ_DEFAULT_ACCESS to 1 so that all non-secure user threads have access to call secure functions to control these registers. 2. MBED_TZ_DEFAULT_ACCESS is only meaningful for non-secure target. Define it only for non-secure target in targets.json. 3. On TFM target, MBED_TZ_DEFAULT_ACCESS has defined in mbed_lib.json. Avoid duplicate definition which IAR assembler doesn't allow. --- targets/targets.json | 2 -- 1 file changed, 2 deletions(-) diff --git a/targets/targets.json b/targets/targets.json index 737f36a252d..2c5c984dea2 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -12544,7 +12544,6 @@ "OUTPUT_EXT": "hex", "macros": [ "MBED_FAULT_HANDLER_DISABLED", - "MBED_TZ_DEFAULT_ACCESS=1", "LPTICKER_DELAY_TICKS=4" ], "is_disk_virtual": true, @@ -12683,7 +12682,6 @@ "NU_PREBUILD_SECURE" ], "macros_add": [ - "MBED_TZ_DEFAULT_ACCESS=1", "CMSIS_NVIC_VIRTUAL", "MBEDTLS_PSA_CRYPTO_C" ], From 94762d02a1031f8673caede700058f0ea0314526 Mon Sep 17 00:00:00 2001 From: Chun-Chieh Li Date: Mon, 13 Jan 2020 15:50:53 +0800 Subject: [PATCH 2/2] M2351: Support IAR 1. Enable IAR on non-secure targets 2. Disable IAR on secure targets because: (1) IAR toolchain bug: As of IAR 8.32, cmse_nonsecure_caller() is not always inlined. (2) TFM hasn't supported IAR yet. --- .../device/TOOLCHAIN_IAR/M2351.icf | 10 +- .../device/TOOLCHAIN_IAR/M2351.icf | 70 ++++- .../TARGET_M2351/device/partition_M2351_mem.h | 10 +- .../device/partition_M2351_mem.icf | 180 ------------ .../device/partition_M2351_mem.icf.h | 269 ++++++++++++++++++ .../TARGET_M2351/device/startup_M2351.c | 55 ++-- targets/TARGET_NUVOTON/TARGET_M2351/rtc_api.c | 6 +- targets/targets.json | 17 +- 8 files changed, 390 insertions(+), 227 deletions(-) delete mode 100644 targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.icf create mode 100644 targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.icf.h diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf index 69f55269de1..ad784bfa195 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_NS/device/TOOLCHAIN_IAR/M2351.icf @@ -20,9 +20,9 @@ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ -include "../../../device/partition_M2351_mem.icf"; +include "../../../device/partition_M2351_mem.icf.h"; -if (! isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } @@ -36,6 +36,7 @@ define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_ /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +define symbol __ICFEDIT_size_intvec__ = 4 * (16 + 102); define symbol __ICFEDIT_size_heap__ = 0x400; /**** End of ICF editor section. ###ICF###*/ @@ -45,10 +46,10 @@ define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__]; -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { }; /* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */ -define block IRAMVEC with alignment = 1024, size = 4 * (16 + 102) { }; +define block IRAMVEC with alignment = 1024, size = __ICFEDIT_size_intvec__ { }; initialize by copy { readwrite }; @@ -56,7 +57,6 @@ do not initialize { section .noinit }; place at address mem: __ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; -place at address mem: NU_TZ_NSC_START { block Image$$ER_IROM_NSC } place at start of IRAM_region { block CSTACK }; place in IRAM_region { block IRAMVEC }; diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf index fb3417f90e2..32b79af5cd0 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf +++ b/targets/TARGET_NUVOTON/TARGET_M2351/TARGET_M23_S/device/TOOLCHAIN_IAR/M2351.icf @@ -20,9 +20,9 @@ /*-Editor annotation file-*/ /* IcfEditorFile="$TOOLKIT_DIR$\config\ide\IcfEditor\cortex_v1_0.xml" */ -include "../../../device/partition_M2351_mem.icf"; +include "../../../device/partition_M2351_mem.icf.h"; -if (! isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { +if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) { define symbol MBED_BOOT_STACK_SIZE = 0x400; } @@ -38,6 +38,10 @@ define symbol __ICFEDIT_region_IRAM_end__ = MBED_RAM_APP_START + MBED_RAM_ /*-Sizes-*/ define symbol __ICFEDIT_size_cstack__ = MBED_BOOT_STACK_SIZE; +if (TFM_LVL > 0) { + define symbol __ICFEDIT_size_cstack_msp__ = 0x800; +} +define symbol __ICFEDIT_size_intvec__ = 4 * (16 + 102); define symbol __ICFEDIT_size_heap__ = 0x400; @@ -48,26 +52,72 @@ define memory mem with size = 4G; define region ROM_region = mem:[from __ICFEDIT_region_ROM_start__ to __ICFEDIT_region_ROM_end__]; define region IRAM_region = mem:[from __ICFEDIT_region_IRAM_start__ to __ICFEDIT_region_IRAM_end__]; -define block Image$$ER_IROM_NSC with alignment = 32 { readonly section Veneer$$CMSE }; +/* IAR has something wrong with "$$" in section/block name. So unlike other toolchains, + * we name "ER_IROM_NSC" instead of "Image$$ER_IROM_NSC". */ +define block ER_IROM_NSC with alignment = 32 { readonly section Veneer$$CMSE }; -define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +define block CSTACK with alignment = 8, size = __ICFEDIT_size_cstack__ { }; +if (TFM_LVL > 0) { + define block CSTACK_MSP with alignment = 8, size = __ICFEDIT_size_cstack_msp__ { }; +} define block HEAP with expanding size, alignment = 8, minimum size = __ICFEDIT_size_heap__ { }; /* NOTE: Vector table base requires to be aligned to the power of vector table size. Give a safe value here. */ -define block IRAMVEC with alignment = 1024, size = 4 * (16 + 102) { }; - +define block IRAMVEC with alignment = 1024, size = __ICFEDIT_size_intvec__ { }; + +if (TFM_LVL == 1) { + define block TDB_INTERNAL_STORAGE with size = NU_TDB_INTERNAL_STORAGE_SIZE{ }; + define block TFM_SECURE_STACK with alignment = 128, size = 0x1000 { }; + define block TFM_UNPRIV_SCRATCH with alignment = 32, size = 0x400 { }; + define block ER_TFM_DATA with alignment = 8 { readwrite }; +} else if (TFM_LVL > 1) { + error "TFM level 2/3 are not supported yet"; +} initialize by copy { readwrite }; do not initialize { section .noinit }; place at address mem: __ICFEDIT_intvec_start__ { readonly section .intvec }; place in ROM_region { readonly }; -place at address mem: NU_TZ_NSC_START { block Image$$ER_IROM_NSC } +place at address mem: NU_TZ_NSC_START { block ER_IROM_NSC }; -place at start of IRAM_region { block CSTACK }; +if (TFM_LVL == 0) { + place at start of IRAM_region { block CSTACK }; +} else { + place at start of IRAM_region { block CSTACK_MSP }; + place in IRAM_region { block CSTACK }; +} place in IRAM_region { block IRAMVEC }; -place in IRAM_region { readwrite }; + +if (TFM_LVL == 0) { + place in IRAM_region { readwrite }; +} else if (TFM_LVL == 1) { + place at address mem: NU_TDB_INTERNAL_STORAGE_START { block TDB_INTERNAL_STORAGE }; + place in IRAM_region { block TFM_SECURE_STACK }; + place in IRAM_region { block TFM_UNPRIV_SCRATCH }; + place in IRAM_region { block ER_TFM_DATA }; +} else { + error "TFM level 2/3 are not supported yet"; +} + place in IRAM_region { block HEAP }; +define exported symbol Image$$ER_IROM_NSC$$Base = NU_TZ_NSC_START; + +/* TODO: Export the following symbols to support TFM secure code */ +/* if (TFM_LVL > 0) { - /* TODO: Check if TDB internal storage area overlaps with application ROM code */ + define exported symbol Image$$ARM_LIB_STACK$$ZI$$Limit = Start of CSTACK; +} +if (TFM_LVL == 1) { + define exported symbol Image$$TFM_SECURE_STACK$$ZI$$Base = Start of TFM_SECURE_STACK; + define exported symbol Image$$TFM_SECURE_STACK$$ZI$$Limit = End of TFM_SECURE_STACK; + define exported symbol Image$$TFM_UNPRIV_SCRATCH$$ZI$$Base = Start of TFM_UNPRIV_SCRATCH; + define exported symbol Image$$TFM_UNPRIV_SCRATCH$$ZI$$Limit = End of TFM_UNPRIV_SCRATCH; + define exported symbol Image$$ER_TFM_DATA$$RW$$Base = Start of ER_TFM_DATA (readwrite - zeroinit); + define exported symbol Image$$ER_TFM_DATA$$RW$$Limit = End of ER_TFM_DATA (zeroinit); + define exported symbol Image$$ER_TFM_DATA$$ZI$$Base = End of ER_TFM_DATA (zeroinit); + define exported symbol Image$$ER_TFM_DATA$$ZI$$Limit = ADDR(.TFM_BSS) + SIZEOF(.TFM_BSS); + define exported symbol Image$$ARM_LIB_HEAP$$ZI$$Base = Start of HEAP; + define exported symbol Image$$ARM_LIB_HEAP$$ZI$$Limit = End of HEAP; } +*/ \ No newline at end of file diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.h b/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.h index af03618d102..45eca92286a 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.h +++ b/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.h @@ -19,12 +19,18 @@ #ifndef __PARTITION_M2351_MEM_H__ #define __PARTITION_M2351_MEM_H__ -/* About partition_M2351_mem.h/partition_M2351_mem.icf +/* About partition_M2351_mem.h/partition_M2351_mem.icf.h * * 1. partition_M2351_mem.h is created for centralizing memory partition configuration. It will be * included by C/C++ files and linker files (except IAR linker file). - * 2. IAR linker doesn't support preprocessor, so partition_M2351_mem.icf, duplicate of partition_M2351_mem.h + * 2. IAR linker doesn't support preprocessor, so partition_M2351_mem.icf.h, duplicate of partition_M2351_mem.h * is created for IAR linker file. + * 3. To continue above, we name partition_M2351_mem.icf.h instead of partition_M2351_mem.icf because: + * (1) Mbed OS build tool may mis-regard partition_M2351_mem.icf as the main linker configuration file. + * (2) *.icf files may not be present in search directories for "include" directive. Per observation, + * the search directories are inconsistent among normal example build and test code build. To address + * it, we name partition_M2351_mem.icf.h instead because *.h files are always present in these builds + * (already there or via copy). */ /* Default flash/SRAM partition diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.icf b/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.icf deleted file mode 100644 index e7e51765f2d..00000000000 --- a/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.icf +++ /dev/null @@ -1,180 +0,0 @@ -/* - * Copyright (c) 2018-2019, Nuvoton Technology Corporation - * - * SPDX-License-Identifier: Apache-2.0 - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -/* See partition_M2351_mem.h for documentation */ - -/* Default flash/SRAM partition - * - * Default flash partition: - * Secure: 256KiB - * Non-secure: 256KiB - * - * Default SRAM partition: - * Secure: 32KiB - * Non-secure: 64KiB - */ -#if defined(DOMAIN_NS) && DOMAIN_NS - -/* Resolve non-secure ROM start */ -if (! isdefinedsymbol(MBED_ROM_START)) { - if (isdefinedsymbol(PSA_NON_SECURE_ROM_START)) { - define symbol MBED_ROM_START = PSA_NON_SECURE_ROM_START; - } else { - define symbol MBED_ROM_START = 0x10040000; - } -} - -/* Resolve non-secure ROM size */ -if (! isdefinedsymbol(MBED_ROM_SIZE)) { - if (isdefinedsymbol(PSA_NON_SECURE_ROM_SIZE)) { - define symbol MBED_ROM_SIZE = PSA_NON_SECURE_ROM_SIZE; - } else { - define symbol MBED_ROM_SIZE = 0x40000; - } -} - -/* Resolve non-secure RAM start */ -if (! isdefinedsymbol(MBED_RAM_START)) { - if (isdefinedsymbol(PSA_NON_SECURE_RAM_START)) { - define symbol MBED_RAM_START = PSA_NON_SECURE_RAM_START; - } else { - define symbol MBED_RAM_START = 0x30008000; - } -} - -/* Resolve non-secure RAM size */ -if (! isdefinedsymbol(MBED_RAM_SIZE)) { - if (isdefinedsymbol(PSA_NON_SECURE_RAM_SIZE)) { - define symbol MBED_RAM_SIZE = PSA_NON_SECURE_RAM_SIZE; - } else { - define symbol MBED_RAM_SIZE = 0x10000; - } -} - -#else - -/* Resolve secure ROM start */ -if (! isdefinedsymbol(MBED_ROM_START)) { - if (isdefinedsymbol(PSA_SECURE_ROM_START)) { - define symbol MBED_ROM_START = PSA_SECURE_ROM_START; - } else { - define symbol MBED_ROM_START = 0x0; - } -} - -/* Resolve secure ROM size */ -if (! isdefinedsymbol(MBED_ROM_SIZE)) { - if (isdefinedsymbol(PSA_SECURE_ROM_SIZE)) { - define symbol MBED_ROM_SIZE = PSA_SECURE_ROM_SIZE; - } else { - define symbol MBED_ROM_SIZE = 0x40000; - } -} - -/* Resolve secure RAM start */ -if (! isdefinedsymbol(MBED_RAM_START)) { - if (isdefinedsymbol(PSA_SECURE_RAM_START)) { - define symbol MBED_RAM_START = PSA_SECURE_RAM_START; - } else { - define symbol MBED_RAM_START = 0x20000000; - } -} - -/* Resolve secure RAM size */ -if (! isdefinedsymbol(MBED_RAM_SIZE)) { - if (isdefinedsymbol(PSA_SECURE_RAM_SIZE)) { - define symbol MBED_RAM_SIZE = PSA_SECURE_RAM_SIZE; - } else { - define symbol MBED_RAM_SIZE = 0x8000; - } -} - -#endif - -/* Resolved flash/SRAM partition */ -#if defined(DOMAIN_NS) && DOMAIN_NS - -/* Resolved secure ROM layout */ -define symbol NU_ROM_START_S = 0x0; -define symbol NU_ROM_SIZE_S = (0x80000 - MBED_ROM_SIZE); -/* Resolved secure RAM layout */ -define symbol NU_RAM_START_S = 0x20000000; -define symbol NU_RAM_SIZE_S = (0x18000 - MBED_RAM_SIZE); - -/* Resolved non-secure ROM layout */ -define symbol NU_ROM_START_NS = MBED_ROM_START; -define symbol NU_ROM_SIZE_NS = MBED_ROM_SIZE; -/* Resolved non-secure RAM layout */ -define symbol NU_RAM_START_NS = MBED_RAM_START; -define symbol NU_RAM_SIZE_NS = MBED_RAM_SIZE; - -#else - -/* Resolved secure ROM layout */ -define symbol NU_ROM_START_S = MBED_ROM_START; -define symbol NU_ROM_SIZE_S = MBED_ROM_SIZE; -/* Resolved secure RAM layout */ -define symbol NU_RAM_START_S = MBED_RAM_START; -define symbol NU_RAM_SIZE_S = MBED_RAM_SIZE; - -/* Resolved non-secure ROM layout */ -define symbol NU_ROM_START_NS = (0x10000000 + MBED_ROM_SIZE); -define symbol NU_ROM_SIZE_NS = (0x80000 - MBED_ROM_SIZE); -/* Resolved non-secure RAM layout */ -define symbol NU_RAM_START_NS = (0x30000000 + MBED_RAM_SIZE); -define symbol NU_RAM_SIZE_NS = (0x18000 - MBED_RAM_SIZE); - -#endif - -if (isdefinedsymbol(DOMAIN_NS)) { - - if (! isdefinedsymbol(MBED_APP_START)) { - define symbol MBED_APP_START = NU_ROM_START_NS; - } - - if (! isdefinedsymbol(MBED_APP_SIZE)) { - define symbol MBED_APP_SIZE = NU_ROM_SIZE_NS; - } - - if (! isdefinedsymbol(MBED_RAM_APP_START)) { - define symbol MBED_RAM_APP_START = NU_RAM_START_NS; - } - - if (! isdefinedsymbol(MBED_RAM_APP_SIZE)) { - define symbol MBED_RAM_APP_SIZE = NU_RAM_SIZE_NS; - } - -} else { - - if (! isdefinedsymbol(MBED_APP_START)) { - define symbol MBED_APP_START = NU_ROM_START_S; - } - - if (! isdefinedsymbol(MBED_APP_SIZE)) { - define symbol MBED_APP_SIZE = NU_ROM_SIZE_S; - } - - if (! isdefinedsymbol(MBED_RAM_APP_START)) { - define symbol MBED_RAM_APP_START = NU_RAM_START_S; - } - - if (! isdefinedsymbol(MBED_RAM_APP_SIZE)) { - define symbol MBED_RAM_APP_SIZE = NU_RAM_SIZE_S; - } - -} diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.icf.h b/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.icf.h new file mode 100644 index 00000000000..fc5ad254705 --- /dev/null +++ b/targets/TARGET_NUVOTON/TARGET_M2351/device/partition_M2351_mem.icf.h @@ -0,0 +1,269 @@ +/* + * Copyright (c) 2018-2019, Nuvoton Technology Corporation + * + * SPDX-License-Identifier: Apache-2.0 + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +/* See partition_M2351_mem.h for documentation */ + +/* IAR doesn't support short-circuit evaluation in boolean operator and fails when + * evaluating undefined symbol. Define it explicitly. */ +if (!isdefinedsymbol(DOMAIN_NS)) { + define symbol DOMAIN_NS = 0; +} +if (!isdefinedsymbol(TFM_LVL)) { + define symbol TFM_LVL = 0; +} + +/* Default flash/SRAM partition + * + * Default flash partition: + * Secure: 256KiB + * Non-secure: 256KiB + * + * Default SRAM partition: + * Secure: 32KiB + * Non-secure: 64KiB + */ +if (DOMAIN_NS) { + +/* Resolve non-secure ROM start */ +if (! isdefinedsymbol(MBED_ROM_START)) { + if (isdefinedsymbol(PSA_NON_SECURE_ROM_START)) { + define symbol MBED_ROM_START = PSA_NON_SECURE_ROM_START; + } else { + define symbol MBED_ROM_START = 0x10040000; + } +} + +/* Resolve non-secure ROM size */ +if (! isdefinedsymbol(MBED_ROM_SIZE)) { + if (isdefinedsymbol(PSA_NON_SECURE_ROM_SIZE)) { + define symbol MBED_ROM_SIZE = PSA_NON_SECURE_ROM_SIZE; + } else { + define symbol MBED_ROM_SIZE = 0x40000; + } +} + +/* Resolve non-secure RAM start */ +if (! isdefinedsymbol(MBED_RAM_START)) { + if (isdefinedsymbol(PSA_NON_SECURE_RAM_START)) { + define symbol MBED_RAM_START = PSA_NON_SECURE_RAM_START; + } else { + define symbol MBED_RAM_START = 0x30008000; + } +} + +/* Resolve non-secure RAM size */ +if (! isdefinedsymbol(MBED_RAM_SIZE)) { + if (isdefinedsymbol(PSA_NON_SECURE_RAM_SIZE)) { + define symbol MBED_RAM_SIZE = PSA_NON_SECURE_RAM_SIZE; + } else { + define symbol MBED_RAM_SIZE = 0x10000; + } +} + +} else { + +/* Resolve secure ROM start */ +if (! isdefinedsymbol(MBED_ROM_START)) { + if (isdefinedsymbol(PSA_SECURE_ROM_START)) { + define symbol MBED_ROM_START = PSA_SECURE_ROM_START; + } else { + define symbol MBED_ROM_START = 0x0; + } +} + +/* Resolve secure ROM size */ +if (! isdefinedsymbol(MBED_ROM_SIZE)) { + if (isdefinedsymbol(PSA_SECURE_ROM_SIZE)) { + define symbol MBED_ROM_SIZE = PSA_SECURE_ROM_SIZE; + } else { + define symbol MBED_ROM_SIZE = 0x40000; + } +} + +/* Resolve secure RAM start */ +if (! isdefinedsymbol(MBED_RAM_START)) { + if (isdefinedsymbol(PSA_SECURE_RAM_START)) { + define symbol MBED_RAM_START = PSA_SECURE_RAM_START; + } else { + define symbol MBED_RAM_START = 0x20000000; + } +} + +/* Resolve secure RAM size */ +if (! isdefinedsymbol(MBED_RAM_SIZE)) { + if (isdefinedsymbol(PSA_SECURE_RAM_SIZE)) { + define symbol MBED_RAM_SIZE = PSA_SECURE_RAM_SIZE; + } else { + define symbol MBED_RAM_SIZE = 0x8000; + } +} + +} + +/* Resolved flash/SRAM partition */ +if (DOMAIN_NS) { + +/* Resolved secure ROM layout */ +define symbol NU_ROM_START_S = 0x0; +define symbol NU_ROM_SIZE_S = (0x80000 - MBED_ROM_SIZE); +/* Resolved secure RAM layout */ +define symbol NU_RAM_START_S = 0x20000000; +define symbol NU_RAM_SIZE_S = (0x18000 - MBED_RAM_SIZE); + +/* Resolved non-secure ROM layout */ +define symbol NU_ROM_START_NS = MBED_ROM_START; +define symbol NU_ROM_SIZE_NS = MBED_ROM_SIZE; +/* Resolved non-secure RAM layout */ +define symbol NU_RAM_START_NS = MBED_RAM_START; +define symbol NU_RAM_SIZE_NS = MBED_RAM_SIZE; + +} else { + +/* Resolved secure ROM layout */ +define symbol NU_ROM_START_S = MBED_ROM_START; +define symbol NU_ROM_SIZE_S = MBED_ROM_SIZE; +/* Resolved secure RAM layout */ +define symbol NU_RAM_START_S = MBED_RAM_START; +define symbol NU_RAM_SIZE_S = MBED_RAM_SIZE; + +/* Resolved non-secure ROM layout */ +define symbol NU_ROM_START_NS = (0x10000000 + MBED_ROM_SIZE); +define symbol NU_ROM_SIZE_NS = (0x80000 - MBED_ROM_SIZE); +/* Resolved non-secure RAM layout */ +define symbol NU_RAM_START_NS = (0x30000000 + MBED_RAM_SIZE); +define symbol NU_RAM_SIZE_NS = (0x18000 - MBED_RAM_SIZE); + +} + +/* Mbed build tool passes just APPLICATION_xxx macros to C/C++ files and just + * MBED_APP_xxx macros to linker files even though they mean the same thing. + * Because this file is to include by both C/C++ files and linker files, we add + * these macros according to the others for consistency when they are missing + * in compile or link stage. */ + +if (!isdefinedsymbol(APPLICATION_ADDR)) { + if (isdefinedsymbol(MBED_APP_START)) { + define symbol APPLICATION_ADDR = MBED_APP_START; + } else { + define symbol APPLICATION_ADDR = MBED_ROM_START; + } +} + +if (!isdefinedsymbol(APPLICATION_SIZE)) { + if (isdefinedsymbol(MBED_APP_SIZE)) { + define symbol APPLICATION_SIZE = MBED_APP_SIZE; + } else { + define symbol APPLICATION_SIZE = MBED_ROM_SIZE; + } +} + +if (!isdefinedsymbol(APPLICATION_RAM_ADDR)) { + if (isdefinedsymbol(MBED_RAM_APP_START)) { + define symbol APPLICATION_RAM_ADDR = MBED_RAM_APP_START; + } else { + define symbol APPLICATION_RAM_ADDR = MBED_RAM_START; + } +} + +if (!isdefinedsymbol(APPLICATION_RAM_SIZE)) { + if (isdefinedsymbol(MBED_RAM_APP_SIZE)) { + define symbol APPLICATION_RAM_SIZE = MBED_RAM_APP_SIZE; + } else { + define symbol APPLICATION_RAM_SIZE = MBED_RAM_SIZE; + } +} + +if (!isdefinedsymbol(MBED_APP_START)) { + define symbol MBED_APP_START = APPLICATION_ADDR; +} + +if (!isdefinedsymbol(MBED_APP_SIZE)) { + define symbol MBED_APP_SIZE = APPLICATION_SIZE; +} + +if (!isdefinedsymbol(MBED_RAM_APP_START)) { + define symbol MBED_RAM_APP_START = APPLICATION_RAM_ADDR; +} + +if (!isdefinedsymbol(MBED_RAM_APP_SIZE)) { + define symbol MBED_RAM_APP_SIZE = APPLICATION_RAM_SIZE; +} + +if (APPLICATION_ADDR != MBED_APP_START) { + error "APPLICATION_ADDR and MBED_APP_START are not the same!!!"; +} + +if (APPLICATION_SIZE != MBED_APP_SIZE) { + error "APPLICATION_SIZE and MBED_APP_SIZE are not the same!!!"; +} + +if (APPLICATION_RAM_ADDR != MBED_RAM_APP_START) { + error "APPLICATION_RAM_ADDR and MBED_RAM_APP_START are not the same!!!"; +} + +if (APPLICATION_RAM_SIZE != MBED_RAM_APP_SIZE) { + error "APPLICATION_RAM_SIZE and MBED_RAM_APP_SIZE are not the same!!!"; +} + +/* Determine NSC area + * + * Requirements for NSC area: + * 1. Requested by SAU, NSC area must start at 32 byte-aligned boundary. + * 2. By IDAU, 0~0x4000 is secure. NSC can only locate in 0x4000~0x10000000. + * 3. Greentea flash IAP uses last 2 sectors for its test. Avoid this range. + * 4. Greentea NVSTORE uses last 2 sectors or 4 KiB x 2 for its test. Avoid this range. + * 5. KVStore uses last a few KiB. Avoid this range. + * 6. Due to TFM build process, TFM and its tests must generate the same cmse_lib.o. + * To this end, TZ NSC location must fix at a well-known location and cannot place + * arbitrarily. + * + * Configurable for NSC area: + * We cannot configure NSC location via configuration parameter because the generated + * configuration macros are just passed to C/C++ files but not to linker files. So + * we can only hardcode NSC location here as constants (to be included by linker file). + * + * Locate NSC area at end of secure flash: + * We decide to locate NSC area at end of secure flash. To avoid this area + * accidentally erased by flash IAP operation, flash IAP must configure to exclude + * this area. + */ +/* TZ NSC area defaults to 4KiB. */ +define symbol NU_TZ_NSC_SIZE = 0x1000; +/* TZ NSC area defaults to from secure ROM end */ +define symbol NU_TZ_NSC_START = (NU_ROM_START_S + NU_ROM_SIZE_S - NU_TZ_NSC_SIZE); + +/* Configuration of TDB internal storage area + * + * 1. Must match "tdb_internal/mbed_lib.json" + * 2. Can pass to linker files for memory layout check + * + * With this approach, we can pass this configuration from "tdb_internal/mbed_lib.json" + * to linker file for detecting memory layout error before run-time. + */ +if (!DOMAIN_NS && !TFM_LVL) { + /* TDB internal storage area defaults to 32KiB at end of flash. */ + define symbol NU_TDB_INTERNAL_STORAGE_SIZE = 0x8000; + define symbol NU_TDB_INTERNAL_STORAGE_START = (NU_ROM_START_S + NU_ROM_SIZE_S - NU_TZ_NSC_SIZE - NU_TDB_INTERNAL_STORAGE_SIZE); +} + +/* Configuration of flash IAP area */ +define symbol NU_FLASHIAP_SECURE_START = NU_ROM_START_S; +/* Exclude NSC area to avoid accidentally erased */ +define symbol NU_FLASHIAP_SECURE_SIZE = (NU_ROM_SIZE_S - NU_TZ_NSC_SIZE); +define symbol NU_FLASHIAP_NONSECURE_START = NU_ROM_START_NS; +define symbol NU_FLASHIAP_NONSECURE_SIZE = NU_ROM_SIZE_NS; diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/device/startup_M2351.c b/targets/TARGET_NUVOTON/TARGET_M2351/device/startup_M2351.c index c59052d9242..50456977700 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/device/startup_M2351.c +++ b/targets/TARGET_NUVOTON/TARGET_M2351/device/startup_M2351.c @@ -19,15 +19,17 @@ #include "M2351.h" /* Suppress warning messages */ -#if defined(__CC_ARM) +#if defined(__ARMCC_VERSION) // Suppress warning message: extended constant initializer used #pragma diag_suppress 1296 #elif defined(__ICCARM__) +// Suppress warning message Pe1665 +#pragma diag_suppress=Pe1665 #elif defined(__GNUC__) #endif /* Macro Definitions */ -#if defined(__CC_ARM) +#if defined(__ARMCC_VERSION) #define WEAK __attribute__ ((weak)) #define ALIAS(f) __attribute__ ((weak, alias(#f))) @@ -54,7 +56,7 @@ void FUN(void) __attribute__ ((weak, alias(#FUN_ALIAS))); /* Initialize segments */ -#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#if defined(__ARMCC_VERSION) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) && (TFM_LVL > 0) extern uint32_t Image$$ARM_LIB_STACK_MSP$$ZI$$Limit; #else @@ -189,11 +191,16 @@ WEAK_ALIAS_FUNC(TRNG_IRQHandler, Default_Handler) // 101: /* Vector table */ -#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#if defined(__ARMCC_VERSION) __attribute__ ((section("RESET"))) const uint32_t __vector_handlers[] = { #elif defined(__ICCARM__) +#if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) && (TFM_LVL > 0) +extern uint32_t CSTACK_MSP$$Limit; +extern uint32_t CSTACK$$Limit; +#else extern uint32_t CSTACK$$Limit; +#endif const uint32_t __vector_table[] @ ".intvec" = { #elif defined(__GNUC__) __attribute__ ((section(".vector_table"))) @@ -201,18 +208,22 @@ const uint32_t __vector_handlers[] = { #endif /* Configure Initial Stack Pointer, using linker-generated symbols */ -#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) #if defined (__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) && (TFM_LVL > 0) +#if defined(__ARMCC_VERSION) (uint32_t) &Image$$ARM_LIB_STACK_MSP$$ZI$$Limit, +#elif defined(__ICCARM__) + (uint32_t) &CSTACK_MSP$$Limit, +#elif defined(__GNUC__) + (uint32_t) &__StackTop, +#endif #else +#if defined(__ARMCC_VERSION) (uint32_t) &Image$$ARM_LIB_STACK$$ZI$$Limit, -#endif - #elif defined(__ICCARM__) - //(uint32_t) __sfe("CSTACK"), (uint32_t) &CSTACK$$Limit, #elif defined(__GNUC__) (uint32_t) &__StackTop, +#endif #endif (uint32_t) Reset_Handler, // Reset Handler @@ -355,14 +366,21 @@ void Reset_Handler_1(void); * code during stack switch. */ __attribute__((naked)) void Reset_Handler(void) { +#if !defined(__ICCARM__) __asm(".syntax unified \n"); __asm(".globl Reset_Handler_1 \n"); +#endif /* Secure TFM requires PSP as boot stack */ #if TFM_LVL != 0 +#if !defined(__ICCARM__) __asm(".globl Image$$ARM_LIB_STACK$$ZI$$Limit \n"); __asm("movw r0, #:lower16:Image$$ARM_LIB_STACK$$ZI$$Limit \n"); // Initialize PSP __asm("movt r0, #:upper16:Image$$ARM_LIB_STACK$$ZI$$Limit \n"); +#else + __asm(".globl Image$$ARM_LIB_STACK$$ZI$$Limit \n"); + __asm("mov32 r0, Image$$ARM_LIB_STACK$$ZI$$Limit \n"); +#endif __asm("msr psp, r0 \n"); __asm("mrs r0, control \n"); // Switch SP to PSP __asm("movs r1, #2 \n"); @@ -370,8 +388,12 @@ __attribute__((naked)) void Reset_Handler(void) __asm("msr control, r0 \n"); #endif +#if !defined(__ICCARM__) __asm("movw r0, #:lower16:Reset_Handler_1 \n"); __asm("movt r0, #:upper16:Reset_Handler_1 \n"); +#else + __asm("mov32 r0, Reset_Handler_1 \n"); +#endif __asm("bx r0 \n"); } @@ -399,7 +421,7 @@ void Reset_Handler(void) /* SystemInit() must be called at the very start. */ SystemInit(); -#if defined(__CC_ARM) || (defined(__ARMCC_VERSION) && (__ARMCC_VERSION >= 6010050)) +#if defined(__ARMCC_VERSION) __main(); #elif defined(__ICCARM__) @@ -466,18 +488,3 @@ void Default_Handler(void) { while (1); } - -#if 0 -#if defined(__CC_ARM) -uint32_t GetPC(void) -{ - uint32_t val=0; -__asm { - MOV R0, #0 // dumy - //MOV R0, LR // Except R0~R12, SP/LR/PC cannot be read or directly modified in inline assembly code - MOV val, R0 - } - return val; -} -#endif -#endif \ No newline at end of file diff --git a/targets/TARGET_NUVOTON/TARGET_M2351/rtc_api.c b/targets/TARGET_NUVOTON/TARGET_M2351/rtc_api.c index d1ca8e8eba0..0de8858174b 100644 --- a/targets/TARGET_NUVOTON/TARGET_M2351/rtc_api.c +++ b/targets/TARGET_NUVOTON/TARGET_M2351/rtc_api.c @@ -318,20 +318,20 @@ void rtc_free_s(void) int32_t rtc_isenabled_s(void) { int32_t enabled = 0; - tfm_ns_lock_dispatch(rtc_isenabled_veneer, &enabled, 0, 0, 0); + tfm_ns_lock_dispatch(rtc_isenabled_veneer, (uint32_t) &enabled, 0, 0, 0); return enabled; } int64_t rtc_read_s(void) { int64_t t = 0; - tfm_ns_lock_dispatch(rtc_read_veneer, &t, 0, 0, 0); + tfm_ns_lock_dispatch(rtc_read_veneer, (uint32_t) &t, 0, 0, 0); return t; } void rtc_write_s(int64_t t) { - tfm_ns_lock_dispatch(rtc_write_veneer, &t, 0, 0, 0); + tfm_ns_lock_dispatch(rtc_write_veneer, (uint32_t) &t, 0, 0, 0); } #elif defined(__ARM_FEATURE_CMSE) && (__ARM_FEATURE_CMSE == 3U) diff --git a/targets/targets.json b/targets/targets.json index 2c5c984dea2..70f6d83add3 100644 --- a/targets/targets.json +++ b/targets/targets.json @@ -12547,9 +12547,6 @@ "LPTICKER_DELAY_TICKS=4" ], "is_disk_virtual": true, - "supported_toolchains": [ - "ARMC6" - ], "config": { "gpio-irq-debounce-enable": { "help": "Enable GPIO IRQ debounce", @@ -12620,6 +12617,10 @@ ], "core": "Cortex-M23-NS", "trustzone": true, + "supported_toolchains": [ + "ARMC6", + "IAR" + ], "extra_labels_add": [ "M23_NS", "NU_PREBUILD_SECURE" @@ -12648,6 +12649,9 @@ ], "core": "Cortex-M23", "trustzone": true, + "supported_toolchains": [ + "ARMC6" + ], "extra_labels_add": [ "M23_S" ], @@ -12674,6 +12678,10 @@ "NU_PFM_M2351" ], "core": "Cortex-M23-NS", + "supported_toolchains": [ + "ARMC6", + "IAR" + ], "tfm.level": 1, "extra_labels_add": [ "M23_NS", @@ -12707,6 +12715,9 @@ "NU_PFM_M2351" ], "core": "Cortex-M23", + "supported_toolchains": [ + "ARMC6" + ], "tfm.level": 1, "extra_labels_add": [ "M23_S",