Merge pull request #13100 from vmedcy/pr/fix-13058

0xc0170 · web-flow · commit e901ea98451c · 2020-06-16T13:45:06.000+02:00
Fix BOOT_HEADER_SIZE allocation in ARM scatter files (#13058)
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_064S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct
@@ -148,14 +148,9 @@
 
 
 ; Cortex-M0+ application flash area
-LR_IROM1 FLASH_START (FLASH_SIZE - 0x8000)
+LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE - 0x8000)
 {
-    .cy_app_header +0
-    {
-        * (.cy_app_header)
-    }
-
-    ER_FLASH_VECTORS +BOOT_HEADER_SIZE
+    ER_FLASH_VECTORS +0
     {
         * (RESET, +FIRST)
     }
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xx7_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xx7_cm0plus.sct
@@ -148,14 +148,9 @@
 
 
 ; Cortex-M0+ application flash area
-LR_IROM1 FLASH_START (FLASH_SIZE - 0x8000)
+LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE - 0x8000)
 {
-    .cy_app_header +0
-    {
-        * (.cy_app_header)
-    }
-
-    ER_FLASH_VECTORS +BOOT_HEADER_SIZE
+    ER_FLASH_VECTORS +0
     {
         * (RESET, +FIRST)
     }
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xx7_cm4.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CPROTO_064_SB/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xx7_cm4.sct
@@ -134,9 +134,9 @@
 
 
 ; Cortex-M4 application flash area
-LR_IROM1 FLASH_START FLASH_SIZE
+LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE)
 {
-    ER_FLASH_VECTORS +BOOT_HEADER_SIZE
+    ER_FLASH_VECTORS +0
     {
         * (RESET, +FIRST)
     }
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYESKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYESKIT_064B0S2_4343W/device/COMPONENT_CM0P/TOOLCHAIN_ARM/cyb06xxa_cm0plus.sct
@@ -148,14 +148,9 @@
 
 
 ; Cortex-M0+ application flash area
-LR_IROM1 FLASH_START (FLASH_SIZE - 0x8000)
+LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE - 0x8000)
 {
-    .cy_app_header +0
-    {
-        * (.cy_app_header)
-    }
-
-    ER_FLASH_VECTORS +BOOT_HEADER_SIZE
+    ER_FLASH_VECTORS +0
     {
         * (RESET, +FIRST)
     }
diff --git a/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYESKIT_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4.sct b/targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CYESKIT_064B0S2_4343W/device/COMPONENT_CM4/TOOLCHAIN_ARM/cyb06xxa_cm4.sct
@@ -134,9 +134,9 @@
 
 
 ; Cortex-M4 application flash area
-LR_IROM1 FLASH_START FLASH_SIZE
+LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE)
 {
-    ER_FLASH_VECTORS +BOOT_HEADER_SIZE
+    ER_FLASH_VECTORS +0
     {
         * (RESET, +FIRST)
     }

Original file line number	Diff line number	Diff line change
`@@ -148,14 +148,9 @@`
`148`	`148`
`149`	`149`
`150`	`150`	`; Cortex-M0+ application flash area`
`151`		`-LR_IROM1 FLASH_START (FLASH_SIZE - 0x8000)`
	`151`	`+LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE - 0x8000)`
`152`	`152`	`{`
`153`		`- .cy_app_header +0`
`154`		`- {`
`155`		`- * (.cy_app_header)`
`156`		`- }`
`157`		`-`
`158`		`- ER_FLASH_VECTORS +BOOT_HEADER_SIZE`
	`153`	`+ ER_FLASH_VECTORS +0`
`159`	`154`	`{`
`160`	`155`	`* (RESET, +FIRST)`
`161`	`156`	`}`
Original file line number	Diff line number	Diff line change
`@@ -134,9 +134,9 @@`
`134`	`134`
`135`	`135`
`136`	`136`	`; Cortex-M4 application flash area`
`137`		`-LR_IROM1 FLASH_START FLASH_SIZE`
	`137`	`+LR_IROM1 (FLASH_START + BOOT_HEADER_SIZE) (FLASH_SIZE - BOOT_HEADER_SIZE)`
`138`	`138`	`{`
`139`		`- ER_FLASH_VECTORS +BOOT_HEADER_SIZE`
	`139`	`+ ER_FLASH_VECTORS +0`
`140`	`140`	`{`
`141`	`141`	`* (RESET, +FIRST)`
`142`	`142`	`}`