targets:MIMXRT1050: Update link file for application

For the application(firmware) booted by bootloader(OTA),
the image doesn't need the "flash_config" and "ivt" header.
So update the link file to support both kinds of application
(firmware) booted by bootROM and bootloader.

In default, the compilation will get the image with
"flash_config" and "ivt" header, for example the bootloader
compiling.

When compiling the OTA application image, please add the
line as below in the mbed_app.json file.

	"target.macros_add" : ["MBED_APP_COMPILE"]

This will remove the "flash_config" and "ivt" header in the
final image.

Signed-off-by: Gavin Liu <[email protected]>

Author: liugang-gavin

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_ARM_STD/MIMXRT1052xxxxx.sct

@@ -42,6 +42,7 @@
   #define MBED_APP_SIZE 0x400000
 #endif
 
+#if !defined(MBED_APP_COMPILE)
 #define m_flash_config_start           MBED_APP_START
 #define m_flash_config_size            0x00001000
 
@@ -53,6 +54,13 @@
 
 #define m_text_start                   MBED_APP_START + 0x2400
 #define m_text_size                    MBED_APP_SIZE - 0x2400
+#else
+#define m_interrupts_start             MBED_APP_START
+#define m_interrupts_size              0x00000400
+
+#define m_text_start                   MBED_APP_START + 0x400
+#define m_text_size                    MBED_APP_SIZE - 0x400
+#endif
 
 #define m_text2_start                  0x00000000
 #define m_text2_size                   0x00020000
@@ -90,7 +98,8 @@
   #define Heap_Size                    0x0400
 #endif
 
-LR_IROM1 m_flash_config_start m_text_start+m_text_size-m_flash_config_start {   ; load region size_region
+LR_IROM1 MBED_APP_START m_text_start+m_text_size-MBED_APP_START {   ; load region size_region
+#if !defined(MBED_APP_COMPILE)
   RW_m_config_text m_flash_config_start FIXED m_flash_config_size { ; load address = execution address
     * (.boot_hdr.conf, +FIRST)
   }
@@ -100,6 +109,7 @@ LR_IROM1 m_flash_config_start m_text_start+m_text_size-m_flash_config_start {
     * (.boot_hdr.boot_data)
     * (.boot_hdr.dcd_data)
   }
+#endif
   VECTOR_ROM m_interrupts_start FIXED m_interrupts_size { ; load address = execution address
     * (RESET,+FIRST)
   }

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_GCC_ARM/MIMXRT1052xxxxx.ld

@@ -50,10 +50,15 @@ M_VECTOR_RAM_SIZE = DEFINED(__ram_vector_table__) ? 0x0400 : 0x0;
 /* Specify the memory areas */
 MEMORY
 {
+#if !defined(MBED_APP_COMPILE)
   m_flash_config        (RX)  : ORIGIN = MBED_APP_START, LENGTH = 0x00001000
   m_ivt                 (RX)  : ORIGIN = MBED_APP_START + 0x1000, LENGTH = 0x00001000
   m_interrupts          (RX)  : ORIGIN = MBED_APP_START + 0x2000, LENGTH = 0x00000400
   m_text                (RX)  : ORIGIN = MBED_APP_START + 0x2400, LENGTH = MBED_APP_SIZE - 0x2400
+#else
+  m_interrupts          (RX)  : ORIGIN = MBED_APP_START, LENGTH = 0x00000400
+  m_text                (RX)  : ORIGIN = MBED_APP_START + 0x400, LENGTH = MBED_APP_SIZE - 0x400
+#endif
   m_text2               (RX)  : ORIGIN = 0x00000000, LENGTH = 0x00020000
   m_data                (RW)  : ORIGIN = 0x80000000, LENGTH = 0x01E00000
   m_ncache              (RW)  : ORIGIN = 0x81E00000, LENGTH = 0x00200000
@@ -64,6 +69,7 @@ MEMORY
 /* Define output sections */
 SECTIONS
 {
+#if !defined(MBED_APP_COMPILE)
   .flash_config :
   {
     . = ALIGN(8);
@@ -82,7 +88,7 @@ SECTIONS
     KEEP(* (.boot_hdr.dcd_data))      /* dcd section */
     . = ALIGN(8);
   } > m_ivt
-
+#endif
   /* The startup code goes first into internal RAM */
   .interrupts :
   {

targets/TARGET_NXP/TARGET_MCUXpresso_MCUS/TARGET_MIMXRT1050/device/TOOLCHAIN_IAR/MIMXRT1052xxxxx.icf

@@ -46,11 +46,19 @@ define symbol __heap_size__=0x10000;
 define symbol __ram_vector_table_size__ =  isdefinedsymbol(__ram_vector_table__) ? 0x00000400 : 0;
 define symbol __ram_vector_table_offset__ =  isdefinedsymbol(__ram_vector_table__) ? 0x000003FF : 0;
 
-define symbol m_interrupts_start       = MBED_APP_START + 0x2000;
-define symbol m_interrupts_end         = MBED_APP_START + 0x23FF;
+if (!isdefinedsymbol(MBED_APP_COMPILE)) {
+    define symbol m_interrupts_start       = MBED_APP_START + 0x2000;
+    define symbol m_interrupts_end         = MBED_APP_START + 0x23FF;
 
-define symbol m_text_start             = MBED_APP_START + 0x2400;
-define symbol m_text_end               = MBED_APP_START + MBED_APP_SIZE - 1;
+    define symbol m_text_start             = MBED_APP_START + 0x2400;
+    define symbol m_text_end               = MBED_APP_START + MBED_APP_SIZE - 1;
+} else {
+    define symbol m_interrupts_start       = MBED_APP_START;
+    define symbol m_interrupts_end         = MBED_APP_START + 0x3FF;
+
+    define symbol m_text_start             = MBED_APP_START + 0x400;
+    define symbol m_text_end               = MBED_APP_START + MBED_APP_SIZE - 1;
+}
 
 define symbol m_text2_start            = 0x00000000;
 define symbol m_text2_end              = 0x0001FFFF;
@@ -70,10 +78,12 @@ define symbol m_data3_end              = 0x81DFFFFF;
 define symbol m_ncache_start           = 0x81E00000;
 define symbol m_ncache_end             = 0x81FFFFFF;
 
-define exported symbol m_boot_hdr_conf_start = MBED_APP_START;
-define symbol m_boot_hdr_ivt_start           = MBED_APP_START + 0x1000;
-define symbol m_boot_hdr_boot_data_start     = MBED_APP_START + 0x1020;
-define symbol m_boot_hdr_dcd_data_start      = MBED_APP_START + 0x1030;
+if (!isdefinedsymbol(MBED_APP_COMPILE)) {
+    define exported symbol m_boot_hdr_conf_start = MBED_APP_START;
+    define symbol m_boot_hdr_ivt_start           = MBED_APP_START + 0x1000;
+    define symbol m_boot_hdr_boot_data_start     = MBED_APP_START + 0x1020;
+    define symbol m_boot_hdr_dcd_data_start      = MBED_APP_START + 0x1030;
+}
 
 /* Sizes */
 if (isdefinedsymbol(__stack_size__)) {
@@ -117,12 +127,14 @@ do not initialize  { section .noinit };
 
 place at address mem: m_interrupts_start    { readonly section .intvec };
 
-place at address mem:m_boot_hdr_conf_start { section .boot_hdr.conf };
-place at address mem:m_boot_hdr_ivt_start { section .boot_hdr.ivt };
-place at address mem:m_boot_hdr_boot_data_start { readonly section .boot_hdr.boot_data };
-place at address mem:m_boot_hdr_dcd_data_start { readonly section .boot_hdr.dcd_data };
+if (!isdefinedsymbol(MBED_APP_COMPILE)) {
+    place at address mem:m_boot_hdr_conf_start { section .boot_hdr.conf };
+    place at address mem:m_boot_hdr_ivt_start { section .boot_hdr.ivt };
+    place at address mem:m_boot_hdr_boot_data_start { readonly section .boot_hdr.boot_data };
+    place at address mem:m_boot_hdr_dcd_data_start { readonly section .boot_hdr.dcd_data };
+    keep{ section .boot_hdr.conf, section .boot_hdr.ivt, section .boot_hdr.boot_data, section .boot_hdr.dcd_data };
+}
 
-keep{ section .boot_hdr.conf, section .boot_hdr.ivt, section .boot_hdr.boot_data, section .boot_hdr.dcd_data };
 
 place in TEXT_region                        { readonly };
 place in DATA3_region                       { block RW };