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tests/TESTS/mbed_hal/critical_section Expand file tree Collapse file tree 5 files changed +8
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lines changed Original file line number Diff line number Diff line change @@ -128,7 +128,7 @@ static void mbed_cpy_nvic(void)
128128 VTOR register and for A9 for which CMSIS doesn't define NVIC_SetVector; in both cases target code is
129129 responsible for correctly handling the vectors.
130130 */
131- #if !defined(__CORTEX_M0 ) && !defined(__CORTEX_A9 )
131+ #if !defined(__CORTEX_M0 ) && !defined(__CORTEX_A )
132132#ifdef NVIC_RAM_VECTOR_ADDRESS
133133 uint32_t * old_vectors = (uint32_t * )SCB -> VTOR ;
134134 uint32_t * vectors = (uint32_t * )NVIC_RAM_VECTOR_ADDRESS ;
@@ -137,5 +137,5 @@ static void mbed_cpy_nvic(void)
137137 }
138138 SCB -> VTOR = (uint32_t )NVIC_RAM_VECTOR_ADDRESS ;
139139#endif /* NVIC_RAM_VECTOR_ADDRESS */
140- #endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A9 ) */
140+ #endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A ) */
141141}
Original file line number Diff line number Diff line change @@ -26,7 +26,7 @@ static bool state_saved = false;
2626
2727static bool are_interrupts_enabled (void )
2828{
29- #if defined(__CORTEX_A9 )
29+ #if defined(__CORTEX_A )
3030 return ((__get_CPSR () & 0x80 ) == 0 );
3131#else
3232 return ((__get_PRIMASK () & 0x1 ) == 0 );
Original file line number Diff line number Diff line change @@ -29,7 +29,7 @@ using utest::v1::Case;
2929
3030bool test_are_interrupts_enabled (void )
3131{
32- #if defined(__CORTEX_A9 )
32+ #if defined(__CORTEX_A )
3333 return ((__get_CPSR () & 0x80 ) == 0 );
3434#else
3535 return ((__get_PRIMASK () & 0x1 ) == 0 );
Original file line number Diff line number Diff line change @@ -27,7 +27,7 @@ static uint32_t critical_section_reentrancy_counter = 0;
2727
2828bool core_util_are_interrupts_enabled (void )
2929{
30- #if defined(__CORTEX_A9 )
30+ #if defined(__CORTEX_A )
3131 return ((__get_CPSR () & 0x80 ) == 0 );
3232#else
3333 return ((__get_PRIMASK () & 0x1 ) == 0 );
@@ -36,7 +36,7 @@ bool core_util_are_interrupts_enabled(void)
3636
3737bool core_util_is_isr_active (void )
3838{
39- #if defined(__CORTEX_A9 )
39+ #if defined(__CORTEX_A )
4040 switch (__get_CPSR () & 0x1FU ) {
4141 case CPSR_M_USR :
4242 case CPSR_M_SYS :
Original file line number Diff line number Diff line change @@ -63,7 +63,7 @@ void mbed_copy_nvic(void)
6363 VTOR register and for A9 for which CMSIS doesn't define NVIC_SetVector; in both cases target code is
6464 responsible for correctly handling the vectors.
6565 */
66- #if !defined(__CORTEX_M0 ) && !defined(__CORTEX_A9 )
66+ #if !defined(__CORTEX_M0 ) && !defined(__CORTEX_A )
6767#ifdef NVIC_RAM_VECTOR_ADDRESS
6868 uint32_t * old_vectors = (uint32_t * )SCB -> VTOR ;
6969 uint32_t * vectors = (uint32_t * )NVIC_RAM_VECTOR_ADDRESS ;
@@ -72,7 +72,7 @@ void mbed_copy_nvic(void)
7272 }
7373 SCB -> VTOR = (uint32_t )NVIC_RAM_VECTOR_ADDRESS ;
7474#endif /* NVIC_RAM_VECTOR_ADDRESS */
75- #endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A9 ) */
75+ #endif /* !defined(__CORTEX_M0) && !defined(__CORTEX_A ) */
7676}
7777
7878void mbed_init (void )
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