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1 | 1 | /* mbed Microcontroller Library |
2 | | - * Copyright (c) 2018-2018 ARM Limited |
| 2 | + * Copyright (c) 2018-2019 ARM Limited |
| 3 | + * Copyright (c) 2018-2019 STMicroelectronics |
3 | 4 | * |
4 | 5 | * Licensed under the Apache License, Version 2.0 (the "License"); |
5 | 6 | * you may not use this file except in compliance with the License. |
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19 | 20 |
|
20 | 21 | #include "mbed.h" |
21 | 22 | #include "USBPhy.h" |
| 23 | +#include "PeripheralPins.h" |
22 | 24 |
|
23 | | -#if defined(TARGET_DISCO_F746NG) |
24 | | -#if (MBED_CONF_TARGET_USB_SPEED == 1) // Defined in json configuration file |
25 | | -#define TARGET_DISCO_F746NG_OTG_HS |
| 25 | +#if !defined(MBED_CONF_TARGET_USB_SPEED) |
| 26 | + |
| 27 | +#if defined (USB) |
| 28 | +#define MBED_CONF_TARGET_USB_SPEED USE_USB_NO_OTG |
| 29 | +#elif defined(USB_OTG_FS) |
| 30 | +#define MBED_CONF_TARGET_USB_SPEED USE_USB_OTG_FS |
26 | 31 | #else |
27 | | -#define TARGET_DISCO_F746NG_OTG_FS |
28 | | -#endif |
| 32 | +#define MBED_CONF_TARGET_USB_SPEED USE_USB_OTG_HS |
29 | 33 | #endif |
30 | 34 |
|
31 | | -#if defined(TARGET_DISCO_F429ZI) || \ |
32 | | - defined(TARGET_DISCO_F769NI) || \ |
33 | | - defined(TARGET_DISCO_F746NG_OTG_HS) |
34 | | -#define USBHAL_IRQn OTG_HS_IRQn |
| 35 | +#endif /* !defined(MBED_CONF_TARGET_USB_SPEED) */ |
| 36 | + |
| 37 | +#if MBED_CONF_TARGET_USB_SPEED == USE_USB_NO_OTG |
| 38 | + |
| 39 | +#if defined(TARGET_STM32F3) || defined(TARGET_STM32WB) |
| 40 | +#define USBHAL_IRQn USB_HP_IRQn |
35 | 41 | #else |
36 | | -#define USBHAL_IRQn OTG_FS_IRQn |
| 42 | +#define USBHAL_IRQn USB_IRQn |
37 | 43 | #endif |
38 | 44 |
|
39 | | -#include "USBEndpoints_STM32.h" |
| 45 | +#elif (MBED_CONF_TARGET_USB_SPEED == USE_USB_OTG_FS) |
| 46 | +#define USBHAL_IRQn OTG_FS_IRQn |
40 | 47 |
|
41 | | -#define NB_ENDPOINT 4 // Must be a multiple of 4 bytes |
| 48 | +#else |
| 49 | +#define USBHAL_IRQn OTG_HS_IRQn |
42 | 50 |
|
43 | | -#define MAXTRANSFER_SIZE 0x200 |
| 51 | +#endif |
44 | 52 |
|
45 | | -#define FIFO_USB_RAM_SIZE (MAXTRANSFER_SIZE + MAX_PACKET_SIZE_EP0 + MAX_PACKET_SIZE_EP1 + MAX_PACKET_SIZE_EP2 + MAX_PACKET_SIZE_EP3) |
| 53 | +#define NB_ENDPOINT 16 |
46 | 54 |
|
47 | | -#if (FIFO_USB_RAM_SIZE > 0x500) |
48 | | -#error "FIFO dimensioning incorrect" |
49 | | -#endif |
| 55 | +// #define MAXTRANSFER_SIZE 0x200 |
| 56 | +#define MAX_PACKET_SIZE_SETUP (48) |
| 57 | +#define MAX_PACKET_SIZE_EP0 (64) |
50 | 58 |
|
51 | 59 | class USBPhyHw : public USBPhy { |
52 | 60 | public: |
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