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Cruz Monrreal
authored
Merge pull request #10033 from artokin/port_SPI_peripheral_names
Port spi_get_peripheral_name fix to some Freescale boards
2 parents 1471b4c + 647ac06 commit 76c2192

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9 files changed

+109
-29
lines changed

9 files changed

+109
-29
lines changed

‎targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/TARGET_FRDM/PeripheralNames.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -124,7 +124,7 @@ typedef enum {
124124
DAC_0 = 0
125125
} DACName;
126126

127-
127+
#define DEVICE_SPI_COUNT 3
128128
typedef enum {
129129
SPI_0 = 0,
130130
SPI_1 = 1,

‎targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_K66F/spi_api.c‎

Lines changed: 27 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,25 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
3232
/* Array of SPI bus clock frequencies */
3333
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
3434

35+
SPIName spi_get_peripheral_name(PinName mosi, PinName miso, PinName sclk)
36+
{
37+
SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
38+
SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
39+
SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
40+
41+
SPIName spi_per;
42+
43+
// If 3 wire SPI is used, the miso is not connected.
44+
if (miso == NC) {
45+
spi_per = (SPIName)pinmap_merge(spi_mosi, spi_sclk);
46+
} else {
47+
SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
48+
spi_per = (SPIName)pinmap_merge(spi_data, spi_sclk);
49+
}
50+
51+
return spi_per;
52+
}
53+
3554
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
3655
{
3756
// determine the SPI to use
@@ -95,7 +114,7 @@ void spi_frequency(spi_t *obj, int hz)
95114
DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
96115
}
97116

98-
static inline int spi_readable(spi_t * obj)
117+
static inline int spi_readable(spi_t *obj)
99118
{
100119
return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
101120
}
@@ -119,17 +138,18 @@ int spi_master_write(spi_t *obj, int value)
119138
}
120139

121140
int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
122-
char *rx_buffer, int rx_length, char write_fill) {
141+
char *rx_buffer, int rx_length, char write_fill)
142+
{
123143
int total = (tx_length > rx_length) ? tx_length : rx_length;
124144

125145
// Default write is done in each and every call, in future can create HAL API instead
126146
DSPI_SetDummyData(spi_address[obj->instance], write_fill);
127147

128-
DSPI_MasterTransferBlocking(spi_address[obj->instance], &(dspi_transfer_t){
129-
.txData = (uint8_t *)tx_buffer,
130-
.rxData = (uint8_t *)rx_buffer,
131-
.dataSize = total,
132-
.configFlags = kDSPI_MasterCtar0 | kDSPI_MasterPcs0 | kDSPI_MasterPcsContinuous,
148+
DSPI_MasterTransferBlocking(spi_address[obj->instance], &(dspi_transfer_t) {
149+
.txData = (uint8_t *)tx_buffer,
150+
.rxData = (uint8_t *)rx_buffer,
151+
.dataSize = total,
152+
.configFlags = kDSPI_MasterCtar0 | kDSPI_MasterPcs0 | kDSPI_MasterPcsContinuous,
133153
});
134154

135155
DSPI_ClearStatusFlags(spi_address[obj->instance], kDSPI_RxFifoDrainRequestFlag | kDSPI_EndOfQueueFlag);

‎targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/TARGET_FRDM/PeripheralNames.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -93,7 +93,7 @@ typedef enum {
9393
DAC_0 = 0
9494
} DACName;
9595

96-
96+
#define DEVICE_SPI_COUNT 2
9797
typedef enum {
9898
SPI_0 = 0,
9999
SPI_1 = 1,

‎targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW24D/spi_api.c‎

Lines changed: 22 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,25 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
3232
/* Array of SPI bus clock frequencies */
3333
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
3434

35+
SPIName spi_get_peripheral_name(PinName mosi, PinName miso, PinName sclk)
36+
{
37+
SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
38+
SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
39+
SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
40+
41+
SPIName spi_per;
42+
43+
// If 3 wire SPI is used, the miso is not connected.
44+
if (miso == NC) {
45+
spi_per = (SPIName)pinmap_merge(spi_mosi, spi_sclk);
46+
} else {
47+
SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
48+
spi_per = (SPIName)pinmap_merge(spi_data, spi_sclk);
49+
}
50+
51+
return spi_per;
52+
}
53+
3554
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
3655
{
3756
// determine the SPI to use
@@ -94,7 +113,7 @@ void spi_frequency(spi_t *obj, int hz)
94113
DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
95114
}
96115

97-
static inline int spi_readable(spi_t * obj)
116+
static inline int spi_readable(spi_t *obj)
98117
{
99118
return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
100119
}
@@ -118,7 +137,8 @@ int spi_master_write(spi_t *obj, int value)
118137
}
119138

120139
int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
121-
char *rx_buffer, int rx_length, char write_fill) {
140+
char *rx_buffer, int rx_length, char write_fill)
141+
{
122142
int total = (tx_length > rx_length) ? tx_length : rx_length;
123143

124144
for (int i = 0; i < total; i++) {

‎targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/TARGET_FRDM/PeripheralNames.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -63,7 +63,7 @@ typedef enum {
6363
DAC_0 = 0
6464
} DACName;
6565

66-
66+
#define DEVICE_SPI_COUNT 2
6767
typedef enum {
6868
SPI_0 = 0,
6969
SPI_1 = 1,

‎targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/TARGET_RAPIDIOT/PeripheralNames.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,7 +64,7 @@ typedef enum {
6464
DAC_0 = 0
6565
} DACName;
6666

67-
67+
#define DEVICE_SPI_COUNT 2
6868
typedef enum {
6969
SPI_0 = 0,
7070
SPI_1 = 1,

‎targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_KW41Z/spi_api.c‎

Lines changed: 22 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,25 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
3232
/* Array of SPI bus clock frequencies */
3333
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
3434

35+
SPIName spi_get_peripheral_name(PinName mosi, PinName miso, PinName sclk)
36+
{
37+
SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
38+
SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
39+
SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
40+
41+
SPIName spi_per;
42+
43+
// If 3 wire SPI is used, the miso is not connected.
44+
if (miso == NC) {
45+
spi_per = (SPIName)pinmap_merge(spi_mosi, spi_sclk);
46+
} else {
47+
SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
48+
spi_per = (SPIName)pinmap_merge(spi_data, spi_sclk);
49+
}
50+
51+
return spi_per;
52+
}
53+
3554
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
3655
{
3756
// determine the SPI to use
@@ -94,7 +113,7 @@ void spi_frequency(spi_t *obj, int hz)
94113
DSPI_MasterSetDelayTimes(spi_address[obj->instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
95114
}
96115

97-
static inline int spi_readable(spi_t * obj)
116+
static inline int spi_readable(spi_t *obj)
98117
{
99118
return (DSPI_GetStatusFlags(spi_address[obj->instance]) & kDSPI_RxFifoDrainRequestFlag);
100119
}
@@ -118,7 +137,8 @@ int spi_master_write(spi_t *obj, int value)
118137
}
119138

120139
int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
121-
char *rx_buffer, int rx_length, char write_fill) {
140+
char *rx_buffer, int rx_length, char write_fill)
141+
{
122142
int total = (tx_length > rx_length) ? tx_length : rx_length;
123143

124144
for (int i = 0; i < total; i++) {

‎targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/TARGET_FRDM/PeripheralNames.h‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -123,7 +123,7 @@ typedef enum {
123123
DAC_0 = 0
124124
} DACName;
125125

126-
126+
#define DEVICE_SPI_COUNT 3
127127
typedef enum {
128128
SPI_0 = 0,
129129
SPI_1 = 1,

‎targets/TARGET_Freescale/TARGET_MCUXpresso_MCUS/TARGET_MCU_K64F/spi_api.c‎

Lines changed: 33 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -33,6 +33,25 @@ static SPI_Type *const spi_address[] = SPI_BASE_PTRS;
3333
/* Array of SPI bus clock frequencies */
3434
static clock_name_t const spi_clocks[] = SPI_CLOCK_FREQS;
3535

36+
SPIName spi_get_peripheral_name(PinName mosi, PinName miso, PinName sclk)
37+
{
38+
SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
39+
SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
40+
SPIName spi_sclk = (SPIName)pinmap_peripheral(sclk, PinMap_SPI_SCLK);
41+
42+
SPIName spi_per;
43+
44+
// If 3 wire SPI is used, the miso is not connected.
45+
if (miso == NC) {
46+
spi_per = (SPIName)pinmap_merge(spi_mosi, spi_sclk);
47+
} else {
48+
SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
49+
spi_per = (SPIName)pinmap_merge(spi_data, spi_sclk);
50+
}
51+
52+
return spi_per;
53+
}
54+
3655
void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
3756
{
3857
// determine the SPI to use
@@ -104,7 +123,7 @@ void spi_frequency(spi_t *obj, int hz)
104123
DSPI_MasterSetDelayTimes(spi_address[obj->spi.instance], kDSPI_Ctar0, kDSPI_LastSckToPcs, busClock, 500000000 / hz);
105124
}
106125

107-
static inline int spi_readable(spi_t * obj)
126+
static inline int spi_readable(spi_t *obj)
108127
{
109128
return (DSPI_GetStatusFlags(spi_address[obj->spi.instance]) & kDSPI_RxFifoDrainRequestFlag);
110129
}
@@ -128,17 +147,18 @@ int spi_master_write(spi_t *obj, int value)
128147
}
129148

130149
int spi_master_block_write(spi_t *obj, const char *tx_buffer, int tx_length,
131-
char *rx_buffer, int rx_length, char write_fill) {
150+
char *rx_buffer, int rx_length, char write_fill)
151+
{
132152
int total = (tx_length > rx_length) ? tx_length : rx_length;
133153

134154
// Default write is done in each and every call, in future can create HAL API instead
135155
DSPI_SetDummyData(spi_address[obj->spi.instance], write_fill);
136156

137-
DSPI_MasterTransferBlocking(spi_address[obj->spi.instance], &(dspi_transfer_t){
138-
.txData = (uint8_t *)tx_buffer,
139-
.rxData = (uint8_t *)rx_buffer,
140-
.dataSize = total,
141-
.configFlags = kDSPI_MasterCtar0 | kDSPI_MasterPcs0 | kDSPI_MasterPcsContinuous,
157+
DSPI_MasterTransferBlocking(spi_address[obj->spi.instance], &(dspi_transfer_t) {
158+
.txData = (uint8_t *)tx_buffer,
159+
.rxData = (uint8_t *)rx_buffer,
160+
.dataSize = total,
161+
.configFlags = kDSPI_MasterCtar0 | kDSPI_MasterPcs0 | kDSPI_MasterPcsContinuous,
142162
});
143163

144164
DSPI_ClearStatusFlags(spi_address[obj->spi.instance], kDSPI_RxFifoDrainRequestFlag | kDSPI_EndOfQueueFlag);
@@ -181,7 +201,7 @@ static int32_t spi_master_transfer_asynch(spi_t *obj)
181201
obj->spi.status = kDSPI_Busy;
182202

183203
if (obj->spi.spiDmaMasterRx.dmaUsageState == DMA_USAGE_ALLOCATED ||
184-
obj->spi.spiDmaMasterRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
204+
obj->spi.spiDmaMasterRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
185205
status = DSPI_MasterTransferEDMA(spi_address[obj->spi.instance], &obj->spi.spi_dma_master_handle, &masterXfer);
186206
if (status == kStatus_DSPI_OutOfRange) {
187207
if (obj->spi.bits > 8) {
@@ -313,14 +333,14 @@ static void spi_buffer_set(spi_t *obj, const void *tx, uint32_t tx_length, void
313333

314334
void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint)
315335
{
316-
if(spi_active(obj)) {
336+
if (spi_active(obj)) {
317337
return;
318338
}
319339

320340
/* check corner case */
321-
if(tx_length == 0) {
341+
if (tx_length == 0) {
322342
tx_length = rx_length;
323-
tx = (void*) 0;
343+
tx = (void *) 0;
324344
}
325345

326346
/* First, set the buffer */
@@ -421,13 +441,13 @@ uint32_t spi_irq_handler_asynch(spi_t *obj)
421441
void spi_abort_asynch(spi_t *obj)
422442
{
423443
// If we're not currently transferring, then there's nothing to do here
424-
if(spi_active(obj) == 0) {
444+
if (spi_active(obj) == 0) {
425445
return;
426446
}
427447

428448
// Determine whether we're running DMA or interrupt
429449
if (obj->spi.spiDmaMasterRx.dmaUsageState == DMA_USAGE_ALLOCATED ||
430-
obj->spi.spiDmaMasterRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
450+
obj->spi.spiDmaMasterRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {
431451
DSPI_MasterTransferAbortEDMA(spi_address[obj->spi.instance], &obj->spi.spi_dma_master_handle);
432452
/* Release the dma channels if they were opportunistically allocated */
433453
if (obj->spi.spiDmaMasterRx.dmaUsageState == DMA_USAGE_TEMPORARY_ALLOCATED) {

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