Add support for CC3220SF_LAUNCHXL.

Author: linlingao

TESTS/mbed_hal/common_tickers/main.cpp

@@ -48,7 +48,17 @@ extern "C" {
 #define TICKER_100_TICKS 100
 #define TICKER_500_TICKS 500
 
+
 #define MAX_FUNC_EXEC_TIME_US 30
+
+/* On CC3220SF, each write/read register access takes 800us. This is HW limitation, per TI,
+ * http://e2e.ti.com/support/wireless_connectivity/simplelink_wifi_cc31xx_cc32xx/f/968/p/714873/2635552#2635552
+ */
+#ifdef TARGET_TI
+#define TI_MAX_SET_INTERRUPT_EXEC_TIME_US      3400
+#define TI_MAX_DISABLE_INTERRUPT_EXEC_TIME_US  2000
+#endif
+
 #define DELTA_FUNC_EXEC_TIME_US 5
 #define NUM_OF_CALLS 100
 

TESTS/mbed_hal/lp_ticker/main.cpp

@@ -107,7 +107,7 @@ void lp_ticker_info_test()
 
     TEST_ASSERT(p_ticker_info->frequency >= 4000);
     TEST_ASSERT(p_ticker_info->frequency <= 64000);
-    TEST_ASSERT(p_ticker_info->bits >= 12);
+    TEST_ASSERT(p_ticker_info->bits >= 12 && p_ticker_info->bits <= 32);
 }
 
 #if DEVICE_SLEEP

TESTS/mbed_hal_fpga_ci_test_shield/spi/main.cpp

@@ -55,7 +55,7 @@ void spi_async_handler()
 {
     int event = spi_irq_handler_asynch(&spi);
 
-    if (event == SPI_EVENT_COMPLETE) {
+    if (event & SPI_EVENT_COMPLETE) {
         async_trasfer_done = true;
     }
 }
@@ -136,7 +136,7 @@ void spi_test_common(PinName mosi, PinName miso, PinName sclk, PinName ssel, SPI
 
             async_trasfer_done = false;
 
-            spi_master_transfer(&spi, tx_buf, TRANSFER_COUNT, rx_buf, TRANSFER_COUNT, 8, (uint32_t)spi_async_handler, 0, DMA_USAGE_NEVER);
+            spi_master_transfer(&spi, tx_buf, TRANSFER_COUNT, rx_buf, TRANSFER_COUNT, 8, (uint32_t)spi_async_handler, SPI_EVENT_COMPLETE, DMA_USAGE_NEVER);
             while (!async_trasfer_done);
 
             for (int i = 0; i < TRANSFER_COUNT; i++) {

components/storage/blockdevice/COMPONENT_SD/mbed_lib.json

@@ -161,6 +161,18 @@
             "SPI_CS": "p8"
         },
         "REALTEK_RTL8195AM": {
+            "SPI_MOSI": "D11",
+            "SPI_MISO": "D12",
+            "SPI_CLK": "D13",
+            "SPI_CS": "D9"
+        },
+        "NUCLEO_F207ZG": {
+             "SPI_MOSI": "PC_12",
+             "SPI_MISO": "PC_11",
+             "SPI_CLK":  "PC_10",
+             "SPI_CS":   "PA_15"
+        },
+        "CC3220SF_LAUNCHXL": {
             "SPI_MOSI": "D11",
             "SPI_MISO": "D12",
             "SPI_CLK": "D13",

targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/PeripheralPins.h

@@ -0,0 +1,35 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2018 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef MBED_PERIPHERALPINS_H
+#define MBED_PERIPHERALPINS_H
+
+#include "pinmap.h"
+#include "PeripheralNames.h"
+
+/************GPIO***************/
+extern const PinMap PinMap_GPIO[];
+
+/************PWM****************/
+extern const PinMap PinMap_PWM[];
+
+/************UART***************/
+extern const PinMap PinMap_UART_TX[];
+extern const PinMap PinMap_UART_RX[];
+extern const PinMap PinMap_UART_CTS[];
+extern const PinMap PinMap_UART_RTS[];
+
+#endif

targets/TARGET_TI/TARGET_CC32XX/TARGET_CC3220SF/PortNames.h

@@ -0,0 +1,33 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2006-2018 ARM Limited
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+#ifndef MBED_PORTNAMES_H
+#define MBED_PORTNAMES_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+typedef enum {
+    Port0 = 0,
+    Port1 = 1,
+    Port2 = 2,
+    Port3 = 3
+} PortName;
+
+#ifdef __cplusplus
+}
+#endif
+#endif