Merge pull request #11152 from OpenNuvoton/nuvoton_fpga-ci

Nuvoton: Fix FPGA CI test failing

Author: 0xc0170

TESTS/mbed_hal_fpga_ci_test_shield/gpio/main.cpp

@@ -64,6 +64,10 @@ void test_basic_input_output(PinName pin)
     gpio_init(&gpio, pin);
     TEST_ASSERT_NOT_EQUAL(0, gpio_is_connected(&gpio));
 
+    // Some targets don't support input pull mode.
+#if !defined(TARGET_NANO100) &&         \
+    !defined(TARGET_NUC472) &&          \
+    !defined(TARGET_M451)
     // Test GPIO used as an input.
     gpio_dir(&gpio, PIN_INPUT);
 
@@ -105,6 +109,7 @@ void test_basic_input_output(PinName pin)
     TEST_ASSERT_EQUAL_INT(0, gpio_read(&gpio));
     tester.gpio_write(MbedTester::LogicalPinGPIO0, 1, true);
     TEST_ASSERT_EQUAL_INT(1, gpio_read(&gpio));
+#endif
 
     // Test GPIO used as an output.
     tester.gpio_write(MbedTester::LogicalPinGPIO0, 0, false);
@@ -221,7 +226,12 @@ void test_explicit_output(PinName pin)
 
 Case cases[] = {
     Case("generic init, input & output", all_ports<GPIOPort, DefaultFormFactor, test_basic_input_output>),
+    // Some targets don't support input pull mode.
+#if !defined(TARGET_NANO100) &&         \
+    !defined(TARGET_NUC472) &&          \
+    !defined(TARGET_M451)
     Case("explicit init, input", all_ports<GPIOPort, DefaultFormFactor, test_explicit_input>),
+#endif
     Case("explicit init, output", all_ports<GPIOPort, DefaultFormFactor, test_explicit_output>),
 };
 

TESTS/mbed_hal_fpga_ci_test_shield/i2c/main.cpp

@@ -51,6 +51,19 @@ void test_i2c_init_free(PinName sda, PinName scl)
     memset(&obj, 0, sizeof(obj));
     i2c_init(&obj, sda, scl);
     i2c_frequency(&obj, 100000);
+
+    /* Free up I2C pins
+     *
+     * The most suitable place to free up I2C pins is in i2c_free(). Due to
+     * i2c_free() not available in I2C HAL, we free up I2C pins manually by
+     * configuring them back to GPIO.
+     *
+     * Without free-up of I2C pins, SDA/SCL pins of the same I2C peripheral may
+     * share by multiple ports due to 'all ports' tests here, and the following
+     * I2C tests would be subject to interference by shared ports.
+     */
+    gpio_set(sda);
+    gpio_set(scl);
 }
 
 void i2c_test_write(PinName sda, PinName scl)

targets/TARGET_NUVOTON/TARGET_M2351/PeripheralPins.c

@@ -510,51 +510,28 @@ const PinMap PinMap_SPI_MISO[] = {
 
 const PinMap PinMap_SPI_SCLK[] = {
     {PA_2, SPI_0, SYS_GPA_MFPL_PA2MFP_SPI0_CLK},
-    {PA_4, SPI_0, SYS_GPA_MFPL_PA4MFP_SPI0_I2SMCLK},
-    {PA_5, SPI_1, SYS_GPA_MFPL_PA5MFP_SPI1_I2SMCLK},
     {PA_7, SPI_1, SYS_GPA_MFPL_PA7MFP_SPI1_CLK},
     {PA_10, SPI_2, SYS_GPA_MFPH_PA10MFP_SPI2_CLK},
     {PA_13, SPI_2, SYS_GPA_MFPH_PA13MFP_SPI2_CLK},
-    {PB_0, SPI_0, SYS_GPB_MFPL_PB0MFP_SPI0_I2SMCLK},
-    {PB_1, SPI_1, SYS_GPB_MFPL_PB1MFP_SPI1_I2SMCLK},
-    {NU_PINNAME_BIND(PB_1, SPI_1), SPI_1, SYS_GPB_MFPL_PB1MFP_SPI1_I2SMCLK},
-    {PB_1, SPI_3, SYS_GPB_MFPL_PB1MFP_SPI3_I2SMCLK},
-    {NU_PINNAME_BIND(PB_1, SPI_3), SPI_3, SYS_GPB_MFPL_PB1MFP_SPI3_I2SMCLK},
     {PB_3, SPI_1, SYS_GPB_MFPL_PB3MFP_SPI1_CLK},
-    {PB_11, SPI_0, SYS_GPB_MFPH_PB11MFP_SPI0_I2SMCLK},
-    {NU_PINNAME_BIND(PB_11, SPI_0), SPI_0, SYS_GPB_MFPH_PB11MFP_SPI0_I2SMCLK},
     {PB_11, SPI_3, SYS_GPB_MFPH_PB11MFP_SPI3_CLK},
     {NU_PINNAME_BIND(PB_11, SPI_3), SPI_3, SYS_GPB_MFPH_PB11MFP_SPI3_CLK},
     {PB_14, SPI_0, SYS_GPB_MFPH_PB14MFP_SPI0_CLK},
     {PC_1, SPI_1, SYS_GPC_MFPL_PC1MFP_SPI1_CLK},
     {PC_2, SPI_5, SYS_GPC_MFPL_PC2MFP_SPI5_CLK},
-    {PC_4, SPI_1, SYS_GPC_MFPL_PC4MFP_SPI1_I2SMCLK},
     {PC_10, SPI_3, SYS_GPC_MFPH_PC10MFP_SPI3_CLK},
-    {PC_13, SPI_2, SYS_GPC_MFPH_PC13MFP_SPI2_I2SMCLK},
     {PD_2, SPI_0, SYS_GPD_MFPL_PD2MFP_SPI0_CLK},
     {PD_5, SPI_1, SYS_GPD_MFPL_PD5MFP_SPI1_CLK},
-    {PD_13, SPI_0, SYS_GPD_MFPH_PD13MFP_SPI0_I2SMCLK},
-    {NU_PINNAME_BIND(PD_13, SPI_0), SPI_0, SYS_GPD_MFPH_PD13MFP_SPI0_I2SMCLK},
-    {PD_13, SPI_1, SYS_GPD_MFPH_PD13MFP_SPI1_I2SMCLK},
-    {NU_PINNAME_BIND(PD_13, SPI_1), SPI_1, SYS_GPD_MFPH_PD13MFP_SPI1_I2SMCLK},
-    {PD_14, SPI_0, SYS_GPD_MFPH_PD14MFP_SPI0_I2SMCLK},
-    {NU_PINNAME_BIND(PD_14, SPI_0), SPI_0, SYS_GPD_MFPH_PD14MFP_SPI0_I2SMCLK},
-    {PD_14, SPI_3, SYS_GPD_MFPH_PD14MFP_SPI3_I2SMCLK},
-    {NU_PINNAME_BIND(PD_14, SPI_3), SPI_3, SYS_GPD_MFPH_PD14MFP_SPI3_I2SMCLK},
     {PE_4, SPI_3, SYS_GPE_MFPL_PE4MFP_SPI3_CLK},
     {NU_PINNAME_BIND(PE_4, SPI_3), SPI_3, SYS_GPE_MFPL_PE4MFP_SPI3_CLK},
     {PE_4, SPI_5, SYS_GPE_MFPL_PE4MFP_SPI5_CLK},
     {NU_PINNAME_BIND(PE_4, SPI_5), SPI_5, SYS_GPE_MFPL_PE4MFP_SPI5_CLK},
-    {PE_6, SPI_3, SYS_GPE_MFPL_PE6MFP_SPI3_I2SMCLK},
     {PE_8, SPI_2, SYS_GPE_MFPH_PE8MFP_SPI2_CLK},
-    {PE_12, SPI_2, SYS_GPE_MFPH_PE12MFP_SPI2_I2SMCLK},
     {PF_8, SPI_0, SYS_GPF_MFPH_PF8MFP_SPI0_CLK},
-    {PF_10, SPI_0, SYS_GPF_MFPH_PF10MFP_SPI0_I2SMCLK},
     {PG_3, SPI_2, SYS_GPG_MFPL_PG3MFP_SPI2_CLK},
     {PG_11, SPI_5, SYS_GPG_MFPH_PG11MFP_SPI5_CLK},
     {PH_6, SPI_1, SYS_GPH_MFPL_PH6MFP_SPI1_CLK},
     {PH_8, SPI_1, SYS_GPH_MFPH_PH8MFP_SPI1_CLK},
-    {PH_10, SPI_1, SYS_GPH_MFPH_PH10MFP_SPI1_I2SMCLK},
 
     {NC,    NC,    0}
 };

targets/TARGET_NUVOTON/TARGET_M2351/PinNames.h

@@ -173,6 +173,9 @@ typedef enum {
     BUTTON1 = SW2,
     BUTTON2 = SW3,
 
+    // Force PinName to 32-bit required by NU_PINNAME_BIND(...)
+    FORCE_ENUM_PINNAME_32BIT = 0x7FFFFFFF,
+
 } PinName;
 
 #ifdef __cplusplus