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Merge pull request #1945 from jeromecoutant/PR_UpdateF0_driver_v1_6_0
STM32Cube_FW_F0_V1.6.0
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‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/Release_Notes_stm32f0xx_hal.html‎

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‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/stm32f051x8.h‎

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‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/stm32f0xx.h‎

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******************************************************************************
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* @file stm32f0xx.h
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* @author MCD Application Team
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* @version V2.2.3
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* @date 29-January-2016
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* @version V2.3.0
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* @date 27-May-2016
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* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
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*
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* The file is the unique include file that the application programmer
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#endif /* USE_HAL_DRIVER */
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/**
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* @brief CMSIS Device version number V2.2.3
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* @brief CMSIS Device version number V2.3.0
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*/
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#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
118-
#define __STM32F0_DEVICE_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
119-
#define __STM32F0_DEVICE_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */
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#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
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#define __STM32F0_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
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#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
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#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
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|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.c‎

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******************************************************************************
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* @file system_stm32f0xx.c
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* @author MCD Application Team
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* @version V2.2.3
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* @date 29-January-2016
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* @version V2.3.0
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* @date 27-May-2016
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* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
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*
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* 1. This file provides two functions and one global variable to be called from
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uint32_t SystemCoreClock = 48000000;
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const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
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const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
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/**
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* @}

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_DISCO_F051R8/system_stm32f0xx.h‎

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******************************************************************************
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* @file system_stm32f0xx.h
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* @author MCD Application Team
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* @version V2.2.3
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* @date 29-January-2016
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* @version V2.3.0
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* @date 27-May-2016
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* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
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******************************************************************************
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* @attention
@@ -73,8 +73,9 @@
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is no need to call the 2 first functions listed above, since SystemCoreClock
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variable is updated automatically.
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*/
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
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extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
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extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
77+
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
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extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
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/**
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* @}

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/stm32f030x8.h‎

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‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/stm32f0xx.h‎

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******************************************************************************
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* @file stm32f0xx.h
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* @author MCD Application Team
5-
* @version V2.2.3
6-
* @date 29-January-2016
5+
* @version V2.3.0
6+
* @date 27-May-2016
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* @brief CMSIS STM32F0xx Device Peripheral Access Layer Header File.
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*
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* The file is the unique include file that the application programmer
@@ -112,11 +112,11 @@
112112
#endif /* USE_HAL_DRIVER */
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114114
/**
115-
* @brief CMSIS Device version number V2.2.3
115+
* @brief CMSIS Device version number V2.3.0
116116
*/
117117
#define __STM32F0_DEVICE_VERSION_MAIN (0x02) /*!< [31:24] main version */
118-
#define __STM32F0_DEVICE_VERSION_SUB1 (0x02) /*!< [23:16] sub1 version */
119-
#define __STM32F0_DEVICE_VERSION_SUB2 (0x03) /*!< [15:8] sub2 version */
118+
#define __STM32F0_DEVICE_VERSION_SUB1 (0x03) /*!< [23:16] sub1 version */
119+
#define __STM32F0_DEVICE_VERSION_SUB2 (0x00) /*!< [15:8] sub2 version */
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#define __STM32F0_DEVICE_VERSION_RC (0x00) /*!< [7:0] release candidate */
121121
#define __STM32F0_DEVICE_VERSION ((__STM32F0_DEVICE_VERSION_MAIN << 24)\
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|(__STM32F0_DEVICE_VERSION_SUB1 << 16)\

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.c‎

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******************************************************************************
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* @file system_stm32f0xx.c
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* @author MCD Application Team
5-
* @version V2.2.3
6-
* @date 29-January-2016
5+
* @version V2.3.0
6+
* @date 27-May-2016
77
* @brief CMSIS Cortex-M0 Device Peripheral Access Layer System Source File.
88
*
99
* 1. This file provides two functions and one global variable to be called from
@@ -142,6 +142,7 @@
142142
uint32_t SystemCoreClock = 48000000;
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const uint8_t AHBPrescTable[16] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
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const uint8_t APBPrescTable[8] = {0, 0, 0, 0, 1, 2, 3, 4};
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/**
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* @}

‎hal/targets/cmsis/TARGET_STM/TARGET_STM32F0/TARGET_NUCLEO_F030R8/system_stm32f0xx.h‎

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******************************************************************************
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* @file system_stm32f0xx.h
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* @author MCD Application Team
5-
* @version V2.2.3
6-
* @date 29-January-2016
5+
* @version V2.3.0
6+
* @date 27-May-2016
77
* @brief CMSIS Cortex-M0 Device System Source File for STM32F0xx devices.
88
******************************************************************************
99
* @attention
@@ -73,8 +73,9 @@
7373
is no need to call the 2 first functions listed above, since SystemCoreClock
7474
variable is updated automatically.
7575
*/
76-
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
77-
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
76+
extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
77+
extern const uint8_t AHBPrescTable[16]; /*!< AHB prescalers table values */
78+
extern const uint8_t APBPrescTable[8]; /*!< APB prescalers table values */
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/**
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* @}

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