Run astyle on all FPGA files

Run astyle to correct formatting.

Author: c1728p9

components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/MbedTester.cpp

@@ -649,8 +649,8 @@ bool MbedTester::firmware_dump(mbed::FileHandle *dest, mbed::Callback<void(uint8
 
     // Mapping intentionally different from control channel to prevent
     // unintentional activation (clk and mosi flipped)
-    MbedTesterBlockDevice flash(*_clk, *_miso , *_mosi, *_aux, FLASH_SPI_FREQ_HZ);
-    sys_pin_mode_spi_serial_flash(_clk_index , _miso_index, _mosi_index, _aux_index);
+    MbedTesterBlockDevice flash(*_clk, *_miso, *_mosi, *_aux, FLASH_SPI_FREQ_HZ);
+    sys_pin_mode_spi_serial_flash(_clk_index, _miso_index, _mosi_index, _aux_index);
 
     progress(0);
 
@@ -709,8 +709,8 @@ bool MbedTester::firmware_dump(mbed::FileHandle *dest, mbed::Callback<void(uint8
 
         const uint8_t percent_done = (offset * 100) / firmware_size;
         if (percent_done != prev_percent_done) {
-           progress(percent_done);
-           prev_percent_done = percent_done;
+            progress(percent_done);
+            prev_percent_done = percent_done;
         }
     }
 
@@ -730,8 +730,8 @@ bool MbedTester::firmware_dump_all(mbed::FileHandle *dest, mbed::Callback<void(u
 
     // Mapping intentionally different from control channel to prevent
     // unintentional activation (clk and mosi flipped)
-    MbedTesterBlockDevice flash(*_clk, *_miso , *_mosi, *_aux, FLASH_SPI_FREQ_HZ);
-    sys_pin_mode_spi_serial_flash(_clk_index , _miso_index, _mosi_index, _aux_index);
+    MbedTesterBlockDevice flash(*_clk, *_miso, *_mosi, *_aux, FLASH_SPI_FREQ_HZ);
+    sys_pin_mode_spi_serial_flash(_clk_index, _miso_index, _mosi_index, _aux_index);
 
     progress(0);
 
@@ -762,8 +762,8 @@ bool MbedTester::firmware_dump_all(mbed::FileHandle *dest, mbed::Callback<void(u
 
         const uint8_t percent_done = (pos * 100) / total_size;
         if (percent_done != prev_percent_done) {
-           progress(percent_done);
-           prev_percent_done = percent_done;
+            progress(percent_done);
+            prev_percent_done = percent_done;
         }
     }
 
@@ -783,8 +783,8 @@ bool MbedTester::firmware_update(mbed::FileHandle *src, mbed::Callback<void(uint
 
     // Mapping intentionally different from control channel to prevent
     // unintentional activation (clk and mosi flipped)
-    MbedTesterBlockDevice flash(*_clk, *_miso , *_mosi, *_aux, FLASH_SPI_FREQ_HZ);
-    sys_pin_mode_spi_serial_flash(_clk_index , _miso_index, _mosi_index, _aux_index);
+    MbedTesterBlockDevice flash(*_clk, *_miso, *_mosi, *_aux, FLASH_SPI_FREQ_HZ);
+    sys_pin_mode_spi_serial_flash(_clk_index, _miso_index, _mosi_index, _aux_index);
 
     progress(0);
 

components/testing/COMPONENT_FPGA_CI_TEST_SHIELD/UARTTester.cpp

@@ -43,7 +43,7 @@ void UARTTester::set_stops(uint8_t stop_bits)
 void UARTTester::set_parity(bool enable, bool odd_n_even)
 {
     uint8_t parity = (enable ? TESTER_UART_PARITY_ENABLE : 0) |
-            (odd_n_even ? TESTER_UART_PARITY_ODD_N_EVEN : 0);
+                     (odd_n_even ? TESTER_UART_PARITY_ODD_N_EVEN : 0);
     write(TESTER_UART_PARITY, &parity, sizeof(parity));
 }