1717 * by the user application to setup the SysTick
1818 * timer or configure other parameters.
1919 *
20- * - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
21- * be called whenever the core clock is changed
20+ * - SystemCoreClockUpdate(): Updates the variables SystemD1Clock and SystemD2Clock
21+ * and must be called whenever the core clock is changed
2222 * during program execution.
2323 *
2424 *
5050
5151#include "stm32h7xx.h"
5252#include <math.h>
53+ #include "nvic_addr.h" // MBED PATCH for Bootloader
5354
5455#if !defined (HSE_VALUE )
5556#define HSE_VALUE ((uint32_t)25000000) /*!< Value of the External oscillator in Hz */
111112 is no need to call the 2 first functions listed above, since SystemCoreClock
112113 variable is updated automatically.
113114 */
114- uint32_t SystemCoreClock = 64000000 ;
115+ #if defined(CORE_CM7 )
116+ #define SystemCoreClock SystemD1Clock
117+ #elif defined(CORE_CM4 )
118+ #define SystemCoreClock SystemD2Clock
119+ #else
120+ #error "Wrong core selection"
121+ #endif
122+ uint32_t SystemD1Clock = 64000000 ;
115123 uint32_t SystemD2Clock = 64000000 ;
116124 const uint8_t D1CorePrescTable [16 ] = {0 , 0 , 0 , 0 , 1 , 2 , 3 , 4 , 1 , 2 , 3 , 4 , 6 , 7 , 8 , 9 };
117125
@@ -216,7 +224,7 @@ void SystemInit (void)
216224#ifdef VECT_TAB_SRAM
217225 SCB -> VTOR = D2_AHBSRAM_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal SRAM */
218226#else
219- SCB -> VTOR = FLASH_BANK2_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal FLASH */
227+ SCB -> VTOR = NVIC_FLASH_VECTOR_ADDRESS ; /* Vector Table Relocation in Internal FLASH */ // MBED PATCH for Bootloader
220228#endif
221229
222230#else
@@ -226,7 +234,7 @@ void SystemInit (void)
226234#ifdef VECT_TAB_SRAM
227235 SCB -> VTOR = D1_AXISRAM_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal D1 AXI-RAM */
228236#else
229- SCB -> VTOR = FLASH_BANK1_BASE | VECT_TAB_OFFSET ; /* Vector Table Relocation in Internal FLASH */
237+ SCB -> VTOR = NVIC_FLASH_VECTOR_ADDRESS ; /* Vector Table Relocation in Internal FLASH */ // MBED PATCH for Bootloader
230238#endif
231239
232240#else
@@ -237,7 +245,7 @@ void SystemInit (void)
237245}
238246
239247/**
240- * @brief Update SystemCoreClock variable according to Clock Register Values.
248+ * @brief Update SystemD1Clock and SystemD2Clock variables according to Clock Register Values.
241249 * The SystemCoreClock variable contains the core clock , it can
242250 * be used by the user application to setup the SysTick timer or configure
243251 * other parameters.
@@ -250,10 +258,10 @@ void SystemInit (void)
250258 * frequency in the chip. It is calculated based on the predefined
251259 * constant and the selected clock source:
252260 *
253- * - If SYSCLK source is CSI, SystemCoreClock will contain the CSI_VALUE(*)
254- * - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(**)
255- * - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(***)
256- * - If SYSCLK source is PLL, SystemCoreClock will contain the CSI_VALUE(*),
261+ * - If SYSCLK source is CSI, SystemD1Clock will contain the CSI_VALUE(*)
262+ * - If SYSCLK source is HSI, SystemD1Clock will contain the HSI_VALUE(**)
263+ * - If SYSCLK source is HSE, SystemD1Clock will contain the HSE_VALUE(***)
264+ * - If SYSCLK source is PLL, SystemD1Clock will contain the CSI_VALUE(*),
257265 * HSI_VALUE(**) or HSE_VALUE(***) multiplied/divided by the PLL factors.
258266 *
259267 * (*) CSI_VALUE is a constant defined in stm32h7xx_hal.h file (default value
@@ -283,16 +291,16 @@ void SystemCoreClockUpdate (void)
283291 switch (RCC -> CFGR & RCC_CFGR_SWS )
284292 {
285293 case RCC_CFGR_SWS_HSI : /* HSI used as system clock source */
286- SystemCoreClock = (uint32_t ) (HSI_VALUE >> ((RCC -> CR & RCC_CR_HSIDIV )>> 3 ));
294+ SystemD1Clock = (uint32_t ) (HSI_VALUE >> ((RCC -> CR & RCC_CR_HSIDIV )>> 3 ));
287295
288296 break ;
289297
290298 case RCC_CFGR_SWS_CSI : /* CSI used as system clock source */
291- SystemCoreClock = CSI_VALUE ;
299+ SystemD1Clock = CSI_VALUE ;
292300 break ;
293301
294302 case RCC_CFGR_SWS_HSE : /* HSE used as system clock source */
295- SystemCoreClock = HSE_VALUE ;
303+ SystemD1Clock = HSE_VALUE ;
296304 break ;
297305
298306 case RCC_CFGR_SWS_PLL1 : /* PLL1 used as system clock source */
@@ -329,27 +337,27 @@ void SystemCoreClockUpdate (void)
329337 break ;
330338 }
331339 pllp = (((RCC -> PLL1DIVR & RCC_PLL1DIVR_P1 ) >>9 ) + 1U ) ;
332- SystemCoreClock = (uint32_t )(float_t )(pllvco /(float_t )pllp );
340+ SystemD1Clock = (uint32_t )(float_t )(pllvco /(float_t )pllp );
333341 }
334342 else
335343 {
336- SystemCoreClock = 0U ;
344+ SystemD1Clock = 0U ;
337345 }
338346 break ;
339347
340348 default :
341- SystemCoreClock = CSI_VALUE ;
349+ SystemD1Clock = CSI_VALUE ;
342350 break ;
343351 }
344352
345353 /* Compute SystemClock frequency --------------------------------------------------*/
346354 tmp = D1CorePrescTable [(RCC -> D1CFGR & RCC_D1CFGR_D1CPRE )>> RCC_D1CFGR_D1CPRE_Pos ];
347355
348- /* SystemCoreClock frequency : CM7 CPU frequency */
349- SystemCoreClock >>= tmp ;
356+ /* SystemD1Clock frequency : CM7 CPU frequency */
357+ SystemD1Clock >>= tmp ;
350358
351359 /* SystemD2Clock frequency : CM4 CPU, AXI and AHBs Clock frequency */
352- SystemD2Clock = (SystemCoreClock >> ((D1CorePrescTable [(RCC -> D1CFGR & RCC_D1CFGR_HPRE )>> RCC_D1CFGR_HPRE_Pos ]) & 0x1FU ));
360+ SystemD2Clock = (SystemD1Clock >> ((D1CorePrescTable [(RCC -> D1CFGR & RCC_D1CFGR_HPRE )>> RCC_D1CFGR_HPRE_Pos ]) & 0x1FU ));
353361
354362}
355363
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