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| 1 | +# STM32H7 family |
| 2 | + |
| 3 | +[st.com STM32H7 family page](https://www.st.com/en/microcontrollers-microprocessors/stm32h7-series.html) |
| 4 | + |
| 5 | +[GitHub STM32CubeH7 FW](https://github.com/STMicroelectronics/STM32CubeH7) |
| 6 | + |
| 7 | + |
| 8 | +# NUCLEO_H743ZI / NUCLEO_H743ZI2 |
| 9 | + |
| 10 | +Note that NUCLEO_H743ZI is deprecated. Please update your board to NUCLEO_H743ZI2: |
| 11 | +- new MCU chip revision |
| 12 | +- new ST Link version |
| 13 | + |
| 14 | +STM32H743ZI devices are based on the high-performance Arm Cortex-M7 32-bit RISC core operating at up to 480 MHz. |
| 15 | + |
| 16 | +[st.com STM32H743ZI MCU page](https://www.st.com/en/microcontrollers-microprocessors/stm32h743zi.html) |
| 17 | + |
| 18 | +[st.com NUCLEO page](https://www.st.com/en/evaluation-tools/nucleo-h743zi.html) |
| 19 | + |
| 20 | +[mbed.com Target page](https://os.mbed.com/platforms/ST-Nucleo-H743ZI2/) |
| 21 | + |
| 22 | + |
| 23 | +- Total FLASH is 2 MB (0x200000) |
| 24 | + - 2x8 sectors of 128 KB |
| 25 | + - Flash memory bank 1 @ 0x0800 0000 |
| 26 | + - Flash memory bank 2 @ 0x0810 0000 |
| 27 | + |
| 28 | +- RAM: 1 MB |
| 29 | + - DTCM : 128 KB (0x20000) @0x2000 0000 |
| 30 | + - SRAM : 512 KB (0x80000) @0x2400 0000 |
| 31 | + - SRAM1 : 128 KB (0x20000) @0x3000 0000 |
| 32 | + - SRAM2 : 128 KB (0x20000) @0x3002 0000 |
| 33 | + - SRAM3 : 32 KB (0x8000) @0x3004 0000 |
| 34 | + - SRAM4 : 64 KB (0x10000) @0x3800 0000 |
| 35 | + |
| 36 | + |
| 37 | +# DISCO_H747I |
| 38 | + |
| 39 | +## Overview |
| 40 | + |
| 41 | +The STM32H7x7 lines combine the performance of the Cortex-M7 (with double-precision floating point unit) running up to 480 MHz and the Cortex-M4 core (with single-precision floating point unit). |
| 42 | + |
| 43 | +[st.com STM32H747ZI MCU page](https://www.st.com/en/microcontrollers-microprocessors/stm32h747zi.html) |
| 44 | + |
| 45 | +[st.com board page](https://www.st.com/en/evaluation-tools/stm32h747i-disco.html) |
| 46 | + |
| 47 | +[mbed.com Target page](https://os.mbed.com/platforms/ST-Discovery-H747I/) |
| 48 | + |
| 49 | +- Total FLASH is 2 MB (0x200000) |
| 50 | + - Flash memory bank 1 @ 0x0800 0000: 8 sectors of 128 KB => 1MB |
| 51 | + - Flash memory bank 2 @ 0x0810 0000: 8 sectors of 128 KB => 1MB |
| 52 | + |
| 53 | +- RAM: 1 MB |
| 54 | + - DTCM : 128 KB (0x20000) @0x2000 0000 - only CM7 side |
| 55 | + - SRAM : 512 KB (0x80000) @0x2400 0000 - shared |
| 56 | + - SRAM1 : 128 KB (0x20000) @0x3000 0000 - shared |
| 57 | + - SRAM2 : 128 KB (0x20000) @0x3002 0000 - shared |
| 58 | + - SRAM3 : 32 KB (0x8000) @0x3004 0000 - shared |
| 59 | + - SRAM4 : 64 KB (0x10000) @0x3800 0000 - shared |
| 60 | + |
| 61 | +## Dual mode configuration |
| 62 | + |
| 63 | +Configuration can be checked/changed with STM32CubeProgrammer software in the Option bytes (OB) panel. |
| 64 | + |
| 65 | +https://www.st.com/en/development-tools/stm32cubeprog.html |
| 66 | + |
| 67 | +Default configuration is booting both CM7 and CM4: |
| 68 | +- CM7 at 0x0800 0000 |
| 69 | +- CM4 at 0x0810 0000 |
| 70 | + |
| 71 | +Note that `Drag and Drop` feature for binary application is flashing at 0x0800 0000 |
| 72 | + |
| 73 | +**IP HW usage warning** |
| 74 | + |
| 75 | +All resources (GPIO, UART, SPI, ...) can be used by both cores. |
| 76 | + |
| 77 | +It is up to application to choose which instance is used by which core. |
| 78 | + |
| 79 | +For GPIO, HW semaphore have been implemented which allows applications to use same GPIO port in both sides |
| 80 | +(CM4 can use PA_1, and CM7 PA_2). |
| 81 | + |
| 82 | +NB : Virtual Com Port is using the same UART pins in CM4 and CM7. |
| 83 | + |
| 84 | +It is not recommended to enable printf from both cores without any protection mechanism. |
| 85 | + |
| 86 | +**System clock configuration** |
| 87 | + |
| 88 | +Clock configuration is shared between both cores. |
| 89 | + |
| 90 | +During boot procedure: |
| 91 | +- M7 core is managing clock tree settings, and then wake up M4 |
| 92 | +- M4 is waiting for wake up from M7 |
| 93 | + |
| 94 | +When exiting Deep Sleep mode, first core (either M4 or M7) that woke up, is setting back this clock configuration. |
| 95 | + |
| 96 | + |
| 97 | +## Make application on M7 side |
| 98 | + |
| 99 | +- Flash memory bank 1 is used |
| 100 | +- DTCM and SRAM are used |
| 101 | +- SRAM3 is used for Ethernet support |
| 102 | + |
| 103 | +As explained in the `Dual mode configuration` above part, you can drag and drop applications. |
| 104 | + |
| 105 | +For application compilation, you can use DISCO_H747I or DISCO_H747I_CM7 target name. |
| 106 | + |
| 107 | +For MBED tests execution, you have to use DISCO_H747I target name (mbed detect name). |
| 108 | + |
| 109 | + |
| 110 | +## Make application on M4 side |
| 111 | + |
| 112 | +- Flash memory bank 2 is used |
| 113 | +- SRAM1, SRAM1 and SRAM3 is used (with @0x1000 0000 alias) |
| 114 | + |
| 115 | +For application compilation, you have to use DISCO_H747I_CM4 target name. |
| 116 | + |
| 117 | +For flashing, as explained in the `Dual mode configuration` above part, you can not drag and drop applications. |
| 118 | +You have to use STM32CubeProgrammer software |
| 119 | + |
| 120 | +https://www.st.com/en/development-tools/stm32cubeprog.html |
| 121 | + |
| 122 | +Here is command lines for flashing (but you can use graphical tool): |
| 123 | +``` |
| 124 | +FLASHPATH="C:\Program Files (x86)\STMicroelectronics\STM32Cube\STM32CubeProgrammer\bin" |
| 125 | +export PATH=$FLASHPATH:$PATH |
| 126 | +STM32_Programmer_CLI -c port=SWD mode=UR -w BUILD/DISCO_H747I_CM4/ARM/mbed-os.bin 0x8100000 |
| 127 | +``` |
| 128 | + |
| 129 | +## Ethernet limitation |
| 130 | + |
| 131 | +**WARNING**: Ethernet connector is not enabled by default |
| 132 | + |
| 133 | +More information in the wiki page : [Ethernet HW Patch](https://os.mbed.com/teams/ST/wiki/DISCO_H747I-modifications-for-Ethernet) |
| 134 | + |
| 135 | + |
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